CN112086360B - 一种SiC平面MOSFET及其自对准工艺 - Google Patents
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- 238000000034 method Methods 0.000 title claims abstract description 40
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 29
- 238000005530 etching Methods 0.000 claims abstract description 19
- 229910052681 coesite Inorganic materials 0.000 claims abstract description 17
- 229910052906 cristobalite Inorganic materials 0.000 claims abstract description 17
- 239000000377 silicon dioxide Substances 0.000 claims abstract description 17
- 229910052682 stishovite Inorganic materials 0.000 claims abstract description 17
- 229910052905 tridymite Inorganic materials 0.000 claims abstract description 17
- 238000002347 injection Methods 0.000 claims abstract description 16
- 239000007924 injection Substances 0.000 claims abstract description 16
- 239000000758 substrate Substances 0.000 claims abstract description 10
- 238000001039 wet etching Methods 0.000 claims abstract description 10
- 229910052751 metal Inorganic materials 0.000 claims description 6
- 239000002184 metal Substances 0.000 claims description 6
- 238000001259 photo etching Methods 0.000 claims description 6
- 238000000151 deposition Methods 0.000 claims description 5
- 229910052782 aluminium Inorganic materials 0.000 claims description 4
- 238000000137 annealing Methods 0.000 claims description 3
- 238000005137 deposition process Methods 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 claims description 3
- 230000003647 oxidation Effects 0.000 claims description 3
- 238000007254 oxidation reaction Methods 0.000 claims description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 3
- 238000004544 sputter deposition Methods 0.000 claims description 2
- 230000003213 activating effect Effects 0.000 claims 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract description 12
- 238000002513 implantation Methods 0.000 abstract description 7
- 230000000873 masking effect Effects 0.000 abstract description 5
- 230000015572 biosynthetic process Effects 0.000 abstract description 2
- 230000007547 defect Effects 0.000 abstract description 2
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 20
- 229910010271 silicon carbide Inorganic materials 0.000 description 20
- 238000010586 diagram Methods 0.000 description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 230000005669 field effect Effects 0.000 description 3
- 238000005468 ion implantation Methods 0.000 description 3
- 238000000206 photolithography Methods 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000000407 epitaxy Methods 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
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- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
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Abstract
本申请涉及功率器件技术领域,具体涉及一种SiC平面MOSFET及其自对准工艺,旨在解决现有技术中由于SiC硬度过高传统平面Si基自对准工艺无法实现形成的缺陷,其技术要点在于:采用湿法腐蚀工艺,将SiO2层垂直的侧壁腐蚀出倾斜的角度,以此作为P‑well的注入窗口,通过掺杂方法在所述晶圆衬底的外延层表面形成P‑well区。通过沉积的SiO2作为SourceN+的注入掩蔽,然后经过湿法腐蚀,利用各向同性的腐蚀特性,在较厚的掩蔽层侧壁上腐蚀出一定的倾斜角度,以此作为P‑well注入窗口,最终形成导电沟道。
Description
技术领域
本申请涉及功率器件技术领域,具体涉及一种SiC平面MOSFET及其自对准工艺。
背景技术
金属-氧化物半导体场效应晶体管,简称金氧半场效晶体管 (Metal-Oxide-Semiconductor Field-Effect Transistor,MOSFET)是一种可以广泛使用于功率转换电路的场效晶体管(field-effect transistor)。[1] MOSFET依照其“通道”(工作载流子)的极性不同,可分为“N型”与“P型”的两种类型,通常又称为NMOSFET与PMOSFET,其他简称上包括NMOS、PMOS 等。
现有技术中,由于碳化硅作为半导体材料具有优异的性能,尤其是用于功率转换和控制的功率元器件。与传统硅器件相比可以实现低导通电阻、高速开关和耐高温高压工作,因此在电源、汽车、铁路、工业设备和家用消费电子设备中倍受欢迎。但是,由于SiC比Si硬度更高,注入后的掺杂再分布无法依靠高温推结来完成,只能依靠高能注入实现杂质分布,因此传统平面 Si基自对准工艺无法实现。
申请内容
因此,本申请要解决的技术问题在于克服现有技术中由于SiC硬度过高传统平面Si基自对准工艺无法实现形成的缺陷,从而提供一种SiC平面MOSFET 自对准工艺。
本申请的上述技术目的是通过以下技术方案得以实现的:
一种SiC平面MOSFET自对准工艺,包含以下步骤:
S1:选用SiC晶圆衬底,并在晶圆衬底的外延上淀积生长SiO2层;
S2:通过刻蚀工艺,在所述SiO2层刻蚀出注入窗口,并进行N+源区的离子注入工艺;
S3:采用湿法腐蚀工艺,将SiO2层垂直的侧壁腐蚀出倾斜的角度,以此作为P-well的注入窗口,通过注入方法在所述晶圆衬底的外延层表面形成P-well 区。
S4:通过湿法腐蚀工艺去除第一次沉积的SiO2层;
S5:再次淀积SiO2层,以形成场氧化物,并在第二次淀积的SiO2层上刻蚀出P+的注入窗口,通过铝离子注入形成P+区。
S6:通过高温退火激活掺杂后,依次进行生长栅氧化层、沉积多晶硅。
S7:光刻、刻蚀后进行介质层的沉积,并在光刻后刻蚀出接触孔,溅射正面金属后进行光刻和刻蚀
S8:制作背面金属。
在本申请的一些实施方式中,所述场氧化物通过氧化工艺或沉积工艺实现的。
本申请还提供了一种SiC平面MOSFET,其特征在于:使用上述所述SiC平面MOSFET自对准工艺制作得到。
本申请所提供的一种SiC平面MOSFET自对准工艺,通过沉积的SiO2作为 Source N+的注入掩蔽,然后经过湿法腐蚀,利用各向同性的腐蚀特性,在较厚的掩蔽层侧壁上腐蚀出一定的倾斜角度,以此作为P-well注入窗口,最终形成导电沟道。
附图说明
为了更清楚地说明本申请具体实施方式或现有技术中的技术方案,下面将对具体实施方式或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图是本申请的一些实施方式,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1为本申请的一种实施方式的一种SiC平面MOSFET自对准工艺S1的结构示意图;
图2为本申请的一种实施方式的一种SiC平面MOSFET自对准工艺S2及步骤三的结构示意图;
图3为本申请的一种实施方式的一种SiC平面MOSFET自对准工艺S3的结构示意图;
图4为本申请的一种实施方式的一种SiC平面MOSFET自对准工艺步骤S4 的结构示意图;
图5为本申请的一种实施方式的一种SiC平面MOSFET自对准工艺S5及S6 的结构示意图。
具体实施方式
为了使本申请的目的、技术方案及优点更加清楚明白,以下结合附图及实施例,对本申请进行进一步详细说明。应当理解,此处所描述的具体实施例仅仅用以解释本申请,并不用于限定本申请。
一种SiC平面MOSFET自对准工艺,其包含以下步骤:
S1:请参阅图1,选用SiC晶圆衬底,并在晶圆衬底的外延上淀积生长SiO2层;
S2:请参阅图1和图2,通过刻蚀工艺,在所述SiO2层刻蚀出注入窗口,并进行N+源区的离子注入工艺;
S3:请参阅图2和图3,采用湿法腐蚀工艺,将SiO2层垂直的侧壁腐蚀出倾斜的角度,以此作为P-well的注入窗口,通过掺杂方法在所述晶圆衬底的外延层表面形成P-well区。
具体的,在一实施方式中,通过铝离子注入形成P-well区。
S4:请参阅图3和图4,通过湿法腐蚀工艺去除第一次沉积的SiO2层,再次淀积SiO2层,以形成场氧化物,并在第二次淀积的SiO2层上刻蚀出P+的注入窗口,通过铝离子注入形成P+区。
具体的,所述场氧化物通过氧化工艺或沉积工艺实现。
S5:请参阅图5,通过高温退火激活掺杂后,依次进行生长栅氧化层、沉积多晶硅。
S6:请参阅图5,光刻、刻蚀后进行介质层的沉积,并在光刻后刻蚀出接触孔,溅射正面金属后进行光刻和刻蚀。
S8:制作背面金属。
本申请还提供了一种SiC平面MOSFET,其通过上述工艺制备得到。
本申请提供的一种SiC平面MOSFET自对准工艺,通过沉积的SiO2作为 Source N+的注入掩蔽,然后经过湿法腐蚀,利用各向同性的腐蚀特性,在较厚的掩蔽层侧壁上腐蚀出一定的倾斜角度,以此作为P-we l l注入窗口,最终形成导电沟道。
显然,上述实施例仅仅是为清楚地说明所作的举例,而并非对实施方式的限定。对于所属领域的普通技术人员来说,在上述说明的基础上还可以做出其它不同形式的变化或变动。这里无需也无法对所有的实施方式予以穷举。而由此所引伸出的显而易见的变化或变动仍处于本申请创造的保护范围之中。
Claims (2)
1.一种SiC平面MOSFET自对准工艺,其特征在于:包含以下步骤:
S1:选用SiC晶圆衬底,并在晶圆衬底的外延上淀积生长SiO2层;
S2:通过刻蚀工艺,在所述SiO2层刻蚀出注入窗口,并进行N+源区的离子注入工艺;
S3:采用湿法腐蚀工艺,将SiO2层垂直的侧壁腐蚀出倾斜的角度,以此作为P-well的注入窗口,通过注入在所述晶圆衬底的外延层表面形成P-well区;
S4:通过湿法腐蚀工艺去除第一次沉积的SiO2层;
S5:再次淀积SiO2层,以形成场氧化物,并在第二次淀积的SiO2层上刻蚀出P+的注入窗口,通过铝离子注入形成P+区;
S6:通过高温退火激活掺杂后,依次进行生长栅氧化层、沉积多晶硅;
S7:光刻、刻蚀后进行介质层的沉积,并在光刻后刻蚀出接触孔,溅射正面金属后进行光刻和刻蚀;
S8:制作背面金属。
2.根据权利要求1所述的一种SiC平面MOSFET自对准工艺,其特征在于:所述场氧化物通过氧化工艺或沉积工艺实现的。
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