CN112071904B - 一种高压雪崩晶体管 - Google Patents

一种高压雪崩晶体管 Download PDF

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CN112071904B
CN112071904B CN202010801955.2A CN202010801955A CN112071904B CN 112071904 B CN112071904 B CN 112071904B CN 202010801955 A CN202010801955 A CN 202010801955A CN 112071904 B CN112071904 B CN 112071904B
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屈光辉
赵岚
汪雅馨
徐鸣
兰春鹏
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Shaanxi Jumai Ruifeng Technology Co ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
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    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
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    • H01L29/0684Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds

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Abstract

本发明公开的一种高压雪崩晶体管,包括由下至上依次设置的集电区电极、第三外延层、SI‑GaAs衬底、第一外延层及第二外延层,第二外延层上表面设置有通过光刻技术刻出条形叉指状凹槽;凹槽内设置有SiO2层;还包括有形状均为条形叉指状的基区电极及发射区电极,基区电极的底端穿过SiO2层后与第一外延层相接触;发射区电极设置在光刻后的第二外延层除凹槽外的剩余部分的上表面上。本发明一种高压雪崩晶体管,解决了现有雪崩晶体管耐压低的问题。

Description

一种高压雪崩晶体管
技术领域
本发明属于电子器件技术领域,具体涉及一种高压雪崩晶体管。
背景技术
开关是功率脉冲技术领域的关键器件,开关性能决定脉冲功率系统的成败。固态开关虽然功率容量小于气体开关,但结构紧凑,重复频率高,开关速度快,寿命长,稳定性高,因而逐渐成为主流脉冲功率开关。常用的固态脉冲功率开关主要有晶闸管、雪崩晶体管、GTO、IGCT、IGBT、MOSFET、光电导开关等,断路开关有IGBT、MOSFET以及专用于功率脉冲领域的SOS、RSD、DSRD。开关速度,耐压能力,和通流能力是功率脉冲开关的关键参数。
雪崩晶体管最早报道于20世纪50年代末,并迅速得到了广泛的关注。雪崩晶体管可以方便的产生高幅值,低抖动,高重频和高稳定度的高压脉冲。目前应用较多的是NPN型雪崩晶体管。当基极电流小于零,基射结反偏时,集电极电流随集射极电压急剧变化的区域称为雪崩晶体管的雪崩区。
发明内容
本发明的目的是提供一种高压雪崩晶体管,解决了现有雪崩晶体管耐压低的问题。
本发明所采用的技术方案是,一种高压雪崩晶体管,包括由下至上依次设置的集电区电极、第三外延层、SI-GaAs衬底、第一外延层及第二外延层,第二外延层上表面设置有通过光刻技术刻出条形叉指状凹槽;凹槽内设置有SiO2层;还包括有形状均为条形叉指状的基区电极及发射区电极,基区电极的底端穿过SiO2层后与第一外延层相接触;发射区电极设置在光刻后的第二外延层除凹槽外的剩余部分的上表面上。
本发明的特征还在于,
SI-GaAs衬底的材料为n型SI-GaAs,SI-GaAs衬底的厚度为1um-1mm,其掺杂浓度为1*107cm-3-1*1015cm-3
第一外延层为p-短基区;第一外延层的材料为n型GaAs,厚度为0.1um-2um,第一外延层的表面积为1um2-100cm2,其p型掺杂浓度为1*1016cm-3-1*1018cm-3
第二外延层为n+发射区;第二外延层的材料为GaAs,第二外延层的厚度为0.1um-2um,第二外延层的表面积为1um2-100cm2,其N+型掺杂浓度为1*1017cm-3-1*1020cm-3
第三外延层为p+集电区;第三外延层的材料为p型GaAs,第三外延层的厚度为0.1um-2um,第三外延层的表面积为1um2-100cm2,其掺杂浓度为1*1017cm-3-1*1020cm-3
凹槽为间隔为20um的条形叉指状凹槽,厚度为0.1um-2um,凹槽的深度不得小于n+发射区的厚度,凹槽的底部即为p-短基区。
集电区电极由金属Ti,Pt,Au依次沉积在P+集电区上,厚度为0.1um-100um。
基区电极为金属Ti,Pt,Au依次沉积在p-短基区上,厚度为0.1um-100um。
发射区电极由金属Ge,Au,Ni,Au依次沉积在n+发射区上,厚度为0.1um-100um。
本发明的有益效果是:该高压雪崩晶体管的漂移区为SI-GaAs。使用SI-GaAs作为漂移区,外延P-短基区形成PN结,可以通过控制电流大小,控制晶体管开通。由于其在在击穿前保持着较高的耐压,而在电流注入后会发生强烈雪崩击穿,器件导通电阻快速下降,大幅缩短了器件的开通时间。为快速开通高压雪崩晶体管提供了技术方案。
附图说明
图1是本发明中高压雪崩晶体管中SI-GaAs衬底图;
图2是本发明中高压雪崩晶体管中在GaAs衬底上制作第一外延层p-短基区图;
图3是本发明中高压雪崩晶体管中在第一外延层之上制作第二外延层即n+发射区图;
图4是本发明中高压雪崩晶体管中在GaAs衬底之下制作第三外延层p+集电区图;
图5是本发明中高压雪崩晶体管中在第二外延层上通过光刻技术刻出平行等距的条形凹槽图;
图6是本发明中高压雪崩晶体管中在光刻掉的发射区部分覆盖SiO2层图;
图7是本发明中高压雪崩晶体管中在第一外延层p-短基区上覆盖基区电极图;
图8是本发明中高压雪崩晶体管中在第二外延层n+发射区上覆盖发射区电极图;
图9是本发明中高压雪崩晶体管中在第三外延层p+集电区上覆盖集电区电极图即本发明高压雪崩晶体管的结构示意图;
图10是本发明二极管的应用电路示例图;
图11是图9中负载输出电脉冲50倍衰减后输出结果。
图中,1.SI-GaAs衬底,2.第一外延层,3.第二外延层,4.第三外延层,5.SiO2层,6是基极,7是发射极,8.集电区电极,9.高压MOSFET,10.储能电容,11.本发明晶体管,12.限流电阻,13.负载。
具体实施方式
下面结合附图和具体实施方式对本发明进行详细说明。
本发明一种高压雪崩晶体管,如图1-9所示,包括由下至上依次设置的集电区电极8、第三外延层4、SI-GaAs衬底1、第一外延层2及第二外延层3,第二外延层3上表面设置有通过光刻技术刻出条形叉指状凹槽;凹槽内设置有SiO2层5;还包括有形状均为条形叉指状的基区电极6及发射区电极7,基区电极6的底端穿过SiO2层5后与第一外延层2相接触;发射区电极7设置在光刻后的第二外延层3除凹槽外的剩余部分的上表面上。
如图1所示,SI-GaAs衬底1的材料为n型SI-GaAs,SI-GaAs衬底1的厚度为1um-1mm,其掺杂浓度为1*107cm-3-1*1015cm-3
如图2所示,在SI-GaAs衬底1之上制作第一外延层2,第一外延层2为p-短基区;第一外延层2的材料为n型GaAs,厚度为0.1um-2um,第一外延层2的表面积为1um2-100cm2,其p型(Si、GaAs)掺杂浓度为1*1016cm-3-1*1018cm-3
如图3所示,在第一外延层2之上制作第二外延层3,第二外延层3为n+发射区;第二外延层3的材料为GaAs,第二外延层3的厚度为0.1um-2um,第二外延层3的表面积为1um2-100cm2,其N+型(Si、GaAs)掺杂浓度为1*1017cm-3-1*1020cm-3
如图4所示,在SI-GaAs衬底1之下制作第三外延层4,第三外延层4为p+集电区;第三外延层4的材料为p型GaAs,第三外延层4的厚度为0.1um-2um,第三外延层4的表面积为1um2-100cm2,其掺杂浓度为1*1017cm-3-1*1020cm-3
如图5所示,在第二外延层3上通过光刻技术刻出平行等距的条形凹槽区域,凹槽为间隔为20um的条形叉指状凹槽,厚度为0.1um-2um,凹槽的深度不得小于n+发射区的厚度,凹槽的底部即为p-短基区。
如图6所示,在光刻掉的发射区部分覆盖SiO2层5;
如图9所示,集电区电极8由金属Ti,Pt,Au依次沉积在P+集电区上,厚度为0.1um-100um。
如图7所示,基区电极6为金属Ti,Pt,Au依次沉积在p-短基区上,厚度为0.1um-100um。
如图8所示,发射区电极7由金属Ge,Au,Ni,Au依次沉积在n+发射区上,厚度为0.1um-100um。
由于上述高压雪崩晶体管的漂移区为SI-GaAs,具有在电流注入下发生阻值快速下降的雪崩倍增机制,所以称为一种新型高压雪崩晶体管。
设置如图10所示电路,包括有通过导线依次连接的限流电阻12、本发明晶体管11及负载13,限流电阻12与本发明晶体管11之间还连接有高压MOSFET9及储能电容10;储能电容10一端接地;利用电容储能方式,向本发明晶体管11施加高压,储能电容10、本发明晶体管11和负载13形成放电回路。向本发明晶体管11和高压MOSFET9施加触发信号,两者之间具有10ns-100us延迟时间。本发明晶体管11快速导通,向负载输出具有1ns-2ns上升沿的高压快脉冲。如图11所示为50欧姆负载上的电压输出波形,图11中横向坐标20ns/div,纵向坐标500V/div。
本发明一种新型高压雪崩晶体管,通过漂移区的半绝缘砷化镓的快速雪崩机制,使偏移区的电阻更快速的下降,有效的缩短了高压雪崩晶体管的开通时间,为快速开通高压雪崩晶体管提供了技术方案。
由于本发明设计的新型雪崩晶体管采用半绝缘GaAs材料作为集电区,该区域能够在基区开通前保持数百兆欧姆的高绝缘电阻,给新型雪崩晶体管带来极高的耐压能力。同时在基区开通后,集电区能够在微量电子的注入下实现强烈的低场雪崩,引发新型雪崩晶体管快速导通,实现高压纳秒电脉冲输出。总之,本发明的有益效果是能够在保证雪崩晶体管其它基本性能不变的情况下,将雪崩晶体管的耐压强度增大至3-10kV,使雪崩晶体管的单个器件工作电压升高近10倍以上。

Claims (1)

1.一种高压雪崩晶体管,其特征在于, 包括由下至上依次设置的集电区电极(8)、第三外延层(4)、SI-GaAs衬底(1)、第一外延层(2)及第二外延层(3),第二外延层(3)上表面设置有通过光刻技术刻出条形叉指状凹槽;凹槽内设置有SiO2层(5);还包括有形状均为条形叉指状的基区电极(6)及发射区电极(7),基区电极(6)的底端穿过SiO2层(5)后与第一外延层(2)相接触;所述发射区电极(7)设置在光刻后的第二外延层(3)除凹槽外的剩余部分的上表面上;
所述SI-GaAs衬底(1)的材料为n型SI-GaAs,SI-GaAs衬底(1)的厚度为1um-1mm,其掺杂浓度为-/>
所述第一外延层(2)为p-短基区,厚度为0.1um-2um,第一外延层(2)的表面积为1um2-100cm2,其p型掺杂浓度为-/>
所述第二外延层(3)为n+发射区;第二外延层(3)的材料为GaAs,第二外延层(3)的厚度为0.1um-2um,第二外延层(3)的表面积为1um2-100cm2,其N+型掺杂浓度为-
所述第三外延层(4)为p+集电区;第三外延层(4)的材料为p型GaAs,第三外延层(4)的厚度为0.1um-2um,第三外延层(4)的表面积为1um2-100cm2,其掺杂浓度为-
所述凹槽为间隔为20um的条形叉指状凹槽,厚度为0.1um-2um,凹槽的深度不得小于n+发射区的厚度,凹槽的底部即为p-短基区;
所述集电区电极(8)由金属Ti,Pt,Au依次沉积在P+集电区上,厚度为0.1um-100um;
基区电极(6)为金属Ti,Pt,Au依次沉积在p-短基区上,厚度为0.1um-100um;
所述发射区电极(7)由金属Ge,Au,Ni,Au依次沉积在n+发射区上,厚度为0.1um-100um。
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