CN111918982A - 等离子体cvd装置和等离子体cvd法 - Google Patents

等离子体cvd装置和等离子体cvd法 Download PDF

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CN111918982A
CN111918982A CN202080002098.8A CN202080002098A CN111918982A CN 111918982 A CN111918982 A CN 111918982A CN 202080002098 A CN202080002098 A CN 202080002098A CN 111918982 A CN111918982 A CN 111918982A
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pipe
gas
oxygen
plasma cvd
vacuum chamber
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小林忠正
座间秀昭
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Ulvac Inc
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Abstract

等离子体CVD装置(10)具备：真空槽(21)，其划定存储成膜对象(S)的空间；储藏部(30)，其储藏不含氢的异氰酸酯基硅烷，在储藏部(30)内对异氰酸酯基硅烷进行加热，生成用于供给至真空槽(21)中的异氰酸酯基硅烷气体；配管(11)，其将储藏部(30)与真空槽(21)连接，用于将储藏部(30)生成的异氰酸酯基硅烷气体供给至真空槽(21)；温度调节部(12)，其将配管(11)的温度调节为83℃以上180℃以下；电极(22)，其配置在真空槽(21)内；以及电源(23)，其向电极(22)供给高频电力。在真空槽(21)中，在成膜对象(S)上形成氧化硅膜时，真空槽(21)内的压力为50Pa以上且小于500Pa。

Description

等离子体CVD装置和等离子体CVD法
技术领域
本发明涉及等离子体CVD装置和等离子体CVD法。
背景技术
作为具备以氧化物半导体作为主成分的半导体层的薄膜晶体管，具备在覆盖栅电极的栅极绝缘体层上形成的半导体层、以及在半导体层上形成的绝缘体层的结构是众所公知的。在由形成于绝缘体层和未被绝缘体层覆盖的半导体层部分的金属层形成源电极和漏电极时，绝缘体层发挥出作为蚀刻阻挡层的功能。这样的绝缘体层例如由氧化硅膜形成(例如参照专利文献1)。
现有技术文献
专利文献
专利文献1：国际公开第2012/169397号
发明内容
发明所要解决的课题
另外，氧化硅膜有时使用等离子体CVD法形成。在形成氧化硅膜时，多将硅烷(SiH4)和四乙氧基硅烷(TEOS)中的任一者用作氧化硅膜的原料。这些材料包含氢，因此在半导体层上形成的氧化硅膜也包含氢。氧化硅膜中的氢在氧化硅膜与半导体层的界面处向着半导体层扩散，将半导体层还原，由此使半导体层中产生氧缺损。像这样的半导体层中的氧缺损使包含半导体层的薄膜晶体管的特性变得不稳定。因此，正在寻求能够减少氧化硅膜中的氢的含量的成膜方法。
需要说明的是，这样的需求并不限于在半导体层上形成的作为绝缘体层的氧化硅膜，在要求抑制氢向着与氧化硅膜相接的层的扩散的情况下都存在。
本发明的目的在于提供能够降低氧化硅膜中的氢原子的浓度的等离子体CVD装置和等离子体CVD法。
用于解决课题的手段
一个实施方式的等离子体CVD装置具备：真空槽，其划定存储成膜对象的空间；储藏部，其储藏不含氢的异氰酸酯基硅烷，在上述储藏部内对上述异氰酸酯基硅烷进行加热，生成用于供给至上述真空槽中的异氰酸酯基硅烷气体；配管，其将上述储藏部与上述真空槽连接，用于将上述储藏部生成的上述异氰酸酯基硅烷气体供给至上述真空槽；温度调节部，其将上述配管的温度调节为83℃以上180℃以下；电极，其配置在上述真空槽内；以及电源，其向上述电极供给高频电力。在上述真空槽中，在上述成膜对象上形成氧化硅膜时，上述真空槽内的压力为50Pa以上且小于500Pa。
一个实施方式的等离子体CVD法包括：将配管的温度设定为83℃以上180℃以下，该配管与存储成膜对象的真空槽和储藏部连接，用于将上述储藏部生成的不含氢的异氰酸酯基硅烷气体供给至上述真空槽；以及将上述真空槽内的压力设定为50Pa以上且小于500Pa。
根据上述各构成，能够使用不含氢的异氰酸酯基硅烷气体形成氧化硅膜。因此，与使用硅烷或四乙氧基硅烷等含氢的气体形成氧化硅膜的情况相比，能够降低氧化硅膜中的氢原子的浓度。
在上述等离子体CVD装置中，在上述真空槽中可以进一步具备供给含氧气体的含氧气体供给部。上述含氧气体可以为氧气。上述异氰酸酯基硅烷可以为四异氰酸酯基硅烷。上述储藏部以第1流量向上述配管供给四异氰酸酯基硅烷气体，上述含氧气体供给部以第2流量供给上述氧气。这种情况下，上述第2流量相对于上述第1流量之比可以为1以上100以下。根据上述构成，能够形成氧化硅膜中的氢原子的浓度为1×1021个/cm3以下的氧化硅膜。
上述等离子体CVD装置中，上述第2流量相对于上述第1流量之比可以为2以上100以下。上述真空槽内的上述压力可以为50Pa以上350Pa以下。根据上述构成，氧化硅膜中的氢原子的浓度为1×1021个/cm3以下的可靠性提高。
上述等离子体CVD装置中，上述配管为第1配管，该装置可以进一步具备：含氧气体供给部，其向上述真空槽供给含氧气体；以及第2配管，其与上述含氧气体供给部连接，并且在上述第1配管通往上述真空槽的途中与上述第1配管连接，用于向上述第1配管供给上述含氧气体。
根据上述构成，将异氰酸酯基硅烷气体与含氧气体在第1配管内混合，将它们的混合气体供给至真空槽内。因此，可抑制真空槽内的氧浓度的偏差，结果能够抑制在真空槽内形成的氧化硅膜中的特性的偏差。
附图说明
图1为示意性示出一个实施方式中的等离子体CVD装置的结构的框图。
图2为示出具备使用等离子体CVD装置形成的氧化硅膜的薄膜晶体管的结构的截面图。
图3为针对每种氧气流量相对于四异氰酸酯基硅烷气体流量之比示出氧化硅膜的氢浓度与真空槽内的压力的关系的曲线图。
图4为示出氧气的流量、真空槽内的压力和第1配管中的四异氰酸酯基硅烷气体的压力的关系的表。
图5为四异氰酸酯基硅烷的蒸气压曲线。
图6为示出半导体层的载体浓度与氧化硅膜的氢浓度的关系的曲线图。
图7为示出试验例1的薄膜晶体管中的漏极电流的曲线图。
图8为示出试验例2的薄膜晶体管中的漏极电流的曲线图。
具体实施方式
参照图1至图8对等离子体CVD装置和等离子体CVD法的一个实施方式进行说明。下面依次说明等离子体CVD装置的结构、等离子体CVD法和试验例。
[等离子体CVD装置的结构]
参照图1对等离子体CVD装置的结构进行说明。图1示意性示出了等离子体CVD装置的一例。
如图1所示，等离子体CVD装置10具备真空槽21、储藏部30、第1配管11和温度调节部12。真空槽21划定存储成膜对象S的空间。储藏部30储藏不含氢的异氰酸酯基硅烷。本实施方式中，异氰酸酯基硅烷为四异氰酸酯基硅烷(Si(NCO)4)。储藏部30对储藏部30内的Si(NCO)4进行加热，生成用于供给至真空槽21的Si(NCO)4气体。第1配管11将储藏部30与真空槽21连接，是用于将储藏部30生成的Si(NCO)4气体供给至真空槽21的配管。温度调节部12将第1配管11的温度调节为83℃以上180℃以下。在真空槽21中，在成膜对象S上形成氧化硅膜时，真空槽21内的压力为50Pa以上且小于500Pa。
利用等离子体CVD装置10，能够使用不含氢的Si(NCO)4气体形成氧化硅膜。因此，与使用硅烷或四乙氧基硅烷等含氢的气体来形成氧化硅膜的情况相比，能够降低氧化硅膜中的氢原子的浓度。
等离子体CVD装置10进一步具备含氧气体供给部13、以及第2配管14。含氧气体供给部13向真空槽21中供给含氧气体。本实施方式中，含氧气体为氧(O2)气体。第2配管14与含氧气体供给部13连接，并且在第1配管11通往真空槽21的途中与第1配管11连接。第2配管14是用于向第1配管11供给O2气体的配管。
将Si(NCO)4气体和O2气体在第1配管11内混合，将它们的混合气体供给至真空槽21内。因此，可抑制真空槽21内的氧浓度的偏差，结果能够抑制在真空槽21内形成的氧化硅膜中的特性的偏差。
等离子体CVD装置10进一步具备电极22和电源23。电极22配置在真空槽21内。本实施方式中，电极22与第1配管11连接。电极22还发挥出对于由第1配管11供给的Si(NCO)4气体与氧气的混合气体进行扩散的扩散部的功能。电极22例如为金属制的簇射极板(showerplate)。第1配管11藉由电极22与真空槽21连接。
电源23向电极22供给高频电力。电源23例如向电极22供给具有13MHz的频率的高频电力或具有27MHz的频率的高频电力。
真空腔室20具备上述的真空槽21、电极22和电源23。真空腔室20进一步具备支撑部24和排气部25。支撑部24对配置在真空槽21内的成膜对象S进行支撑。支撑部24例如为支撑成膜对象S的载台。支撑部24可以在支撑部24的内部具有用于调节成膜对象S的温度的温度调节部。需要说明的是，等离子体CVD装置10中，支撑部24作为与电极22对置的对置电极发挥功能。等离子体CVD装置10为平行平板型的等离子体CVD装置。
排气部25与真空槽21连接。排气部25将真空槽21内的压力减压至规定的压力。真空槽21例如具备各种泵和各种阀。
储藏部30具备存储槽31、恒温槽32、罐33、罐温度调节部34、Si(NCO)4气体供给部35和Si(NCO)4气体配管36。恒温槽32位于存储槽31内。恒温槽32能够将恒温槽32所划定的空间内维持在规定的温度。罐33、罐温度调节部34、Si(NCO)4气体供给部35和Si(NCO)4气体配管36位于恒温槽32内。罐温度调节部34位于罐33的外部，将罐33与罐33中储藏的Si(NCO)4一起进行加热。罐33能够储藏气液平衡状态的Si(NCO)4。Si(NCO)4气体供给部35藉由Si(NCO)4气体配管36与罐33连接。Si(NCO)4气体供给部35例如为质量流量控制器。Si(NCO)4气体供给部35与第1配管11连接。Si(NCO)4气体供给部35将通过Si(NCO)4气体配管36从罐33供给的Si(NCO)4气体以规定的流量供给至第1配管11。
温度调节部12位于第1配管11的外部，对第1配管11进行加热。温度调节部12通过对第1配管11进行加热能够使第1配管11的温度与流经第1配管11内的流体的温度成为大致相同的温度。
含氧气体供给部13例如为质量流量控制器。含氧气体供给部13将O2气体以规定的流量供给至第2配管14。第2配管14与第1配管11连接。第2配管14优选被连接至比第1配管11中的被加热部的至少一部分更靠近储藏部30。由此，能够在通过第1配管11的Si(NCO)4气体的温度不容易由于O2气体而降低的状态下将Si(NCO)4气体与氧气一起供给至真空槽21内。
在真空槽21中能够安装第1压力计P1。第1压力计P1能够对真空槽21内的压力进行测定。在Si(NCO)4气体流经第1配管11的方向上，能够在储藏部30的下游且温度调节部12的上游的位置将第2压力计P2安装在第1配管11的途中。第2压力计P2能够测定第1配管11内的压力。
[等离子体CVD法]
参照图2至图5对等离子体CVD法进行说明。
等离子体CVD法包括：将配管的温度设定为83℃以上180℃以下；以及将真空槽内的压力设定为50Pa以上且小于500Pa。配管与存储成膜对象的真空槽和储藏部连接，将储藏部生成的Si(NCO)4气体供给至真空槽。下面参照附图进一步详细说明等离子体CVD法。另外，在说明等离子体CVD法之前，对于将使用等离子体CVD法形成的氧化硅膜用作绝缘体层的薄膜晶体管的结构进行说明。
参照图2对薄膜晶体管的结构进行说明。薄膜晶体管具备使用上述等离子体CVD装置10形成的氧化硅膜作为在半导体层上形成的绝缘体层。
如图2所示，薄膜晶体管40具备半导体层41和绝缘体层42。半导体层41包含表面41s，并且半导体层41中，氧化物半导体为主成分。半导体层41中90质量％以上为氧化物半导体。
绝缘体层42位于半导体层41的表面41s。绝缘体层42中，硅氧化物为主成分，氢原子的浓度为1×1021个/cm3以下。绝缘体层42是使用上述等离子体CVD装置10形成的氧化硅膜。绝缘体层42覆盖半导体层41的表面41s、以及未被半导体层41覆盖的栅极绝缘体层45的部分。
本实施方式中，对于半导体层41由单一层形成的示例进行了说明，但半导体层41包含至少一层即可。即，半导体层41可以具备2层以上的多个层。各层的主成分优选为选自由InGaZnO、GaZnO、InZnO、InTiZnO、InAlZnO、ZnTiO、ZnO、ZnAlO和ZnCuO组成的组中的任一者。
薄膜晶体管40包含上述的成膜对象S。成膜对象S具备基板43、栅电极44、栅极绝缘体层45和半导体层41。栅电极44位于基板43中的表面的一部分。栅极绝缘体层45覆盖栅电极44的整体以及未被栅电极44覆盖的基板43的表面。基板43例如为由各种树脂形成的树脂基板和玻璃基板中的任一者即可。栅电极44的形成材料中例如可以使用钼等。栅极绝缘体层45中例如使用硅氧化物层或者硅氧化物层与硅氮化物层的层积体等。
半导体层41在构成薄膜晶体管40的各层的堆叠方向上的与栅电极44重叠的位置位于栅极绝缘体层45的表面。薄膜晶体管40进一步具备源电极46和漏电极47。源电极46和漏电极47在沿着薄膜晶体管40的水平截面的排列方向上隔开规定的间隔排列。源电极46覆盖绝缘体层42的一部分。漏电极47覆盖绝缘体层42中的其他部分。源电极46和漏电极47分别藉由绝缘体层42中形成的接触孔与半导体层41电连接。源电极46的形成材料和漏电极47的形成材料例如可以为钼或铝等。
薄膜晶体管40进一步具备保护膜48。保护膜48覆盖从源电极46和漏电极47这两者露出的绝缘体层42的部分、源电极46和漏电极47。保护膜48的形成材料例如可以为硅氧化物等。
如上所述，在薄膜晶体管40中，为了使薄膜晶体管40的特性稳定，要求作为氧化硅膜的绝缘体层42中的氢原子的浓度为1×1021个/cm3以下。需要说明的是，下文中，也将氢原子的浓度称为氢浓度。氧化硅膜的氢浓度取决于形成氧化硅膜时的真空槽21内的压力以及O2气体的流量FO相对于Si(NCO)4气体的流量FS之比(FO/FS)。需要说明的是，下文中也将流量FO相对于流量FS之比称为流量比。
图3为针对每种流量比示出氧化硅膜的氢浓度与真空槽21内的压力的关系的曲线图。需要说明的是，图3所示的氢浓度与真空槽21内的压力的关系是通过如下设定硅氧化物膜的形成中的各条件而得到的。
·Si(NCO)4气体流量 55sccm
·高频电力 4000W
·电极面积 2700cm2
如图3所示，真空槽21内的压力为50Pa的情况下，能够形成具有1×1021个/cm3以下的氢浓度的氧化硅膜。另外，即使在真空槽21内的压力为175Pa或350Pa的情况下，也能够形成具有1×1021个/cm3以下的氢浓度的氧化硅膜。为了形成具有1×1021个/cm3以下的氢浓度的氧化硅膜，流量比的值倾向于随着真空槽21内的压力增高而增大。并且，在真空槽21内的压力为500Pa的情况下，即使流量比为100，也难以形成具有1×1021个/cm3以下的氢浓度的氧化硅膜。此处，鉴于含氧气体供给部13和Si(NCO)4气体供给部35所供给的实际的气体流量，流量比大于100无实用性。因此，为了形成具有1×1021个/cm3以下的氢浓度的氧化硅膜，真空槽21内的压力需要为50Pa以上且小于500Pa。
另外，通过将流量比设定为1以上100以下，容易形成具有1×1021个/cm3以下的氢浓度的氧化硅膜。因此优选将流量比设定为1以上100以下。另外，在氧化硅膜的形成中，更优选流量比为2以上100以下、且真空槽21内的压力为50Pa以上350Pa以下。由此，能够提高氧化硅膜的氢浓度为1×1021个/cm3以下的可靠性。
需要说明的是，在真空槽21内的压力为50Pa以上且小于500Pa、并且流量比为1以上100以下的情况下，氧化硅膜的成膜速率也为100nm/min以上200nm/min以下程度的实用的值。
图4为示出将供给至第1配管11的O2气体的流量与真空槽21内的压力即第1压力计P1的压力设定为各值的情况下第2压力计P2所测定的压力的表。如上所述，为了形成具有1×1021个/cm3以下的氢浓度的氧化硅膜，真空槽21内的压力需要小于500Pa。另外，由于流量比最大为100，因此在将Si(NCO)4气体的流量设定为55sccm的情况下，O2气体的流量的最大值为5500sccm。因此，若第1配管11内的压力、最低为1500Pa、换言之Si(NCO)4气体的蒸气压为1500Pa，则无论O2气体的流量和真空槽21内的流量如何，均能够在将Si(NCO)4气体气化的状态下将Si(NCO)4气体供给至真空槽21中。
图5为Si(NCO)4气体的饱和蒸气压曲线。
如图5所示，通过使Si(NCO)4气体的温度为83℃，Si(NCO)4气体的饱和蒸气压达到1500Pa。因此，需要使Si(NCO)4气体的温度、即供给Si(NCO)4气体的第1配管11的温度为83℃以上。另外，Si(NCO)4的沸点为186℃。因此，若将第1配管11的温度的上限值设定为180℃(该温度为Si(NCO)4气体的沸点附近的值)，则能够将Si(NCO)4气体确实地供给至真空槽21内。
[试验例]
参照图6至图8对试验例进行说明。
[成膜条件]
参照图2，在下述条件下形成上文说明的薄膜晶体管所具备的层中的半导体层和绝缘体层。
[半导体层]
Figure BDA0002701095830000081
[绝缘体层]
Figure BDA0002701095830000082
Figure BDA0002701095830000091
[评价]
[氢原子的浓度]
各薄膜晶体管所具备的绝缘体层中的氢原子浓度的测定使用二次离子质谱仪(ADEPT1010、ULVAC-PHI株式会社制)。确认到各绝缘体层的氢原子的浓度为如图3所示的值。
[载体浓度]
对于各层积体所具备的半导体层中的载体浓度进行测定。载体浓度的测定使用霍尔效应测定器(HL55001U、Nanometrics公司制造)。
如图6所示，确认到在绝缘体层中的氢原子的浓度大于1×1021个/cm3时，半导体层41中的载体的浓度大于1×1016个/cm3。与之相对，确认到绝缘体层中的氢原子的浓度为1×1021个/cm3以下时，半导体层中的载体的浓度小于1×1013个/cm3。
即确认到，通过使绝缘体层中的氢原子的浓度为1×1021个/cm3以下，与氢原子的浓度大于1×1021个/cm3的绝缘体层相比，半导体层中的载体的浓度显著减小。据信，通过使绝缘体层中的氢原子的浓度为1×1021个/cm3以下，显著抑制了作为绝缘体层下层的半导体层的还原所引起的氧缺损，因此得到了这样的结果。
[试验例1]
参照图2形成了具有上文说明的结构的薄膜晶体管、即具备栅电极、栅极绝缘体层、半导体层、绝缘体层、源电极、漏电极和保护膜的试验例1的薄膜晶体管。需要说明的是，试验例1的薄膜晶体管中，使半导体层的成膜条件为上述条件，使绝缘体层的成膜条件为下述条件。绝缘体层中的氢原子的浓度通过上述方法测定，结果确认到为5×1019个/cm3。
Figure BDA0002701095830000092
Figure BDA0002701095830000101
另外，在试验例1的薄膜晶体管中，使栅电极、源电极和漏电极的形成材料为钼、栅极绝缘体层的形成材料为硅氧化物、保护层的形成材料为硅氧化物。
[试验例2]
除了使绝缘体层的成膜条件为下述条件以外，利用与试验例1相同的方法形成试验例2的薄膜晶体管。需要说明的是，通过上述方法测定绝缘体层中的氢原子的浓度，结果确认为2×1021个/cm3。
Figure BDA0002701095830000102
[评价]
使用半导体参数分析仪(4155C、Agilent Technologies公司制造)，对于试验例1的薄膜晶体管和试验例2的薄膜晶体管各自的晶体管特性、即电压(Vg)-电流(Id)特性进行测定。如下设定晶体管特性的测定条件。
Figure BDA0002701095830000103
如图7所示，试验例1的薄膜晶体管中，确认到阈值电压为5.3V，导通电压为0.66V，电子迁移率为10.2cm2/Vs，亚阈值为0.31V/decade。需要说明的是，导通电压是漏极电流为10-9A/cm2时的栅极电压。这样确认到，若利用试验例1的薄膜晶体管、即利用具备氢原子的浓度为1×1021个/cm3以下的绝缘体层的薄膜晶体管，则薄膜晶体管正常工作、换言之晶体管特性稳定。
与之相对，如图8所示确认到，若为试验例2的具备氢原子的浓度大于1×1021个/cm3的绝缘体层的薄膜晶体管，则不能正常工作、换言之晶体管特性不稳定。
如以上所说明，利用等离子体CVD装置和等离子体CVD法的一个实施方式，能够得到如下所述的效果。
(1)能够使用不含氢的Si(NCO)4气体形成氧化硅膜。因此，与使用硅烷或四乙氧基硅烷等包含氢的气体形成氧化硅膜的情况相比，能够降低氧化硅膜中的氢原子的浓度。
(2)通过使流量比为1以上100以下，能够形成氧化硅膜中的氢原子的浓度为1×1021个/cm3以下的氧化硅膜。
(3)通过使流量比为2以上100以下、并且使真空槽21内的压力为50Pa以上350Pa以下，氧化硅膜中的氢原子的浓度为1×1021个/cm3以下的可靠性提高。
(4)将Si(NCO)4气体与O2气体在第1配管11内混合，将它们的混合气体供给至真空槽21内。因此，可抑制真空槽21内的氧浓度的偏差，结果能够抑制在真空槽21内形成的氧化硅膜中的特性的偏差。
需要说明的是，上述实施方式可以如下进行变更来实施。
[第2配管]
·第2配管14也可以不连接在第1配管11的中途，而与真空槽21直接连接。这种情况下，第2配管14例如可以与作为使气体扩散的扩散部发挥功能的电极22连接，也可以与形成于真空槽21的供给孔连接。
[电极]
·电极22也可以不具有作为扩散部的功能。这种情况下，例如等离子体CVD装置10可以与电极分开地具备位于真空槽21内的扩散部。或者等离子体CVD装置10可以不具备扩散部、并且第1配管11可以与形成于真空槽21的供给孔连接。
[异氰酸酯基硅烷]
·异氰酸酯基硅烷气体是包含异氰酸酯基且不含氢的气体。异氰酸酯基硅烷气体也可以不是上述四异氰酸酯基硅烷气体而是例如选自Si(NCO)3Cl气体、Si(NCO)2Cl2气体和Si(NCO)Cl3气体中的任一者。
[含氧气体]
·含氧气体也可以不是上述的氧气而是例如选自臭氧(O3)气体、氧化二氮(N2O)气体、一氧化碳(CO)气体和二氧化碳(CO2)气体中的任一者。
[氧化硅膜]
·氧化硅膜并不限于薄膜晶体管所具备的绝缘体层，也可以是例如Si半导体器件、铁电体器件、功率半导体器件、化合物半导体器件和SAW器件等所具备的绝缘体层。
符号的说明
10…等离子体CVD装置、11…第1配管、12…温度调节部、13…含氧气体供给部、14…第2配管、20…真空腔室、21…真空槽、22…电极、23…电源、24…支撑部、25…排气部、30…储藏部、31…存储槽、32…恒温槽、33…罐、34…罐温度调节部、35…Si(NCO)4气体供给部、36…Si(NCO)4气体配管、40…薄膜晶体管、41…半导体层、41s…表面、42…绝缘体层、43…基板、44…栅电极、45…栅极绝缘体层、46…源电极、47…漏电极、48…保护膜、P1…第1压力计、P2…第2压力计、S…成膜对象。

Claims (5)

1.一种等离子体CVD装置，其具备：
真空槽，其划定存储成膜对象的空间；
储藏部，其储藏不含氢的异氰酸酯基硅烷，在所述储藏部内对所述异氰酸酯基硅烷进行加热，生成用于供给至所述真空槽中的异氰酸酯基硅烷气体；
配管，其将所述储藏部与所述真空槽连接，用于将所述储藏部生成的所述异氰酸酯基硅烷气体供给至所述真空槽；
温度调节部，其将所述配管的温度调节为83℃以上180℃以下；
电极，其配置在所述真空槽内；以及
电源，其向所述电极供给高频电力，
在所述真空槽中，在所述成膜对象上形成氧化硅膜时，所述真空槽内的压力为50Pa以上且小于500Pa。
2.如权利要求1所述的等离子体CVD装置，其中，
所述真空槽进一步具备供给含氧气体的含氧气体供给部，
所述含氧气体为氧气，
所述异氰酸酯基硅烷为四异氰酸酯基硅烷，
所述储藏部以第1流量向所述配管供给四异氰酸酯基硅烷气体，
所述含氧气体供给部以第2流量供给所述氧气，所述第2流量相对于所述第1流量之比为1以上100以下。
3.如权利要求2所述的等离子体CVD装置，其中，
所述第2流量相对于所述第1流量之比为2以上100以下，
所述真空槽内的所述压力为50Pa以上350Pa以下。
4.如权利要求1所述的等离子体CVD装置，其中，
所述配管为第1配管，
该装置进一步具备：
含氧气体供给部，其向所述真空槽供给含氧气体；以及
第2配管，其与所述含氧气体供给部连接，并且在所述第1配管通往所述真空槽的途中与所述第1配管连接，用于向所述第1配管供给所述含氧气体。
5.一种等离子体CVD法，其包括：
将配管的温度设定为83℃以上180℃以下，该配管与存储成膜对象的真空槽和储藏部连接，用于将所述储藏部生成的不含氢的异氰酸酯基硅烷气体供给至所述真空槽；以及
将所述真空槽内的压力设定为50Pa以上且小于500Pa。
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Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0766196A (ja) * 1993-08-23 1995-03-10 Res Dev Corp Of Japan 二酸化シリコン膜の化学気相堆積方法
US6474077B1 (en) * 2001-12-12 2002-11-05 Air Products And Chemicals, Inc. Vapor delivery from a low vapor pressure liquefied compressed gas
CN1389591A (zh) * 2001-05-23 2003-01-08 气体产品与化学公司 低介电常数材料以及通过cvd的加工方法
WO2011010726A1 (ja) * 2009-07-24 2011-01-27 株式会社ユーテック プラズマＣＶＤ装置、ＳｉＯ２膜又はＳｉＯＦ膜及びその成膜方法
WO2011010727A1 (ja) * 2009-07-24 2011-01-27 株式会社ユーテック 熱ＣＶＤ装置、ＳｉＯ２膜又はＳｉＯＦ膜及びその成膜方法
CN102263027A (zh) * 2010-05-28 2011-11-30 东京毅力科创株式会社 成膜方法和成膜装置
CN103249858A (zh) * 2010-12-09 2013-08-14 株式会社爱发科 有机薄膜形成装置
US20150287593A1 (en) * 2014-04-08 2015-10-08 International Business Machines Corporation Hydrogen-free silicon-based deposited dielectric films for nano device fabrication

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06196419A (ja) * 1992-12-24 1994-07-15 Canon Inc 化学気相堆積装置及びそれによる半導体装置の製造方法
JP3915054B2 (ja) * 2002-03-05 2007-05-16 株式会社トリケミカル研究所 膜形成材料、膜形成方法、及び素子
US8491967B2 (en) * 2008-09-08 2013-07-23 Applied Materials, Inc. In-situ chamber treatment and deposition process
JP5528762B2 (ja) * 2009-10-06 2014-06-25 株式会社Ａｄｅｋａ Ａｌｄ用原料及びこれを用いたケイ素含有薄膜形成方法
TWI512981B (zh) * 2010-04-27 2015-12-11 Semiconductor Energy Lab 微晶半導體膜的製造方法及半導體裝置的製造方法
WO2012169397A1 (ja) 2011-06-07 2012-12-13 シャープ株式会社 薄膜トランジスタ、その製造方法、および表示素子
JP6363385B2 (ja) * 2014-04-21 2018-07-25 東京エレクトロン株式会社 封止膜の形成方法及び封止膜製造装置
US10655221B2 (en) * 2017-02-09 2020-05-19 Asm Ip Holding B.V. Method for depositing oxide film by thermal ALD and PEALD

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0766196A (ja) * 1993-08-23 1995-03-10 Res Dev Corp Of Japan 二酸化シリコン膜の化学気相堆積方法
CN1389591A (zh) * 2001-05-23 2003-01-08 气体产品与化学公司 低介电常数材料以及通过cvd的加工方法
US6474077B1 (en) * 2001-12-12 2002-11-05 Air Products And Chemicals, Inc. Vapor delivery from a low vapor pressure liquefied compressed gas
WO2011010726A1 (ja) * 2009-07-24 2011-01-27 株式会社ユーテック プラズマＣＶＤ装置、ＳｉＯ２膜又はＳｉＯＦ膜及びその成膜方法
WO2011010727A1 (ja) * 2009-07-24 2011-01-27 株式会社ユーテック 熱ＣＶＤ装置、ＳｉＯ２膜又はＳｉＯＦ膜及びその成膜方法
CN102263027A (zh) * 2010-05-28 2011-11-30 东京毅力科创株式会社 成膜方法和成膜装置
CN103249858A (zh) * 2010-12-09 2013-08-14 株式会社爱发科 有机薄膜形成装置
US20150287593A1 (en) * 2014-04-08 2015-10-08 International Business Machines Corporation Hydrogen-free silicon-based deposited dielectric films for nano device fabrication

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