CN111629523A - Preparation method of multilayer electric hole process packaging substrate and substrate - Google Patents
Preparation method of multilayer electric hole process packaging substrate and substrate Download PDFInfo
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- CN111629523A CN111629523A CN202010629649.5A CN202010629649A CN111629523A CN 111629523 A CN111629523 A CN 111629523A CN 202010629649 A CN202010629649 A CN 202010629649A CN 111629523 A CN111629523 A CN 111629523A
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Images
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
- H05K3/0047—Drilling of holes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/26—Cleaning or polishing of the conductive pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/282—Applying non-metallic protective coatings for inhibiting the corrosion of the circuit, e.g. for preserving the solderability
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
- H05K2203/0214—Back-up or entry material, e.g. for mechanical drilling
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/16—Inspection; Monitoring; Aligning
- H05K2203/162—Testing a finished product, e.g. heat cycle testing of solder joints
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
Abstract
The invention provides a preparation method of a multilayer electric hole process packaging substrate and the substrate, and belongs to the field of substrate structures. The substrate comprises a substrate, the substrate comprises a core plate, base copper arranged on the surface of the core plate, an insulating layer arranged on the surface of the base copper, and a copper foil layer arranged on the surface of the insulating layer, wherein a solder resist oil layer is arranged on the surface of the copper foil layer, a gold-nickel welding position electrically connected with the copper foil layer is arranged on the solder resist oil layer, circuits are arranged on the base copper and the copper foil layer, and conductive holes connected with different layers are arranged on the substrate. The invention has the beneficial effects that: the circuit yield is improved, the etched substrate circuit is more uniform, and the stability is better.
Description
Technical Field
The invention relates to the technical field of integrated circuit packaging, in particular to a preparation method of a multilayer electric hole process packaging substrate and a substrate prepared by the preparation method of the multilayer electric hole process packaging substrate.
Background
In recent years, the technology of integrated circuit chip fabrication has entered the nanometer range, and is challenging to the physical limit, and the integrated circuit has higher integration and stronger function. This rapid development of integrated circuits has made integrated circuit chip package substrates challenging. Compared with the technical development of semiconductor integrated circuits, the technical development of printed circuit boards is relatively lagged behind, the etching capability is improved for twenty years, the functions of the integrated circuits are enhanced, and the products have the characteristics of good electrical conductivity, heat dissipation, thermal shock resistance and the like. However, the conventional packaging process still has disadvantages in terms of uniformity of surface copper, bonding force of each layer, product reliability, and the like.
Disclosure of Invention
In order to solve the problems in the prior art, the invention provides a preparation method of a multilayer electric hole process packaging substrate and also provides a substrate prepared by the preparation method of the multilayer electric hole process packaging substrate.
The preparation method of the multilayer electric hole process packaging substrate comprises the following steps:
s1: mechanically drilling a base material on the inner layer of the substrate, wherein the base material comprises a core plate and base copper arranged on the surface of the core plate;
s2: constructing an inner layer circuit on a base material, and detecting an open short circuit of the inner layer circuit;
s3: after the detection is qualified, arranging an insulating layer on the surface of the substrate, and covering a layer of copper foil on the outer surface of the insulating layer;
s4: performing target shooting and edge milling on the semi-finished substrate formed in the step S3;
s5: mechanically drilling the outer layer of the semi-finished product substrate, and processing the drilled hole to form a conductive film on the wall of the hole;
s6: pressing a film on the circuit hole, and carrying out exposure, development and electric hole treatment on the hole provided with the conductive film;
s7: removing the film, and performing front plugging treatment on the hole behind the electric hole;
s8: carrying out circuit manufacturing on the copper foil, and carrying out AOI inspection after manufacturing;
s9: arranging a solder mask layer on the surface of the copper foil, exposing and developing the solder mask layer, and curing the treated solder mask layer;
s10: carrying out lead wire treatment on the outer layer of the substrate;
s11: performing soft gold treatment to obtain a semi-finished product after electrogilding;
s12: etching and stripping the film by alkali, stripping the dry film covered on the surface of the semi-finished product substrate after electrogilding, exposing and etching the lead wire to be etched, and washing the lead wire to be the required semi-finished product;
s13: and (4) forming, checking the routing data, drilling pin holes suitable for products on a drilling machine, loading pins, and routing finished products with standard delivery sizes with smooth board edges.
The invention is further improved, and the method also comprises the step S14: and carrying out open and short detection on the finished product.
The invention is further improved, and after the test is qualified, the method also comprises the step S15: final inspection: and (4) sorting out defective products and discarding the defective products through optical scanning and final inspection by a quality inspector, and packaging the good products.
In a further improvement of the present invention, in step S3, the method further includes performing a pressing process on the insulating layer, where the pressing process includes the following steps:
s31: carrying out pressing pretreatment and browning on the surface of the substrate: removing surface oxidation by acid washing, cleaning the surface of base copper, and removing copper surface oxides and grease by using an alkaline degreasing agent; processing the copper foil by a chemical method to generate an oxide layer on the lower surface of the copper foil;
s32: pressing, namely connecting the outer copper foil and the inner layer into a whole by using a prepreg, melting the prepreg under a certain high-temperature condition to form a liquid filling base copper layer, and forming an insulating layer on the upper surface of the base copper layer;
s33: and further heating to gradually solidify the insulating layer to form a stable insulating material, and connecting the layers into a whole.
The invention is further improved, in step S1, the upper and lower surfaces of the base material are symmetrically provided with base copper, before mechanically drilling the base material, the method further comprises the following steps: the substrate was baked at 195 ℃ for 2 hours.
In a further improvement of the present invention, in step S2, the method for constructing the inner layer circuit includes:
s21: acid pickling treatment: removing impurities on the copper surface, and then pickling;
s22: bonding the H-Y920 dry film and the copper surface of the substrate together in a hot pressing mode;
s23: during exposure, the image on the original negative film is transferred to a photosensitive bottom plate under the action of an ultraviolet light source, the negative film used in the inner layer of the substrate is a negative film, the white light-transmitting part undergoes polymerization reaction, and the black part does not react due to light tightness;
s24: the dry film part which does not undergo chemical reaction is washed away by the action of alkali liquor, and the dry film which undergoes polymerization reaction is remained on the base material to be used as a corrosion-resistant protective layer during etching.
In a further improvement of the present invention, in step S5, the method for processing the drilled hole includes:
s51: removing the glue residue remained on the hole wall after drilling;
s52: washing the oxidation dirt on the board surface by using a pickling solution;
s53: and forming a conductive film on the hole wall of the drilled base material plate, so that the copper foils on the two sides are conductive, and providing a base adhesion layer for subsequent electric holes.
In a further improvement of the present invention, in step S7, the method for processing the front plug processing includes:
plugging holes by adopting a coating mode, adhering dust on the surface of the copper foil before plugging the holes, preparing EG23 ink into paste coating plug hole sections, coating the paste coating plug hole sections on a substrate, baking at low temperature, coating for the second time, and then feeding the paste coating plug hole sections through a tunnel oven section baking plate;
and then placing the coated copper-clad plate with the hole plugged on an exposure contraposition at 450MJ for exposure, developing an unexposed part at the speed of 1.5m/min and the temperature of 75 ℃, filling the hole with ink in the copper-clad plate fully, and curing the ink at the hole opening through a segmented baking plate, wherein the ink at the edge of the hole opening and the step of the hole opening are brushed flat when the front plug is brushed with ink.
In step S8, the method for manufacturing a circuit includes:
s81: baking the copper-clad plate for 1 hour at the temperature of 150 ℃;
s82: roughening the surface of the copper foil;
s83: pressing a dry film of a photosensitive material RD-1215 on the upper surface of a copper foil, pressing the film at the temperature of 115 ℃, and then staying for 12 hours;
s84: line exposure: before operation, cleaning the platform of the exposure machine, opening the exposure system, introducing data into the exposure system of the exposure machine, selecting a positioning hole for alignment, and directly imaging the 2-line image on the surfaces of the upper copper foil and the lower copper foil by adopting a laser scanning method;
s85: and (3) developing and etching the circuit: and dissolving the unexposed dry film by using a developer, removing the redundant copper sheet by using an etching solution, cleaning the residual acidic etching solution on the surface by using a pickling solution, and finally washing and drying to obtain a complete circuit pattern.
The invention also provides a substrate prepared by the preparation method of the multilayer electric hole process packaging substrate, which comprises a substrate, wherein the substrate comprises a core plate, base copper arranged on the surface of the core plate, an insulating layer arranged on the surface of the base copper and a copper foil layer arranged on the surface of the insulating layer, a solder resist oil layer is arranged on the surface of the copper foil layer, a gold-nickel welding position electrically connected with the copper foil layer is arranged on the solder resist oil layer, circuits are arranged on the base copper and the copper foil layer, and the substrate is provided with electric conduction holes connected with different layers.
Compared with the prior art, the invention has the beneficial effects that: the surface copper has consistent uniformity, and a more precise, thinner and denser circuit board can be manufactured; the circuit yield is improved, the etched substrate circuit is more uniform, and the stability is better.
Drawings
FIG. 1 is a schematic view of a substrate structure according to the present invention;
FIG. 2 is a schematic view of a dry film covering structure during the fabrication of an inner layer circuit;
FIG. 3 is a schematic diagram of the structure after exposure when the inner layer circuit is constructed;
FIG. 4 is a schematic diagram of the structure after development when the inner layer circuit is constructed;
FIG. 5 is a schematic diagram of a structure after etching when an inner layer circuit is constructed;
FIG. 6 is a schematic diagram of the structure after film removal during the formation of the inner layer circuit;
FIG. 7 is a schematic view of a structure before lamination of an insulating layer;
FIG. 8 is a schematic view of the structure after lamination;
FIG. 9 is a schematic view of a copper foil after lamination before circuit fabrication;
FIG. 10 is a schematic view of an exposure process for fabricating a circuit on a copper foil;
FIG. 11 is a schematic view of the structure of the substrate after the development etching of the circuit;
FIG. 12 is a schematic view of a solder mask layer;
fig. 13 is a schematic structural diagram after gold electroplating.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples.
The preparation method of the multilayer electric hole process packaging substrate comprises the following steps:
the first step is as follows: selecting raw materials.
In the present example, a substrate of 510 × 410mm size is used, the substrate includes a BT (BT resin substrate material) core board 1 and a base copper 2 covering the upper and lower surfaces of the BT core board, as shown in fig. 1, the BT core board 1 of 12um/12um base copper thickness and 0.06mm thickness is used in the present example, before processing, the substrate is baked at high temperature to eliminate the internal stress generated during the manufacturing of the board, to improve the dimensional stability of the material, and in addition, to remove the water absorbed by the board during storage, to increase the reliability of the material, the substrate is baked at high temperature of 195 ℃ for 2 hours.
The second step is that: and mechanically drilling the inner layer.
Drilling through holes on a substrate, drilling a certain number of required inner layer holes by using a drill bit of 0.5mm through the transmission of x-rays of a digital drilling machine, wherein the inner layer holes comprise via holes, positioning holes and directional holes, and the via holes comprise: a via hole for connecting each line layer; positioning a hole: the positioning function is used for positioning the plate edges; directional hole: holes for aligning and identifying directions.
The third step: and constructing an inner layer circuit.
The acid pickling pretreatment removes the contaminants such as oxide layer and other impurities on the copper surface of the base copper 2, increases the roughness of the copper surface, and attaches the H-Y920 dry film 3 to the two surfaces of the copper surface of the substrate in a hot pressing mode, as shown in figure 2.
During exposure, the image on the original negative film is transferred to the photosensitive substrate under the action of the ultraviolet light source, the negative film used in the inner layer of the negative film 4 is a negative film, i.e. the white light-transmitting part 41 undergoes polymerization reaction, and the black part 42 does not undergo reaction due to light-tightness, and the structure diagram is shown in fig. 3.
The part of the H-Y920 dry film 3 which does not undergo chemical reaction is washed away by the action of alkali liquor, the dry film which undergoes polymerization reaction is remained on the plate surface to be used as a corrosion-resistant protective layer during etching, and finally etching and film stripping are carried out, wherein the specific structure is shown in figure 4-6.
The fourth step: after the inner layer lines are constructed, the open short circuit is detected by AOI (automatic optical inspection).
The fifth step: after the detection is qualified, carrying out pressing pretreatment and browning, wherein the specific treatment method comprises the following steps:
by H2SO4The surface oxidation is removed through acid washing, the copper surface is cleaned, the alkaline degreasing agent is used for removing oxides and grease on the copper surface, the copper foil with the thickness of 12um on the surface of the PCB is processed through a chemical method for browning, and a layer of oxidation layer is generated on the surface of the copper foil, so that the joint force between the copper foil and the prepreg 5 when the multilayer circuit board is pressed is improved, and the laminated substrate is well combined, so that pink rings are prevented from being generated and thermal shock is resisted.
And a sixth step: pressing, namely connecting the outer layer 12 of the copper foil 6 and the inner layer into a whole by using a prepreg 5 made of PP (polypropylene) with the material of 30mm, and utilizing the characteristics of the prepreg 5, wherein the hot pressing time is 185 minutes, and the pressure is 60kg/cm2Next, the prepreg 5 is melted at a certain high temperature to form a liquid state, and the liquid state fills the upper surface and the space of the base copper 2 shown in fig. 6 to form an insulating layer 7, and then the liquid state is further heated and gradually cured to form a stable insulating material, and simultaneously, the layers of the circuits are connected into an integral four-layer board. The outer copper foil is the signal layer of the circuit, and the insulating layer 7 combines the inner copper with the outer copper.
The seventh step: target shooting and outer layer edge milling.
The target-shooting function is to mill off the target hole of the laminated inner-layer plate and expose the target ring, and an automatic target drilling machine drills through the target hole, so that the edge milling and the hole drilling positioning after the lamination are convenient to use; and the outer layer edge milling is to mill off the gummosis and the copper foil of the pressed plate edges to ensure that the plate edges are neat and smooth.
The CCD visual image is generated by X-Ray penetration; displaying a target needing to be subjected to target shooting; the vision system calculates the target; and after the coordinates are calculated, the drill shaft on the pumping control is accurately moved to the central position of the target, and then the drilling operation is carried out. And before drilling, trimming the redundant copper foil on the plate edge according to the size requirement.
Eighth step: and mechanically drilling the outer layer.
The drill bit drills required hole diameter, hole number, layer-to-layer conduction, positioning holes and direction holes on the plate and plays a role of rear component jacks.
The ninth step: removing glue residues and carrying out hole treatment.
Removing the glue residue remained on the hole wall after drilling, cleaning the surface of the board with pickling solution PSH-PIC-2600 to remove oxidation dirt, and enabling the hole wall of the drilled substrate board to form a conductive film through the pickling solution, so that the two-sided copper foil is conductive, and a basic adhesion layer is provided for a subsequent electric hole.
The tenth step: film pressing, exposure and development processing are carried out on the outer layer circuit holes.
In the embodiment, an AQ-5038 dry film is pressed on a copper-clad plate covered with a copper foil 6 at the temperature of 115 ℃, 60MJ energy exposure is carried out on a via hole windowing and a hole single side is 0.015mm larger during exposure, via holes of a via hole in the plate are exposed, development is carried out at the speed of 2.5m/min, an exposed position hole is developed under the up-and-down pressure of 1.8/2.5kg/cm2, a corrosion-resistant dry film still exists in a place without exposure, a place covered by the dry film does not need electrocoppering, only the hole in the hole needs electrocoppering, and preparation is prepared before the electrocoppering.
The eleventh step: and (4) electric hole processing.
The present example uses a 30 minute programmed via with a copper-plated VCP line to meet the customer requirement for copper thickness in the via (14um) to ensure good conductivity, while where the substrate surface is covered by a dry film, the surface copper thickness is not electrically up, so that the substrate surface copper thickness is 12um standard copper thickness and the via copper thickness is 14um copper thickness.
The twelfth step: and (4) removing the film, namely removing and washing the dry film on the copper surface of the copper-clad plate after the previous step of the electric hole by using a film removing machine at the temperature of 49.3 ℃ and the speed of 1.7 m/min.
The thirteenth step: and (5) front plugging treatment.
Plugging by adopting a coating mode, adhering dust to surface copper before plugging, preparing EG23 ink into a pasty coating plugging section (scraper pressure: 0.24kg, coating pressure: 1.2kg, temperature of 80 ℃) to coat on a substrate, baking at low temperature, coating for the second time, and then baking a baking plate at a tunnel oven section for blanking.
And then placing the coated copper-clad plate with the coated copper-clad plate plugged into the hole on an exposure contraposition at 450MJ for exposure, developing the unexposed part at the speed of 1.5m/min and the temperature of 75 ℃, filling the hole with ink in the copper-clad plate, and curing the ink at the hole opening through a sectional baking plate. When the front plug is brushed with ink, the ink at the edge of the orifice and the step of the electric hole are brushed flat by using a non-woven fabric brush under the condition that the current of the ink brushing machine is 0.6A and the speed is 1.5 m/min.
The fourteenth step is that: and (6) manufacturing a circuit.
1. And (3) obtaining the copper-clad plate with the base material with the surface copper thickness still being 12um and the hole copper 14um being filled with the printing ink from the last step, and baking the copper-clad plate for 1 hour at the temperature of 150 ℃ before the circuit is manufactured. During the middle coarsening, the copper surface is chemically treated by adopting liquid medicines such as copper ions, sulfuric acid, hydrogen peroxide and the like, so that the surface of the copper foil is coarsened, and the binding force between the copper foil and a dry film is improved.
2. The photosensitive material RD-1215 dry film 8 is pressed on the copper foil 6, and after film pressing at the temperature of 115 ℃, the film is kept for 12 hours and then exposure is carried out. The structure is shown in fig. 9.
3. And (3) line exposure, wherein the platform of the exposure machine is cleaned before operation, the data is imported after the exposure system is opened, positioning holes are selected for alignment, and line images on two sides are directly imaged on the surface of the copper foil 6 by adopting a laser 11 scanning method in a laser direct imaging technology during exposure, as shown in figure 10.
4. Line development etching by Na2CO3The developer solution is used to dissolve the unexposed dry film on the copper plate after exposure at a speed of 3.8m/min, and the exposed part is remained. Then using the speed of 3.5m/min and the speed of 1.2kg/cm2Etching ofAnd (3) spraying pressure, passing etching solutions such as HCL (hydrogen chloride), removing excessive copper sheets, cleaning the residual acidic etching solution on the board surface by using a pickling solution, and finally washing and drying to obtain a complete circuit pattern, as shown in figure 11.
The fifteenth step: AOI inspection, which is to perform optical scanning after line etching to find open short circuit and other defects at early stage and to repair and process the defects.
Sixteenth, step: and arranging a solder mask layer on the surface of the copper foil, exposing and developing the solder mask layer, and curing the processed solder mask layer. The specific treatment method comprises the following steps:
1. resistance welding pretreatment, namely, carrying out leveling cleaning on the copper-clad plate after AOI scanning and passing through a super-roughening cylinder to remove copper ions Cu2+Coarsening the copper surface by using the liquid medicine (at the temperature of 38 ℃) so as to improve the bonding force between the solder resist and the copper surface, and pickling the copper surface to prevent the copper surface from entering a dust-free chamber to be oxidized;
2. solder mask silk-screen printing, adding oil and water into the printing ink AUS308 before silk-screen printing, mixing and standing for later use, installing a screen printing plate, a scraper and a base plate, placing the copper-clad plate which is subjected to super coarsening on a table board, selecting different T-number screen printing plates according to different product types, pouring the well-mixed AUS308 printing ink into the screen printing plate after adjusting silk-screen printing parameters, and printing the oil on the plate by the silk-screen scraper to form a green solder mask layer with the oil thickness of 15-21 um;
3. solder mask vacuum flattening, mounting a release film (Bester matte film), setting parameters such as preheating temperature, hot pressing temperature, pressure, tension, vacuum time and the like of a film pressing machine, vacuumizing and flattening, and enabling the printing ink to be pasted on the copper foil to be smoother;
4. and solder mask exposure and development, namely, utilizing the photosensitivity of the dry film, placing the flattened product in an ORC exposure machine for alignment, and transferring the virtual data of the solder mask film to the substrate by an exposure system of the exposure machine to enable the dry film to show a required graph. Exposing the product at 1.8m/min under a pressure of 2.0/1.5kg/cm2And developing, wherein the dry film of the developed product is removed after the developed product passes through a developing solution, the unexposed part of the solder mask is exposed, and the ink of the exposed part is completely covered.
5. Baking UV after welding, putting the product manufactured in the step 4 into an oven, and using three sections of baking plates, wherein the parameters of the three sections of baking plates are respectively as follows: the solder resist ink 9 was cured at 100 ℃ for 10 minutes, 130 ℃ for 20 minutes, and 155 ℃ for 60 minutes, and then UV (ultraviolet rays) was applied to the cured product at high temperature to cure the ink 9, as shown in fig. 12.
Seventeenth step: and (6) lead wire processing.
By H2SO4The method comprises the steps of pickling the surface of a plate with liquid medicine to be dirty, pressing the plate with a AQ-5038 dry film by using a film pressing machine, wherein the hardness of a press roll is 62.5 degrees, the speed is 1.75m/min, the film pressing temperature is 130 ℃ and other parameters are set, after the film pressing of a substrate, the substrate is placed on an exposure machine to be aligned, virtual data of engineering manufacturing is transferred to the substrate by adopting a laser direct imaging technology, the dry film presents a pattern of a lead, and the unexposed dry film on the product is removed by the liquid medicine treatment of developing solution. The developing mechanism is that the active group of unexposed part in the photosensitive film reacts with dilute alkali solution to generate soluble substance to be dissolved, and the carboxyl-COOH of the active group reacts with Na + in anhydrous sodium carbonate solution to generate hydrophilic group-COONa during developing. Thereby dissolving the unexposed portions without swelling the dry film of the exposed portions. And the temperature, the transmission speed, the spraying pressure and other development parameters of the developing solution are well controlled during production, so that a good development effect can be obtained.
And eighteenth step: and (5) carrying out soft gold treatment.
The specific processing method of the embodiment is as follows:
1. leveling before softening gold, eroding out uneven part of copper of a product with a lead by leveling micro-etching liquid, and cleaning and drying the board surface to prepare for electrically softening gold;
2. clamping the upper plate of the product, removing oxidation and oil stain on the plate surface in an oil removing tank, washing with water, and then feeding into a micro-etching tank (CU-316, H)2SO44％,Cu2+) The copper surface is coarsened internally, the good binding force between copper and nickel is ensured, and then the copper enters a pickling tank (H)2SO45% concentration) to ensure good combination of copper and nickel, washing, then placing the copper-nickel alloy into a nickel-plating bath, plating a layer of nickel larger than 5um on the position to be plated with a nickel layer to provide reliability for bonding or welding of customers, and then washing and plating a required gold layer in the gold-plating bathThe part of the plate is plated with a layer of soft gold 10 of 0.3um, which is convenient for a client to bond or weld, and finally the plate is washed, dried and collected to obtain a semi-finished product after electrogilding.
The nineteenth step: stripping off the film by alkali etching, removing the dry film on the surface of the semi-finished product of the electrogilded substrate to expose the lead wire to be etched, and etching with alkali solution at speed of 3m/min and 0.5-1.0kg/cm2Etching the lead exposed from the plate surface under the pressure and at the temperature of 45-48 ℃, washing with water to obtain a required semi-finished product, and performing soft gold treatment to obtain the structure shown in fig. 13.
The twentieth step: the shaping, at first inspection gong board data, beat the pin on the pin hole that is fit for the product on the drilling machine, the pin hole is the locating hole really, is used for fixed position at the shaping process, prevents gong effect partially. The large plate pipe position hole is fixed well through the pin, the drilling bit table adjusts the drill parameters, the drilling and milling speed and the tool magazine SET milling cutter compensation, and finished products with standard shipment sizes with smooth SET plate edges are milled.
The invention aims at the defects that the deviation degree exists in the electric hole exposure of the packaging substrate manufacturing method of the electric hole process in the prior art, so that the electric hole opening has steps and the opening needs to be brushed flat through a brushing and grinding process.
The twentieth step: and testing, namely placing the formed finished product in a testing jig of the model, and carrying out 100% open/short detection on the PCB.
A twenty-second step: and finally, detecting functional and appearance defects of the product after the optical scanning test by using an AVI machine, judging the defects of the product by personnel according to the quality inspection standard of a customer, forking and identifying, sorting out defective products, scrapping, and packaging the good products.
The above-described embodiments are intended to be illustrative, and not restrictive, of the invention, and all changes that come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.
Claims (10)
1. A preparation method of a multilayer electric hole process packaging substrate is characterized by comprising the following steps:
s1: mechanically drilling a base material on the inner layer of the substrate, wherein the base material comprises a core plate and base copper arranged on the surface of the core plate;
s2: constructing an inner layer circuit on a base material, and detecting an open short circuit of the inner layer circuit;
s3: after the detection is qualified, arranging an insulating layer on the surface of the substrate, and covering a layer of copper foil on the outer surface of the insulating layer;
s4: performing target shooting and edge milling on the semi-finished substrate formed in the step S3;
s5: mechanically drilling the outer layer of the semi-finished product substrate, and processing the drilled hole to form a conductive film on the wall of the hole;
s6: pressing a film on the circuit hole, and carrying out exposure, development and electric hole treatment on the hole provided with the conductive film;
s7: removing the film, and performing front plugging treatment on the hole behind the electric hole;
s8: carrying out circuit manufacturing on the copper foil, and carrying out AOI inspection after manufacturing;
s9: arranging a solder mask layer on the surface of the copper foil, exposing and developing the solder mask layer, and curing the treated solder mask layer;
s10: carrying out lead wire treatment on the outer layer of the substrate;
s11: performing soft gold treatment to obtain a semi-finished product after electrogilding;
s12: etching and stripping the film by alkali, stripping the dry film covered on the surface of the semi-finished product substrate after electrogilding, exposing and etching the lead wire to be etched, and washing the lead wire to be the required semi-finished product;
s13: and (4) forming, checking the routing data, drilling pin holes suitable for products on a drilling machine, loading pins, and routing finished products with standard delivery sizes with smooth board edges.
2. The method of manufacturing a multilayer electrical via process package substrate of claim 1, wherein: further comprising step S14: and carrying out open and short detection on the finished product.
3. The method of manufacturing a multilayer electrical via process package substrate of claim 2, wherein: after the test is qualified, the method further includes step S15: final inspection: and (4) sorting out defective products and discarding the defective products through optical scanning and final inspection by a quality inspector, and packaging the good products.
4. The method for preparing a multi-layer electrical hole process packaging substrate according to any one of claims 1-3, wherein: in step S3, the method further includes performing a stitching process on the insulating layer, where the stitching process includes the following steps:
s31: carrying out pressing pretreatment and browning on the surface of the substrate: removing surface oxidation by acid washing, cleaning the surface of base copper, and removing copper surface oxides and grease by using an alkaline degreasing agent; processing the copper foil by a chemical method to generate an oxide layer on the lower surface of the copper foil;
s32: pressing, namely connecting the outer copper foil and the inner layer into a whole by using a prepreg, melting the prepreg under a certain high-temperature condition to form a liquid filling base copper layer, and forming an insulating layer on the upper surface of the base copper layer;
s33: and further heating to gradually solidify the insulating layer to form a stable insulating material, and connecting the layers into a whole.
5. The method of manufacturing a multilayer electrical via process package substrate of claim 4, wherein: in step S1, the upper and lower surfaces of the base material are both symmetrically provided with base copper, and before mechanically drilling the base material, the method further includes the step of processing the substrate: the substrate was baked at 195 ℃ for 2 hours.
6. The method of manufacturing a multilayer electrical via process package substrate of claim 5, wherein: in step S2, the method of constructing the inner layer circuit includes:
s21: acid pickling treatment: removing impurities on the copper surface, and then pickling;
s22: bonding the H-Y920 dry film and the copper surface of the substrate together in a hot pressing mode;
s23: during exposure, the image on the original negative film is transferred to a photosensitive bottom plate under the action of an ultraviolet light source, the negative film used in the inner layer of the substrate is a negative film, the white light-transmitting part undergoes polymerization reaction, and the black part does not react due to light tightness;
s24: the dry film part which does not undergo chemical reaction is washed away by the action of alkali liquor, and the dry film which undergoes polymerization reaction is remained on the base material to be used as a corrosion-resistant protective layer during etching.
7. The method of claim 6, wherein the method comprises: in step S5, the method of processing the drilled hole includes:
s51: removing the glue residue remained on the hole wall after drilling;
s52: washing the oxidation dirt on the board surface by using a pickling solution;
s53: and forming a conductive film on the hole wall of the drilled base material plate, so that the copper foils on the two sides are conductive, and providing a base adhesion layer for subsequent electric holes.
8. The method of manufacturing a multilayer electrical via process package substrate of claim 7, wherein: in step S7, the method of processing the front plug processing includes:
plugging holes by adopting a coating mode, adhering dust on the surface of the copper foil before plugging the holes, preparing EG23 ink into paste coating plug hole sections, coating the paste coating plug hole sections on a substrate, baking at low temperature, coating for the second time, and then feeding the paste coating plug hole sections through a tunnel oven section baking plate;
and then placing the coated copper-clad plate with the hole plugged on an exposure alignment position to expose at 450MJ, developing the unexposed part at the temperature of 75 ℃ at the speed of 1.5m/min, filling the hole with ink in the copper-clad plate, and curing the ink at the hole opening through a segmented baking plate, wherein the ink at the edge of the hole opening and the step of the hole opening are brushed to be flat when the front plug is brushed with ink.
9. The method of claim 8, wherein the method comprises: in step S8, the method for manufacturing a circuit includes:
s81: baking the copper-clad plate for 1 hour at the temperature of 150 ℃;
s82: roughening the surface of the copper foil;
s83: pressing a dry film of a photosensitive material RD-1215 on the upper surface of a copper foil, pressing the film at the temperature of 115 ℃, and then staying for 12 hours;
s84: line exposure: before operation, cleaning the platform of the exposure machine, opening the exposure system, introducing data into the exposure system of the exposure machine, selecting a positioning hole for alignment, and directly imaging the 2-line image on the surfaces of the upper copper foil and the lower copper foil by adopting a laser scanning method;
s85: and (3) developing and etching the circuit: and dissolving the unexposed dry film by using a developer, removing the redundant copper sheet by using an etching solution, cleaning the residual acidic etching solution on the surface by using a pickling solution, and finally washing and drying to obtain a complete circuit pattern.
10. A substrate prepared by the method for preparing a multilayer electrical hole technology packaging substrate according to any one of claims 1 to 9, wherein: the base material comprises a core plate and base copper arranged on the surface of the core plate, and further comprises an insulating layer arranged on the surface of the base copper and a copper foil layer arranged on the surface of the insulating layer, wherein a resistance welding oil layer is arranged on the surface of the copper foil layer, a gold-nickel welding position electrically connected with the copper foil layer is arranged on the resistance welding oil layer, circuits are arranged on the base copper and the copper foil layer, and conductive holes for connecting different layers are formed in the substrate.
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