CN115148695A - Pre-encapsulated substrate and manufacturing method thereof - Google Patents

Pre-encapsulated substrate and manufacturing method thereof Download PDF

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Publication number
CN115148695A
CN115148695A CN202210874317.2A CN202210874317A CN115148695A CN 115148695 A CN115148695 A CN 115148695A CN 202210874317 A CN202210874317 A CN 202210874317A CN 115148695 A CN115148695 A CN 115148695A
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copper film
solder
carrier plate
copper
protrusion
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CN202210874317.2A
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张光耀
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Hefei Silicon Microelectronics Technology Co ltd
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Hefei Silicon Microelectronics Technology Co ltd
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Priority to CN202210874317.2A priority Critical patent/CN115148695A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
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    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
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    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

The invention discloses a pre-packaged substrate and a manufacturing method thereof, wherein the pre-packaged substrate comprises a pre-packaging layer and a carrier plate, a copper film is arranged on the surface of the carrier plate, and the pre-packaging layer is arranged right above the carrier plate, and is characterized in that the pre-packaging layer comprises at least one bulge, the upper end of each bulge is exposed on the surface of the pre-packaging layer, the lower end of each bulge is provided with a pin, the pins are flush with the copper film, the surface of each bulge is provided with a concave opening for containing solder and inversely mounting, the mode that the upper end of each bulge is exposed on the surface of the pre-packaging layer is grinding, the pre-packaging layer is specifically epoxy resin plastic packaging material, the surface of each bulge forms a concave opening through partial etching, the concave opening is concave in a radian, and the depth range of the carrier plate is 10-50 mu m.

Description

Pre-encapsulated substrate and manufacturing method thereof
Technical Field
The invention belongs to the technical field of semiconductor packaging, and particularly relates to a pre-packaged substrate and a manufacturing method thereof.
Background
In the semiconductor packaging industry in recent years, various packaging methods are developed, and advantages such as higher density, stronger functions, more careless performance, smaller size, lower power consumption and the like are achieved, an MIS frame is produced as a brand-new packaging process based on a frame base material, the MIS frame (Molded Interconnected System) is a frame manufacturing process based on electroplating accumulation and pre-plastic packaging technology, and comprises one or more layers of pre-packaging structures, each layer is Interconnected through electroplated copper to provide electrical connection in the packaging process, in order to improve packaging efficiency, a packaging factory can prefabricate a large amount of MIS frames for storage, and then directly mount chips on the MIS frame and package the like to complete packaging work.
The MIS frame is made of special substrate materials, namely a cold-rolled carbon steel sheet and a steel belt are used as substrates, after the surface roughness of the substrates is improved through grinding and polishing, the binding force between an iron layer of the substrates and subsequent acid copper plating is improved through cyanide copper electroplating, a good production interface is provided for the post-process namely formal electroplating, then internal circuits are formed through multiple times of photoetching and developing and common electroplating, the substrates are encapsulated to form a frame encapsulation body, then windows on the back sides of the substrates are etched and subjected to anti-oxidation treatment, a large number of MIS frames are formed and put in storage for use, and subsequent chips are directly attached.
Finding an alternative scheme of the MIS frame, completing the fabrication of the pre-encapsulation substrate at low cost and completing the packaging process by using the substrate becomes an urgent problem to be solved in each packaging factory.
Disclosure of Invention
In order to solve the above-mentioned problems in the prior art, the present invention provides a pre-encapsulated substrate and a method for manufacturing the same.
In order to achieve the above object, the pre-encapsulated substrate provided by the present invention includes a pre-encapsulation layer and a carrier plate, wherein a copper film is disposed on a surface of the carrier plate, and the pre-encapsulation layer is disposed directly above the carrier plate.
Furthermore, the mode that the upper end of each protrusion is exposed on the surface of the pre-sealing layer is grinding, and the pre-sealing layer is specifically epoxy resin plastic packaging material.
Further, the surface of each of the protrusions is formed with a recess by partially etching.
Furthermore, the sunken port is sunken in a radian, and the depth range of the sunken port is 10-50 mu m.
Further, the copper film is formed on the surface of the carrier plate through pressing, and the thickness of the copper film is more than or equal to 15 microns.
Further, the projections are formed by a process of coating, photolithography, development, and plating.
A method for manufacturing a pre-encapsulated substrate comprises the following steps:
s1, providing a carrier plate with a single-side coated with a copper film;
s2, forming at least one bulge on the surface of the copper-coated film of the carrier plate in a coating, photoetching, developing and electroplating mode, wherein the lower end of the bulge is provided with a pin which is flush with the copper film;
s3, encapsulating each bump into a pre-sealing layer, and grinding and exposing the pre-sealing layer;
s4, partially etching each bump to form a concave opening;
s5, forming an anti-oxidation layer on the surface of the concave opening, successfully preparing the pre-packaged substrate at the moment, and warehousing for later use;
s6, filling the concave opening with solder by using a solder printer;
s7, inversely mounting the chip, mounting the implanted ball of the chip corresponding to the concave opening, packaging and stripping the carrier plate, and etching the copper film to form a solder leg, wherein the solder leg is connected with the pin.
Furthermore, after each protrusion is partially etched to form a recess opening, the surface of the recess opening is subjected to anti-oxidation treatment in a manner of plating gold or coating ethylene bis-oleic acid amide glue or coating a mechanical solder mask.
Has the advantages that: 1. according to the method, a steel belt substrate carrier in an MIS lead frame is changed into a common single-sided copper-clad carrier in the field, specifically a glass resin laminated PCB organic raw material plate, the carrier is large in quantity and convenient to obtain, the processing technology is simple, the specification and the thickness of the carrier can be customized according to production requirements, the overall technology is simple and efficient, and the cost is reduced;
2. the method has the advantages that the copper film is left after the carrier plate is stripped, and the welding leg is directly electroplated and formed by one-step etching, so that the process flow is reduced compared with the traditional welding leg formed by coating, photoetching, developing and electroplating, the cost is reduced, and the shape of the welding leg can be flexibly changed according to the actual production requirement;
3. etch out the cave mouth in protruding upper portion and be used for holding the solder and carry out the chip face-down mounting and paste dress, this prefabricated base plate is applicable to face-down mounting paster and SMT surface mounting packaging technology, and the carrier plate that follow-up was peeled off is complete can reuse, pastes dress after the contrast MIS frame etches the windowing with the steel band base plate back, resources are saved and process.
Drawings
FIG. 1 is a process flow diagram of a method for fabricating a pre-encapsulated substrate according to the present invention;
FIG. 2 is a schematic diagram of a pre-encapsulation of a method for fabricating a pre-encapsulated substrate according to the present invention;
FIG. 3 is a schematic view of the protrusion exposed by the method for fabricating a pre-encapsulated substrate according to the present invention;
FIG. 4 is a schematic diagram of a bump etching process for a pre-encapsulation substrate manufacturing method according to the present invention;
FIG. 5 is a schematic view of an anti-oxidation treatment of a method for fabricating a pre-encapsulated substrate according to the present invention;
FIG. 6 is a schematic diagram of a flip chip for a method of fabricating a pre-encapsulated substrate according to the present invention;
FIG. 7 is a schematic view of flip chip bonding for a method of fabricating a pre-encapsulated substrate according to the present invention;
FIG. 8 is a schematic diagram of a chip package for a method of fabricating a pre-packaged substrate according to the present invention;
FIG. 9 is a schematic view of a release substrate for a method of fabricating a pre-encapsulated substrate according to the present invention;
FIG. 10 is a schematic view of the formation of solder fillets in a method for fabricating a pre-encapsulated substrate according to the present invention;
fig. 11 is a schematic diagram of a method for manufacturing a pre-encapsulated substrate cut into single products according to the present invention.
The notation in the figure is: the structure comprises a carrier plate 1, a copper film 2, a protrusion 3, a recess opening 4, an anti-oxidation layer 5, a pre-sealing layer 6 and pins 7.
Detailed Description
Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present application, as detailed in the appended claims.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in this application and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and/or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.
For better understanding of the purpose, structure and function of the present application, a pre-encapsulation substrate and a method for fabricating the same proposed in the present application are described in detail with reference to fig. 1-11.
The invention relates to a method for packaging a pre-packaged substrate, fig. 1 is a schematic diagram of steps of a method for manufacturing a substrate according to the invention, and referring to fig. 1, the method for manufacturing the pre-packaged substrate according to the invention comprises the following steps: s1, providing a carrier plate 1 with a single-sided copper film 2; s2, forming at least one protrusion 3 on the surface of the copper-coated film 2 of the carrier plate 1 in a coating, photoetching, developing and electroplating mode, wherein the lower end of the protrusion is provided with a pin 7, and the pin 7 is flush with the copper film 2; s3, encapsulating each bump 3 into a pre-sealing layer 6, and grinding and exposing the pre-sealing layer; s4, partially etching each protrusion 3 to form a concave opening 4; s5, performing anti-oxidation treatment on the recessed opening 4 to form an anti-oxidation layer 5, wherein the pre-packaged substrate is successfully prepared and put in storage for later use; s6, filling the concave opening 4 with solder by using a solder printer; s7, inversely mounting the chip, mounting the implanted ball of the chip corresponding to the concave opening 4, encapsulating and peeling off the carrier plate 1, and etching the copper film 2 to form a welding pin which is connected with the pin 7.
Referring to fig. 1, fig. 2 and step S1, a carrier 1 with a copper film 2 coated on one surface thereof is an organic substrate formed of a common resin such as a glass epoxy resin in the art, and is a common raw material board for PCB, and a general process of manufacturing the carrier includes immersing a reinforcing material in the resin, coating a copper foil on one or both surfaces of the reinforcing material, and performing hot pressing to form a plate-shaped substrate, which may also be referred to as a Copper Clad Laminate (CCL), wherein the copper clad laminate has a thickness of 0.2-4 mm, a width of 1020-1400 mm, and a length of 1220-3400 mm, and the price of the cold rolled carbon steel sheet and steel strip as the substrate is several times to several tens times that of the copper clad laminate, and the thickness of the copper film 2 can be customized according to specific product production requirements, and is not less than 15 μm in the present application, so as to ensure the subsequent etching formation of solder joints.
Referring to fig. 1, fig. 2 and step S2, at least one bump 3 is formed on the surface of the copper film 2 of the carrier 1 by coating, photolithography, development and electroplating, that is, a metal layer is formed on the upper surface of the copper film 2, the bump 3 may be a conductive layer or a wiring layer or a combination of a conductive layer and a wiring layer, the number of layers may also be designed according to the actual production situation, photolithography is a comprehensive technique combining image copying and chemical etching, the pattern on the photomask is accurately copied onto the copper film 2 coated with photoresist by photocopying (coating), the photoresist is changed under the irradiation of light with appropriate wavelength, so as to improve the strength, in some organic solvents, the portion of photoresist not irradiated by light is not changed, and is easily dissolved by some organic solvents (photolithography), then the copper film 2 is selectively chemically etched by the protection effect of the photoresist, so as to obtain the pattern (development) corresponding to photolithography on the copper film 2, then the carrier 1 is electrified by using acid copper chemical agent, so as an electrode, at least one bump 3 is formed, the bump size and the bump 3 can be flexibly arranged according to the actual size of the bump 1 and the electroplating shape of the bump 3, and the carrier can be flexibly produced according to the requirements.
Referring to fig. 1, fig. 3 and step S3, each bump 3 is encapsulated to form a pre-encapsulation layer 6, an epoxy resin molding compound commonly used in the field is used for encapsulation, an ABF film is used for an MIS encapsulation frame and can be replaced by an epoxy resin molding compound, the ABF film required for encapsulation in the advanced semiconductor encapsulation process with fine line width and extremely high precision is used for encapsulation, the ABF film with better quality and effect is a japanese special supply, the cost is higher, and the bump 3 is exposed after encapsulation by grinding, namely, the redundant molding compound is removed, so that the warping degree of the molding compound can be reduced, and the bump 3 can be exposed to realize circuit connection and perform subsequent processes.
Referring to fig. 1, fig. 3, fig. 4 and step S4, each Bump 3 is partially etched to form a recess 4, wet etching is adopted, that is, the whole is put into etching solution, and the etching depth is realized by controlling parameters such as etching time and solution concentration, which are all common etching modes in the field, the etching depth can be determined according to actual production requirements, the etching depth range of the present application is 10-50 μm to ensure that a subsequent chip is normally flipped and mounted, the depth is too deep, which easily causes that ball mounting Bump of the chip is not contacted with the Bump 3, circuit connection is interrupted, the depth is too shallow, small-size and small-size packaging of the chip cannot be realized, an MIS frame is formed by window etching on the back of a substrate and then mounting the chip at a window, a metal layer exposed on the upper surface after pre-packaging in a steel-based frame is a pin, and then, photolithography, development and electroplating are performed to form a solder foot, and the steps of window etching and solder foot photolithography are saved in the present application.
Referring to fig. 1, fig. 5 and step S5, the recessed opening 4 is put in storage for standby after being subjected to oxidation prevention treatment, the oxidation prevention treatment is a common treatment method in the field, for example, gold is plated or a mechanical solder mask is coated on the surface of the recessed opening 4, the mechanical solder mask is also called a copper protection agent, the essence of the organic solder mask is to serve as a barrier layer between copper and air, and the process comprises the following steps: a layer of organic film is chemically grown on the surface of bare copper, the film has oxidation resistance, thermal shock resistance and moisture resistance and is used for protecting the copper surface from rusting, oxidation, vulcanization and the like in a normal environment, but in subsequent welding high temperature, the protective film is easily and rapidly removed by soldering flux, so that the copper surface can be combined with molten soldering tin to form a firm welding spot in a very short time, a large number of carrier plates 1 subjected to oxidation resistance treatment are placed in a warehouse, the preparation of a substrate frame is completed by pre-packaging, and the subsequent chip mounting only needs to take and cut the carrier plates 1 according to needs.
Referring to fig. 1, fig. 6 and step S6, the filling of the recessed port 4 with solder by using a solder printer is a common printing process in the art, that is, a steel mesh is arranged according to the position and layout of the recessed port 4, the steel mesh is placed on the surface of the pre-sealing layer 6, and a scraper scrapes solder balls obliquely so that the solder balls correspondingly enter the recessed port 4, and the solder balls include soldering Flux and solder.
Referring to fig. 1, 7-11 and step S7, a carrier plate 1 is taken, a chip is mounted by flip chip, a ball-mounted chip is mounted corresponding to a recess 4, the carrier plate 1 is peeled off by encapsulation, a copper film 2 is left to be etched into a solder foot, the solder foot is connected with a pin 7, wherein the ball-mounted chip is usually mounted by copper ball implantation in the field, then tin is plated at one end of the copper ball far away from the chip, the chip is mounted by flip chip, the ball-mounted chip is corresponding to the recess 4, then reflow soldering is performed, a soldering flux is volatilized, the tin at one end of the ball-mounted chip is connected with the tin inside the recess 4 into a whole, the chip is fixedly soldered firmly, then the chip is encapsulated to form a package, epoxy resin encapsulation is also adopted for encapsulation, the carrier plate 1 is peeled off after encapsulation, the carrier plate 1 is peeled off by using physical force, the carrier plate 1 after peeling is complete and can be recycled after simple flattening, at the moment, the copper film 2 is covered on the surface of the package, the carrier plate 2 is etched into the final solder foot of the final solder foot according to the shape of the carrier plate according to actual production needs and the size of the designed solder foot, the package can be flexibly cut into a single package without the need of flexible cutting.
The invention firstly changes a steel belt substrate carrier in an MIS lead frame into a common single-sided copper-clad carrier plate in the field, in particular to a PCB organic raw material plate laminated by glass resin, the carrier plate has large quantity and convenient material taking, the processing technology is simple, the specification and the thickness of the carrier plate can be customized according to the production requirement, the integral technology is simple and efficient, the cost is reduced, a copper film is left after the carrier plate is stripped and a welding leg is directly electroplated, the welding leg is etched and formed at one time, the process flow is reduced compared with the traditional welding leg formed by coating, photoetching, developing and electroplating, the shape of the welding leg can be flexibly changed according to the actual production requirement, a concave opening is etched on the upper part of a bulge for containing solder for carrying out flip chip mounting, the carrier plate which is subsequently stripped can be completely and repeatedly utilized, the back surface of the steel belt substrate is etched and windowed and then mounted by the MIS frame, the resources and the working procedures are saved, the surface roughening and the nickel plating in the MIS frame are metal surfaces, the binding force between the copper film 2 and the carrier plate 1 are not easy to be separated, the copper-clad carrier plate which is obtained by the stripping technology on the basis of the MIS frame.
The MIS framework comprises the following process flows: s1, providing a cold-rolled carbon steel sheet and a steel strip as a substrate; s2, coarsening the surface of the substrate, and then forming a copper film through copper cyanide electroplating and acid copper electroplating; s3, coating, photoetching and developing to form a metal layer, wherein the metal layer is a nickel layer and a copper layer, namely, the nickel layer is firstly formed on the copper film, and then the copper layer is plated on the nickel layer to form a TRACE line (electric conduction line); s4, forming a conductive column on the TRACE line (electric conduction line); s5, grinding the encapsulated conductive column to expose the upper end of the conductive column, and performing gold-plating anti-oxidation treatment on the upper end of the conductive column to be put in storage for later use; s6, etching a chip mounting window on the back of the substrate; s7, inversely mounting the chip, enabling Bump ball-planting of the chip to correspond to a TRACE line (electric conduction line), and encapsulating the chip to form a packaging body.
The present application is the same as the MIS leadframe mentioned in the background art in that: the method comprises the following steps of forming a metal layer on a substrate, encapsulating and exposing a top layer part, undetermined according to actual production needs, encapsulating materials can be epoxy resin encapsulating materials and ABF encapsulating materials, and material selection is also carried out according to the precision required by actual production, wherein the difference is that: this application replaces the steel band base plate through the organic board that adopts the single face to cover copper, the one end that this application metal level is close to the base plate is the pin end, and the one end that MIS frame metal level kept away from the base plate is the pin end, need not nickel plating earlier when this application forms the metal level, because steel band base plate thickness is thick, copper plating is in order to guarantee the cohesion of copper layer and metal substrate behind the MIS frame nickel plating, be difficult to the layering, the base plate back is etched out the window and is used for the flip-chip paster of chip in the MIS technology, the back reforms the leg, this application is the recess mouth 4 flip-chip pasters of etching on the arch 3 that exposes directly, the back is peeled off the base plate and is left copper film 2, form the leg, whole process flow is simplified, the production becomes to reduce, resources are saved, can know according to this company's encapsulation technology cost accounting experience, the prefabricated frame cost that adopts this application is 0.1-0.7 times of MIS frame's cost.
It is to be understood that the present application is described with respect to certain embodiments, and it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted for elements thereof without departing from the spirit and scope of the present application. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the invention without departing from the essential scope thereof. Therefore, it is intended that the invention not be limited to the particular embodiment disclosed, but that the invention will include all embodiments falling within the scope of the appended claims.

Claims (7)

1. The utility model provides a pre-packaged substrate, includes seal (6) and support plate (1) in advance, support plate (1) surface is provided with copper film (2), and seal (6) in advance sets up directly over support plate (1), its characterized in that, the inside of seal (6) in advance contains at least one arch (3), and the upper end of every arch (3) exposes in the surface of seal (6) in advance, and the lower extreme is provided with pin (7), and pin (7) flush with copper film (2), and the surface of every arch (3) is provided with sunken mouthful (4) and is used for holding the solder and flip-chip subsides dress.
2. The pre-encapsulation substrate according to claim 1, wherein the upper end of each protrusion (3) is exposed to the surface of the pre-encapsulation layer (6) by grinding, and the pre-encapsulation layer (6) is specifically an epoxy molding compound.
3. Pre-encapsulated substrate according to claim 2, wherein the surface of each protrusion (3) is partially etched to form a recess (4)
The pre-encapsulation substrate according to claim 3, wherein the recessed ports (4) are in-arc recesses having a depth in the range of 10 to 50 μm.
4. The pre-encapsulation substrate according to claim 1, wherein the copper film (2) is formed on the surface of the carrier (1) by pressing, and the thickness of the copper film (2) is greater than or equal to 15 μm.
5. The pre-encapsulated substrate according to claim 1, wherein the protrusions (3) are formed by a process of coating, photolithography, development and electroplating.
6. A method for manufacturing a pre-encapsulated substrate is characterized by comprising the following steps:
s1, providing a carrier plate (1) with a single-side coated with a copper film (2);
s2, forming at least one protrusion (3) on the surface of the copper-coated film (2) of the carrier plate (1) in a coating, photoetching, developing and electroplating mode, wherein the lower end of the protrusion is provided with a pin (7), and the pin (7) is flush with the copper film (2);
s3, encapsulating each bump (3) into a pre-sealing layer (6), and grinding and exposing;
s4, partially etching each protrusion (3) to form a recess opening (4);
s5, forming an anti-oxidation layer (5) on the surface of the concave opening (4), wherein the pre-packaged substrate is successfully prepared and put in storage for later use;
s6, filling the concave opening (4) with solder by using a solder printer;
s7, inversely mounting the chip, mounting the implanted ball of the chip corresponding to the recess opening (4), encapsulating and stripping the carrier plate (1), and etching the copper film (2) to form a solder leg, wherein the solder leg is connected with the pin (7).
7. The method for manufacturing a pre-packaged substrate according to claim 7, wherein the anti-oxidation treatment is performed on the surface of the recess (4) after the recess (4) is formed by partially etching each protrusion (3) by gold plating, ethylene bis-oleamide coating, or mechanical solder mask coating.
CN202210874317.2A 2022-07-25 2022-07-25 Pre-encapsulated substrate and manufacturing method thereof Pending CN115148695A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115295430A (en) * 2022-10-10 2022-11-04 合肥矽迈微电子科技有限公司 Flip-chip bonding surface encapsulation structure, flip-chip bonding surface encapsulation process and semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115295430A (en) * 2022-10-10 2022-11-04 合肥矽迈微电子科技有限公司 Flip-chip bonding surface encapsulation structure, flip-chip bonding surface encapsulation process and semiconductor device

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