CN111627864B - High junction temperature SiC ceramic packaging silicon stack shell structure - Google Patents
High junction temperature SiC ceramic packaging silicon stack shell structure Download PDFInfo
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- CN111627864B CN111627864B CN202010496801.7A CN202010496801A CN111627864B CN 111627864 B CN111627864 B CN 111627864B CN 202010496801 A CN202010496801 A CN 202010496801A CN 111627864 B CN111627864 B CN 111627864B
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 50
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 50
- 239000010703 silicon Substances 0.000 title claims abstract description 50
- 239000000919 ceramic Substances 0.000 title claims abstract description 27
- 238000004806 packaging method and process Methods 0.000 title description 10
- 238000000034 method Methods 0.000 claims abstract description 13
- 230000008569 process Effects 0.000 claims abstract description 13
- 238000003466 welding Methods 0.000 claims abstract description 12
- 238000002955 isolation Methods 0.000 claims description 12
- 238000007789 sealing Methods 0.000 claims description 11
- 239000000463 material Substances 0.000 claims description 10
- 229910052782 aluminium Inorganic materials 0.000 claims description 8
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 7
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 5
- 229910052593 corundum Inorganic materials 0.000 claims description 5
- 229910001845 yogo sapphire Inorganic materials 0.000 claims description 5
- 229910000679 solder Inorganic materials 0.000 claims description 4
- 239000000758 substrate Substances 0.000 claims 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 4
- 239000000741 silica gel Substances 0.000 abstract description 4
- 229910002027 silica gel Inorganic materials 0.000 abstract description 4
- 239000000047 product Substances 0.000 description 15
- 239000004065 semiconductor Substances 0.000 description 5
- 238000005245 sintering Methods 0.000 description 5
- 239000004593 Epoxy Substances 0.000 description 4
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 4
- 239000004033 plastic Substances 0.000 description 4
- 238000012360 testing method Methods 0.000 description 4
- 238000013461 design Methods 0.000 description 3
- 239000003822 epoxy resin Substances 0.000 description 3
- 230000017525 heat dissipation Effects 0.000 description 3
- 229920000647 polyepoxide Polymers 0.000 description 3
- 230000008901 benefit Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 2
- BLNMQJJBQZSYTO-UHFFFAOYSA-N copper molybdenum Chemical compound [Cu][Mo][Cu] BLNMQJJBQZSYTO-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005538 encapsulation Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 239000000499 gel Substances 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 238000012858 packaging process Methods 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical group [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000007123 defense Effects 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000013067 intermediate product Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 229920001296 polysiloxane Polymers 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/06—Containers; Seals characterised by the material of the container or its electrical properties
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Ceramic Products (AREA)
Abstract
The invention discloses a high junction temperature SiC ceramic packaged silicon stack shell structure, wherein the inner cavity of a tube shell is of a three-cavity structure, a tube core is correspondingly arranged in each cavity, a bottom plate is arranged at the bottom of each cavity, leads are respectively arranged at two ends of the tube shell, the leads at one end are sequentially connected with the tube cores in the three cavities and then connected with the leads at the other end, the three tube cores and the bottom plate are sintered and then connected in series to form a silicon stack through a pressure welding process, a cover plate is arranged above the tube shell, and silica gel is filled between the cover plate and the inner cavity to form the high junction temperature SiC ceramic packaged silicon stack shell structure. The silicon stack shell structure reduces the volume and improves the working junction temperature.
Description
Technical Field
The invention belongs to the technical field of semiconductor devices, and particularly relates to a high-junction-temperature SiC ceramic packaged silicon stack shell structure.
Background
The silicon high-voltage rectifier silicon stack is characterized in that a plurality of diodes are connected in series on the basis of the unidirectional conductive characteristic of the diodes to form a voltage-multiplying rectifier circuit.
The silicon high-voltage rectifier silicon stack product is widely applied to various fields of national defense construction such as aerospace, aviation, ships, weapons, electronics and the like; because the product has high reverse voltage resistance, in order to ensure the electrical insulation performance, the silicon stack device is mainly packaged by epoxy resin at present.
With the domestic requirements for miniaturization of the volume of a high-voltage silicon stack product and high junction temperature use, a wide bandgap semiconductor device is adopted to replace a traditional silicon-based device, and ceramic packaging is adopted on the packaging appearance to replace an epoxy plastic packaging process adopted by the traditional silicon stack. The packaging appearance of the product is greatly reduced.
Disclosure of Invention
The technical problem to be solved by the invention is to provide a high junction temperature SiC ceramic package silicon stack shell structure aiming at the defects in the prior art, wherein ceramic package is adopted on the package appearance to replace the epoxy plastic package process adopted by the traditional silicon stack. The requirements of miniaturization of the volume of a high-voltage silicon stack product and high junction temperature use are met.
The invention adopts the following technical scheme:
the utility model provides a high junction temperature SiC pottery encapsulation silicon stack shell structure, including the tube, the inner chamber of tube is three-chamber structure, correspond in every cavity and be provided with the tube core, the bottom of cavity is provided with the bottom plate, the both ends of tube are provided with the lead wire respectively, the lead wire of one end connects gradually behind the tube core in three cavities and is connected with the lead wire of the other end, three tube cores and bottom plate sintering back are established ties three tube cores through the pressure welding technology and are formed the silicon stack, the top of tube is provided with the apron, it has silica gel to fill between apron and the inner chamber, form high junction temperature SiC pottery encapsulation silicon stack shell structure.
Specifically, a separation gear in a valley shape is arranged between the cavities of the three-cavity structure.
Specifically, the height of the isolation rail is 2.3-4 mm.
Specifically, a solder sheet is arranged between the tube cores and the bottom plate, and the three tube cores are connected in series through high-purity aluminum wires.
Specifically, the base material of the tube shell is 96% Al2O3A ceramic.
Specifically, the joints of the two ends of the tube shell and the lead are in an axial wave-shaped structure.
Specifically, a sealing ring is adopted between the pipe shell and the cover plate, and the pipe shell and the cover plate are connected through a parallel sealing process to form a sealing structure.
Specifically, the bottom plate is made of CMC material.
Compared with the prior art, the invention has at least the following beneficial effects:
according to the high-junction-temperature SiC ceramic packaged silicon stack shell structure, the interior is filled with a high-temperature-resistant silicon gel material so as to ensure high-temperature pressure resistance; the tube core adopts a vacuum sintering process, so that the power consumption thermal resistance is reduced, and the shell has good mechanical strength, good insulativity and good thermal conductivity, so that various patterns can be conveniently etched.
Furthermore, the inner cavity of the shell is designed into a three-cavity structure, and the cavities are isolated by adopting isolation gears so as to ensure the formation of high-voltage isolation between the cavities.
Furthermore, the isolation gear with the height of 2.3-4 mm is adopted between the cavities, so that high-voltage isolation is ensured, and pressure welding is conveniently carried out across the isolation gear.
Furthermore, the whole silicon stack is formed by connecting diode tube cores in series through high-purity aluminum wire bonding, so that a high-voltage rectifying circuit structure is realized.
Further, 96% Al is used2O3The ceramic shell is packaged, so that the heat dissipation capability of the product is improved, and the ceramic shell has good mechanical strength, good insulativity and good heat conductivity, and is convenient for etching various patterns.
Furthermore, the two ends of the shell are designed into axial waves so as to increase the creepage distance between the two whole poles of the silicon stack and ensure the high-voltage resistance of the product.
Furthermore, the sealing ring of the shell is made of a valve material of 4J29, and a good sealing weld can be formed with the cover plate through a parallel sealing welding process.
Further, the bottom is made of CMC (copper-molybdenum-copper) material to ensure 96% Al2O3The ceramic forms good thermal matching, nickel plating is carried out on the surface of the CMC, and sintering with the tube core and pressure welding bonding of the aluminum wire are ensured to be formed.
In conclusion, the invention reduces the volume and improves the working junction temperature.
The technical solution of the present invention is further described in detail by the accompanying drawings and embodiments.
Drawings
FIG. 1 is a diagram of an internal structure of a conventional silicon stack;
FIG. 2 is a process diagram of a silicon stack of the present invention, wherein (a) is a front view and (b) is a side view and (c) is a top view;
fig. 3 is a structural view of a silicon stack case according to the present invention.
Wherein: 1. a threaded electrode; 2. a diode; 3. epoxy resin; 4. a lead wire; 5. a pipe shell; 6. sealing and welding the ring; 7. a base plate; 8. a solder sheet; 9. high-purity aluminum wires; 10. a die; 11. a cover plate; 12. a silicone gel.
Detailed Description
In the description of the present invention, it is to be understood that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "one side", "one end", "one side", and the like indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience of description and simplicity of description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed in a particular orientation, and be operated, and thus, are not to be construed as limiting the present invention. In addition, in the description of the present invention, "a plurality" means two or more unless otherwise specified.
In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
Various structural schematics according to the disclosed embodiments of the invention are shown in the drawings. The figures are not drawn to scale, wherein certain details are exaggerated and possibly omitted for clarity of presentation. The shapes of various regions, layers and their relative sizes and positional relationships shown in the drawings are merely exemplary, and deviations may occur in practice due to manufacturing tolerances or technical limitations, and a person skilled in the art may additionally design regions/layers having different shapes, sizes, relative positions, according to actual needs.
Referring to fig. 1, two ends of a conventional silicon-based device are respectively provided with a threaded electrode 1, the two threaded electrodes 1 are connected through 21 series-connected 3A glass-sealed diodes 2, and epoxy resin 3 is filled in the device; the traditional silicon-based device can only work at 150-175 ℃ for a long time, and the wide bandgap semiconductor device has strong high temperature resistance and high working temperature and can work at 500 ℃ for a long time. Meanwhile, the wide bandgap semiconductor device has the characteristics of high breakdown field strength, high radiation resistance, low conduction voltage and high switching speed, and is very suitable for a stack tube core of a silicon stack device.
The invention provides a high-junction-temperature SiC ceramic packaged silicon stack shell structure, which is characterized in that SiC SBD tube cores are adopted for stacking in view of the fact that a product is used in a high-temperature 230 ℃ environment and has the characteristics of high voltage resistance, short reverse recovery time and the like, so that the high-temperature performance of the product is guaranteed; the ceramic shell is adopted for packaging, so that the heat dissipation capacity of the product is improved; the interior of the shell is filled with a silica gel material with high temperature resistance so as to ensure the high-temperature pressure resistance; the tube core adopts a vacuum sintering process to reduce the power consumption thermal resistance.
Referring to fig. 2 and 3, the high junction temperature SiC ceramic packaged silicon stack case structure of the present invention includes a lead 4, a tube case 5, a tube core 10 and a cover plate 11, the cover plate 11 is disposed above the tube case 5 to form a closed inner cavity, the inner cavity is filled with a silica gel 12, the inner cavity is a three-cavity structure, a corresponding tube core 10 is disposed in each cavity, the lead 4 is disposed at each end of the tube case 5, the lead 4 at one end is connected to the tube core 10 in the three cavities in sequence through a high purity aluminum wire 9 and then connected to the lead 4 at the other end, a bottom plate 7 is disposed at the bottom of the cavity, the three tube cores 10 and the bottom plate 7 at the bottom of the tube case 5 are sintered through corresponding solder sheets 8, the three tube cores 10 are connected in series through a pressure welding process to form a silicon stack, and then the cover plate 11 is packaged and molded by a parallel seal welding process.
The base material of the tube 5 was 96% Al2O3The ceramic has good mechanical strength, good insulation property and good heat conductivity, and is convenient for etching various patterns.
The isolation gear with the height of 4mm is adopted between the cavities of the three-cavity structure in the inner cavity of the tube shell 5 so as to ensure the formation of high-voltage isolation between the cavities, and the cavity isolation gear adopts the valley shape design, so that the problem of deformation caused by narrow and long side walls of the shell is avoided.
The two ends of the tube shell 5 are designed into axial waves so as to increase the creepage distance between the two poles of the whole silicon stack and ensure the high-voltage resistance of the product, and the axial waves are divided into two sections of structures with different diameters so as to form good stress transition between the larger intermediate product part of the shell and the lead wires of the two poles.
The bottom plate 7 at the bottom of the cavity is made of CMC (copper-molybdenum-copper) material to ensure that the bottom plate is 96 percent Al2O3The ceramic forms good thermal matching, nickel plating is carried out on the surface of the CMC, and sintering with the tube core and pressure welding bonding of the aluminum wire are ensured to be formed.
The sealing ring 6 of the pipe shell 5 is made of a valve material of 4J29, and can form a good sealing welding with the cover plate 11 through a parallel sealing welding process.
The lead 4 at two ends adopts a copper core valve, thereby not only ensuring the conductivity of the product, but also ensuring the mechanical strength of the lead end.
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. The components of embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present invention, presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
According to the high-junction-temperature SiC ceramic packaged silicon stack shell structure, high-voltage test is applied to the outer leads of two poles of the shell, and the test condition is IRTest V between two poles at 2 μ ARRMThe test result shows that the shell can bear VRRM28kV high voltage direct current.
In summary, the high junction temperature SiC ceramic packaged silicon stack housing structure provided by the invention adopts a ceramic structure for packaging through the housing design of the high voltage silicon stack product, and the tube core adopts a wide bandgap semiconductor device to replace the traditional silicon-based device, thereby replacing the epoxy plastic package process adopted by the traditional silicon stack.
1. Reduce the volume
The tube core adopts SIC to replace the traditional silicon-based device, has the advantage of high breakdown field intensity, and the packaging appearance is reduced from the original 155mm multiplied by 25mm multiplied by 18mm to 45mm multiplied by 10mm, thereby greatly reducing the packaging appearance of the product
2. Increases the working junction temperature
And the ceramic structure is adopted for packaging, and the traditional epoxy plastic packaging process is replaced. The ceramic material has good heat dissipation performance, can transfer heat generated by a power device during working, effectively reduces the temperature inside a module, and improves the junction temperature and reliability of a silicon stack product.
The above-mentioned contents are only for illustrating the technical idea of the present invention, and the protection scope of the present invention is not limited thereby, and any modification made on the basis of the technical idea of the present invention falls within the protection scope of the claims of the present invention.
Claims (5)
1. A high junction temperature SiC ceramic package silicon stack shell structure is characterized by comprising a tube shell (5), wherein the inner cavity of the tube shell (5) is of a three-cavity structure, isolation gears with the height of 4mm are adopted between the cavities of the three-cavity structure to form high-voltage electrical isolation between the cavities, each isolation gear is in a valley shape, a tube core (10) is correspondingly arranged in each cavity, a bottom plate (7) is arranged at the bottom of each cavity, lead wires (4) are respectively arranged at two ends of the tube shell (5), the joint of the two ends of the tube shell (5) and the lead wires (4) is of an axial wave-shaped structure, the lead wires (4) at one end are sequentially connected with the tube cores (10) in the three cavities and then connected with the lead wires (4) at the other end, the three tube cores (10) are connected in series to form a silicon stack through a pressure welding process after being sintered with the bottom plates (7), and a cover plate (11) is arranged above the tube shell (5), and silicon gel (12) is filled between the cover plate (11) and the inner cavity to form a high-junction-temperature SiC ceramic packaged silicon stack shell structure.
2. The high-junction-temperature SiC ceramic package silicon stack shell structure as claimed in claim 1, wherein solder pads (8) are arranged between the die (10) and the bottom plate (7), and the three die (10) are connected in series through high-purity aluminum wires (9).
3. The high-junction-temperature SiC ceramic-encapsulated silicon stack can structure of claim 1, wherein the substrate of the package (5) is 96% Al2O3A ceramic.
4. The high-junction-temperature SiC ceramic-packaged silicon stack shell structure as claimed in claim 1, wherein a seal ring (6) is adopted between the tube shell (5) and the cover plate (11), and the tube shell and the cover plate are connected through a parallel seal process to form a sealing structure.
5. The high-junction-temperature SiC ceramic encapsulated silicon stack housing structure according to claim 1, characterized in that the bottom plate (7) is made of CMC material.
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| CN202010496801.7A CN111627864B (en) | 2020-06-03 | 2020-06-03 | High junction temperature SiC ceramic packaging silicon stack shell structure |
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| CN202010496801.7A CN111627864B (en) | 2020-06-03 | 2020-06-03 | High junction temperature SiC ceramic packaging silicon stack shell structure |
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| CN207199629U (en) * | 2017-08-23 | 2018-04-06 | 杭州西风半导体有限公司 | A kind of Thyristor shell |
| CN108493168A (en) * | 2018-05-28 | 2018-09-04 | 北京中科格励微科技有限公司 | A kind of multi-cavity encapsulating structure of electrical isolation |
| CN111029310A (en) * | 2019-11-22 | 2020-04-17 | 中国电子科技集团公司第十三研究所 | Airtight packaging device and airtight packaging method |
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