CN111384155A - 一种超级结器件 - Google Patents
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Abstract
一种超级结器件,属于功率半导体器件技术领域。所述超级结器件在轻掺杂外延层中离子注入第一导电类型掺杂和第二导电类型掺杂,经多次外延、注入、推结后,在轻掺杂外延层中形成交替排列的第一导电类型掺杂立柱和第二导电类型掺杂立柱;该超级结器件包括位于中心的元胞区、终端区以及过渡区,通过对过渡区中第一导电类型掺杂立柱和第二导电类型掺杂立柱的布局进行优化调整,使得该区域的第一导电类型掺杂立柱与第二导电类型掺杂立柱的剂量介于元胞区与终端区之间,保证了由元胞区到终端区两种导电类型掺杂剂量的逐渐变化,从而确保在不改变该超结器件电流导通能力的情况下其终端区耐压受制造工艺造成的掺杂浓度偏差的影响更小。
Description
技术领域
本发明属于功率半导体器件技术领域,具体涉及一种超级结器件及其制造方法。
背景技术
功率MOSFET广泛应用于需要功率转换和功率放大的器件中。对于功率转换器件来说,市场上代表性的器件就是垂直型双扩散MOSFET(VDMOSFET)。在一个典型的晶体管中,漂移区承担了大部分的击穿电压BV,所以为了获得较高的击穿电压BV,漂移区要轻掺杂使电场分布尽量趋近于矩形。然而,轻掺杂的漂移区会产生高导通电阻Rdson。对于一个典型的晶体管而言,Rdson 与BV2.5成正比。因此,对于传统的晶体管,击穿电压BV 较高的器件也有较大的Rdson,这两者之间需要进行折中考虑。
超级结结构由漂移区中交替排列的P型和N型掺杂立柱组成。在MOSFET 断开状态时,立柱完全耗尽,相对于传统MOS器件的三角形或者梯形的电场分布,超级结结构的电场分布更加接近矩形,从而能够维持很高的击穿电压。由于另一种导电类型掺杂的引入,超级结结构可以在漂移区进行较重的掺杂以降低器件的导通电阻Rdson。对于超级结,导通电阻Rdson 的增加与击穿电压BV1.3 的增加成正比,其导通电阻Rdson 与击穿电压BV的相关性被极大削弱。因此,对于相同的高击穿电压BV,超级结器件比传统的MOSFET 器件具有更低的Rdson,或者说对于特定的Rdson,超级结器件比传统的MOSFET具有更高的BV。
超级结器件为了维持较高的击穿电压,必须保证相邻第一导电类型掺杂区域和第二导电类型掺杂区域的电荷平衡,在耐压时,两种导电类型掺杂区域能够相互完全耗尽。如果两种导电类型的掺杂区域各自的掺杂剂量过大,那么器件该区域的耐压能力受到制造工艺造成的掺杂剂量偏差的影响就会更严重,而在终端区这个现象尤为严重。如果两种导电类型的掺杂区域各自的掺杂剂量过小,那么器件在导通时的导通电阻则会变大。因此对于两种导电类型的掺杂区域在超级结器件不同区域的掺杂剂量进行优化与调整就变得尤为重要。
发明内容
本发明的目的在于,针对背景技术存在的缺陷,提出了一种超级结器件及其制造方法。本发明通过新的终端区设计,并在元胞区和终端区之间引入过渡区,在不影响元胞区导通压降的情况下,减小了掺杂立柱的掺杂浓度偏差对过渡区和终端区耐压的影响。
为实现上述目的,本发明采用的技术方案如下:
一种超级结器件,在轻掺杂外延层中离子注入第一导电类型掺杂和第二导电类型掺杂,经多次外延、注入、推结后,在轻掺杂外延层001中形成交替排列的第一导电类型掺杂立柱002和第二导电类型掺杂立柱003,即超级结结构;所述超级结器件包括位于中心的元胞区和位于元胞区周围的终端区;其特征在于,还包括位于元胞区和终端区之间的过渡区,当从离子注入方向俯视所述超级结器件时,所述轻掺杂外延层包括位于元胞区的第一轻掺杂外延层、位于过渡区的第二轻掺杂外延层和位于终端区的第三轻掺杂外延层;所述第一轻掺杂外延层为矩形,其宽度为W1,第二轻掺杂外延层为梯形,第三轻掺杂外延层为矩形,其宽度为W1',W1<W1';
当俯视所述超级结器件时,所述第一导电类型掺杂立柱002包括位于元胞区的、宽度为W2的矩形区域,位于过渡区的梯形区域和位于终端区的、宽度为W2'的矩形区域,W2>W2';
当俯视所述超级结器件时,所述第二导电类型掺杂立柱003包括位于元胞区的、宽度为W3的矩形区域,位于过渡区的梯形区域和位于终端区的、宽度为W3'的矩形区域,W3>W3'。
进一步地,所述W2'=(0.2~0.8)W2; W3'=(0.2~0.8)W3; W1'= W1+(0.1~0.4)W2+(0.1~0.4)W3。
优选地,所述W2'=0.5W2; W3'=0.5W3; W1'= W1+0.25W2+0.25W3。
优选地,所述W2=W3,W2'=W3'。
本发明还提供了一种超级结器件的制造方法,其特征在于,包括以下步骤:
步骤1、准备N型重掺杂衬底,其电阻率为0.0001~0.1欧姆•厘米;
步骤2、在N型重掺杂衬底上生长一层厚度为T微米的N型轻掺杂外延层,N型轻掺杂外延层的电阻率为1~100欧姆•厘米;
步骤3、采用掩膜版遮挡,再分别进行N型、P型掺杂注入,注入杂质为P(磷)、B(硼),注入剂量为1×1012 atom/cm2 ~1×1015 atom/cm2;
步骤4、重复步骤2-3的过程n次,使N型轻掺杂外延层的总厚度达到T*n微米;
步骤5、采用掩膜版遮挡,只在终端区进行P型掺杂注入,形成终端区上表面耐压结构005,注入杂质为B(硼),注入剂量为1×1012 atom/cm2 ~1×1015 atom/cm2;
步骤6、通过高温推结,炉管温度为850℃~1200℃,持续时间为30min~300min,激活N型、P型杂质,使每层轻掺杂外延层中的N型、P型杂质扩散后,与上下外延层中的N型、P型杂质连通,形成N型掺杂立柱和P型掺杂立柱;
步骤7、生长场氧化层006;
步骤8、去除元胞区场氧化层;
步骤9、采用掩膜版遮挡,生长栅氧化层009,厚度为100 Å ~1200 Å;
步骤10、通过低压化学气相淀积生长N型多晶硅,经光刻和刻蚀形成栅极010;
步骤11、进行P型杂质注入,形成基区004,并高温推结,激活杂质并使基区达到需要的深度和横向扩散;
步骤12、进行N+注入,形成源极007,注入剂量为1×1012 atom/cm2 ~5×1015 atom/cm2;
步骤13、进行P+注入,得到P型重掺杂区008,注入剂量为1×1012 atom/cm2 ~5×1015atom/cm2;
步骤14、淀积二氧化硅作为层间介质011;
步骤15、溅射或蒸镀铝,制作金属层012,作为接触孔和电极。
与现有技术相比,本发明的有益效果为:
本发明提供的一种超级结器件,通过对布局的特殊设计在超结器件的元胞区与终端区之间形成了过渡区,保证了由元胞区到终端区两种导电类型掺杂剂量的逐渐变化,从而确保在不改变该超结器件电流导通能力的情况下其终端区耐压受制造工艺造成的掺杂浓度偏差的影响更小。同时,终端区有效掺杂剂量的减小提高了器件终端区的击穿电压,使得整个器件的击穿电压由元胞区的击穿电压决定,最终整个器件的耐压和雪崩耐量也因此提高。
附图说明
图1为本发明所述超级结器件的局部俯视图;
图2为本发明所述超级结器件的整体俯视图;
图3为本发明所述超级结器件的元胞区在未推结时、沿垂直于掺杂立柱方向的剖面图;其中上表面结构仅为相对位置示意,不代表工艺的先后顺序;
图4为本发明所述超级结器件的终端区在未推结时、沿垂直于掺杂立柱方向的剖面图;其中上表面结构仅为相对位置示意,不代表工艺的先后顺序;
图5为本发明所述超级结器件推结后沿P型立柱的剖面图,上表面结构示意了终端区的优化变掺杂结构;
图6为本发明所述超级结器件推结后沿N型立柱的剖面图,上表面结构示意了终端区的优化变掺杂结构;
附图标记说明:
000为重掺杂衬底,001为轻掺杂外延层,002为第一导电类型掺杂立柱,003为第二导电类型掺杂立柱,004为基区,005为终端区上表面耐压结构,006为场氧化层,007为源极,008为P型重掺杂区(基区接触),009为栅氧化层,010为栅极,011为层间介质,012为金属层。
具体实施方式
下面结合附图和实施例,详述本发明的技术方案。
如图1所示,为本发明所述超级结器件的局部俯视图;如图2所示,为本发明所述超级结器件的整体俯视图。在轻掺杂外延层中离子注入第一导电类型掺杂和第二导电类型掺杂,经多次外延、退火、推结后,在轻掺杂外延层001中形成交替排列的第一导电类型掺杂立柱002和第二导电类型掺杂立柱003,即超级结结构,实际应用中采用两个掩膜版分别实现两种导电类型掺杂的注入;所述超级结器件包括位于中心的元胞区和位于元胞区周围的终端区,其特征在于,还包括位于元胞区和终端区之间的过渡区,当俯视所述超级结器件时,所述轻掺杂外延层包括位于元胞区的第一轻掺杂外延层、位于过渡区的第二轻掺杂外延层和位于终端区的第三轻掺杂外延层;所述第一轻掺杂外延层为矩形,其宽度为W1,第二轻掺杂外延层为梯形,第三轻掺杂外延层为矩形,其宽度为W1';当俯视所述超级结器件时,所述第一导电类型掺杂立柱002包括位于元胞区的、宽度为W2的矩形区域,位于过渡区的梯形区域和位于终端区的、宽度为W2'的矩形区域;当俯视所述超级结器件时,所述第二导电类型掺杂立柱003包括位于元胞区的、宽度为W3的矩形区域,位于过渡区的梯形区域和位于终端区的、宽度为W3'的矩形区域。对于超级结器件,其电流导通能力不仅仅由第二导电类型掺杂立柱的掺杂浓度决定,还与W3的大小有关,为了保证该器件有良好的电流导通能力,在不影响元胞区耐压的情况下希望W3的值较大,即掺杂立柱的掺杂剂量较大。但第一、二导电类型掺杂立柱各自的宽度W2、W3较大时,器件的耐压能力受制造工艺造成的掺杂浓度偏差的影响也会变大。而终端区由于几乎不参与器件电流的导通,因此第一导电类型掺杂立柱在终端区的W2'的值和第二导电类型掺杂立柱在终端区的W3'的值应较小,这样终端区的耐压受制造工艺造成的掺杂浓度偏差的影响也会较小。由于第一、二导电类型掺杂立柱的宽度值在元胞区和终端区大小不同,因此在元胞区与终端区接触的地方如果立柱宽度突然变化,那么器件的耐压能力会受到影响。因此引入过渡区,并使过渡区中两种导电类型掺杂立柱的掺杂注入宽度W2、W3逐渐减小到W2'、W3',使掺杂立柱的注入剂量从元胞区的较高剂量逐步减小到终端区的较小剂量,掺杂立柱剂量的缓慢变化保证了超结器件的耐压能力不受损害。
图3给出了本发明所述超级结器件的元胞区在未推结时、沿垂直于掺杂立柱方向的剖面图;图4给出了本发明所述超级结器件的终端区在未推结时、沿垂直于掺杂立柱方向的剖面图。剖面图的相对位置见图1的竖直方向虚线。图3的上层结构为现有的平面栅MOS结构,在此处仅作为掺杂立柱注入的相对位置示意。
图5和图6分别给出了本发明所述超级结器件推结后沿P型立柱和N型立柱的剖面图,剖面图的相对位置见图1的水平方向虚线。掺杂杂质进行退火推结后形成两种不同导电类型的掺杂立柱,因终端区的掺杂杂质注入剂量比元胞区小,所以其退火形成的掺杂立柱掺杂浓度更低,终端区耐压受制造工艺造成的掺杂浓度偏差的影响更小。
实施例
一种超级结器件的制造方法,包括以下步骤:
步骤1、准备N型重掺杂衬底,其电阻率为0.004欧姆•厘米;
步骤2、在N型重掺杂衬底上生长一层厚度为10微米的N型轻掺杂外延层,N型轻掺杂外延层的电阻率为20欧姆•厘米;
步骤3、采用掩膜版遮挡,再分别进行N型、P型掺杂注入,注入杂质为P(磷)、B(硼),注入剂量为1×1013 atom/cm2;
步骤4、重复步骤2-3的过程4次,使N型轻掺杂外延层的总厚度达到50微米;
步骤5、采用掩膜版遮挡,只在终端区进行P型掺杂注入,形成终端区上表面耐压结构005,注入杂质为B(硼),注入剂量约为1×1012 atom/cm2;
步骤6、通过高温推结,炉管温度为1200℃,持续时间为300min,激活N型、P型杂质,使每层轻掺杂外延层中的N型、P型杂质扩散后,与上下外延层中的N型、P型杂质连通,形成N型掺杂立柱和P型掺杂立柱;
步骤7、生长场氧化层006;
步骤8、去除元胞区场氧化层;
步骤9、采用掩膜版遮挡,生长栅氧化层009,厚度为1000Å(埃);
步骤10、通过低压化学气相淀积生长N型多晶硅,经光刻和刻蚀形成栅极010;
步骤11、进行P型杂质注入,形成基区004,并高温推结,激活杂质并使基区达到需要的深度和横向扩散;
步骤12、进行N+注入,形成源极007,注入剂量为5×1015 atom/cm2;
步骤13、进行P+注入,得到P型重掺杂区008,注入剂量为1×1015 atom/cm2;
步骤14、淀积二氧化硅作为层间介质011;
步骤15、溅射或蒸镀铝,制作金属层012,作为接触孔和电极。
以上仅为本发明的优选实施例,并不用于限定本发明。对于本领域的技术人员来说,本发明可以有各种更改和变化。凡在本发明的精神和原则之内所作的任何修改、等同替换、改进等,均应包含在本发明的保护范围之内。
Claims (4)
1.一种超级结器件,在轻掺杂外延层(001)中离子注入形成交替排列的第一导电类型掺杂立柱(002)和第二导电类型掺杂立柱(003),所述超级结器件包括位于中心的元胞区和位于元胞区周围的终端区;其特征在于,还包括位于元胞区和终端区之间的过渡区,当从离子注入方向俯视所述超级结器件时,所述轻掺杂外延层包括位于元胞区的第一轻掺杂外延层、位于过渡区的第二轻掺杂外延层和位于终端区的第三轻掺杂外延层;所述第一轻掺杂外延层为矩形,其宽度为W1,第二轻掺杂外延层为梯形,第三轻掺杂外延层为矩形,其宽度为W1',W1<W1';
当俯视所述超级结器件时,所述第一导电类型掺杂立柱(002)包括位于元胞区的、宽度为W2的矩形区域,位于过渡区的梯形区域和位于终端区的、宽度为W2'的矩形区域,W2>W2';
当俯视所述超级结器件时,所述第二导电类型掺杂立柱(003)包括位于元胞区的、宽度为W3的矩形区域,位于过渡区的梯形区域和位于终端区的、宽度为W3'的矩形区域,W3>W3'。
2.根据权利要求1所述的超级结器件,其特征在于,W2'=(0.2~0.8)W2; W3'=(0.2~0.8)W3; W1'= W1+(0.1~0.4)W2+(0.1~0.4)W3。
3.根据权利要求1所述的超级结器件,其特征在于,W2'=0.5W2; W3'=0.5W3; W1'= W1+0.25W2+0.25W3。
4.根据权利要求1所述的超级结器件,其特征在于,W2=W3,W2'=W3'。
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