CN111211107B - 半导体封装件 - Google Patents
半导体封装件 Download PDFInfo
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- CN111211107B CN111211107B CN201911087371.7A CN201911087371A CN111211107B CN 111211107 B CN111211107 B CN 111211107B CN 201911087371 A CN201911087371 A CN 201911087371A CN 111211107 B CN111211107 B CN 111211107B
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Abstract
本发明提供一种半导体封装件,所述半导体封装件包括:第一连接结构,具有第一表面和第二表面,并且包括第一重新分布层;第一半导体芯片,设置在所述第一表面上,并且具有电连接到所述第一重新分布层的第一连接垫;第二半导体芯片,设置在所述第一表面上的所述第一半导体芯片的周围,并且具有电连接到所述第一重新分布层的第二连接垫;互连桥,设置在所述第二表面上,并且与所述第二表面间隔开,并且通过连接构件连接到所述第一重新分布层,以将所述第一连接垫和所述第二连接垫彼此电连接;以及第二连接结构,设置在所述第二表面上以使所述互连桥嵌入,并且包括电连接到所述第一重新分布层的第二重新分布层。
Description
本申请要求于2018年11月21日在韩国知识产权局提交的第10-2018-0144383号韩国专利申请的优先权的权益,所述韩国专利申请的公开内容通过引用被全部包含于此。
技术领域
本公开涉及一种半导体封装件。
背景技术
由于装置的高规格和高带宽存储器(HBM)的采用,中介层(interposer)市场正在增长。目前,硅是中介层的主要材料。例如,使用中介层的半导体封装件是通过将裸片表面安装在硅基中介层上并用模制材料对表面安装的裸片进行模制来制造的。
发明内容
本公开的一方面在于提供一种半导体封装件,所述半导体封装件包括嵌入有能够代替传统的中介层的互连桥的连接结构。尽管具有嵌入的互连桥,但是半导体封装件也可控制翘曲并且在良率和可加工性可以是优异的、成本低,并且在精细图案上没有工艺问题和良率问题。
本公开的一个提议在于提供一种半导体封装件,在半导体封装件中,第一连接结构直接设置在多个半导体芯片上,互连桥表面安装在第一连接结构上以将多个半导体芯片彼此电连接,并且第二连接结构设置在第一连接结构上以使互连桥嵌入。
根据本公开的一方面,一种半导体封装件包括:第一连接结构,具有第一表面和与所述第一表面背对的第二表面,并且包括第一重新分布层;第一半导体芯片,设置在所述第一连接结构的所述第一表面上,具有电连接到所述第一重新分布层的第一连接垫;第二半导体芯片,设置在所述第一连接结构的所述第一表面上的所述第一半导体芯片的周围,具有电连接到所述第一重新分布层的第二连接垫;互连桥,设置在所述第一连接结构的所述第二表面上,并且与所述第一连接结构的所述第二表面间隔开,并且通过连接构件连接到所述第一重新分布层,以将所述第一连接垫和所述第二连接垫彼此电连接;以及第二连接结构,设置在所述第一连接结构的所述第二表面上以使所述互连桥嵌入,包括电连接到所述第一重新分布层的第二重新分布层。
根据本公开的一方面,一种半导体封装件包括:第一半导体芯片,具有其上设置有第一连接垫的第一有效表面;第二半导体芯片,设置在所述第一半导体芯片的周围,具有其上设置有第二连接垫的第二有效表面;第一连接结构,包括设置在所述第一有效表面和所述第二有效表面上的第一绝缘层、设置在所述第一绝缘层上的第一重新分布层以及贯穿所述第一绝缘层并且将所述第一重新分布层分别电连接到所述第一连接垫和所述第二连接垫的第一连接过孔;互连桥,设置在所述第一连接结构上并且连接到所述第一重新分布层,以将所述第一连接垫和所述第二连接垫彼此电连接;以及第二连接结构,包括设置在所述第一连接结构上以覆盖所述第一重新分布层的至少一部分并且使所述互连桥嵌入的第二绝缘层、设置在所述第二绝缘层上的第二重新分布层以及贯穿所述第二绝缘层并且将所述第一重新分布层和所述第二重新分布层彼此电连接的第二连接过孔。所述第一连接过孔与相应的所述第一连接垫和所述第二连接垫物理接触。
附图说明
通过下面结合附图进行的详细描述,本公开的以上和其他方面、特征和优点将被更清楚地理解,在附图中:
图1是示意性地示出电子装置系统的示例的框图;
图2是示出电子装置的示例的示意性透视图;
图3是示出其中3D球栅阵列(BGA)封装件安装在电子装置的主板上的情况的示意性截面图;
图4是示出其中2.5D硅中介层封装件安装在主板上的情况的示意性截面图;
图5是示出其中2.5D有机中介层封装件安装在主板上的情况的示意性截面图;
图6是示出半导体封装件的示例的示意性截面图;
图7是沿着图6中的半导体封装件的I-I'线截取的剖切平面图;
图8和图9是示出制造图6中的半导体封装件的示例的示意性工艺图;
图10是示出半导体封装件的另一示例的示意性截面图;以及
图11是沿着图10中的半导体封装件的II-II'线截取的剖切平面图。
具体实施方式
在下文中,将参照附图如下描述本公开的实施例。
电子装置
图1是示出电子装置系统的示例的示意性框图。
参照图1,电子装置1000可将主板1010容纳在其中。主板1010可包括物理连接或者电连接到其的芯片相关组件1020、网络相关组件1030、其他组件1040等。这些组件可通过各种信号线1090连接到以下将描述的其他组件。
芯片相关组件1020可包括:存储器芯片,诸如易失性存储器(例如,动态随机存取存储器(DRAM))、非易失性存储器(例如,只读存储器(ROM))、闪存等;应用处理器芯片,诸如中央处理器(例如,中央处理单元(CPU))、图形处理器(例如,图形处理单元(GPU))、数字信号处理器、密码处理器、微处理器、微控制器等;以及逻辑芯片,诸如模数转换器(ADC)、专用集成电路(ASIC)等。然而,芯片相关组件1020不限于此,而是还可包括其他类型的芯片相关组件。另外,芯片相关组件1020可彼此组合。
网络相关组件1030可包括被指定为根据诸如以下协议操作的组件:无线保真(Wi-Fi)(电气和电子工程师协会(IEEE)802.11族等)、全球微波接入互操作性(WiMAX)(IEEE802.16族等)、IEEE 802.20、长期演进(LTE)、演进数据最优化(Ev-DO)、高速分组接入+(HSPA+)、高速下行链路分组接入+(HSDPA+)、高速上行链路分组接入+(HSUPA+)、增强型数据GSM环境(EDGE)、全球移动通信系统(GSM)、全球定位系统(GPS)、通用分组无线业务(GPRS)、码分多址(CDMA)、时分多址(TDMA)、数字增强型无绳电信(DECT)、蓝牙、3G协议、4G协议和5G协议以及在上述协议之后指定的任意其他无线协议和有线协议。然而,网络相关组件1030不限于此,而是还可包括被指定为根据各种其他无线标准或协议或者有线标准或协议操作的组件。另外,网络相关组件1030可与上述芯片相关组件1020一起彼此组合。
其他组件1040可包括高频电感器、铁氧体电感器、功率电感器、铁氧体磁珠、低温共烧陶瓷(LTCC)、电磁干扰(EMI)滤波器、多层陶瓷电容器(MLCC)等。然而,其他组件1040不限于此,而是还可包括用于各种其他目的的无源组件等。另外,其他组件1040可与上述芯片相关组件1020或网络相关组件1030一起彼此组合。
根据电子装置1000的类型,电子装置1000可包括可物理连接或电连接到主板1010或者可不物理连接或电连接到主板1010的其他组件。这些其他组件可包括例如相机1050、天线1060、显示器1070、电池1080、音频编解码器(未示出)、视频编解码器(未示出)、功率放大器(未示出)、指南针(未示出)、加速计(未示出)、陀螺仪(未示出)、扬声器(未示出)、大容量存储单元(例如,硬盘驱动器)(未示出)、光盘(CD)驱动器(未示出)、数字通用光盘(DVD)驱动器(未示出)等。然而,这些其他组件不限于此,而是还可根据电子装置1000的类型等而包括用于各种目的的其他组件。
电子装置1000可以是智能电话、个人数字助理(PDA)、数字摄像机、数码相机、网络系统、计算机、监视器、平板PC、膝上型PC、上网本PC、电视机、视频游戏机、智能手表、汽车组件等。然而,电子装置1000不限于此,而可以是处理数据的任意其他电子装置。
图2是示出电子装置的示例的示意性透视图。
参照图2,半导体封装件可在如上所述的各种电子装置1000中用于各种目的。例如,母板1110可容纳在智能电话1100的主体1101中,并且各种电子组件1120可物理连接或者电连接到母板1110。另外,可物理连接或电连接到母板1110或者可不物理连接或电连接到母板1110的其他组件(诸如,相机模块1130)可容纳在主体1101中。电子组件1120中的一些可以是芯片相关组件,例如,半导体封装件1121,但不限于此。电子装置不必局限于智能电话1100,而可以是如上所述的其他电子装置。
半导体封装件
通常,半导体芯片中集成了许多精细的电子电路。然而,半导体芯片本身可能无法用作成品的半导体产品,并且可能会由于外部的物理冲击或者化学冲击而损坏。因此,半导体芯片本身可能不被使用,而是可被封装并且在封装状态下在电子装置等中使用。
这里,就电连接而言,由于半导体芯片和电子装置的主板之间的电路宽度方面存在差异,因此需要半导体封装。详细地,半导体芯片的连接垫(pad,或可称为“焊盘”)的尺寸和半导体芯片的连接垫之间的间距非常细小,但在电子装置中使用的主板的组件安装垫的尺寸和主板的组件安装垫之间的间距显著大于半导体芯片的连接垫的尺寸和半导体芯片的连接垫之间的间距。因此,可能难以将半导体芯片直接安装在主板上,并且需要用于缓解半导体芯片和主板之间的电路宽度的差异的封装技术。
在下文中,将参照附图更充分地描述在通过这样的封装件技术制造的半导体封装件之中的使用中介层的半导体封装件。
图3是示出其中3D球栅阵列(BGA)封装件安装在电子装置的主板上的情况的示意性截面图。
在半导体芯片之中,诸如图形处理单元(GPU)的专用集成电路(ASIC)非常昂贵。因此,以高良率封装ASIC非常重要。在这方面,可在安装半导体芯片之前准备球栅阵列(BGA)以使数千到数十万个连接垫重新分布。可使用表面安装技术(SMT)等将诸如GPU 2220等的昂贵的半导体芯片安装在BGA基板2210上,然后进行封装。最终,封装的半导体芯片可安装在主板2110上。
在GPU 2220的情况下,有必要用诸如高带宽存储器(HBM)的存储器显著缩短信号路径。为此,诸如HBM 2240的半导体芯片可在被安装在中介层2230上之后被封装。封装的半导体芯片可按照层叠封装件(PoP)构造层压在其上安装有GPU 2220的封装件上。可惜的是,装置的厚度会显著增加,并且会在显著缩短信号路径方面存在限制。
图4是示出其中2.5D硅中介层封装件安装在主板上的情况的示意性截面图。
为了解决以上问题,可使用2.5D中介层技术制造包括有机中介层的半导体封装件2310,在半导体封装件2310中,第一半导体芯片(诸如GPU 2220)和第二半导体芯片(诸如HBM 2240)在被并排地表面安装在硅中介层2250上之后被封装。在这种情况下,具有数千至数十万个连接垫的GPU 2220和HBM 2240可通过硅中介层2250重新分布并且可经由最短的路径电连接。当包括这样的中介层的半导体封装件2310在被再次安装在BGA基板2210等上之后被重新分布时,半导体封装件2310可最终安装在主板2110上。由于非常难形成硅通孔(TSV)并且硅中介层2250的制造成本非常高,因此硅中介层2250在更大面积和低成本方面可能是不利的。
图5是示出其中2.5D有机中介层封装件安装在主板上的情况的示意性截面图。
为了解决以上问题,可使用有机中介层2260而不是硅中介层2250。例如,可使用2.5D中介层技术制造包括有机中介层的半导体封装件2320,在半导体封装件2320中,第一半导体芯片(诸如GPU 2220)和第二半导体芯片(诸如HBM 2240)在被并排地表面安装在有机中介层2260上之后被封装。在这种情况下,具有数千至数十万个连接垫的GPU 2220和HBM2240可通过有机中介层2260重新分布,并且可经由最短的路径电连接。当包括这样的有机中介层的半导体封装件2320在被安装在BGA基板2210等上之后被重新分布时,半导体封装件2320可最终安装在主板2110上。另外,包括这样的有机中介层的半导体封装件2320在更大面积和低成本方面可以是有利的。然而,由于当执行模制工艺时,有机中介层2260与芯片2220和2240的热膨胀系数(CTE)不匹配,导致包括这样的有机中介层的半导体封装件2320可能出现翘曲、底部填充树脂填充不良、芯片2220和2240与模制材料之间出现裂纹等问题。此外,这样的有机中介层在实现精细图案方面可能是不利的。
为了解决以上问题,尽管未详细示出,但是可另外形成具有精细图案的互连桥并将其插入BGA基板的腔中以被嵌入。然而,由于难以在BGA基板中形成腔并且难以实现相应的精细电路,因此可能无法减少工艺和良率问题。因此,需要一种能够解决所有问题的新型半导体封装件。
图6是示出半导体封装件的示例的示意性截面图,并且图7是沿着图6中的半导体封装件的I-I'线截取的剖切平面图。
参照图6和图7,根据示例实施例的半导体封装件100A包括:第一连接结构110,具有第一表面和与第一表面背对的第二表面,并且包括第一重新分布层112;第一半导体芯片121,设置在第一连接结构110的第一表面上,具有电连接到第一重新分布层112的第一连接垫121P;第二半导体芯片122,设置在第一连接结构110的第一表面上的第一半导体芯片121的周围,具有电连接到第一重新分布层112的第二连接垫122P;互连桥150,设置在第一连接结构110的第二表面上,并与第一连接结构110的第二表面间隔开并通过连接构件153连接到第一重新分布层112以将第一连接垫121P和第二连接垫122P彼此电连接;以及第二连接结构140,设置在第一连接结构110的第二表面上以使互连桥150嵌入,包括电连接到第一重新分布层112的第二重新分布层142。
另外,半导体封装件100A还可包括:包封剂130,设置在第一连接结构110的第一表面上以覆盖第一半导体芯片121和第二半导体芯片122中的每个的至少一部分;绝缘材料155,设置在第一连接结构110的第二表面和互连桥150之间以使连接构件153的至少一部分嵌入;第一电连接金属件160,设置在第二连接结构140的与其上设置有第一连接结构110的一侧背对的一侧上,并电连接到第二重新分布层142。
如上所述,在半导体封装件100A中,预先制造具有精细图案的互连桥150,然后使用包括锡(Sn)或含锡(Sn)合金的低熔点金属件(例如,连接构件153)以表面安装的形式使互连桥150位于第一连接结构110的第一重新分布层112上以进行电连接。根据半导体封装件100A,基本上不会出现精细图案方面的工艺和良率问题。另外,由于使用了具有精细图案的互连桥150,因此第一连接结构110的第一重新分布层112和第二连接结构140的第二重新分布层142的层数可显著减少,并且第一重新分布层112和第二重新分布层142中的每个可被设置为例如仅一层。因此,可实现改善的良率和可加工性。
半导体封装件100A可具有其中第一连接结构110直接形成在第一半导体芯片121和第二半导体芯片122上的结构。例如,第一连接结构110可包括:第一绝缘层111,设置在第一半导体芯片121和第二半导体芯片122上;第一重新分布层112,设置在第一绝缘层111上;以及第一连接过孔113,贯穿第一绝缘层111并将第一重新分布层112电连接到第一连接垫121P和第二连接垫122P。第一连接过孔113可与相应的第一连接垫121P和第二连接垫122P物理接触。例如,第一连接过孔113可将第一重新分布层112直接连接到第一连接垫121P和第二连接垫122P。在这种情况下,第一连接结构110可使用各自具有很大厚度的第一半导体芯片121和第二半导体芯片122作为基体而形成,这在控制工艺翘曲方面是有效的。另外,由于第一连接过孔113可直接形成在第一连接垫121P和第二连接垫122P上而没有形成另外的凸块,因此可减少制造成本并且可降低工艺难度,这在加工性方面是有利的。
另一方面,根据示例实施例的半导体封装件100A可具有其中第二连接结构140直接设置在第一连接结构110上的结构。例如,第二连接结构140可包括:第二绝缘层141,设置在第一连接结构110的第二表面上,覆盖互连桥150的至少一部分;第二重新分布层142,设置在第二绝缘层141上;以及第二连接过孔143,贯穿第二绝缘层141并将第一重新分布层112和第二重新分布层142彼此电连接。第二连接过孔143可与相应的第一重新分布层112和第二重新分布层142物理接触。例如,第二连接过孔143可将第一重新分布层112和第二重新分布层142彼此直接连接,这在控制工艺翘曲方面可以是更有效的。另外,互连桥150可嵌在第二连接结构140中以被有效地保护并且可被减薄。例如,互连桥150可设置在第二连接过孔143的分别与第一重新分布层112和第二重新分布层142接触的表面之间的高度上。
在下文中,将参照附图更充分地描述根据示例实施例的半导体封装件100A中包括的每个组件。
第一连接结构110可主要使第一半导体芯片121的第一连接垫121P和第二半导体芯片122的第二连接垫122P重新分布。具有各种功能的数十到数十万个连接垫可通过第一连接结构110重新分布,并且连接垫可根据其功能物理地和/或电连接到其他组件。第一连接结构110可包括:第一绝缘层111,设置在第一半导体芯片121的第一有效表面和第二半导体芯片122的第二有效表面上;第一重新分布层112,设置在第一绝缘层111上;以及第一连接过孔113,贯穿第一绝缘层111,连接到第一重新分布层112。第一连接过孔113也可连接到第一连接垫121P和第二连接垫122P。构成第一连接结构110的第一绝缘层111、第一重新分布层112和第一连接过孔113的数量可大于附图中所示的第一绝缘层111、第一重新分布层112和第一连接过孔113的数量,但是可被设置为例如如附图中所示的仅一层,以确保可加工性和良率并实现纤薄化。
第一绝缘层111的材料可以是绝缘材料。绝缘材料可以是感光材料(诸如感光电介质(PID))。例如,第一绝缘层111可以是感光层。当第一绝缘层111具有感光性能时,第一绝缘层111可进一步减薄,并且可更容易地实现第一连接过孔113的精细节距。
第一重新分布层112可用于主要使第一连接垫121P和第二连接垫122P重新分布,并且可利用诸如铜(Cu)、铝(Al)、银(Ag)、锡(Sn)、金(Au)、镍(Ni)、铅(Pb)、钛(Ti)或它们的合金的金属材料形成。第一重新分布层112可根据相应层的设计执行各种功能。例如,第一重新分布层112可包括接地图案、电力图案、信号图案等。除了接地图案、电力图案等之外,信号图案可包括各种信号图案,诸如数据信号图案等。另外,第一重新分布层112可包括具有各种用途的连接过孔垫。
第一连接过孔113可将第一重新分布层112电连接到第一连接垫121P和第二连接垫122P。结果,形成电路径。第一连接过孔113的材料可以是诸如铜(Cu)、铝(Al)、银(Ag)、锡(Sn)、金(Au)、镍(Ni)、铅(Pb)、钛(Ti)或它们的合金的金属材料。第一连接过孔113可以是用金属材料填充的填充型过孔,或者是其中金属材料沿着通路孔的壁表面形成的共形型过孔。此外,第一连接过孔113可在从互连桥150到第一半导体芯片121或到第二半导体芯片122的方向上渐缩,例如,第一连接过孔113可具有锥形形状等。第一连接过孔113也可包括用于信号的过孔、用于接地的过孔、用于电力的过孔等。用于接地的过孔和用于电力的过孔可以是相同的过孔。第一连接过孔113可与第一连接垫121P和第二连接垫122P物理接触。
第一半导体芯片121和第二半导体芯片122中的每个也可以是其中数百至数百万个或更多的元件集成在单个芯片中的集成电路(IC)。第一半导体芯片121和第二半导体芯片122中的每个的主体的基体材料也可以是硅(Si)、锗(Ge)、砷化镓(GaAs)等。各种电路可形成在第一半导体芯片121和第二半导体芯片122中的每个的主体上。第一连接垫121P和第二连接垫122P可将第一半导体芯片121和第二半导体芯片122电连接到其他组件。形成第一连接垫121P和第二连接垫122P的材料也可以是诸如铜(Cu)、铝(Al)等的金属材料,但不限于此。钝化层(未示出)可形成在第一半导体芯片121和第二半导体芯片122中的每个的主体上,以使第一连接垫121P和第二连接垫122P暴露。钝化层可以是氧化物层、氮化物层等,或者氧化物层和氮化物层的双层。绝缘层(未示出)等还可设置在必要的位置处。第一半导体芯片121可具有其上设置有第一连接垫121P的第一有效表面以及与第一有效表面背对的第一无效表面,第二半导体芯片122可具有其上设置有第二连接垫122P的第二有效表面以及与第二有效表面背对的第二无效表面。
第一半导体芯片121可以是专用集成电路(ASIC),诸如图形处理单元(GPU)。第二半导体芯片122可以是堆叠存储器,诸如高带宽存储器(HBM)。例如,第一半导体芯片121和第二半导体芯片122可以是昂贵的芯片,均具有数十万个I/O,但不限于此。可设置比第一半导体芯片121更多数量的第二半导体芯片122,并且第二半导体芯片122可分别设置在第一半导体芯片121的周围。例如,两个第二半导体芯片122可分别设置在第一半导体芯片121的两侧上。然而,这仅是示例,并不限于此。
包封剂130可保护第一半导体芯片121和第二半导体芯片122。包封形式不受限制,只要包封剂130覆盖第一半导体芯片121和第二半导体芯片122中的每个的至少一部分即可。例如,包封剂130可覆盖第一半导体芯片121的第一无效表面、第二半导体芯片122的第二无效表面以及第一半导体芯片121和第二半导体芯片122中的每个的侧表面的至少一部分。包封剂130可包括绝缘材料。绝缘材料可以是例如,热固性树脂(诸如环氧树脂)、热塑性树脂(诸如聚酰亚胺树脂)的绝缘树脂或包括无机填料和绝缘树脂的材料,例如,诸如无机填料的增强材料浸在热固性树脂或热塑性树脂中的树脂(诸如ABF、FR-4、BT等)。可选地,可使用感光包封剂(PIE)作为绝缘材料。根据需要,也可使用其中热固性树脂或热塑性树脂浸有无机填料和/或芯材料(诸如玻璃纤维)的材料(例如,半固化片)作为绝缘材料。
第二连接结构140可提供用于将第一半导体芯片121的第一连接垫121P和第二半导体芯片122的第二连接垫122P电连接到外部组件(诸如印刷电路板(PCB)200等)的电连接路径。第二连接结构140可用于通过使互连桥嵌入来保护互连桥150。第二连接结构140包括:第二绝缘层141,设置在第一连接结构110上;第二重新分布层142,设置在第二绝缘层141上;以及第二连接过孔143,贯穿第二绝缘层141,连接到第二重新分布层142。第二连接过孔143也可连接到第一重新分布层112。构成第二连接结构140的第二绝缘层141、第二重新分布层142和第二连接过孔143的数量可大于附图中所示的第二绝缘层141、第二重新分布层142和第二连接过孔143的数量,但是可设置为详细地如附图中所示的仅一层,以确保可加工性和良率并实现纤薄化。
第二绝缘层141的材料可以是绝缘材料。绝缘材料可以是包括绝缘树脂和无机填料的非感光材料(诸如ABF)。例如,第二绝缘层141可以是非感光绝缘层。在这种情况下,第二绝缘层141可以以具有非常大的厚度的膜的形式覆盖互连桥150,以使互连桥150稳定地嵌入。另外,可有效地控制工艺翘曲。
第二重新分布层142可提供第一电连接金属件160的垫区域,用于将第一连接垫121P和第二连接垫122P电连接到外部组件。第二重新分布层142可利用诸如铜(Cu)、铝(Al)、银(Ag)、锡(Sn)、金(Au)、镍(Ni)、铅(Pb)、钛(Ti)或它们的合金的金属材料形成。第二重新分布层142可根据相应层的设计执行各种功能。例如,第二重新分布层142可包括接地图案、电力图案、信号图案等。除了接地图案、电力图案等之外,信号图案可包括各种信号图案,诸如数据信号图案等。另外,第二重新分布层142可包括具有各种用途的过孔垫和/或电连接金属垫。
第二连接过孔143可将第一重新分布层112和第二重新分布层142电连接。结果,形成竖直电路径。第二连接过孔143的材料可以是诸如铜(Cu)、铝(Al)、银(Ag)、锡(Sn)、金(Au)、镍(Ni)、铅(Pb)、钛(Ti)或它们的合金的金属材料。第二连接过孔143可以是用金属材料填充的填充型过孔,或者是其中金属材料沿着通路孔的壁表面形成的共形型过孔。此外,第二连接过孔143可具有锥形形状等。第二连接过孔143也可包括用于信号的过孔、用于接地的过孔、用于电力的过孔等。用于接地的过孔和用于电力的过孔可以是相同的过孔。第二连接过孔143可与第一连接垫121P和第二连接垫122P物理接触。
互连桥150将第一连接垫121P和第二连接垫122P电连接。例如,互连桥150可将第一连接垫121P和第二连接垫122P的信号垫彼此电连接。互连桥150可包括形成在其中的精细图案。例如,互连桥150可包括:主体,具有有效表面以及与有效表面背对的无效表面,在有效表面上设置有连接电极150P;以及连接凸块150B,设置在连接电极150P上以电连接到连接构件153。主体可以是其中形成有用于互连的精细图案的硅基主体。例如,互连桥150可以是其中设计有精细电路的硅基互连桥。互连桥150的数量不受限制,并且可多于或少于附图中所示的互连桥150的数量。
互连桥150以表面安装的形式通过连接构件153设置在第一连接结构110的第一重新分布层112上,使得互连桥150的有效表面面对第一连接结构110的第二表面。例如,第一连接结构110的第一重新分布层112和互连桥150可彼此间隔开,并且它们之间的空间可填充有绝缘材料155。绝缘材料155可使连接构件153嵌入,并且可固定互连桥150。绝缘材料155具有覆盖第一连接结构110的第二表面的区域以及覆盖互连桥150的顶表面的区域。覆盖第一连接结构110的第二表面的区域的面积可大于覆盖互连桥150的顶表面的区域的面积。例如,绝缘材料155可涂敷在第一连接结构110的第二表面上以固定互连桥,并且可具有当从上方观察时其中顶表面的宽度大于底表面的宽度的锥形形状。连接电极150P和连接凸块150B中的每个可包括已知的金属材料(诸如铜(Cu)、铝(Al)等)。连接构件153可包括低熔点金属,例如,锡(Sn)或含锡(Sn)合金。例如,连接构件153可以是焊料。绝缘材料155可以是包括环氧树脂等的底部填充树脂。
第一电连接金属件160可将半导体封装件100A物理连接和/或电连接到外部组件。例如,半导体封装件100A可通过第一电连接金属件160安装在BGA基板等上。第一电连接金属件160可利用低熔点金属形成,例如焊料等,但仅是示例并且其材料不限于此。第一电连接金属件160可以是焊盘、焊球、引脚等。第一电连接金属件160可利用多层或单层形成。当第一电连接金属件160利用多层形成时,第一电连接金属160可包括铜柱和焊料,并且当第一电连接金属件160利用单层形成时,第一电连接金属件160可包括锡-银焊料或铜,但不限于此。第一电连接金属件160的数量、间隔、设置形式等不受限制,并且可由本领域技术人员根据设计进行充分修改。例如,根据第一连接垫121P和第二连接垫122P的数量,第一电连接金属件160的数量可以是数十到数千。然而,第一电连接金属件160的数量可以是数千或更多或者数千或更少。
印刷电路板(PCB)200可设置在半导体封装件100A的第二连接结构140的与其上设置有第一连接结构110的一侧背对的一侧上,并且可连接到第一电连接金属件160。例如,半导体封装件100A可通过第一电连接金属件160表面安装在PCB 200上。PCB 200可经由第二电连接金属件210安装在电子装置的主板等上,第二电连接金属件210设置在PCB 200的与其上设置有第二连接结构140的一侧背对的一侧上,并电连接到PCB 200。PCB 200可以是BGA基板,但不限于此。根据需要,可在PCB 200和/或第二电连接金属件210设置在半导体封装件100A上的同时制造半导体封装件100A。例如,半导体封装件100A可包括PCB 200和/或第二电连接金属件210。
图8和图9是示出制造图6中的半导体封装件的示例的示意工艺图。
参照图8,将第一半导体芯片121和第二半导体芯片122以面朝下的方向设置在带(未示出)等上。使用诸如ABF层压和固化等的方式通过包封剂130包封第一半导体芯片121和第二半导体芯片122。通过使用被包封剂130包封的第一半导体芯片121和第二半导体芯片122作为基体,通过PID涂覆和固化在相应的第一半导体芯片121和第二半导体芯片122的第一有效表面和第二有效表面上形成第一绝缘层111。在通过光刻工艺形成通路孔之后,通过镀覆工艺(例如,加成工艺(AP)、半AP(SAP)、改进SAP(MSAP)、盖孔法(tenting)等)形成第一重新分布层112和第一连接过孔113。例如,第一连接结构110直接形成在第一半导体芯片121和第二半导体芯片122上。在这种情况下,第一连接过孔113可与第一连接垫121P和第二连接垫122P物理接触。能够将第一连接垫121P和第二连接垫122P电连接的互连桥150经由连接构件153安装在第一重新分布层112上,并且使用绝缘材料155固定。
参照图9,在第一连接结构110上使用诸如ABF层压和固化等的方式形成第二绝缘层141,以使互连桥150嵌入。在通过激光钻孔等形成通路孔之后,通过上述镀覆工艺形成第二重新分布层142和第二连接过孔143。例如,第二连接结构140直接形成在第一连接结构110上以使互连桥150嵌入。第一电连接金属件160形成为连接到第二重新分布层142。通过一系列工艺,制造了上述半导体封装件100A。根据需要,制造的半导体封装件100A可经由第一电连接金属件160表面安装并且设置在具有第二电连接金属件210的印刷电路板(PCB)200上。
图10是示出半导体封装件的另一示例的示意性截面图,并且图11是沿着图10中的半导体封装件的II-II'线截取的剖切平面图。
参照图10和图11,与上述半导体封装件100A相比,根据另一示例实施例的半导体封装件100B还包括设置在第一连接结构110的第一重新分布层112上的一个或更多个无源组件180。无源组件180中的每个嵌在第二连接结构140的第二绝缘层141中。无源组件180中的每个通过第一重新分布层112电连接到第一连接垫121P和第二连接垫122P中的至少一个。无源组件180中的每个可包括电容器和/或电感器。其他描述与根据示例实施例的半导体封装件100A的详细描述基本相同,并且这里将省略。
如上所述,示例实施例提供了一种半导体封装件,该半导体封装件中包括嵌入有能够替换传统中介层的互连桥的连接结构。尽管具有嵌入的互连桥,但是半导体封装件也可控制翘曲并且在良率和可加工性可以是是优异的、成本低,并且在精细图案上没有工艺问题和良率问题。
在本公开中,术语“下侧”、“下部”、“下表面”等已用于表示相对于附图的截面朝向半导体封装件的安装表面的方向,术语“上侧”、“上部”、“上表面”等已用于表示与通过术语“下侧”、“下部”、“下表面”等所表示的方向相反的方向。然而,这些方向仅为了便于解释而定义,并且权利要求不受如上所述的定义的方向的特别限制。
在说明书中组件与另一组件的“连接”的含义包括两个组件之间通过粘合层的间接连接以及两个组件之间的直接连接。另外,“电连接”意味着包括物理连接和物理断开。可理解的是,当元件被称为“第一”和“第二”时,元件不受限于此。这些术语仅可用于将元件与其他元件区分的目的,并且可不限制元件的顺序或重要性。在一些情况下,在不脱离这里阐述的权利要求的范围的情况下,第一元件可被称为第二元件。类似地,第二元件也可被称为第一元件。
这里使用的术语“示例实施例”不总是指的是相同的示例实施例,并且被提供用于强调与另一示例实施例的特定特征或特性不同的特定特征或特性。然而,这里提供的示例实施例被认为能够通过将彼此整体或部分地组合来实现。例如,除非在其中提供相反或矛盾的描述,否则在特定示例实施例中描述的一个元件即使在另一示例实施例中未被描述,其也可被理解为与另一示例实施例相关的描述。
这里使用的术语仅用于描述示例实施例而不是限制本公开。在这种情况下,除非必须另外解释,否则基于特定上下文,单数形式包括复数形式。
虽然以上已经示出和描述了示例实施例,但是对本领域技术人员将明显的是,在不脱离由所附权利要求限定的本公开的范围的情况下,可做出修改和变型。
Claims (20)
1.一种半导体封装件,所述半导体封装件包括:
第一连接结构,具有第一表面和与所述第一表面背对的第二表面,并且包括第一重新分布层和连接到所述第一重新分布层的第一连接过孔;
第一半导体芯片,设置在所述第一连接结构的所述第一表面上,具有接触所述第一连接过孔的第一连接垫;
第二半导体芯片,设置在所述第一连接结构的所述第一表面上的所述第一半导体芯片的周围,具有接触所述第一连接过孔的第二连接垫;
互连桥,设置在所述第一连接结构的所述第二表面上,并且与所述第一连接结构的所述第二表面间隔开,并且通过连接构件连接到所述第一重新分布层,以将所述第一连接垫和所述第二连接垫彼此电连接;以及
第二连接结构,设置在所述第一连接结构的所述第二表面上以使所述互连桥嵌入,并且包括第二连接过孔和通过所述第二连接过孔电连接到所述第一重新分布层的第二重新分布层,
其中,所述第一连接过孔和所述第二连接过孔在朝向所述第一连接垫或所述第二连接垫的方向上渐缩。
2.如权利要求1所述的半导体封装件,其中,所述连接构件是包括锡或含锡合金的低熔点金属件。
3.如权利要求1所述的半导体封装件,所述半导体封装件还包括绝缘材料,所述绝缘材料设置在所述第一连接结构的所述第二表面与所述互连桥之间,以使所述连接构件的至少一部分嵌入。
4.如权利要求3所述的半导体封装件,其中,所述绝缘材料是包含环氧树脂的底部填充树脂。
5.如权利要求3所述的半导体封装件,其中,所述绝缘材料包括覆盖所述第一连接结构的所述第二表面的区域以及覆盖所述互连桥的一个表面的区域,并且
覆盖所述第一连接结构的所述第二表面的所述区域的面积大于覆盖所述互连桥的所述一个表面的所述区域的面积。
6.如权利要求1所述的半导体封装件,其中,所述第一连接结构包括第一绝缘层、所述第一重新分布层和所述第一连接过孔,所述第一绝缘层设置在所述第一半导体芯片和所述第二半导体芯片上,所述第一重新分布层设置在所述第一绝缘层上,所述第一连接过孔贯穿所述第一绝缘层并且将所述第一重新分布层分别电连接到所述第一连接垫和所述第二连接垫。
7.如权利要求6所述的半导体封装件,其中,所述第一连接结构仅包括一个重新分布层作为所述第一重新分布层。
8.如权利要求6所述的半导体封装件,其中,所述第二连接结构包括:第二绝缘层、所述第二重新分布层和所述第二连接过孔,所述第二绝缘层设置在所述第一连接结构的所述第二表面上并且覆盖所述互连桥的至少一部分,所述第二重新分布层设置在所述第二绝缘层上,所述第二连接过孔贯穿所述第二绝缘层并且将所述第一重新分布层和所述第二重新分布层彼此电连接。
9.如权利要求8所述的半导体封装件,其中,所述第二绝缘层接触所述第一绝缘层。
10.如权利要求9所述的半导体封装件,其中,所述互连桥设置在所述第二连接过孔的分别与所述第一重新分布层和所述第二重新分布层接触的一个表面和另一表面之间的高度上。
11.如权利要求9所述的半导体封装件,其中,所述第二连接结构仅包括一个重新分布层作为所述第二重新分布层。
12.如权利要求1所述的半导体封装件,其中,所述互连桥包括:主体,具有有效表面和与所述有效表面背对的无效表面,所述有效表面上设置有连接电极;以及连接凸块,设置在所述连接电极上以连接到所述连接构件,并且
所述互连桥以这样的方式表面安装在所述第一连接结构的所述第二表面上:使得所述有效表面面对所述第一连接结构的所述第二表面。
13.如权利要求12所述的半导体封装件,其中,所述主体是设置有精细电路的硅基主体。
14.如权利要求1所述的半导体封装件,所述半导体封装件还包括:
包封剂,设置在所述第一连接结构的所述第一表面上,覆盖所述第一半导体芯片和所述第二半导体芯片中的每者的至少一部分。
15.如权利要求1所述的半导体封装件,其中,所述第一半导体芯片包括图形处理单元,并且
所述第二半导体芯片包括高带宽存储器。
16.如权利要求1所述的半导体封装件,所述半导体封装件还包括:
无源组件,设置在所述第一连接结构的所述第二表面上,嵌在所述第二连接结构中,并且通过所述第一重新分布层电连接到所述第一连接垫和所述第二连接垫中的至少一者,
其中,所述无源组件包括电容器和电感器中的至少一者。
17.如权利要求1所述的半导体封装件,所述半导体封装件还包括:
第一电连接金属件,设置在所述第二连接结构的与其上设置有所述第一连接结构的一侧背对的一侧上,并且电连接到所述第二重新分布层。
18.如权利要求17所述的半导体封装件,所述半导体封装件还包括:
印刷电路板,设置在所述第二连接结构的与其上设置有所述第一连接结构的一侧背对的一侧上,并且电连接到所述第一电连接金属件;以及
第二电连接金属件,设置在所述印刷电路板的与其上设置有所述第二连接结构的一侧背对的一侧上,并且电连接到所述印刷电路板。
19.一种半导体封装件,所述半导体封装件包括:
第一半导体芯片,具有其上设置有第一连接垫的第一有效表面;
第二半导体芯片,设置在所述第一半导体芯片的周围,具有其上设置有第二连接垫的第二有效表面;
第一连接结构,包括:第一绝缘层,设置在所述第一有效表面和所述第二有效表面上;第一重新分布层,设置在所述第一绝缘层上;以及第一连接过孔,贯穿所述第一绝缘层并且将所述第一重新分布层分别电连接到所述第一连接垫和所述第二连接垫;
互连桥,设置在所述第一连接结构上并且连接到所述第一重新分布层,以将所述第一连接垫和所述第二连接垫彼此电连接;以及
第二连接结构,包括:第二绝缘层,设置在所述第一连接结构上以覆盖所述第一重新分布层的至少一部分并且使所述互连桥嵌入;第二重新分布层,设置在所述第二绝缘层上;以及第二连接过孔,贯穿所述第二绝缘层并且将所述第一重新分布层和所述第二重新分布层彼此电连接,
其中,所述第一连接过孔与相应的所述第一连接垫和所述第二连接垫物理接触,
其中,所述第一连接过孔接触所述第一连接垫和所述第二连接垫,并且
其中,所述第一连接过孔和所述第二连接过孔在朝向所述第一半导体芯片或到所述第二半导体芯片的方向上渐缩。
20.如权利要求19所述的半导体封装件,其中,所述互连桥与所述第一连接结构间隔开并且通过连接构件连接到所述第一重新分布层,并且
所述半导体封装件还包括绝缘材料,所述绝缘材料设置在所述第一连接结构和所述互连桥之间并且使所述连接构件的至少一部分嵌入。
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