CN111180514A - 半导体装置 - Google Patents

半导体装置 Download PDF

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Publication number
CN111180514A
CN111180514A CN201910593769.1A CN201910593769A CN111180514A CN 111180514 A CN111180514 A CN 111180514A CN 201910593769 A CN201910593769 A CN 201910593769A CN 111180514 A CN111180514 A CN 111180514A
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China
Prior art keywords
electrode
semiconductor device
solder
semiconductor substrate
disposed
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CN201910593769.1A
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CN111180514B (zh
Inventor
大黑达也
西胁达也
小岛秀春
高田贤治
相田喜久夫
一关健太郎
大麻浩平
佐藤慎吾
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Toshiba Corp
Toshiba Electronic Devices and Storage Corp
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Toshiba Corp
Toshiba Electronic Devices and Storage Corp
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Abstract

实施方式提供可靠性高的半导体装置。实施方式的半导体装置具备：具有第1面和第2面的半导体基板；设置于半导体基板内并具有设置于第1面的栅极绝缘膜的半导体元件；设置于第1面之上的第1电极；设置于第1电极之上、包含第1金属材料、膜厚为(65[g·μm·cm－3])/(第1金属材料的密度[g·cm－3])以上的第2电极；设置于第2电极之上的第1焊料部；设置于第1焊料部之上的第3电极；设置于第1面之上的第4电极；设置于第4电极之上、包含第2金属材料、膜厚为(65[g·μm·cm－3])/(第2金属材料的密度[g·cm－3])以上的第5电极；设置于第5电极之上的第2焊料部；以及设置于第2焊料部之上的第6电极。

Description

半导体装置
关联申请
本申请主张以日本专利申请2018－211902号(申请日：2018年11月12日)为基础申请的优先权。本申请通过参照该基础申请而包含基础申请的全部内容。
技术领域
本发明的实施方式涉及半导体装置。
背景技术
已开发了面向发电或送电、泵或送风机等旋转机、通信系统或工场等电源装置、基于交流马达的铁道、电动汽车、家庭用电器等广泛领域的、以MOSFET(Metal OxideSemiconductor Field Effect Transistor)或IGBT(Insulated Gate BipolarTransistor)等的半导体元件为代表的、设计为功率控制用的功率半导体装置。
例如，在是使用纵型MOSFET来驱动马达等的半导体装置的情况下，在半导体基板内形成了纵型MOSFET。纵型MOSFET的源极电极以及栅极电极，经由焊料等而分别连接于在半导体基板之上设置的包含Cu(铜)等的电极。并且，纵型MOSFET的漏极电极，经由焊料等而连接于在半导体基板之下设置的包含Cu等的电极。上述的包含Cu等的电极与外部的电路等连接。
在由焊料产生的α射线(alpha射线)进入到半导体元件的栅极绝缘膜的情况下，由于α射线所具有的能量，所以在栅极绝缘膜内产生电子－空穴对。在对栅极电极施加了偏置电压的情况下，所产生的电子向半导体基板或栅极电极移动。但是，空穴残留在栅极绝缘膜中。这是因为，空穴的迁移率比电子的迁移率低。由于该残留的空穴，所以有MOSFET的阈值电压Vth向更负的一侧变化这样的问题。
发明内容
实施方式提供一种可靠性高的半导体装置。
实施方式的半导体装置具备：具有第1面和第2面的半导体基板；设置于半导体基板内并具有设置于第1面的栅极绝缘膜的半导体元件；设置于第1面之上的第1电极；设置于第1电极之上、包含第1金属材料、膜厚为(65[g·μm·cm－3])/(第1金属材料的密度[g·cm－3])以上的第2电极；设置于第2电极之上的第1焊料部；设置于第1焊料部之上的第3电极；设置于第1面之上的第4电极；设置于第4电极之上、包含第2金属材料、膜厚为(65[g·μm·cm－3])/(第2金属材料的密度[g·cm－3])以上的第5电极；设置于第5电极之上的第2焊料部；以及设置于第2焊料部之上的第6电极。
附图说明
图1是第一实施方式的半导体装置的示意截面图。
图2是在第一实施方式的半导体装置的主要部分的制造方法中表示制造中途的半导体装置的示意截面图。
图3是在第一实施方式的半导体装置的主要部分的制造方法中表示制造中途的半导体装置的示意截面图。
图4是在第一实施方式的半导体装置的主要部分的制造方法中表示制造中途的半导体装置的示意截面图。
图5是在第一实施方式的半导体装置的主要部分的制造方法中表示制造中途的半导体装置的示意截面图。
图6是在第一实施方式的半导体装置的主要部分的制造方法中表示制造中途的半导体装置的示意截面图。
图7是表示α射线的穿透长度与金属的密度的关系的图。
图8是说明第一实施方式的半导体装置的作用效果的图。
图9是第二实施方式的半导体装置的示意截面图。
图10是第二实施方式的其他形态的半导体装置的示意截面图。
图11是第三实施方式的半导体装置的示意截面图。
具体实施方式
以下，使用附图来说明实施方式。另外，附图中对于相同或类似的部位赋予相同或类似的标号。
本说明书中，有对于相同或类似的部件赋予相同的标号并省略重复的说明的情况。
本说明书中，为了表示器件等的位置关系，将附图的上方向记述为
“上”，将附图的下方向记述为“下”。本说明书中，“上”、“下”的概念不一定是表示与重力的朝向的关系的用语。
本说明书中，n+、n、n－以及p+、p、p－的标记表示各导电型中的杂质浓度的相对的高低。即n+表示与n相比n型的杂质浓度相对较高，n－表示与n相比n型的杂质浓度相对较低。并且，p+表示与p相比p型的杂质浓度相对较高，p－表示与p相比p型的杂质浓度相对较低。另外，也有将n+和n－仅记为n型、并将p+和p－仅记为p型的情况。
(第一实施方式)
本实施方式的半导体装置是如下半导体装置，该半导体装置具备：具有第1面和第2面的半导体基板；设置于半导体基板内并具有设于第1面的栅极绝缘膜的半导体元件；设置于第1面之上的第1电极；设置于第1电极之上、包含第1金属材料、膜厚为(65[g·μm·cm－3])/(第1金属材料的密度[g·cm－3])以上的第2电极；设置于第2电极之上的第1焊料部；设置于第1焊料部之上的第3电极；设置于第1面之上的第4电极；设置于第4电极之上、包含第2金属材料、膜厚为(65[g·μm·cm－3])/(第2金属材料的密度[g·cm－3])以上的第5电极；设置于第5电极之上的第2焊料部；以及设置于第2焊料部之上的第6电极。
图1是本实施方式的半导体装置100的示意截面图。本实施方式的半导体装置100是具有沟槽型的MOSFET30的半导体装置。
半导体基板2是例如Si(硅)基板。
MOSFET30是半导体元件的一例。MOSFET30具有半导体层10、漂移层12、阱区域14、栅极绝缘膜16、栅极电极18、源极区域20和接触区域22。
第1面2a设置于半导体基板2的上侧。第2面2b设置于半导体基板2的下侧。n－型的漂移层12设置于n+型的半导体层10之上。换言之，半导体基板2的漂移层12具有第1面2a，半导体基板2的半导体层10具有第2面2b。
第1面2a具有第1区域40a和第2区域40b。MOSFET30设置于第1区域40a以及其之下。
p型的阱区域14设置于漂移层12内部，一部分与第1区域40a接触地被设置。
栅极电极18例如其上部与第1区域40a相接地设置。此外，栅极电极18从第1区域40a朝向第2面2b延伸，下部贯通阱区域14而设置于漂移层12内。栅极电极18包含例如含有杂质的多晶硅。另外在图1记载的半导体装置100中，被图示的栅极电极18的个数是3个。但是，栅极电极18的个数当然不限定于此。
p+型的接触区域22被设置为，在各个栅极电极18之间，一部分与第1区域40a相接。
n+型的源极区域20分别被设置在栅极电极18与接触区域22之间。
栅极绝缘膜16与第1区域40a相接地设置。并且，栅极绝缘膜16设置于第1区域40a。并且，栅极绝缘膜16设置于阱区域14与栅极电极18之间、漂移层12与栅极电极18之间、以及源极区域20与栅极电极18之间。并且，栅极绝缘膜16从半导体基板2的第1面2a向第2面2b的方向延伸。栅极绝缘膜16包含例如氧化硅。
终端构造90设置于第2区域40b以及其之下。所谓终端构造90，是用于缓和MOSFET30在反向偏置施加时产生的半导体装置100的端部处的电场集中的构造。图1所示的终端构造90是多个p型区域在漂移层12内沿着第1面2a设置而得到的JTE(JunctionTerminal Extention，结终端扩展)构造。另外，终端构造90的构造并不限定于此，也能够优选地使用公知的保护环构造、公知的降低表面电场构造或公知的VLD(Variation LateralDoping，横向变掺杂)构造等。
绝缘膜92设置于第1面2a之上。绝缘膜92例如包含氧化硅。
接触件94设置于将设置在接触区域22之上的绝缘膜92贯通的孔的内部。接触件94例如是TiN(氮化钛)膜或Ti(钛)与TiN的层叠膜。但是，接触件94所使用的材料当然并不限定于此。
第1电极60设置于第1区域40a之上。第1电极60具有例如设置于绝缘膜92之上、与接触件94连接、例如包含Ti(钛)的第1含Ti电极60a、和设置于第1含Ti电极60a之上且含有Al(铝)的第1含Al电极60b。由此，第1电极60经由接触件94以及接触区域22而与MOSFET30的源极区域20电连接。第1电极60的构成被设为如下构成，即：在与接触件94直接相接的第1含Ti电极60a中使用包含即使吸收氧也确保导电性的Ti在内的材料，在第1含Ti电极60a之上设置包含便宜的Al的第1含Al电极60b。另外，第1电极60的构成当然并不限定于此。
第2电极64设置于第1电极60之上，包含第1金属材料。第2电极64具有第1基底层64a和设置于第1基底层64a之上的第1镀层电极64b。如后述那样，在形成了第1基底层64a之后，通过利用镀层来形成第1镀层电极64b，从而进行第2电极64的形成。换言之，第1基底层64a是镀层所采用的基底层。另外第2电极64的构成并不限定于此。
第2电极64的膜厚t1优选的是，为(65[g·μm·cm－3])/(第1金属材料的密度[g·cm－3])以上。例如在第2电极64由Cu(铜)形成的情况下，若将Cu的密度作为8.92[g·cm－3]来计算，则第2电极64的膜厚t1优选的是为7μm以上。
另外，在第1电极60与第2电极64之间设有例如含有由Ti形成的阻挡金属的第1含Ti层62。
第1焊料部66设置于第2电极64之上。第1焊料部66是将第2电极64和后述的第3电极68接合的焊料部件。
第3电极68设置于第1焊料部66之上。第3电极68是例如由Cu形成的用于将外部的电路与MOSFET30连接的连接件。
第4电极70设置于第2区域40b之上。第4电极70具有多晶硅电极70a、设置于多晶硅电极70a之上的第2含Ti电极70b、和设置于第2含Ti电极70b之上的第2含Al电极70c。多晶硅电极70a经由例如未图示的多晶硅布线而连接于栅极电极18。
第5电极74设置于第4电极70之上，包含第2金属材料。第5电极74具有第2基底层74a、和设置于第2基底层74a之上的第2镀层电极74b。第2基底层74a是用于形成第2镀层电极74b的镀层所采用的基底层。另外，第2电极64的构成并不限定于此。
第5电极74的膜厚t2优选的是，为(65[g·μm·cm－3])/(第2金属材料的密度[g·cm－3])以上。
另外，第4电极70与第5电极74之间设置有例如含有由Ti形成的阻挡金属的第2含Ti层72。
第2焊料部76设置于第5电极74之上。第2焊料部76是将第5电极74与后述的第6电极78接合的焊料部件。
第6电极78设置于第2焊料部76之上。第6电极78是例如由Cu形成的用于将外部的电路与MOSFET30连接的连接件。
绝缘膜52以及绝缘膜54是为了将第1电极60以及第2电极64与第4电极70以及第5电极74绝缘而设置的。绝缘膜52是例如氧化硅膜，绝缘膜54是例如聚酰亚胺膜。
第2电极64具有与第1焊料部66相比平行于第1面2a地向第2电极64与第5电极74之间突出的电极部分(第一电极部分)65，进而在将第1焊料部66的膜厚设为a、将平行于第1面2a的方向上的电极部分65的上表面的长度设为b、将垂直于第1面2a的方向上的电极部分65的膜厚设为c、将平行于第1面2a的方向上的电极部分65与第5电极74之间的距离设为d时，优选的是(a/b)＜(a+c)/(b+d)。
第5电极74具有与第2焊料部76相比平行于第1面2a地向第2电极64与第5电极74之间突出的电极部分(第二电极部分)75，进而在将第2焊料部76的膜厚设为h、将平行于第1面2a的方向上的电极部分75的上表面的长度设为i、将垂直于第1面2a的方向上的电极部分75的膜厚设为j、将平行于第1面2a的方向上的电极部分75与第2电极64之间的距离设为d时，优选的是(h/i)＜(h+j)/(i+d)。
第8电极82包含第3金属材料，经由通过TiW、TiN(氮化钛)形成的阻挡金属80而连接于第2面2b。第8电极82是与MOSFET30的漏极连接的电极。第8电极82具有第3基底层82a、和设置于第3基底层82a之下的第3镀层电极82b。另外第8电极82的构成并不限定于此。
第8电极82的膜厚t3优选的是，为(65[g·μm·cm－3])/(第3金属材料的密度[g·cm－3])以上。
即使第2电极64、第5电极74以及第8电极82分别是金属层的层叠构造也能够优选地使用。
第3焊料部84设置于第8电极82之下。第3焊料部84是将第8电极82和后述的第7电极86接合的焊料部件。
第7电极86设置于第3焊料部84之下。换言之，第7电极86设置于半导体基板2的第2面2b。第7电极86是例如由Cu形成的用于将外部的电路与MOSFET30连接的连接件。
另外，在半导体基板2的板厚是25μm以下的情况下，特别优选的是，设置有膜厚t3为(65[g·μm·cm－3])/(第3金属材料的密度[g·cm－3])以上的第8电极82。进而，还优选的是，第2面2b与栅极绝缘膜16的距离d1为25μm以下。
换言之，半导体基板2设置于第3电极68以及第6电极78与第7电极86之间。并且，第3焊料部84设置于第7电极86与半导体基板2之间。并且，第8电极82设置于第3焊料部84与半导体基板2之间。
第1金属材料、第2金属材料或第3金属材料优选的是，Cu(铜)、Ni(镍)、Al(铝)、Ag(银)、Ti(钛)或W(钨)。
图2至图6是在本实施方式的半导体装置100的主要部分的制造方法中表示制造中途的半导体装置的示意截面图。
在第1面2a的第1区域40a以及其之下形成有MOSFET30的半导体基板2的、第1区域40a之上，形成含有第1含Ti电极60a以及第1含Al电极60b的第1电极60。并且，在第2区域40b之上，形成含有多晶硅电极70a、第2含Ti电极70b以及第2含Al电极70c在内的第4电极70。接着，在第1面2a、第1电极60以及第4电极70之上，形成含有例如氧化硅的绝缘膜52。接着，在绝缘膜52之上，形成含有例如聚酰亚胺的绝缘膜54。接着，通过光刻，使第1电极60的上部和第4电极70的上部露出(图2)。
接着，在绝缘膜54之上，在露出的第1电极60的上部以及露出的第4电极70的上部，形成包含例如Ti的膜96。接着，在膜96之上，形成含有Cu的膜98。接着，在膜98之上形成光致抗蚀剂99。接着，将图2中露出的第1电极60的上部以及第4电极70的上部中的光致抗蚀剂99的部分除去(图3)。
接着，在除去了光致抗蚀剂99的部分的、第1电极60的上方，例如通过镀层法形成第1镀层电极64b。并且，在除去了光致抗蚀剂99的部分的、第4电极70的上方，例如通过镀层法形成第2镀层电极74b。接着，将光致抗蚀剂99除去。接着，将除去了光致抗蚀剂99的部分处的膜96和膜98除去。第1电极60与第1镀层电极64b之间残留的膜96以及膜98分别成为第1含Ti层62以及第1基底层64a。由此，形成包含第1基底层64a和第1镀层电极64b的第2电极64。并且，在第4电极70与第2镀层电极74b之间残留的膜96和膜98分别成为第2含Ti层72以及第2基底层74a。由此，形成包含第2基底层74a和第2镀层电极74b的第5电极74(图4)。
接着，对半导体基板2的与第1面2a相反侧的面进行研削，将半导体基板2薄膜化。在第1面2a的相反侧设置的面成为第2面2b。接着，通过对第2面2b进行例如n型离子的离子注入，来形成半导体层10。接着，在第2面2b形成包含TiW、TiN的阻挡金属80，并形成与阻挡金属80相接的第3基底层82a。接着，通过例如镀层法，形成与第3基底层82a相接的第3镀层电极82b。由此，形成包含第3基底层82a和第3镀层电极82b的第8电极82(图5)。
接着，在第8电极82的下表面涂敷例如乳膏焊料，使乳膏焊料接触于第7电极86。若接着对其加热并冷却，则乳膏焊料暂时溶融了之后硬化，通过第3焊料部84将第8电极82和第7电极86接合(图6)。
接着，在第2电极64和第5电极74之上涂敷例如乳膏焊料。接着，使第2电极64之上的乳膏焊料接触第3电极68，并使第5电极74之上的乳膏焊料之上接触第6电极78。若接着对其加热并冷却，则乳膏焊料暂时溶融了之后硬化。由此，通过第1焊料部66将第2电极64和第3电极68接合。并且，通过第2焊料部76将第5电极74和第6电极78接合。由此，可得到本实施方式的半导体装置100。
接着，记载本实施方式的半导体装置100的作用效果。
半导体装置100具备：包含第1金属材料、膜厚为(65[g·μm·cm－3])/(第1金属材料的密度[g·cm－3])以上的第2电极64；包含第2金属材料、膜厚为(65[g·μm·cm－3])/(第2金属材料的密度[g·cm－3])以上的第5电极74；以及包含第3金属材料、膜厚为(65[g·μm·cm－3])/(上述第3金属材料的密度[g·cm－3])以上的第8电极82。
例如，考虑不设置第2电极64的半导体装置。该情况下，由于第1焊料部66和栅极绝缘膜16的距离变短，因此从第1焊料部66产生的α射线进入栅极绝缘膜16，变得容易产生电子－空穴对。空穴残留在栅极绝缘膜16内，导致MOSFET30的阈值电压Vth向更负的一侧变化。
图7是表示本发明者们发现的α射线的穿透长度与材料的密度之间的关系的图。本发明者们使用与物质进行相互作用的力(LET：Linear Energy Transfer，线性能量传递)的能量依存性，对穿透长度进行了研究。然后，发现α射线的穿透长度与材料的密度的倒数存在比例关系。进而，本发明者们发现，通过设置具有由1/(Stopping Power X Density)求出的穿透长度以上的膜厚的电极、更具体来说具有(65[g·μm·cm－3])/(电极的金属材料的密度[g·cm－3])以上的膜厚的电极，从而能够抑制α射线的穿过。这是因为金属材料的密度越高，α射线的能量越容易在电极内被吸收，所以α射线的穿过被抑制。
具体来说，通过将具有(65[g·μm·cm－3])/(第1金属材料的密度[g·cm－3])以上的膜厚的第2电极64设置在第1焊料部66与MOSFET30之间，能够抑制α射线从第1焊料部66向MOSFET30的穿透。由此，能够提供可靠性高的半导体装置100。
关于第5电极74也同样，通过设置含有第2金属材料、膜厚为(65[g·μm·cm－3])/(第2金属材料的密度[g·cm－3])以上的第5电极74，能够抑制α射线从第2焊料部76向MOSFET30的穿透。由此，能够提供可靠性高的半导体装置100。
关于第8电极82也同样，通过设置含有第3金属材料、膜厚为(65[g·μm·cm－3])/(上述第3金属材料的密度[g·cm－3])以上的第8电极82，能够抑制α射线从第3焊料部84向MOSFET30的穿透。由此，能够提供可靠性高的半导体装置100。
另外，例如在是第1层和第2层的层叠膜的情况下，能够通过(65[g·μm·cm－3])/(第1层的密度[g·cm－3])与(65[g·μm·cm－3])/(第2层的密度[g·cm－3])之和来计算优选的膜厚。层叠膜由三层以上构成的情况也是相同的。
即，例如，作为优选的形态可以列举如下的半导体装置，该半导体装置具备：具有第1面2a和第2面2b的半导体基板2；设置于半导体基板2内并具有设置于第1面2a的栅极绝缘膜16的半导体元件30；设置于第1面2a之上、包含第1金属材料的第1电极60；设置于第1电极60之上、包含第2金属材料的第2电极64；设置于第2电极64之上的第1焊料部66；设置于第1焊料部66之上的第3电极68；设置于第1面2a之上、包含第3金属材料的第4电极70；设置于第4电极70之上、包含第4金属材料的第5电极74；设置于第5电极74之上的第2焊料部76；以及设置于第2焊料部76之上的第6电极78，第1电极60的膜厚与第2电极64的膜厚之和为((65[g·μm·cm－3])/(第1金属材料的密度[g·cm－3])+(65[g·μm·cm－3])/(第2金属材料的密度[g·cm－3]))以上，第4电极70的膜厚与第5电极74的膜厚之和为((65[g·μm·cm－3])/(第3金属材料的密度[g·cm－3])+(65[g·μm·cm－3])/(第4金属材料的密度[g·cm－3]))以上。
在半导体基板2的板厚为25μm以下的情况下，设有膜厚t3为(65[g·μm·cm－3])/(第3金属材料的密度[g·cm－3])以上的第8电极82，是特别优选的。这是因为，在半导体基板2的板厚为25μm以下的情况下，α射线容易从特别是第3焊料部84向MOSFET30穿透。该关系特别适用于半导体基板2是Si基板的情况，但并不一定限定于半导体基板2是Si基板的情况。并且，进一步优选的是，在第2面2b与栅极绝缘膜16的距离d1为25μm以下的情况下，设有膜厚t3为(65[g·μm·cm－3])/(第3金属材料的密度[g·cm－3])以上的第8电极82。这是因为，在第2面2b与栅极绝缘膜16的距离d1为25μm以下的情况下，α射线从特别是第3焊料部84向MOSFET30穿透的量变多。
图8是说明本实施方式的半导体装置100的作用效果的图，是示出了半导体装置100的上部的一部分的图。在设第1焊料部66的膜厚为a、设平行于第1面2a的方向上的电极部分65的上表面的长度为b、设垂直于第1面2a的方向上的电极部分的膜厚为c、设平行于第1面2a的方向上的电极部分65与第5电极74之间的距离为d时、(a/b)＜(a+c)/(b+d)的情况下，如图7的点线所示那样，从第1焊料部66与第3电极68相接的部分的附近处的第1焊料部66的部分产生的α射线不穿透到
MOSFET30内地碰撞于第5电极74，因此能够抑制α射线向MOSFET30的穿透。由此，能够提供可靠性高的半导体装置100。
同样，在设第2焊料部76的膜厚为h、设平行于第1面2a的方向上的电极部分75的上表面的长度为i、设垂直于第1面2a的方向上的电极部分75的膜厚为j、设平行于第1面2a的方向上的电极部分75与第2电极64之间的距离为d时、(h/i)＜(h+j)/(i+d)的情况下，从第2焊料部76与第6电极78相接的部分的附近处的第2焊料部76的部分产生的α射线不穿透MOSFET地碰撞于第2电极64，因此能够抑制α射线向MOSFET30的穿透。由此，能够提供可靠性高的半导体装置100。
第1金属材料、第2金属材料、第3金属材料或第4金属材料优选的是，Cu(铜)、Ni(镍)、Al(铝)、Ag(银)、Ti(钛)或W(钨)。
对具有沟槽型的MOSFET的半导体装置进行了本实施方式的记载。由α射线引起的栅极绝缘膜的损坏，对于特别是沟槽型的半导体装置而言成为问题。但是，例如即使是平面型的MOSFET、IGBT，当然，实施方式的内容也优选能够实施。
根据本实施方式的半导体装置100，能够提供可靠性高的半导体装置100。
(第二实施方式)
本实施方式的半导体装置在以下这点与第一实施方式的半导体装置不同：半导体基板还具有设置于第2区域的终端构造(邻接于半导体元件地设置于第1面的终端构造、或设置于半导体基板的端部侧的终端构造)，在设第1焊料部与半导体基板之间的距离为e、设第1焊料部投影于第1面得到的第1部分与终端构造之间的距离为f时，(a/b)＞(a+e)/f。
并且，本实施方式的半导体装置在以下这点与第一实施方式的半导体装置不同：半导体基板还具有设置于第2区域(与半导体元件邻接的第1面)的未设置栅极绝缘膜的第3区域，在设第1焊料部与半导体基板之间的距离为e、设第1焊料部投影于第1面得到的第1部分与第3区域之间的距离为g时，(a/b)＞(a+e)/g。
这里，对于与第一实施方式重复的内容，省略记载。
图9是本实施方式的半导体装置110的主要部分的示意截面图。在设第1焊料部66与半导体基板2之间的距离为e、设第1焊料部66投影于第1面2a得到的第1部分67与终端构造90之间的距离为f时，优选的是(a/b)＞(a+e)/f。这是因为，由于在终端构造90未设置栅极绝缘膜，因此不发生因残留在绝缘膜中的空穴而导致阈值电压Vth向更负的一侧变化这样的问题。
图10是本实施方式的其他形态的半导体装置120的示意截面图。第3区域91是未设置栅极绝缘膜的区域，是例如终端构造，但并不限定于此。此外，在设第1焊料部66投影于第1面2a得到的第1部分67与第3区域91之间的距离为g时，优选的是，(a/b)＞(a+e)/g。
根据本实施方式的半导体装置110以及120，能够提供可靠性高的半导体装置100。
(第三实施方式)
本实施方式的半导体装置在以下这点与第一实施方式以及第二实施方式不同：第2电极投影于第1面2a得到的第2部分与第4电极投影于第1面得到的第3部分相接、或者具有重叠。这里对于与第一实施方式以及第二实施方式重复的点，省略记载。
图11是本实施方式的半导体装置130的主要部分的示意截面图。第2电极64投影于第1面2a得到的第2部分63与第4电极70投影于第1面2a得到的第3部分69具有重叠的部分(重叠)61。另外，第2部分63和第3部分69也可以相接。
通过MOSFET30的驱动，半导体装置130发热。此时，存在未设置电极的、第1电极60与第4电极70之间的绝缘膜52以及绝缘膜54因发热而被破坏这样的问题。
根据本实施方式的半导体装置130，第2电极64投影于第1面2a得到的第2部分63与第4电极70投影于第1面2a得到的第3部分69相接、或者具有重叠。因此，第1电极60与第4电极70之间的绝缘膜52以及绝缘膜54的热变得容易被第2电极64以及第4电极70吸收。因此，能够抑制由发热引起的破坏。
另外，第5电极74投影于第1面2a得到的部分与第1电极60投影于第1面2a得到的部分相接或者具有重叠，也能够优选地使用。
根据本实施方式的半导体装置130，能够提供抑制了由发热引起的破坏的半导体装置。
以上，记载了实施方式。
说明了本发明的若干实施方式及实施例，但这些实施方式及实施例是作为例子而提示的，不意图限定发明的范围。这些新的实施方式能够以其他各种各样的方式实施，在不脱离发明的主旨的范围内，能够进行各种的省略、替换、变更。这些实施方式及其变形包含在发明的范围或主旨中，并且包含在权利要求书所记载的发明及其等价的范围内。

Claims (9)

1.一种半导体装置，其中，具备：
半导体基板，具有第1面和第2面；
半导体元件，设置于上述半导体基板内，具有设置于上述第1面的栅极绝缘膜；
第1电极，设置于上述第1面之上；
第2电极，设置于上述第1电极之上，包含第1金属材料，膜厚为(65[g·μm·cm－3])/(上述第1金属材料的密度[g·cm－3])以上；
第1焊料部，设置于上述第2电极之上；
第3电极，设置于上述第1焊料部之上；
第4电极，设置于上述第1面之上；
第5电极，设置于上述第4电极之上，包含第2金属材料，膜厚为(65[g·μm·cm－3])/(上述第2金属材料的密度[g·cm－3])以上；
第2焊料部，设置于上述第5电极之上；以及
第6电极，设置于上述第2焊料部之上。
2.如权利要求1所述的半导体装置，其中，
上述第2电极具有与上述第1焊料部相比平行于上述第1面地向上述第2电极与上述第5电极之间突出的电极部分，
在设上述第1焊料部的膜厚为a、设平行于上述第1面的方向上的上述电极部分的上表面的长度为b、设垂直于上述第1面的方向上的上述电极部分的膜厚为c、设平行于上述第1面的方向上的上述电极部分与上述第5电极之间的距离为d时，(a/b)＜(a+c)/(b+d)。
3.如权利要求1或2所述的半导体装置，其中，还具备：
第7电极，设置于上述半导体基板的上述第2面；
第3焊料部，设置于上述第7电极与上述半导体基板之间；以及
第8电极，设置于上述第3焊料部与上述半导体基板之间，包含第3金属材料，膜厚为(65[g·μm·cm－3])/(上述第3金属材料的密度[g·cm－3])以上，
上述半导体基板的板厚为25μm以下。
4.如权利要求1或2所述的半导体装置，其中，
上述半导体基板还具有设置于上述半导体基板的端部侧的终端构造，
在设上述第1焊料部与上述半导体基板之间的距离为e、设上述第1焊料部投影到上述第1面得到的第1部分与上述终端构造之间的距离为f时，(a/b)＞(a+e)/f。
5.如权利要求1或2所述的半导体装置，其中，
上述第2电极或上述第5电极具有多个金属层的层叠构造。
6.如权利要求1或2所述的半导体装置，其中，
上述第2电极投影到上述第1面得到的第2部分与上述第4电极投影到上述第1面得到的第3部分相接，或者具有重叠。
7.如权利要求1或2所述的半导体装置，其中，
上述栅极绝缘膜从上述半导体基板的上述第1面向上述第2面的方向延伸。
8.如权利要求1或2所述的半导体装置，其中，
上述第1金属材料以及上述第2金属材料是铜Cu、镍Ni、铝Al、银Ag、钛Ti或钨W。
9.一种半导体装置，其中，具备：
半导体基板，具有第1面和第2面；
半导体元件，设置于上述半导体基板内，具有设置于上述第1面的栅极绝缘膜；
第1电极，设置于上述第1面之上，包含第1金属材料；
第2电极，设置于上述第1电极之上，包含第2金属材料；
第1焊料部，设置于上述第2电极之上；
第3电极，设置于上述第1焊料部之上；
第4电极，设置于上述第1面之上，包含第3金属材料；
第5电极，设置于上述第4电极之上，包含第4金属材料；
第2焊料部，设置于上述第5电极之上；以及
第6电极，设置于上述第2焊料部之上，
上述第1电极的膜厚与上述第2电极的膜厚之和为(65[g·μm·cm－3])/(上述第1金属材料的密度[g·cm－3])+(65[g·μm·cm－3])/(上述第2金属材料的密度[g·cm－3])以上，
上述第4电极的膜厚与上述第5电极的膜厚之和为(65[g·μm·cm－3])/(上述第3金属材料的密度[g·cm－3])+(65[g·μm·cm－3])/(上述第4金属材料的密度[g·cm－3])以上。
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