CN111162064A - Led单元、导引板、led显示器及其制造方法 - Google Patents

Led单元、导引板、led显示器及其制造方法 Download PDF

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Publication number
CN111162064A
CN111162064A CN201811327548.1A CN201811327548A CN111162064A CN 111162064 A CN111162064 A CN 111162064A CN 201811327548 A CN201811327548 A CN 201811327548A CN 111162064 A CN111162064 A CN 111162064A
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China
Prior art keywords
led unit
hole section
plate body
led
guide
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Granted
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CN201811327548.1A
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CN111162064B (zh
Inventor
郭恩卿
米磊
邢汝博
黄秀颀
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Chengdu Vistar Optoelectronics Co Ltd
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Kunshan New Flat Panel Display Technology Center Co Ltd
Kunshan Govisionox Optoelectronics Co Ltd
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Priority to CN201811327548.1A priority Critical patent/CN111162064B/zh
Application filed by Kunshan New Flat Panel Display Technology Center Co Ltd, Kunshan Govisionox Optoelectronics Co Ltd filed Critical Kunshan New Flat Panel Display Technology Center Co Ltd
Priority to PCT/CN2019/093334 priority patent/WO2020093709A1/zh
Priority to EP19882031.8A priority patent/EP3813109A4/en
Priority to JP2021527266A priority patent/JP2021533578A/ja
Priority to KR1020217003532A priority patent/KR20210027469A/ko
Publication of CN111162064A publication Critical patent/CN111162064A/zh
Priority to US17/153,100 priority patent/US20210143305A1/en
Application granted granted Critical
Publication of CN111162064B publication Critical patent/CN111162064B/zh
Priority to JP2022167721A priority patent/JP7367164B2/ja
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Abstract

本申请公开了一种LED单元,该LED单元包括:发光主体;配重元件,其中配重元件设置于发光主体上,以使得当LED单元放入组装流体时,LED单元能够在配重元件的作用下呈预定姿态且沿预定方向移动。本申请还公开了一种LED显示器的制造方法。通过上述方式,本申请能够便于LED单元的巨量转移,提高生产效率。

Description

LED单元、导引板、LED显示器及其制造方法
技术领域
本发明涉及显示技术领域,具体涉及一种LED单元、导引板、LED显示器的及其制造方法。
背景技术
近年来半导体照明技术日趋成熟,成本不断下降,产业规模趋于饱和,这为LED显示技术的发展提供了较好的光源。
Micro-LED(MicroLight Emitting Diode,微型发光二极体)显示技术具有高亮度、高响应速度、低功耗、长寿命等优点,成为人们追求新一代显示技术的研究热点。由于目前Micro-LED难以在玻璃基板上直接生长出来,而需要依靠巨量转移技术转移到玻璃基板上,因此,Micro-LED微小的尺寸和巨大的转移数量会给巨量转移带来了很大的挑战。
目前的巨量转移方式种类过少,不足以满足各种巨量转移需求和LED显示器的制造需求。
发明内容
本申请主要解决的问题是提供一种LED单元、导引板、LED显示器的及其制造方法,能够便于对LED单元的巨量转移,提高生产效率。
为解决上述技术问题,本申请采用的一技术方案是:提供一种LED单元,该LED单元包括:发光主体;配重元件,其中配重元件设置于发光主体上,以使得当LED单元放入组装流体时,LED单元能够在配重元件的作用下呈预定姿态且沿预定方向移动。
为解决上述技术问题,本申请采用的另一技术方案是:提供一种LED显示器,该LED显示器包括接收基板和多个LED单元,接收基板设置有以阵列方式排布的多个安装槽,该LED单元一一对应地安装于安装槽中,LED单元为上述的LED单元。
为解决上述技术问题,本申请采用的又一技术方案是:提供一种LED显示器的制造方法,该方法包括:将接收基板浸泡在组装流体中,其中接收基板设置有以阵列方式排布的多个安装槽;向组装流体中放入LED单元,其中LED单元上设置有配重元件,以使得LED单元在配重元件的作用下呈预定姿态且沿预定方向移动,并在重力作用下落入安装槽。
为解决上述技术问题,本申请采用的又一技术方案是:一种导引板,导引板用于上述的LED显示器的制造方法,导引板设置有多个导引孔,导引孔设置成能够在打开状态和关闭状态之间进行切换。
本申请通过设置LED单元包括:发光主体;配重元件,其中配重元件设置于发光主体上,以使得当LED单元放入组装流体时,LED单元能够在配重元件的作用下呈预定姿态且沿预定方向移动。由于在配重元件的作用下,LED单元可以沿预定方向移动,使得LED单元在流体组装时可以顺利的进入安装槽中,便于对LED单元的巨量转移,避免接收基板过多的二次填补LED单元,提高生产效率。
附图说明
为了更清楚地说明本发明实施例中的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。其中:
图1是本申请第一实施例LED单元的结构示意图;
图2是本申请实施例接收基板的结构示意图;
图3是本申请第二实施例LED单元的结构示意图;
图4是本申请第三实施例LED单元的结构示意图;
图5是本申请实施例一种第二接触电极的俯视结构示意图;
图6是本申请实施例另一种第二接触电极的俯视结构示意图;
图7是本申请第一实施例的LED显示器的制造方法的流程示意图;
图8是本申请第二实施例的LED显示器的制造方法的流程示意图;
图9是本申请第二实施例的LED显示器的制造方法制程示意图;
图10是本申请实施例另一种导引板的结构示意图;
图11是本申请实施例LED显示器的结构示意图。
具体实施方式
下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本申请一部分实施例,而不是全部实施例。基于本申请中的实施例,本领域普通技术人员在没有做出创造性的劳动前提下所获得的所有其他实施例,都属于本申请保护的范围。
请参阅图1,图1是本申请第一实施例LED单元的结构示意图。
在本实施例中,LED单元包括发光主体11和配重元件12,其中配重元件12设置于发光主体11上,以使得当LED单元放入组装流体时,LED单元能够在配重元件12的作用下呈预定姿态且沿预定方向移动。
由于在配重元件12的作用下,LED单元可以沿预定方向移动使得LED单元在流体组装时可以顺利的进入安装槽中,避免接收基板过多的二次填补LED单元,提高生产效率。
可选地,发光主体11可以包括多个层叠设置功能层,在预定姿态下,多个功能层的层叠方向与竖直方向平行。
层叠方向是指垂直于各个功能层之间接触表面的方向。
预定方向可以是竖直向下的方向。在其他实施例中,预定方向可以是其他任意的方向,只要保证LED单元呈预定姿态即可,例如,受到组装流体的影响,LED单元可以是在组装流体中倾斜向下移动。
可选地,发光主体11包括多个层叠设置功能层,在预定姿态下,多个功能层的层叠方向与竖直方向的夹角为预定角度。
可选地,预定角度大于0度且小于30度。在其他实施例中,预定角度可以其他的角度,本申请实施例对此不做限定。
可选地,在一种实施方式中,当LED单元放入组装流体时,在配重元件12的作用下,配重元件12比发光主体11的位置更低,使得配重元件12比发光主体11更加接近接收基板。例如,可通过将配重元件12的密度设置为大于发光主体11的密度来实现。
可选地,在一种实施方式中,当LED单元放入组装流体时,在配重元件12的作用下,发光主体11比配重元件12的位置更低,使得发光主体11比配重元件12更加接近接收基板。例如,可通过将配重元件12的密度设置为小于发光主体11的密度来实现。
通过上述方式,设置配重元件12使LED单元在组装流体中呈预定姿态下落至接收基板,接收基板上的安装槽的开口朝向与预定姿态对应,使得LED单元能够顺利的进入安装槽。
可选地,多个功能层可以包括层叠设置的第一半导体层111、发光层112和第二半导体层113。
应理解,多个功能层的结构不限于上述结构,发光主体11也可以采用其他的LED结构,或者其他电致发光元件的层叠结构。
可选地,第一半导体层111可以为P型半导体层。第二半导体层113可以为N型半导体层。
在其他实施例中,第一半导体层111可以为N型半导体层。相应的,第二半导体层113可以为P型半导体层。本申请实施例对此不做限定。
可选地,配重元件12设置于第一半导体层111或第二半导体层113远离发光层112的一侧。
请结合参阅图2,图2是本申请实施例接收基板的结构示意图。接收基板20可以是放置在水平的放置平面上,接收基板20设置有以阵列方式排布的多个安装槽21,接收基板20上的安装槽21,开口方向可以是垂直于接收基板20的表面。
这种情况下,配重元件12使得当LED单元在组装流体移动时,第一半导体层111、发光层112和第二半导体层113的层叠方向沿竖直方向,从而LED单元能够顺利的进入安装槽21。
不难理解,在接收基板20的放置位置改变或者安装槽21的开口方向改变,导致安装槽21的开口方向不在竖直方向时,可以通过调整配重元件12的设置位置、密度、形状等,使得当LED单元放入组装流体时,LED单元能够在配重元件12的作用下呈预定姿态沿预定方向移动,该预定姿态与安装槽的开口方向相适配,从而使得LED单元能够顺利进入安装槽,即该预定姿态不限于多个功能层的层叠方向与竖直方向平行的姿态。
可选地,LED单元进一步包括第一接触电极14,第一接触电极14设置于第一半导体层111远离发光层112的一侧。配重元件12设置于第一接触电极14远离第一半导体层111的一侧。
可选地,配重元件12的密度大于发光主体11的密度,以使得当LED单元在组装流体中移动时,第一接触电极14朝下,从而使得第一接触电极14相较于发光主体11离接收基板20更近。
可选地,LED单元进一步包括焊接电极15。焊接电极15设置于配重元件12远离第一接触电极14的一侧。焊接电极15通过配重元件12电连接至第一接触电极14。
焊接电极15用于在LED单元落入安装槽21后与接收基板20进行焊接。在其他实施例中,可以不设置焊接电极15直接利用配重元件12与接收基板20进行焊接。
可选地,LED单元进一步包括第二接触电极16,第二接触电极16设置于第二半导体层113远离发光层112的一侧,其中配重元件12的密度进一步大于第二接触电极16的密度。
在本实施例中,第一接触电极14可以为P电极。第二接触电极16可以为N电极。
应理解,在其他实施例中,配重元件12的密度可以小于发光主体11的密度,从而可以使得当LED单元放入组装流体时第二接触电极16朝下。利用第二接触电极16与接收基板进行焊接,本申请对此不做限定。相应的,第一接触电极14可以为N电极,第二接触电极16可以为P电极。
可选地,LED单元进一步包括绝缘保护层17,绝缘保护层17设置于发光主体11的周面上。
绝缘保护层17用于对发光主体11进行保护,以及用于发光主体11与外界的绝缘,防止LED单元出现侧壁漏电通道。
可选地,发光主体11的横截面积大于第一接触电极14的横截面积,使得发光主体11和第一接触电极14处形成台阶T,该绝缘保护层17进一步设置于该台阶T上。
可选地,发光主体11的横截面积大于配重元件12的横截面积。发光主体11的横截面积大于焊接电极15的横截面积。发光主体11的横截面积大于第二接触电极16的横截面积。
可选地,焊接电极15的横截面积、配重元件12的横截面积、第一接触电极14的横截面积、第二接触电极16的横截面积两两相等,且外周面齐平设置。
可选地,发光主体11的横截面、焊接电极15的横截面、配重元件12的横截面、第一接触电极14的横截面、第二接触电极16的横截面均为圆形。与之对应的,安装槽21的横截面也为圆形。
由于LED元件在其各个膜层的层叠方向上各处横截面均为圆形,使得无论LED元件在绕其轴线如何旋转,其横截面始终能与横截面同为圆形安装槽21相吻合。换言之,圆形不具有各向异性,避免导致旋转一定角度后LED元件无法进入安装槽21的问题。例如,方形横截面的LED元件,其在绕其中心旋转一定角度后,很难落入方形的安装槽内。
应理解,在不考虑横截面形状对LED元件转移至安装槽内成功率的影响情况下,可以将LED元件横截面设置为其他的形状,例如方形,只要其设置配重元件能够提高成功率即可,本申请实施例对此不做限定。
在本实施例中,发光主体11在第一半导体层111、发光层112和第二半导体层113层叠方向处处的横截面均相等,且均为圆形。即发光主体11整体呈圆柱形。
在其他实施例中,发光主体11可以呈圆台形。具体参见下文实施例的描述。
请参阅图3,图3是本申请第二实施例LED单元的结构示意图。
在本实施例中,发光主体31整体呈圆台形状。发光主体31中的第一半导体层311、发光层312和第二半导体层313的横截面均为圆形。
第一半导体层311的横截面积小于发光层312的横截面积,发光层312的横截面积小于第二半导体层313的横截面积。
通过这种方式,在配重元件12的作用下,第一接触电极14朝下时,圆台形状的发光主体31横截面积较小的一端朝下,便于LED元件落入安装槽21内。在这种情况下,第一半导体层311可以为P型半导体层,第二半导体层311可以为N型半导体层。对应的第一接触电极14可以为P电极,第二接触电极14可以为N电极。
请参阅图4,图4是本申请第三实施例LED单元的结构示意图。
在本实施例中,发光主体41整体呈圆台形状。发光主体41中的第一半导体层411、发光层412和第二半导体层413的横截面均为圆形。
第一半导体层411的横截面积大于发光层412的横截面积,发光层412的横截面积大于第二半导体层413的横截面积。在这种情况下,第一半导体层411可以为N型半导体层,第二半导体层311可以为P型半导体层。对应的,第一接触电极14可以为N电极,第二接触电极14可以为P电极。
请参阅图5,图5是本申请实施例一种第二接触电极的俯视结构示意图。
可选地,发光层112、212或者312经第二接触电极16出光。在本实施例中,第二接触电极16可以为圆柱形,且第二接触电极16采用透明导电材质。从而可以使得发光层112、212或者312能够顺利的出光,第二接触电极16不会对光线遮挡。
请参阅图6,图6是本申请实施例另一种第二接触电极的俯视结构示意图。
在本实施例中,第二接触电极26可以为圆环形。从而可以使得发光层112、212或者312能够从圆环形的第二接触电极26的中空位置261顺利的出光,第二接触电极26不会对光线遮挡。
在上述任意一实施例中,LED单元的径向尺寸在1微米-100微米之间,轴向尺寸在0.5微米-10微米之间。
请参阅图7,图7是本申请第一实施例的LED显示器的制造方法的流程示意图。
在本实施例中,LED显示器的制造方法可以包括以下步骤:
步骤S11:将接收基板浸泡在组装流体中,其中接收基板设置有以阵列方式排布的多个安装槽。
其中,将接收基板20放入组装流体容器中,向组装流体容器中倒入组装流体,以使接收基板20浸泡在组装流体中。如图2所示,接收基板20上设置有以阵列方式排布的多个安装槽21。接收基板20具体可以为玻璃材质的基板。每一安装槽21对应一个子像素(例如,RGB红绿蓝三色子像素,或者RGBW四色子像素)。
在一种实施方式中,不同颜色的LED单元的尺寸不同,对应颜色的子像素位置的安装槽的尺寸与之匹配,从而可以保证某一种颜色的LED单元顺利的落入该种颜色的安装槽内。
在另一种实施方式中,不同颜色的LED单元的尺寸不同,对应颜色的子像素位置的导引孔打开的尺寸与之匹配,从而可以保证某一种颜色的LED单元顺利的落入该种颜色的安装槽内。
在又一种实施方式中,不同颜色子像素所在位置的安装槽,可以设置相同颜色的LED单元,而在后续制程中在对应颜色的子像素的LED单元上制作对应的光转换层。例如,所有的LED单元都为蓝色LED发出蓝色的激发光,通过光转换层将蓝色的激发光转换成对应的红光、绿光、蓝光或者白光。
步骤S12:向组装流体中放入LED单元,其中LED单元上设置有配重元件,以使得LED单元在配重元件的作用下呈预定姿态沿预定方向移动,并在重力作用下落入安装槽。
其中,向组装流体中放入上述任意一实施例的LED单元。
请参阅图8,图8是本申请第二实施例的LED显示器的制造方法的流程示意图。
在本实施例中,LED显示器的制造方法可以包括以下步骤:
步骤S21:将接收基板放在组装流体容器中,在接收基板上方设置导引板,向组装流体容器中倒入组装流体使组装流体浸没接收基板和导引板,其中接收基板设置有以阵列方式排布的多个安装槽,导引板设置有分别与安装槽对应的导引孔。
其中,如图9所示,图9是本申请第二实施例的LED显示器的制造方法制程示意图。接收基板20设置有以阵列方式排布的多个安装槽21,导引板50设置有分别与安装槽21对应的导引孔51。将接收基板20放在组装流体容器60中,在接收基板20上方设置引导板50使得导引孔51的位置与安装槽21的位置对应。
步骤S22:向组装流体中放入LED单元,其中LED单元上设置有配重元件,以使得LED单元在配重元件的作用下沿呈预定姿态沿预定方向移动,并在重力作用下和经导引孔的导引作用下落入安装槽。
其中,向组装流体中放入上述任意一实施例的LED单元。具体放入的方式是:预先配置LED单元的悬浮液,向组装流体中加入LED单元的悬浮液。
导引孔51设置成能够在打开状态和关闭状态之间进行切换。在打开状态下导引孔51允许LED单元通过,在关闭状态下导引孔51不允许LED单元通过。
向组装流体中放入的LED单元的步骤具体可以为:将导引孔51设置成打开状态;向组装流体中放入LED单元。
向组装流体中放入的LED单元的步骤之后,该方法可以包括:将导引孔51从打开状态切换成关闭状态,并从组装流体中取出接收基板20和导引板50。
可选地,导引板50包括层叠设置的第一板体52和第二板体53,导引孔51划分成位于第一板体52上的第一孔段521和位于第二板体53上的第二孔段531,第一板体52和第二板体53能够相对移动,以使得第一孔段521和第二孔段531彼此连通,进而处于打开状态,或者第一孔段521和第二孔段531彼此错开,进而处于关闭状态。
可选地,第一孔段521位于第二孔段531的上方,且第一孔段521呈倒锥形设置。通过设置倒锥形的第一孔段521上方开口较大,便于接收LED单元。
在步骤S22之后可以进一步包括:将LED单元的焊接电极15与接收基板20焊接。
可选地,具体的焊接方式可以为:将接收基板20放置于回流炉中进行回流焊接,从而将LED单元固定在安装槽21中,完成巨量转移过程。
应理解,导引板设置成可以打开和关闭的方式不限于上述结构,可以采用其他的结构,本申请实施例对此不做限定。
请参阅图10,图10是本申请实施例另一种导引板的结构示意图。例如,导引板60包括依次层叠设置的第一板体61、间隔板62、第二板体63,导引孔64划分成位于第一板体61上的第一孔段611和位于第二板体63上的第二孔段631,间隔板62与第一板体61和第二板体63能够相对移动,以使得第一孔段611和第二孔段631彼此连通,进而处于打开状态,或者第一孔段611和第二孔段631彼此错开,进而处于关闭状态。
请参阅图11,图11是本申请实施例LED显示器的结构示意图。
在本实施例中,LED显示器包括接收基板71和多个LED单元72,接收基板71设置有以阵列方式排布的多个安装槽,LED单元72一一对应地安装于安装槽中,LED单元为上述任意一实施例的LED单元。
本申请通过设置LED单元包括:发光主体;配重元件,其中配重元件设置于发光主体上,以使得当LED单元放入组装流体时,LED单元能够在配重元件的作用下呈预定姿态且沿预定方向移动。由于在配重元件的作用下,LED单元可以沿预定方向移动,使得LED单元在流体组装时可以顺利的进入安装槽中,避免接收基板过多的二次填补LED单元,提高生产效率。
以上仅为本申请的实施例,并非因此限制本申请的专利范围,凡是利用本申请说明书及附图内容所作的等效结构或等效流程变换,或直接或间接运用在其他相关的技术领域,均同理包括在本申请的专利保护范围内。

Claims (19)

1.一种LED单元,其特征在于,所述LED单元包括:
发光主体;
配重元件,其中所述配重元件设置于所述发光主体上,以使得当所述LED单元放入组装流体时,所述LED单元能够在所述配重元件的作用下呈预定姿态且沿预定方向移动。
2.根据权利要求1所述的LED单元,其特征在于,所述发光主体包括多个层叠设置功能层,在所述预定姿态下,多个功能层的层叠方向与竖直方向平行。
3.根据权利要求1所述的LED单元,其特征在于,所述发光主体包括多个层叠设置功能层,在所述预定姿态下,多个功能层的层叠方向与竖直方向的夹角为预定角度。
4.根据权利要求3所述的LED单元,其特征在于,所述预定角度大于0度且小于30度。
5.根据权利要求2或3所述的LED单元,其特征在于,所述多个功能层包括层叠设置的第一半导体层、发光层和第二半导体层,其中所述配重元件设置于所述第一半导体层或所述第二半导体层远离所述发光层的一侧。
6.根据权利要求5所述的LED单元,其特征在于,所述LED单元进一步包括第一接触电极,所述第一接触电极设置于所述第一半导体层远离所述发光层的一侧,所述配重元件设置于所述第一接触电极远离所述第一半导体层的一侧且所述配重元件的密度大于所述发光主体的密度,以使得当所述LED单元放入组装流体时,所述第一接触电极朝下。
7.根据权利要求6所述的LED单元,其特征在于,所述LED单元进一步包括焊接电极,所述焊接电极设置于所述配重元件远离所述第一接触电极的一侧,并通过所述配重元件电连接至所述第一接触电极。
8.根据权利要求6所述的LED单元,其特征在于,所述LED单元进一步包括第二接触电极,所述第二接触电极设置于所述第二半导体层远离所述发光层的一侧,其中所述配重元件的密度进一步大于所述第二接触电极的密度。
9.一种LED显示器,其特征在于,所述LED显示器包括接收基板和多个LED单元,所述接收基板设置有以阵列方式排布的多个安装槽,所述LED单元一一对应地安装于所述安装槽中,所述LED单元为权利要求1-8任意一项所述的LED单元。
10.一种LED显示器的制造方法,其特征在于,所述方法包括:
将接收基板浸泡在组装流体中,其中所述接收基板设置有以阵列方式排布的多个安装槽;
向所述组装流体中放入LED单元,其中所述LED单元上设置有配重元件,以使得所述LED单元在所述配重元件的作用下呈预定姿态且沿预定方向移动,并在重力作用下落入所述安装槽。
11.根据权利要求10所述的方法,其特征在于,所述将接收基板浸泡在组装流体中的步骤进一步包括:
在所述接收基板上方设置导引板,其中所述导引板设置有分别与所述安装槽对应的导引孔,以使得所述LED单元经所述导引孔的导引作用下落入所述安装槽。
12.根据权利要求11所述的方法,其特征在于,所述导引孔设置成能够在打开状态和关闭状态之间进行切换;
所述向所述组装流体中放入所述的LED单元的步骤进一步包括:将所述导引孔设置成打开状态;
所述向所述组装流体中放入所述的LED单元的步骤之后,进一步包括:将所述导引孔从打开状态切换成关闭状态,并从所述组装流体中取出所述接收基板和所述导引板。
13.根据权利要求12所述的方法,其特征在于,所述导引板包括层叠设置的第一板体和第二板体,所述导引孔划分成位于所述第一板体上的第一孔段和位于所述第二板体上的第二孔段,所述第一板体和所述第二板体能够相对移动,以使得所述第一孔段和所述第二孔段彼此连通,进而处于所述打开状态,或者所述第一孔段和所述第二孔段彼此错开,进而处于所述关闭状态。
14.根据权利要求12所述的方法,其特征在于,所述导引板包括依次层叠设置的第一板体、间隔板、第二板体,所述导引孔划分成位于所述第一板体上的第一孔段和位于所述第二板体上的第二孔段,所述间隔板与所述第一板体和所述第二板体能够相对移动,以使得所述第一孔段和所述第二孔段彼此连通,进而处于所述打开状态,或者所述第一孔段和所述第二孔段彼此错开,进而处于所述关闭状态。
15.根据权利要求13或14所述的方法,其特征在于,所述第一孔段位于所述第二孔段的上方,且所述第一孔段呈倒锥形设置。
16.一种导引板,其特征在于,所述导引板用于权利要求10-15任意一项所述的制造方法,所述导引板设置有多个导引孔,所述导引孔设置成能够在打开状态和关闭状态之间进行切换。
17.根据权利要求16所述的导引板,其特征在于,所述导引板包括层叠设置的第一板体和第二板体,所述导引孔划分成位于所述第一板体上的第一孔段和位于所述第二板体上的第二孔段,所述第一板体和所述第二板体能够相对移动,以使得所述第一孔段和所述第二孔段彼此连通,进而处于所述打开状态,或者所述第一孔段和所述第二孔段彼此错开,进而处于所述关闭状态。
18.根据权利要求16所述的导引板,其特征在于,所述导引板包括依次层叠设置的第一板体、间隔板、第二板体,所述导引孔划分成位于所述第一板体上的第一孔段和位于所述第二板体上的第二孔段,所述间隔板与所述第一板体和所述第二板体能够相对移动,以使得所述第一孔段和所述第二孔段彼此连通,进而处于所述打开状态,或者所述第一孔段和所述第二孔段彼此错开,进而处于所述关闭状态。
19.根据权利要求17或18所述的导引板,其特征在于,所述第一孔段位于所述第二孔段的上方,且所述第一孔段呈倒锥形设置。
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Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040222357A1 (en) * 2002-05-22 2004-11-11 King David Andrew Optical excitation/detection device and method for making same using fluidic self-assembly techniques
US20060051517A1 (en) * 2004-09-03 2006-03-09 Eastman Kodak Company Thermally controlled fluidic self-assembly method and support
CN1893062A (zh) * 1993-12-17 2007-01-10 加利福尼亚大学董事会 制造自装配微结构的方法
CN104508843A (zh) * 2012-04-20 2015-04-08 伦塞勒工艺研究所 发光二极管及其封装方法
CN107425101A (zh) * 2017-07-11 2017-12-01 华灿光电(浙江)有限公司 一种微型发光二极管芯片巨量转移的方法
CN107452840A (zh) * 2017-07-14 2017-12-08 华灿光电(浙江)有限公司 一种led面板及其制作方法
CN107833525A (zh) * 2016-09-15 2018-03-23 伊乐视有限公司 发光显示器的流体组装的系统和方法
CN108682312A (zh) * 2018-05-12 2018-10-19 汕头超声显示器技术有限公司 一种led阵列装置的制造方法
CN109643709A (zh) * 2016-06-23 2019-04-16 伊乐视有限公司 在流体组装中提供不对称稳定性的二极管

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6780696B1 (en) * 2000-09-12 2004-08-24 Alien Technology Corporation Method and apparatus for self-assembly of functional blocks on a substrate facilitated by electrode pairs
JP4281044B2 (ja) * 2002-06-18 2009-06-17 財団法人名古屋産業科学研究所 微小部品の配置方法
JP3978189B2 (ja) * 2004-01-23 2007-09-19 松下電器産業株式会社 半導体装置の製造方法及びその製造装置
JP2006113258A (ja) * 2004-10-14 2006-04-27 Sony Corp 部品実装装置及び部品実装方法
CN103456729B (zh) * 2013-07-26 2016-09-21 利亚德光电股份有限公司 发光二极管显示屏
US9825202B2 (en) * 2014-10-31 2017-11-21 eLux, Inc. Display with surface mount emissive elements
US9368549B1 (en) * 2015-09-02 2016-06-14 Nthdegree Technologies Worldwide Inc. Printed mesh defining pixel areas for printed inorganic LED dies
CN109671670B (zh) * 2017-10-16 2020-11-03 行家光电股份有限公司 微元件的巨量排列方法及系统
KR102116728B1 (ko) * 2018-10-25 2020-05-29 엘지전자 주식회사 반도체 발광소자의 자가조립 장치 및 방법

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1893062A (zh) * 1993-12-17 2007-01-10 加利福尼亚大学董事会 制造自装配微结构的方法
US20040222357A1 (en) * 2002-05-22 2004-11-11 King David Andrew Optical excitation/detection device and method for making same using fluidic self-assembly techniques
US20060051517A1 (en) * 2004-09-03 2006-03-09 Eastman Kodak Company Thermally controlled fluidic self-assembly method and support
CN104508843A (zh) * 2012-04-20 2015-04-08 伦塞勒工艺研究所 发光二极管及其封装方法
CN109643709A (zh) * 2016-06-23 2019-04-16 伊乐视有限公司 在流体组装中提供不对称稳定性的二极管
CN107833525A (zh) * 2016-09-15 2018-03-23 伊乐视有限公司 发光显示器的流体组装的系统和方法
CN107425101A (zh) * 2017-07-11 2017-12-01 华灿光电(浙江)有限公司 一种微型发光二极管芯片巨量转移的方法
CN107452840A (zh) * 2017-07-14 2017-12-08 华灿光电(浙江)有限公司 一种led面板及其制作方法
CN108682312A (zh) * 2018-05-12 2018-10-19 汕头超声显示器技术有限公司 一种led阵列装置的制造方法

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