CN111162051A - Power terminal, power module packaging structure and packaging method - Google Patents

Power terminal, power module packaging structure and packaging method Download PDF

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Publication number
CN111162051A
CN111162051A CN201911337841.0A CN201911337841A CN111162051A CN 111162051 A CN111162051 A CN 111162051A CN 201911337841 A CN201911337841 A CN 201911337841A CN 111162051 A CN111162051 A CN 111162051A
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China
Prior art keywords
terminal
power
pin
frame
welding
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CN201911337841.0A
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Chinese (zh)
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CN111162051B (en
Inventor
戴小平
齐放
李道会
李想
吴义伯
王彦刚
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Hunan Guoxin Semiconductor Technology Co Ltd
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Hunan Guoxin Semiconductor Technology Co Ltd
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Priority to CN201911337841.0A priority Critical patent/CN111162051B/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/492—Bases or plates or solder therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/49—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions wire-like arrangements or pins or rods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/60—Protection against electrostatic charges or discharges, e.g. Faraday shields
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601—Structure
    • H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49113—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Inverter Devices (AREA)

Abstract

The invention provides a power terminal, a power module packaging structure and a packaging method, relates to the field of power modules, and is used for realizing low-inductance design of an application circuit. The power terminal comprises an output terminal and an input terminal, wherein the input terminal comprises a positive terminal and a negative terminal which are arranged in a stacked mode, and the positive terminal and the negative terminal are parallel to each other and have the same width. The positive terminal and the negative terminal are arranged in a laminated mode and are symmetrical in parallel as much as possible, so that currents with the same size and opposite directions can be formed between the positive power terminal and the negative power terminal in the circulating current of the power device, magnetic fields are cancelled, and stray inductance of a loop is reduced.

Description

Power terminal, power module packaging structure and packaging method
Technical Field
The present invention relates to the field of power module technologies, and in particular, to a power terminal, a power module package structure, and a package method.
Background
The power module is widely applied to the fields of inverter welding machines, wind power generation, switching power supplies, traction transmission, new energy automobiles and the like. In a large-current application occasion, a plurality of power modules can be connected in parallel to form a module, so that the applied current level is improved. The power module packaging is to integrally package one or more power chips, ceramic lining plates, leads, power terminals, signal terminals, insulating pouring sealant, shells and other auxiliary bodies together so as to improve the usability, the service life and the reliability of the power module. With the continuous development of power conversion circuits, the switching frequency thereof is continuously increased, and the voltage and current levels are continuously increased, so that the package of the power module must consider the high-voltage and high-current working conditions, the module parallel connection mode, and the suppression of stray inductance inside the module.
The power terminal serves as an important component of the power module and plays a role of inputting and outputting signals in the circulation current of the power device. The existing power terminal does not consider the suppression of stray inductance inside the module, thereby influencing the performance of the circuit.
Disclosure of Invention
The invention provides a power terminal, a power module packaging structure and a packaging method, which are used for realizing the low-inductance design of an application circuit.
According to a first aspect of the present invention, there is provided a power terminal comprising an output terminal and an input terminal, the input terminal comprising a positive terminal and a negative terminal arranged in a stack, the positive terminal and the negative terminal being parallel to each other and having the same width.
In one embodiment, the positive terminal is provided with a first pin and a second pin, and the first pin and the second pin are symmetrical about a center line of the positive terminal.
In one embodiment, the negative terminal is provided with a third pin and a fourth pin, and the third pin and the fourth pin are symmetrical about a center line of the negative terminal;
the first pin and the third pin are symmetrically arranged, and the second pin and the fourth pin are symmetrically arranged.
In one embodiment, a support frame is disposed between the positive and negative terminals for supporting and electrically isolating the positive and negative terminals.
In one embodiment, the support frame includes a spacer disposed between the positive terminal and the negative terminal, and positioning clips are disposed on the spacer and connected to the positive terminal and the negative terminal, respectively.
In one embodiment, the support frame is provided with receptacles for connecting the positive and negative power ports to an external circuit.
According to a second aspect of the present invention, the present invention provides a power module package structure including the power terminal described above, which includes a power module, and the output terminal and the input terminal are respectively located at two sides of the power module.
In one embodiment, the power module further comprises a casing for packaging the power module, and a groove structure is arranged on the outer wall of the casing to increase the creepage distance.
In one embodiment, the housing further comprises a frame disposed outside the supporting frame and cooperating with the supporting frame, and a top cover disposed on an upper end of the frame, wherein the frame and the supporting frame can be used as a fixing clamp after cooperating.
In one embodiment, the device further comprises a liner plate, wherein the output terminal is connected with the liner plate through a first pin and a second pin in a welding mode; the input terminal is connected with the lining plate through a third pin and a fourth pin in a welding mode;
the upper surface of the backing plate at least comprises three welding areas which are electrically isolated from each other, and the welding areas are used for being connected with the chip.
In one embodiment, the chip includes a power chip, and a diode chip;
the collector of the power chip and the cathode of the diode chip are respectively connected with a first welding area on the lining plate in a welding way, and the first welding area is also connected with the input terminal in a welding way;
the anode of the emitter of the power chip and the anode of the diode chip are respectively connected with the second welding area on the lining plate through bonding wires;
and the gate pole of the power chip is connected with a third welding area on the lining plate through a bonding wire, and the third welding area is also connected with a gate pole resistor through the bonding wire.
In one embodiment, the bond wires are made of aluminum, copper, silver, or aluminum wire wrapped with a copper core.
In one embodiment, the backing includes a first backing and a second backing, with the first backing and the second backing being connected by substrate-level bonding wires.
In one embodiment, the display device further comprises a substrate, and the lining plate and the frame are fixed on the upper surface of the substrate.
In one embodiment, the signal terminal further comprises a signal terminal, and the pin of the signal terminal is connected with the liner plate in a welding mode.
According to three aspects of the present invention, the present invention provides a packaging method of the above power module, which includes the following steps:
s100: connecting the chip with the lining plate and completing lining plate level lead bonding;
s200: connecting the lining plate with the substrate and completing substrate-level lead bonding;
s300: after the signal terminal is arranged on the frame, the frame is fixed on the substrate, and the pin of the signal terminal is connected with the lining plate in a welding way;
s400: after the input terminal is arranged on the supporting frame, the supporting frame is fixedly connected with the frame, and the input terminal is connected with the lining plate in a welding way;
s500: after the output terminal is arranged on the frame, the output terminal is connected with the lining plate in a welding way;
s600: and injecting insulating potting adhesive into the shell, and mounting the top cover at the upper end of the frame after the insulating potting adhesive is solidified.
In one embodiment, in step S300, the frame is used as a welding fixture to weld the pins of the signal terminals to the substrate.
In one embodiment, in step S400, the support frame and the frame are used as welding jigs to weld the input terminal to the backing plate.
In one embodiment, in step S500, the frame is used as a welding jig to weld the output terminal to the backing plate.
Compared with the prior art, the invention has at least one of the following advantages:
(1) the positive terminal and the negative terminal are arranged in a laminated mode and are symmetrical in parallel as much as possible, so that currents with the same size and opposite directions can be formed between the positive power terminal and the negative power terminal in the circulating current of the power device, magnetic fields are cancelled, and stray inductance of a loop is reduced.
(2) Through setting up output terminal and input terminal respectively in power module's both sides, be favorable to realizing carrying out the parallelly connected of multimode through low inductance composite busbar, reduce the stray inductance of current conversion return circuit.
(3) The frame and the supporting frame can be used as a fixing clamp after being matched, so that an additional clamp is not required to be arranged, the ultrasonic bonding step is simpler, the efficiency is higher, the cost for additionally designing an ultrasonic bonding grinding tool is saved, and the stability of a packaging structure is improved.
Drawings
The invention will be described in more detail hereinafter on the basis of embodiments and with reference to the accompanying drawings.
Fig. 1 is a schematic perspective view of a power terminal according to an embodiment of the present invention;
FIG. 2 is a schematic perspective view of a power module according to an embodiment of the present invention;
fig. 3 is a schematic perspective view of a power module according to an embodiment of the present invention after a housing is hidden;
FIG. 4 is a schematic perspective view of a liner in an embodiment of the invention;
fig. 5 is a perspective view of a liner plate according to another embodiment of the present invention.
In the drawings, like components are denoted by like reference numerals. The figures are not drawn to scale.
Detailed Description
The invention will be further explained with reference to the drawings.
As shown in fig. 1, according to a first aspect of the present invention, the present invention provides a power terminal 3, which includes an input terminal 32, wherein the input terminal 32 includes a positive terminal 324 and a negative terminal 323 which are stacked, and the positive terminal 324 and the negative terminal 323 are parallel to each other and have the same or similar width. By laminating the positive terminal 324 and the negative terminal 323, the positive terminal 324 and the negative terminal 323 are symmetrical in parallel as much as possible, so that currents with the same magnitude and opposite directions are formed between the positive power terminal and the negative power terminal in the circulating current of the power device, magnetic fields are cancelled, and stray inductance of a loop is reduced.
It will be appreciated that the power terminal 3 also includes an output terminal 31 in order to form an input-output loop.
Further, as shown in fig. 1, the positive terminal 324 is provided with a first pin 325a and a second pin 352b, and the first pin 325a and the second pin 352b are symmetrical with respect to a center line of the positive terminal 324; the negative terminal 323 is provided with a third pin 325c and a fourth pin 352d, and the third pin 325c and the fourth pin 352d are symmetrical with respect to the center line of the negative terminal 323.
Further, the first pin 325a and the third pin 325c are symmetrically disposed, and the second pin 352b and the fourth pin 352d are symmetrically disposed. The pins symmetrically arranged are beneficial to improving the current-sharing property of the package and reducing stray inductance.
Further, a support frame 53 is provided between the positive terminal 324 and the negative terminal 323, and the support frame 53 is used to support and electrically isolate the positive terminal 324 and the negative terminal 323. Specifically, the support frame 53 includes a spacer 531 disposed between the positive terminal 324 and the negative terminal 323, and the spacer 531 is provided with positioning clips 54, and the positioning clips 54 are connected to the positive terminal 324 and the negative terminal 323, respectively.
The support frame 53 is provided in the sense that, first, the positive terminal 324 and the negative terminal 323 can be fixed by the positioning clip 54 on the support frame 53, so that the positive terminal 324 and the negative terminal 323 can be combined with the support frame 53 into a whole; second, since the spacer 531 is located between the positive terminal 324 and the negative terminal 323, it achieves electrical insulation of the positive terminal 324 and the negative terminal 323 while supporting the two; thirdly, during welding, the supporting frame 53 can be used as a fixing clamp for ultrasonic bonding between the leads and the lining plate 2, so that an additional clamp is not required, the ultrasonic bonding step is simpler, and the efficiency is higher.
Further, insertion holes 55a and 55b are provided on the support frame 53, wherein the insertion holes 55a and 55b are used to connect the positive power port 322 and the negative power port 321 with an external circuit. The insertion holes 55a and 55b may be provided as screw holes.
As shown in fig. 2 to 5, according to a second aspect of the present invention, the present invention provides a power module package structure, which includes the power terminal 3, wherein the output terminal 31 and the input terminal 32 are respectively located at two sides of the power module, which is beneficial to implementing multi-module parallel connection through a low-inductance composite busbar, and reducing stray inductance of a commutation loop.
In the application of a power device, stray inductance exists in a commutation loop, the problem of switching-off overvoltage caused by the stray inductance limits the maximum voltage and the maximum negative current change rate of a direct current bus, and the switching speed is influenced. The power module is used as a key ring in the commutation loop, and the packaging design of the power module directly influences the performance of the circuit. Especially under the condition of large-current operation, a plurality of power modules are often required to be connected in parallel for use, so as to improve the current grade which can be borne by the switch. According to the power module packaging structure, the output terminal 31 and the input terminal 32 are respectively arranged on the two sides of the power module, so that the requirement of a multi-module parallel structure is fully considered in the packaging process of the power module, and the requirement of a low-inductance composite bus bar is met.
In addition, the power module packaging structure further comprises a shell 5 for packaging the power module, and a groove structure is arranged on the outer wall of the shell 5 to increase the creepage distance, so that the power module packaging structure can be suitable for application under high-voltage conditions. As shown in fig. 2, the four side walls and one top wall of the housing 5 are provided with the groove 54, the invention does not limit the structure and the arrangement manner of the groove 54, and those skilled in the art can perform corresponding arrangement as required.
Specifically, the housing 5 further includes a frame 51 disposed outside the supporting frame 53 and cooperating with the supporting frame 53, and a top cover 52 disposed on the upper end of the frame 51, and the frame 51 and the supporting frame 53 can be used as a fixing clamp after cooperating with each other, so that no additional clamp is required, the ultrasonic bonding step is simpler, the efficiency is higher, the cost of additionally designing the ultrasonic bonding tool is saved, and the stability of the package structure is improved.
The housing 5 is made of plastic to fulfill the electrical insulating function of the housing 5.
In addition, the power module package structure of the present invention further includes a substrate 2, and the output terminal 31 is connected to the substrate 2 by welding through a first pin 325a and a second pin 352 b; the input terminal 32 is soldered to the backing plate 2 through the third pin 325c and the fourth pin 352 d.
The backing plate 2 may be a ceramic backing plate with a metal layer provided on its upper surface. The upper surface of the backing plate 2 comprises at least three soldering areas which are electrically isolated from each other and are used for connecting with a chip. The lining panel 2 comprises a first lining panel 21 and a second lining panel 22, the first lining panel 21 and the second lining panel 22 being used to achieve different functions.
Further, the chips include a power chip 2122 and a diode chip 2121 disposed on the first substrate 21 and a power chip 2222 and a diode chip 2221 disposed on the second substrate 22.
As shown in fig. 4, as an exemplary embodiment of the first liner plate 21, the upper surface thereof includes 8 soldering regions electrically isolated from each other, i.e., soldering regions 2111, 2112, 2113, 2114, 2115, 2116, 2117, and 2118, respectively. It is to be understood that the number and/or configuration of the above-described weld regions should not be construed as limiting the present invention.
As shown in fig. 5, as an exemplary embodiment of the second liner 22, the upper surface thereof includes 7 soldering regions, which are electrically isolated from each other, namely soldering regions 2211, 2212, 2213, 2214, 2216 and 2217. It is to be understood that the number and/or configuration of the above-described weld regions should not be construed as limiting the present invention.
First, the first liner 21 will be explained.
The collector of the power chip 2122 and the cathode of the diode chip 2121 are soldered to the soldering region 2113 (i.e., the first soldering region) on the first substrate 21, and since the lower surface of the first substrate 21 is soldered to the substrate 1, the above soldering not only achieves mechanical connection of the power chip 2122 and the diode chip 2121 to the first substrate 21, but also ensures electrical connection of the collector of the power chip 2122 and the cathode of the diode chip 2121 to the soldering region 2113 of the first substrate 21.
In addition, the welding region 2113 is also connected to the input terminal 32 by ultrasonic welding to achieve mechanical and electrical connection, and an external circuit can be accessed through the input terminal 32.
The emitter of the power chip 2122 and the anode of the diode chip 2121 are connected to the bonding regions 2111 and 2112 (i.e., the second bonding region) on the first substrate 2 by metal bonding wires 2131, respectively, and are electrically connected to an external circuit through the output terminal 31.
The gate of the power chip 2122 is connected to the soldering regions 2115 and 2117 (i.e. the third soldering region) on the first substrate 2 via the metal bonding wire 2132, and then connected to the gate resistor 2123 via the metal bonding wire 2133, and then electrically connected to the gate control terminal of the external circuit via the soldering region 2114.
The second liner 22 will be explained below.
The collector of the power chip 2222 and the cathode of the diode chip 2221 are respectively soldered to the soldering region 2211 (i.e., the first soldering region) on the second substrate 22, and since the lower surface of the second substrate 22 is soldered to the substrate 1, the above-mentioned soldering not only achieves mechanical connection of the power chip 2222 and the diode chip 2221 to the second substrate 22, but also ensures electrical connection of the collector of the power chip 2222 and the cathode of the diode chip 2221 to the soldering region 2212 on the second substrate 22.
In addition, the welding region 2212 is mechanically and electrically connected with the output terminal 31 by ultrasonic welding, and then is connected to an external circuit through the output terminal 31.
The emitter of the power chip 2222 and the anode of the diode chip 2221 are connected to the bonding area 2211 (second bonding area) on the second substrate 22 through metal bonding wires 2231, respectively, and then electrically connected to an external circuit through the input terminal 32.
The gate of the power chip 2222 is connected to the bonding areas 2213 and 2216 (i.e. the third bonding area) on the substrate 2 through the metal bonding wire 2232, and then connected to the gate resistor 2223 through the metal bonding wire 2233, and then electrically connected to the gate control terminal of the external circuit through the bonding area 2217.
The first liner plate 21 and the second liner plate 22 are connected through a substrate-level bonding wire 6, and the welding areas 2111 and 2112 on the first liner plate 21 are respectively connected with the welding area 2212 on the second liner plate 22, so that the input and output ends form a complete loop.
Wherein, the welding area 2113 on the first liner plate 21 is the welding area with the largest area on the first liner plate 21; similarly, the welding area 2211 on the second liner 22 is the largest area welding area on the second liner 22.
Due to the inconsistency of the control loop stray parameters of different chips in the module, the problem of abnormal parallel current sharing of the multi-power chips is caused, and the heat dissipation performance and the normal work of the module are seriously influenced. Therefore, the invention enables the stray parameters of the control loops of different chips to be consistent as much as possible by setting the lining plate 2 in a partitioning manner, reduces the path length of the main current loop and improves the current sharing performance in the application of the power device.
In addition, the lining plate 2 can ensure that the path lengths of auxiliary emitter loops of the parallel power chips are approximately consistent, so that the consistency of stray parameters of all loops is improved, and the current equalization of the power module is facilitated.
After the welding between the chip and the lining plate 2 is finished, the wire bonding at the lining plate level can be finished.
The bonding wire (or metal bonding wire) is made of aluminum, copper, silver or an aluminum wire wrapped with a copper core.
It is understood that the power module package structure of the present invention further includes a substrate 1, and the backing plate 2 and the frame 51 are fixed on the upper surface of the substrate 1. The backing plate 2 is connected with the upper surface of the substrate 1 by welding to realize substrate-level wire bonding. The pins 41 of the signal terminals 4 are soldered to the substrate 2.
The number of the first substrate 21, the second substrate 22, the chips, the power terminals 3, and the signal terminals 4 is not limited in the present invention, and may be set as needed by those skilled in the art.
According to the third aspect of the invention, when the power module is packaged, the lining plate-level wire bonding is firstly carried out, then the substrate-level wire bonding is carried out, then the ultrasonic bonding of the signal terminal 4 is carried out, and finally the ultrasonic bonding of the power terminal 3 is carried out, so that the ultrasonic bonding of the power terminal 3 and the signal terminal 4 and the installation of the shell 5 can be skillfully combined together, the cost of additionally designing an ultrasonic bonding grinding tool is saved, and the stability of a packaging structure is improved.
Specifically, the packaging method of the invention comprises the following steps:
s100: the chip is attached to the submount 2 and the submount 2 level wire bonding is completed.
First, the collector of the power chip 2122 and the cathode of the diode chip 2121 are soldered to the soldering region 2113 of the first backing plate 21, respectively; and the collector of the power chip 2222 and the cathode of the diode chip 2221 are soldered to the soldering regions 2212 of the second substrate 22, respectively.
Next, a liner level wire bonding is performed. In the first backing plate 21, the emitter of the power chip 2122 and the anode of the diode chip 2121 are connected to the welding regions 2111 and 2112 on the first backing plate 21 through metal bonding wires, and the gate 2141 of the power chip 2122 is connected to the welding regions 2115 and 2117 on the first backing plate 21 through a metal bonding wire 2132, and is then connected to the gate resistance 2123 through a bonding wire 2133. In the second substrate board 22, the emitter of the power chip 2222 and the anode of the diode chip 2221 are connected to the soldering area 2212 on the second substrate board 22 through wire bonding, respectively, and the gate 2241 of the power chip 2222 is connected to the soldering areas 2213 and 2216 on the second substrate board 22 through the metal bonding wire 2232, and then connected to the gate resistor 2223 through the bonding wire 2233.
S200: the backing plate 2 is attached to the substrate 1 and substrate-level wire bonding is completed.
S300: after the signal terminals 4 are mounted on the frame 51, the frame 51 is fixedly bonded to the substrate 1, and the leads 41 of the signal terminals 4 are soldered to the backing plate 2.
The frame 51 is used as a welding fixture, and the pins 41 of the signal terminals 4 are welded to the backing plate 2.
S400: after the input terminals 32 are mounted on the supporting frame 53, the supporting frame 53 is fixedly connected to the frame 51, and the input terminals 32 are connected to the backing plate 2 by welding.
Wherein, the support frame 53 and the frame 51 are used as welding clamps to connect the input terminal 32 and the lining plate 2 by welding
S500: after the output terminal 31 is mounted on the frame 51, the output terminal 31 is connected to the backing 2 by welding.
The frame 51 is used as a welding jig to weld the output terminal 31 to the backing plate 2.
S600: and injecting insulating pouring sealant into the shell 5, and solidifying the insulating pouring sealant under a high-temperature condition. The top cover 52 is then mounted on the upper end of the frame 51, completing the packaging process.
Note that the "width" in the present invention is a distance in the X-axis direction in fig. 1.
While the invention has been described with reference to a preferred embodiment, various modifications may be made and equivalents may be substituted for elements thereof without departing from the scope of the invention. In particular, the technical features mentioned in the embodiments can be combined in any way as long as there is no structural conflict. It is intended that the invention not be limited to the particular embodiments disclosed, but that the invention will include all embodiments falling within the scope of the appended claims.

Claims (19)

1. A power terminal, characterized in that the power terminal (3) comprises an output terminal (31) and an input terminal (32), the input terminal (32) comprises a positive terminal (324) and a negative terminal (323) which are arranged in a stack, the positive terminal (324) and the negative terminal (323) are parallel to each other and have the same width.
2. The power terminal of claim 1, wherein the positive terminal (324) has a first pin (325a) and a second pin (352b) disposed thereon, the first pin (325a) and the second pin (352b) being symmetrical about a center line of the positive terminal (324).
3. The power terminal according to claim 2, wherein a third pin (325c) and a fourth pin (352d) are arranged on the negative terminal (323), and the third pin (325c) and the fourth pin (352d) are symmetrical about a center line of the negative terminal (323);
the first pin (325a) and the third pin (325c) are symmetrically disposed, and the second pin (352b) and the fourth pin (352d) are symmetrically disposed.
4. The power terminal according to claim 2, wherein a support frame (53) is disposed between the positive terminal (324) and the negative terminal (323), and the support frame (53) is used for supporting and electrically isolating the positive terminal (324) and the negative terminal (323).
5. The power terminal according to claim 4, wherein the support frame (53) comprises a spacer (531) arranged between the positive terminal (324) and the negative terminal (323), a positioning clip (54) is arranged on the spacer (531), and the positioning clip (54) is connected with the positive terminal (324) and the negative terminal (323) respectively.
6. The power terminal as claimed in claim 5, wherein the support frame (53) is provided with insertion holes (55a, 55b), and the insertion holes (55a, 55b) are used for connecting the positive power port (322) and the negative power port (321) with an external circuit.
7. A power module package structure comprising the power terminal of any one of claims 1-6, characterized by comprising a power module, the output terminal (31) and the input terminal (32) being located on both sides of the power module, respectively.
8. The power module package structure according to claim 7, further comprising a housing (5) for housing the power module, wherein a groove structure is provided on an outer wall of the housing (5) to increase a creepage distance.
9. The power module package structure according to claim 8, wherein the housing (5) further comprises a frame (51) disposed outside the supporting frame (53) and cooperating with the supporting frame (53), and a top cover (52) disposed on an upper end of the frame (51), wherein the frame (51) and the supporting frame (53) cooperate to serve as a fixing clamp.
10. The power module package structure according to claim 9, further comprising a substrate (2), wherein the output terminal (31) is connected to the substrate (2) by welding through a first pin (325a) and a second pin (352 b); the input terminal (32) is connected with the lining plate (2) through a third pin (325c) and a fourth pin (352d) in a welding mode;
the upper surface of the lining plate (2) at least comprises three welding areas which are mutually and electrically isolated, and the welding areas are used for being connected with a chip.
11. The power module package structure of claim 10, wherein the chip comprises a power chip (2122, 2222) and a diode chip (2121, 2221);
the collectors of the power chips (2122, 2222) and the cathodes of the diode chips (2121, 2221) are respectively connected with a first welding area on the backing plate (2) in a welding way, and the first welding area is also connected with the input terminal (32) in a welding way;
the emitter of the power chip (2122, 2222) and the anode of the diode chip (2121, 2221) are respectively connected with the second welding area on the liner plate (2) through bonding wires;
the gate of the power chip (2122, 2222) is connected with a third welding area on the lining plate (2) through a bonding wire, and the third welding area is also connected with a gate resistor (2123, 2223) through a bonding wire.
12. The power module package structure of claim 11, wherein the bond wires are made of aluminum, copper, silver, or aluminum wire wrapped with a copper core.
13. The power module package structure according to claim 12 or 11, wherein the backing (2) comprises a first backing (21) and a second backing (22), the first backing (21) and the second backing (22) being connected by a substrate-level bonding wire (6).
14. The power module package structure according to any one of claims 10 to 12, further comprising a substrate (1), wherein the backing plate (2) and the bezel (51) are both fixed on an upper surface of the substrate (1).
15. The power module package structure according to any one of claims 10 to 12, further comprising a signal terminal (4), wherein a pin (41) of the signal terminal (4) is connected to the backing plate (2) by soldering.
16. A method of packaging a power module according to any one of claims 7 to 15, comprising the steps of:
s100: connecting the chip with the lining plate (2) and completing the lining plate (2) level lead bonding;
s200: connecting the lining plate (2) with the substrate (1) and completing substrate-level lead bonding;
s300: after the signal terminal (4) is arranged on the frame (51), the frame (51) is fixed on the substrate (1), and the pin (41) of the signal terminal (4) is connected with the lining plate (2) in a welding way;
s400: after the input terminal (32) is arranged on the supporting frame (53), the supporting frame (53) is fixedly connected with the frame (51), and the input terminal (32) is connected with the lining plate (2) in a welding way;
s500: after the output terminal (31) is arranged on the frame (51), the output terminal (31) is connected with the lining plate (2) in a welding way;
s600: and injecting insulating potting adhesive into the shell (5), solidifying the insulating potting adhesive, and mounting the top cover (52) at the upper end of the frame (51).
17. The method for packaging a power module according to claim 16, wherein in step S300, the frame (51) is used as a welding fixture to weld the leads (41) of the signal terminals (4) to the substrate (2).
18. The method for packaging a power module according to claim 16 or 17, wherein in step S400, the input terminal (32) is connected to the backing plate (2) by welding using the support frame (53) and the frame (51) as welding jigs.
19. The method for packaging a power module according to claim 16 or 17, wherein in step S500, the frame (51) is used as a welding jig to weld the output terminal (31) to the backing plate (2).
CN201911337841.0A 2019-12-23 2019-12-23 Power terminal, power module packaging structure and packaging method Active CN111162051B (en)

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CN113270328A (en) * 2021-04-30 2021-08-17 深圳芯能半导体技术有限公司 Packaging process of IGBT power device
CN113270373A (en) * 2021-04-30 2021-08-17 深圳芯能半导体技术有限公司 IGBT power device and shell thereof

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CN113270373A (en) * 2021-04-30 2021-08-17 深圳芯能半导体技术有限公司 IGBT power device and shell thereof
CN113270328B (en) * 2021-04-30 2022-04-08 深圳芯能半导体技术有限公司 Packaging process of IGBT power device

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