CN110998811B - 一种薄膜晶体管及其制造方法与薄膜晶体管阵列 - Google Patents
一种薄膜晶体管及其制造方法与薄膜晶体管阵列 Download PDFInfo
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Abstract
本发明提供了一种薄膜晶体管及其制造方法与薄膜晶体管阵列,所述制造方法包括:在栅电极层上形成栅极绝缘层;在所述栅极绝缘层上连续沉积金属氧化物半导体层和刻蚀保护层;在所述栅极绝缘层和所述刻蚀保护层上形成金属电极层;对所述金属电极层进行刻蚀形成源电极层和漏电极层;对所述刻蚀保护层进行刻蚀露出所述金属氧化物半导体层。本申请通过在金属氧化物半导体层上形成一层刻蚀保护层,刻蚀金属电极层和ITO层时,通过刻蚀保护层保护金属氧化物半导体层,从而避免金属氧化物半导体层被刻蚀液刻蚀影响薄膜晶体管的性能,在保护金属氧化物半导体层时无需另外增加保护层,制造方法简单、成本低。
Description
技术领域
本发明属于半导体光电子技术领域,尤其涉及一种薄膜晶体管及其制造方法与薄膜晶体管阵列。
背景技术
随着显示科技的发展,各种显示设备如液晶显示(LCD)设备、有机电致发光显示(OLED)设备、或无机电致发光显示(Mini-LED,Micro-LED)设备已经得到广泛应用。而液晶显示(LCD)设备中的每个液晶像素点都由集成在像素点后面的薄膜晶体管(TFT)来驱动,从而可以做到高速度、高亮度、高对比度显示屏信息,是目前最好的彩色显示设备之一。
TFT包括半导体层,它具有掺有高浓度掺杂物的源/漏区及在源/漏区之间形成的沟道区,布置在对应于沟道区上并与半导体层绝缘的栅极,以及与每个源/漏区接触的源/漏极。现有TFT中常常使用金属氧化物半导体材料作为栅极沟道材料,金属氧化物半导体材料包括In-Ga氧化物、In-Zn氧化物、或者In-M-Zn氧化物(M可以是Al、Ga、Y、La、Ce、Sn等),通常使用由铟、镓、锌和氧构成的非晶金属氧化物半导体(In-Ga-Zn-O,简称IGZO)。IGZO的金属氧化物半导体上会进一步形成源-漏电极,在对源-漏电极进行刻蚀时,由于刻蚀剂会破坏IGZO的氧化物半导体,从而影响整个TFT性能。
因此,现有技术有待于进一步的改进。
发明内容
鉴于上述现有技术中的不足之处,本发明的目的在于提供一种薄膜晶体管及其制造方法与薄膜晶体管阵列,克服现有技术中在多源-漏电极进行刻蚀时,由于刻蚀剂会破坏IGZO的金属氧化物半导体,从而影响整个TFT性能的缺陷。
本发明所公开的第一实施例为一种薄膜晶体管的制造方法,其中,所述制造方法包括:
在栅电极层上形成栅极绝缘层;
在所述栅极绝缘层上连续沉积金属氧化物半导体层和刻蚀保护层;
在所述栅极绝缘层和所述刻蚀保护层上形成金属电极层;
对所述金属电极层进行刻蚀形成源电极层和漏电极层;
对所述刻蚀保护层进行刻蚀露出所述金属氧化物半导体层。
所述的薄膜晶体管的制造方法,其中,所述对所述金属电极层进行刻蚀形成源电极层和漏电极层的步骤具体包括:
在所述金属电极层上形成光阻材料层,并图案化所述光阻材料层形成光阻层;
刻蚀所述金属电极层,将所述光阻层的图案转移至所述金属电极层上形成源电极层和漏电极层。
所述的薄膜晶体管的制造方法,其中,所述在所述金属电极层上形成光阻材料层,并图案化所述光阻材料层形成光阻层的步骤具体包括:
在所述金属电极层上形成光阻材料层;
对所述光阻材料层进行曝光再显影,去除与所述刻蚀保护层接触的所述金属电极层上的光阻材料层形成光阻层。
所述的薄膜晶体管的制造方法,其中,所述对所述金属电极层进行刻蚀形成源电极层和漏电极层的步骤之后还包括:
去除所述金属电极层表面的光阻层;
在所述源电极层、所述漏电极层以及所述栅电极沟道上形成ITO层。
所述的薄膜晶体管的制造方法,其中,所述在所述源电极层、所述漏电极层以及所述栅电极沟道上形成ITO层的步骤之后还包括:
在所述ITO层上形成光阻材料层,并图案化所述光阻材料层形成光阻层;
刻蚀所述ITO层,将所述光阻层的图案转移至所述ITO层。
所述的薄膜晶体管的制造方法,其中,所述对所述刻蚀保护层进行刻蚀露出所述金属氧化物半导体层的步骤之后还包括:
在所述源电极层、所述漏电极层以及所述栅电极沟道上形成保护层。
本发明所公开的第二实施例为一种薄膜晶体管,其中,包括:
栅电极层;
位于所述删电极层上的栅极绝缘层;
位于所述栅极绝缘层上的金属氧化物半导体层;
位于所述金属氧化物半导体层上的刻蚀保护层;
位于所述栅极绝缘层上并彼此分隔设置在所述刻蚀保护层两端的源电极层和漏电极层。
所述的薄膜晶体管,其中,所述刻蚀保护层位于所述金属氧化物半导体层远离所述栅电极层的表面上,所述刻蚀保护层未被刻蚀前完全覆盖所述金属氧化物半导体层。
所述的薄膜晶体管,其中,还包括位于所述漏电极层和所述栅极绝缘层上的ITO层。
所述的薄膜晶体管,其中,还包括位于所述源电极层、漏电极层、金属氧化物半导体层以及所述ITO层上的保护层。
所述的薄膜晶体管,其中,所述保护层为有机材料;所述保护层的厚度为2~4μm。
本发明所公开的第三实施例为一种薄膜晶体管阵列,其中,至少包括上述所述的薄膜晶体管。
所述的薄膜晶体管阵列,其中,还包括存储电容、金属交迭区以及衬底接触孔。
有益效果,本发明提供了一种薄膜晶体管及其制造方法与薄膜晶体管阵列,通过在金属氧化物半导体层上形成一层刻蚀保护层,刻蚀金属电极层和ITO层时,通过刻蚀保护层保护金属氧化物半导体层,从而避免金属氧化物半导体层被刻蚀液刻蚀影响薄膜晶体管的性能,在保护金属氧化物半导体层时无需另外增加保护层,制造方法简单、成本低。
附图说明
图1是本发明提供的一种薄膜晶体管的制造方法的较佳实施例的流程图;
图2是本发明提供的一种薄膜晶体管的制造方法的制程示意图;
图3是本发明所提供的薄膜晶体管的结构示意图;
图4是本发明所提供的薄膜晶体管阵列的结构示意图;
图5是本发明所提供的薄膜晶体管阵列的制程示意图。
具体实施方式
为使本发明的目的、技术方案及优点更加清楚、明确,以下参照附图并举实施例对本发明进一步详细说明。应当理解,此处所描述的具体实施例仅仅用以解释本发明,并不用于限定本发明。
由于现有技术中刻蚀源电极层和漏电极层时,由于刻蚀剂会破坏金属氧化物半导体层,从而影响整个TFT的性能。为了解决上述问题,本发明实施例一中提供了一种薄膜晶体管的制造方法。
请参照图1和图2,图1是本发明提供的一种薄膜晶体管的制造方法的较佳实施例的流程图;图2是本发明提供的一种薄膜晶体管的制造方法的制程示意图。结合图1和图2,在一具体实施例中,所述薄膜晶体管的制造方法包括以下步骤:
S1、在栅电极层11上形成栅极绝缘层12。
在一具体实施方式中,制造TFT时首先需要选择材料作为TFT的栅电极层11,作为栅电极层11的材料可以为金属材料,例如铜、铝、钨、金、银等,导电半导体材料如掺杂的多晶硅等。然后在所述栅电极层11上形成一层栅极绝缘层12,作为所述栅极绝缘层12的材料主要为无机材料,例如氧化物材料如二氧化硅等,或氮化物材料如氮化硅等。在所述栅电极层11上形成栅极绝缘层12的方法可以采用沉积或涂布的方式形成,如采用物理气相沉积(PVD)、化学气相沉积(CVD)或涂布机涂布。在一具体实施例中,采用等离子体化学气相在栅电极层11上形成一层栅极绝缘层12。
请继续参阅图1和图2,在一具体实施方式中,所述薄膜晶体管的制造方法还包括以下步骤:
S2、在所述栅极绝缘层12上连续沉积金属氧化物半导体层13和刻蚀保护层14。
在一具体实施方式中,在所述栅电极层11上形成栅极绝缘层12后,继续在所述栅极绝缘层12上连续沉积形成金属氧化物半导体层13和刻蚀保护层14,其中,所述刻蚀保护层14完全覆盖所述金属氧化物半导体层13,以保护所述金属氧化物半导体层13在形成源漏电极时不被刻蚀剂刻蚀掉。所述金属氧化物半导体层13可以为金属氧化物,如In-Ga氧化物、In-Zn氧化物、In-M-Zn氧化物等,其中M为Al、Ga、Y、La等中的一种,或者化合物半导体如SiGe、GaAs等。在一具体实施例中,所述金属氧化物半导体层13为由铟、镓、锌、铝、锡和氧构成的非晶金属氧化物半导体(In-Ga-Zn-O,简称IGZO),所述IGZO膜厚度为
在一具体实施方式中,由于金属氧化物半导体层13上需要通过刻蚀形成栅电极沟道,湿刻蚀法使用的刻蚀液如硝酸、磷酸和醋酸的混合酸、草酸,干刻蚀法如Cl2等离子刻蚀等均会刻蚀金属氧化物半导体层13。为了使金属氧化物半导体层13在刻蚀时不被影响,本实施例中在金属氧化物半导体层13上沉积一层刻蚀保护层14,所述刻蚀保护层14可以为不被刻蚀液刻蚀掉的任意金属层,如钛、钨、钼钨合金等。在一具体实施例中,所述刻蚀保护层14为钛金属层,主要是考虑钛金属层作为刻蚀栅电极沟道的保护层时可以较好的保护金属氧化物半导体层13,并且形成的栅电极沟道易于控制。此外,一般来说用于保护金属氧化物半导体层13的刻蚀保护层14越薄越好,但是太薄在刻蚀过程中不利于金属氧化物半导体层13的保护,因此本实施例中控制刻蚀保护层14的厚度为在一具体实施例中为
请继续参阅图1和图2,在一具体实施方式中,所述薄膜晶体管的制造方法还包括以下步骤:
S3、在所述栅极绝缘层12和所述刻蚀保护层14上形成金属电极层15。
在一具体实施方式中,本实施例在栅极绝缘层12上依次沉积金属氧化物半导体层13和刻蚀保护层14后,进一步在所述栅极绝缘层12和所述刻蚀保护层14上形成金属电极层15,其中所述金属电极层15完全覆盖所述刻蚀保护层14和所述栅极绝缘层12。所述金属电极层15为两层金属层,包括第一金属层151和第二金属层152,在一具体实施例中,所述第一金属层151为铝金属层,第二金属层152为钼金属层,其中,铝金属层作为薄膜晶体管的主要线路导线,其直接与刻蚀保护层14接触,且铝的阻值低,有利于薄膜晶体管的制备并且无污染。进一步地,作为主要线路导线的第一金属层151厚度大于第二金属层152的厚度,所述第一金属层151厚度为第二金属层152厚度为在所述刻蚀保护层14和栅极绝缘层12上形成金属电极层15的方法包括沉积法、涂布法和溅射法等,在一具体实施例中,采用溅射法在刻蚀保护层14和栅极绝缘层12上形成金属电极层15。
请继续参阅图1和图2,在一具体实施方式中,所述薄膜晶体管的制造方法还包括以下步骤:
S4、对所述金属电极层15进行刻蚀形成源电极层18和漏电极层19。
在一具体实施方式中,在栅极绝缘层12和刻蚀保护层14上形成金属电极层15后,由于有刻蚀保护层14对金属氧化物半导体层13进行保护,因此可以直接通过刻蚀液刻蚀所述金属电极层15,刻蚀时只需要刻蚀掉与金属氧化物半导体层13即刻蚀保护层14接触的金属电极层15,而保留两端的金属电极层15以形成源电极层18和漏电极层19。
具体实施时,刻蚀方法包括湿刻蚀法和干刻蚀法,而本实施例中对金属电极层15通过刻蚀液进行刻蚀,即采用湿刻蚀法进行刻蚀。在一具体实施例中,所述刻蚀液为硝酸、磷酸及醋酸的混合酸溶液,由于钛金属不会被刻蚀液刻蚀掉,因此可以很好的保护刻蚀保护层14下面的金属氧化物半导体层13,通过该混合溶液对金属电极层15进行刻蚀可以得到纵宽比较好的源电极层18和漏电极层19。
在一具体实施方式中,所述步骤S4具体包括:
S41、在所述金属电极层上形成光阻材料层,并图案化所述光阻材料层形成光阻层;
S42、刻蚀所述金属电极层,将所述光阻层的图案转移至所述金属电极层上形成源电极层和漏电极层。
在一具体实施方式中,本实施例在栅极绝缘层12和所述刻蚀保护层14上形成金属电极层15后,进一步在所述金属电极层15上形成光阻材料层,并图案化所述光阻材料层形成光阻层20,其中,所述光阻材料层由不被所述刻蚀剂刻蚀的材料形成。对所述光阻材料层进行图案化处理形成光阻层20后,刻蚀所述金属电极层15,由于刻蚀剂只会对没有光阻层20的区域进行刻蚀,而有光阻层20的区域由于受到光阻层20保护而不会被刻蚀掉,从而将光阻层20的图案转移至所述金属电极层15上,进而形成源电极层18和漏电极层19。
在一具体实施方式中,所述步骤S41进一步包括步骤:
S411、在所述金属电极层上形成光阻材料层;
S412、对所述光阻材料层进行曝光再显影,去除与所述刻蚀保护层接触的所述金属电极层上的光阻材料层形成光阻层。
在一具体实施方式中,首先利用涂布法在所述金属电极层15上形成光阻材料层,然后利用曝光机通过掩膜曝光再显影,去除与所述刻蚀保护层14接触的所述金属电极层15上的光阻材料层形成光阻层20。即对所述金属电极层15进行图案化处理后,与所述刻蚀保护层14接触的所述金属电极层15上没有光阻层20,而在所述刻蚀保护层14两端有光阻层20的保护,在后续步骤中对所述金属电极层15进行刻蚀时,与所述刻蚀保护层14直接接触的金属电极层15上由于没有光阻层20的保护而直接被刻蚀掉,而在所述刻蚀保护层14两端的金属电极层15由于被所述光阻层20保护没有被刻蚀,从而在所述刻蚀保护层14两端形成源电极层18和漏电极层19。在一具体实施例中,所述光阻层20厚度为1.5~2μm。
在一具体实施方式中,所述步骤S412之后还包括步骤:
S413、去除所述金属电极层15表面的光阻层;
S414、在所述源电极层18、所述漏电极层19以及所述栅电极沟道上形成ITO层17。
具体实施时,由于薄膜晶体管需要与其它部件连接以协同驱动液晶像素,如存储电容、像素电容等。因此在金属氧化物半导体层13两端形成源电极层18和漏电极层19后,还进一步在所述源电极层18、所述漏电极层19以及所述栅电极沟道上形成ITO层17,通过ITO层17连接薄膜晶体管与存储电容。前述步骤中提到刻蚀金属电极层15形成源电极层18和漏电极层19前在金属电极层15上涂覆光阻层20,因此在形成ITO层17之前,需要利用光阻剥离设备去除金属电极层15表面的光阻层20。然后在源电极层18、漏电极层19以及栅电极沟道上形ITO层17。
在一具体实施方式中,所述步骤S414之后还包括步骤:
S415、在所述ITO层17上形成光阻材料层,并图案化所述光阻材料层形成光阻层20;
S416、刻蚀所述ITO层17,将所述光阻层20的图案转移至所述ITO层17。
在一具体实施方式中,为了避免源电极层18、漏电极层19与栅电极沟道之间发生短路现象,在源电极层18、漏电极层19和栅电极沟道20上形成ITO层17后,需要进一步通过刻蚀剂将不必要的ITO层17刻蚀掉。为了去除不必要的ITO层17,发明人通过与前述步骤对金属电极层1进行刻蚀的步骤类似。首先在ITO层17上形成光阻材料层,并对所述光阻材料层进行曝光再显影以图案化所述光阻材料层形成光阻层。然后刻蚀所述ITO层17,有光阻层的ITO层17仍然保留,而没有光阻层保护的ITO层17则被去除,从而将需要位置的ITO层17保留下来。
在一具体实施方式中,采用湿刻蚀法对所述ITO层17进行刻蚀,在一具体实施例中,所述刻蚀剂为草酸,虽然草酸也可以刻蚀金属氧化物半导体层13,但由于此时金属氧化物半导体层13仍然被刻蚀保护层14完全覆盖,而草酸不能对刻蚀保护层14进行刻蚀,因此刻蚀保护层14除了能够在刻蚀金属电极层15时起到保护作用,在刻蚀ITO层17时刻蚀保护层14也同样可以对所述金属半导体氧化层13起到保护作用。
请继续参阅图1和图2,在一具体实施方式中,所述薄膜晶体管的制造方法还包括以下步骤:
S5、对所述刻蚀保护层14进行刻蚀露出所述金属氧化物半导体层13。
在一具体实施方式中,刻蚀保护层14是用于保护金属氧化物半导体层13不被刻蚀掉,在对金属电极层15和ITO层17刻蚀结束后为了在源电极层18和漏电极层19之间形成栅电极沟道,需要进一步将所述刻蚀保护层14去掉以露出金属氧化物半导体层13。
具体实施时,前述步骤中提到刻蚀方法包括湿刻蚀法和干刻蚀法,本实施例中通过干刻蚀法去除刻蚀保护层14以露出金属氧化物半导体层13,因此本实施例中的刻蚀保护层14除了需要满足不被刻蚀液刻蚀掉外,还需要满足能够被干刻蚀法刻蚀掉。在一具体实施例中,通过BCl3/Cl2对所述刻蚀保护层14进行等离子刻蚀露出所述金属氧化物半导体层13。主要是因为BCl3/Cl2对钛金属层有很好的刻蚀性,而不会刻蚀源电极层18和漏电极层19上的钼金属层和铝金属层。在这个过程中,虽然BCl3/Cl2等离子也可以对金属氧化物半导体层13进行刻蚀,但由于刻蚀保护层14完全被金属氧化物半导体层13覆盖,需要刻蚀完刻蚀保护层14后才能刻蚀金属氧化物半导体层13,通过控制刻蚀时间可以控制刻蚀保护层14被刻蚀完成后,金属氧化物半导体层13仅被刻蚀以内,前面提到金属氧化物半导体层13的厚度为即使被刻蚀掉金属氧化物半导体层的厚度仍然有
请继续参阅图1和图2,在一具体实施方式中,所述薄膜晶体管的制造方法还包括以下步骤:
S6、在所述源电极层18、所述漏电极层19以及所述栅电极沟道上形成保护层。
在一具体实施方式中,对所述刻蚀保护层14进行刻蚀露出所述金属氧化物半导体层13后,还需要在所述源电极层18、所述漏电极层19以及所述栅极沟道上形成保护层16,所述保护层16一方面可以保护源电极层18、漏电极层19以及栅电极沟道,另一方面可以对薄膜晶体管进行定位。所述保护层16的材料为有机材料,厚度为2~4μm,所述保护层16可以通过光刻胶涂布曝光显影方法形成。
在一具体实施方式中,本发明还提供一种薄膜晶体管,所述薄膜晶体管采用上述制造方法制造而成。如图3所示,为本发明提供的薄膜晶体管的结构示意图,其中薄膜晶体管1包括栅电极层11,栅极绝缘层12、金属氧化物半导体层13、刻蚀保护层14、源电极层18、漏电极层19、ITO层17以及保护层16。
其中,栅电极层11被栅极绝缘层12完全覆盖,金属氧化物半导体层13位于所述栅极绝缘层12远离栅电极层11的表面,且栅极绝缘层12在栅电极层11上的正投影落在栅电极层11上;刻蚀保护层14位于所述金属氧化物半导体层13远离栅电极层11的表面上,所述刻蚀保护层14在未被刻蚀前完全覆盖所述金属氧化物半导体层13,且其在栅电极层11上的正投影与金属氧化物半导体层13在栅电极层11上的正投影重合;源电极层18和漏电极层19位于所述栅极绝缘层12远离栅电极层11的表面,且其分别位于金属氧化物半导体层13和刻蚀保护层14两端;所述源电极层18与所述漏电极层19之间通过刻蚀金属电极层15形成栅电极沟道;所述薄膜晶体管1上还形成ITO层17,所述ITO层17用于和存储电容2连接。实际应用过程中,当给栅电极层11施加电压时,栅压在栅极绝缘层12中产生电场,电力线由栅电极层11指向金属氧化物半导体层13表面,并在表面处产生电荷,随着栅电压增加,金属氧化物半导体层13由耗净层转变为电子积累层,形成反型层,当达到强反型时,源电极层18和漏电极层19间在电压的作用下会有载流子通过栅极沟道,源漏电压进一步增大达到开启电源,从而驱动液晶显示设备中的像素。
在一具体实施方式中,本发明还提供了一种薄膜晶体管阵列,所述薄膜晶体管阵列的结构示意图如图4所示,并且本发明还提供了所示薄膜晶体管阵列的制程示意图如图5所示。所示薄膜晶体管阵列除包括上述所述的薄膜晶体管1外,还包括存储电容2、金属交迭区3、衬底接触孔4。
其中,所述薄膜晶体管1的结构与上述所述薄膜晶体管结构相同,具体结构如上所述。所述存储电容2由第二栅极绝缘层21、栅极绝缘层12、金属电极层15、ITO层17以及保护层16组成。其中,所述栅极绝缘层12完全覆盖所述第二栅极绝缘层21;所述栅极绝缘层12上远离所述第二栅极绝缘层21的表面设置有金属电极层15;所述金属电极层15上远离所述栅极绝缘层12的表面上设置有ITO层17,所述ITO层17用于与所述薄膜晶体管1连接;所述ITO层17上远离所述金属电极层15的表面还设置有保护层16,所述保护层16用于保护和定位所述存储电容2。所示存储电容2的制造方法与前述薄膜晶体管1的制造方法对应,在栅电极层11上形成栅极绝缘层12的同时在第二栅极绝缘层21上形成栅极绝缘层12,然后在栅极绝缘层12上形成金属电极层15,对所述金属电极层15进行图案化处理使得与所述第二栅极绝缘层21上的栅极绝缘层12接触的金属电极层15被光阻层20保护而保留下来;然后在金属电极层15上形成ITO层17,对ITO层17进行图案化处理使得存储电容2上与薄膜晶体管1连接的ITO层17被保留下来,并在ITO层17和金属电极层15上沉积保护层16,从而形成存储电容2。
在一具体实施方式中,所述衬底接触孔4由第四栅极绝缘层41、栅极绝缘层12和ITO层17组成。其中,所述栅极绝缘层12设置在所述第四栅极绝缘层41上,并且与所述第四栅极绝缘层41接触的栅极绝缘层12被刻蚀露出第四栅极绝缘层41,所述ITO层17设置在所述第四栅极绝缘层41和栅极绝缘层12上。所述衬底接触孔4的制造过程与前述薄膜晶体管1的制造方法对应,在前述步骤S4之后,进一步对所述第四栅极绝缘层41上的栅极绝缘层12进行刻蚀以露出第四栅极绝缘层41;然后在第四栅极绝缘层41和栅极绝缘层12上沉积ITO层17,以用于与存储电容2连接,从而形成衬底接触孔4。
综上所述,本发明提供了一种薄膜晶体管及其制造方法与薄膜晶体管阵列,所述制造方法包括:在栅电极层上形成栅极绝缘层;在所述栅极绝缘层上连续沉积金属氧化物半导体层和刻蚀保护层;在所述栅极绝缘层和所述刻蚀保护层上形成金属电极层;对所述金属电极层进行刻蚀形成源电极层和漏电极层;对所述刻蚀保护层进行刻蚀露出所述金属氧化物半导体层。本申请通过在金属氧化物半导体层上形成一层刻蚀保护层,刻蚀金属电极层和ITO层时,通过刻蚀保护层保护金属氧化物半导体层,从而避免金属氧化物半导体层被刻蚀液刻蚀影响薄膜晶体管的性能,在保护金属氧化物半导体层时无需另外增加保护层,制造方法简单、成本低。
应当理解的是,本发明的系统应用不限于上述的举例,对本领域普通技术人员来说,可以根据上述说明加以改进或变换,所有这些改进和变换都应属于本发明所附权利要求的保护范围。
Claims (12)
1.一种薄膜晶体管的制造方法,其特征在于,所述制造方法包括步骤:
在栅电极层上形成栅极绝缘层;
在所述栅极绝缘层和所述刻蚀保护层上形成金属电极层;
对所述金属电极层进行刻蚀形成源电极层和漏电极层;所述金属电极层通过硝酸、磷酸及醋酸的混合酸溶液进行刻蚀;
所述对所述金属电极层进行刻蚀形成源电极层和漏电极层的步骤之后包括:
在所述源电极层和所述漏电极层上形成ITO层;
所述在所述源电极层和所述漏电极层上形成ITO层的步骤之后还包括:
在所述ITO层上形成光阻材料层,并图案化所述光阻材料层形成光阻层;
刻蚀所述ITO层,将所述光阻层的图案转移至所述ITO层;
对所述刻蚀保护层进行刻蚀露出所述金属氧化物半导体层。
2.根据权利要求1所述的薄膜晶体管的制造方法,其特征在于,所述对所述金属电极层进行刻蚀形成源电极层和漏电极层的步骤具体包括:
在所述金属电极层上形成光阻材料层,并图案化所述光阻材料层形成光阻层;
刻蚀所述金属电极层,将所述光阻层的图案转移至所述金属电极层上形成源电极层和漏电极层。
3.根据权利要求2所述的薄膜晶体管的制造方法,其特征在于,所述在所述金属电极层上形成光阻材料层,并图案化所述光阻材料层形成光阻层的步骤具体包括:
在所述金属电极层上形成光阻材料层;
对所述光阻材料层进行曝光再显影,去除与所述刻蚀保护层接触的所述金属电极层上的光阻材料层形成光阻层。
4.根据权利要求3所述的薄膜晶体管的制造方法,其特征在于,所述对所述金属电极层进行刻蚀形成源电极层和漏电极层的步骤之后还包括:
去除所述金属电极层表面的光阻层。
5.根据权利要求1所述的薄膜晶体管的制造方法,其特征在于,所述对所述刻蚀保护层进行刻蚀露出所述金属氧化物半导体层的步骤之后还包括:
在所述源电极层和所述漏电极层上形成保护层。
7.一种采用如权利要求1~6任一项所述的薄膜晶体管的制造方法制造而成的薄膜晶体管,其特征在于,包括:
栅电极层;
位于所述栅 电极层上的栅极绝缘层;
位于所述栅极绝缘层上的金属氧化物半导体层;
位于所述栅极绝缘层上并彼此分隔设置在所述刻蚀保护层两端的源电极层和漏电极层;所述源电极层和漏电极层通过硝酸、磷酸及醋酸的混合酸溶液对金属电极层进行刻蚀得到;所述金属电极层包括第一金属层和第二金属层,所述第一金属层为铝金属层,所述第二金属层为钼金属层,所述第一金属层直接与所述刻蚀保护层接触,所述第一金属层厚度为所述第二金属层厚度为
位于所述漏电极层和所述栅极绝缘层上的ITO层;所述ITO层的制造方法为:在所述源电极层和所述漏电极层上形成ITO层,在所述ITO层上形成光阻材料层,并图案化所述光阻材料层形成光阻层,刻蚀所述ITO层,将所述光阻层的图案转移至所述ITO层。
8.根据权利要求7所述的薄膜晶体管,其特征在于,所述刻蚀保护层位于所述金属氧化物半导体层远离所述栅电极层的表面上,所述刻蚀保护层未被刻蚀前完全覆盖所述金属氧化物半导体层。
9.根据权利要求7所述的薄膜晶体管,其特征在于,还包括位于所述源电极层、漏电极层、金属氧化物半导体层以及所述ITO层上的保护层。
10.根据权利要求9所述的薄膜晶体管,其特征在于,所述保护层为有机材料;所述保护层的厚度为2~4μm。
11.一种薄膜晶体管阵列,其特征在于,至少包括如权利要求7所述的薄膜晶体管。
12.根据权利要求11所述的薄膜晶体管阵列,其特征在于,还包括存储电容、金属交迭区以及衬底接触孔。
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