CN110993505B - Preparation method of semiconductor structure based on silicon carbide substrate and semiconductor structure - Google Patents
Preparation method of semiconductor structure based on silicon carbide substrate and semiconductor structure Download PDFInfo
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- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 title claims abstract description 82
- 229910010271 silicon carbide Inorganic materials 0.000 title claims abstract description 82
- 239000000758 substrate Substances 0.000 title claims abstract description 76
- 239000004065 semiconductor Substances 0.000 title claims abstract description 34
- 238000002360 preparation method Methods 0.000 title claims abstract description 15
- 239000010408 film Substances 0.000 claims abstract description 28
- 229910005191 Ga 2 O 3 Inorganic materials 0.000 claims abstract description 26
- 239000000463 material Substances 0.000 claims abstract description 26
- 239000010409 thin film Substances 0.000 claims abstract description 21
- 238000004544 sputter deposition Methods 0.000 claims description 45
- 238000000034 method Methods 0.000 claims description 41
- 239000013077 target material Substances 0.000 claims description 26
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims description 22
- 230000008569 process Effects 0.000 claims description 21
- 238000000137 annealing Methods 0.000 claims description 15
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 15
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 13
- 239000001301 oxygen Substances 0.000 claims description 13
- 229910052760 oxygen Inorganic materials 0.000 claims description 13
- 229910052786 argon Inorganic materials 0.000 claims description 11
- 238000005477 sputtering target Methods 0.000 claims description 11
- 238000004519 manufacturing process Methods 0.000 claims description 10
- 230000015572 biosynthetic process Effects 0.000 claims description 7
- 239000012300 argon atmosphere Substances 0.000 claims description 3
- 238000006243 chemical reaction Methods 0.000 claims description 2
- 239000012299 nitrogen atmosphere Substances 0.000 claims description 2
- 230000007547 defect Effects 0.000 abstract description 7
- AJNVQOSZGJRYEI-UHFFFAOYSA-N digallium;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Ga+3].[Ga+3] AJNVQOSZGJRYEI-UHFFFAOYSA-N 0.000 description 12
- 229910001195 gallium oxide Inorganic materials 0.000 description 12
- 239000007789 gas Substances 0.000 description 9
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 6
- 238000010586 diagram Methods 0.000 description 6
- 238000010438 heat treatment Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 3
- 230000005684 electric field Effects 0.000 description 3
- 229910052757 nitrogen Inorganic materials 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 238000002425 crystallisation Methods 0.000 description 2
- 230000008025 crystallization Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000002474 experimental method Methods 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 230000009471 action Effects 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 238000001657 homoepitaxy Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 229910003465 moissanite Inorganic materials 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000001953 recrystallisation Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02378—Silicon carbide
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- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02483—Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02565—Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
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Abstract
The invention discloses a preparation method of a semiconductor structure based on a silicon carbide substrate, which comprises the following steps: selecting a silicon carbide substrate layer; preparing (In) on the surface of the silicon carbide substrate layer x Ga 1‑x ) 2 O 3 A buffer layer; after the (In) x Ga 1‑x ) 2 O 3 Preparation of Ga on the buffer layer surface 2 O 3 A thin film layer. The preparation method of the semiconductor structure based on the silicon carbide substrate provided by the invention comprises the steps of firstly forming (In) on the surface of a silicon carbide substrate layer x Ga 1‑x ) 2 O 3 Buffer layer, thereby reducing dislocation defects due to lattice mismatch, and then In (In x Ga 1‑x ) 2 O 3 Forming Ga on the surface of a buffer layer 2 O 3 Thin film layer to enhance subsequent growth of Ga 2 O 3 Crystallinity of the thin film layer, ultimately achieving the preparation of highly crystalline Ga on silicon carbide substrate layers 2 O 3 The structure of the film material.
Description
Technical Field
The invention belongs to the technical field of microelectronics, and particularly relates to a silicon carbide epitaxial gallium oxide film method and a silicon carbide epitaxial gallium oxide film structure.
Background
In recent years, ga as a third generation semiconductor 2 O 3 The material has larger forbidden bandwidth, higher breakdown electric field strength and smaller on-resistance, is widely focused by people, and is the optimal material choice for developing the power device. Ga can be prepared by a high temperature method at present 2 O 3 And on which homoepitaxy of Ga with excellent optical and electrical properties can be carried out 2 O 3 The film can be used as a power electronic device, an ultraviolet photoelectric detector and an ultraviolet sensor with high performance, has wider application prospect, however, because of the wider application prospectLow thermal conductivity limits the application of its power electronics at high temperatures.
SiC as a third generation semiconductor material also has excellent properties and has a high thermal conductivity, siC and Ga 2 O 3 Not only can exert the respective advantages, but also can solve the problem of low thermal conductivity of gallium oxide, however, siC and Ga 2 O 3 The existence of many defects due to the large lattice mismatch limits its wide range of applications.
Thus, solving SiC and Ga 2 O 3 Defect problem caused by lattice mismatch, growing gallium oxide film with high crystallization quality on silicon carbide substrate, and growing silicon carbide film with high crystallization quality on silicon carbide substrate 2 O 3 The combination of materials has great significance in the application of the power electronic device in the high-temperature environment.
Disclosure of Invention
In order to solve the problems in the prior art, the invention provides a silicon carbide epitaxial gallium oxide film method and a silicon carbide epitaxial gallium oxide film structure. The technical problems to be solved by the invention are realized by the following technical scheme:
a method for fabricating a semiconductor structure based on a silicon carbide substrate, comprising:
selecting a silicon carbide substrate layer;
preparing (In) on the surface of the silicon carbide substrate layer x Ga 1-x ) 2 O 3 A buffer layer;
after the (In) x Ga 1-x ) 2 O 3 Preparation of Ga on the buffer layer surface 2 O 3 A thin film layer.
In one embodiment of the invention, the silicon carbide substrate layer has a thickness of 300 μm to 700 μm.
In one embodiment of the present invention, a silicon carbide substrate layer is formed on the surface of the silicon carbide substrate layer (In x Ga 1-x ) 2 O 3 A buffer layer, comprising:
sputtering Ga on the surface of the silicon carbide substrate layer by utilizing a magnetron sputtering process in an oxygen and argon environment 2 O 3 Target material and In 2 O 3 Target formation (In) x Ga 1-x ) 2 O 3 A material layer;
the (In x Ga 1-x ) 2 O 3 Annealing the material layer to form the (In x Ga 1-x ) 2 O 3 And a buffer layer.
In one embodiment of the present invention, the (In x Ga 1-x ) 2 O 3 The value range of x in the buffer layer is 0.58-0.76.
In one embodiment of the invention, ga is sputtered on the surface of the silicon carbide substrate layer using a magnetron sputtering process 2 O 3 Target material and In 2 O 3 Target formation (In) x Ga 1-x ) 2 O 3 A material layer comprising:
at a vacuum degree of 5X 10 -4 ～7×10 -4 Sputtering Ga on the surface of the silicon carbide substrate layer by utilizing a magnetron sputtering process under the condition of Pa 2 O 3 Target material and In 2 O 3 Target formation (In) x Ga 1-x ) 2 O 3 A material layer in which the Ga is sputtered 2 O 3 Sputtering power of the target material is 60W, and sputtering the In 2 O 3 The sputtering power of the target is 60W-80W.
In one embodiment of the present invention, the (In) is annealed x Ga 1-x ) 2 O 3 The material layer is annealed to form (In x Ga 1-x ) 2 O 3 A buffer layer, comprising:
the (In) was sequentially subjected to a reaction under oxygen, vacuum and nitrogen atmosphere x Ga 1-x ) 2 O 3 Annealing the material layer to form the (In x Ga 1-x ) 2 O 3 And a buffer layer.
In one embodiment of the present invention, the (In x Ga 1-x ) 2 O 3 The thickness of the buffer layer was 100.+ -.5 nm.
In one embodiment of the invention, inThe (In) x Ga 1-x ) 2 O 3 Preparation of Ga on the buffer layer surface 2 O 3 A film layer comprising:
in the argon atmosphere, the sputtering process was performed under the condition of the (In x Ga 1-x ) 2 O 3 Sputtering Ga on the surface of a buffer layer 2 O 3 Target material generation Ga 2 O 3 A thin film layer.
In one embodiment of the present invention, the (In x Ga 1-x ) 2 O 3 Sputtering Ga on the surface of a buffer layer 2 O 3 Target material generation Ga 2 O 3 A film layer comprising:
at a vacuum degree of 5X 10 -4 ～7×10 -4 Under the condition of Pa, the sputtering process was performed under the conditions of (In x Ga 1-x ) 2 O 3 Sputtering Ga on the surface of a buffer layer 2 O 3 Target material generation Ga 2 O 3 And the film layer, wherein the base distance of the sputtering target is 5cm, and the working current is 2A.
An embodiment of the present invention further provides a semiconductor structure, which is manufactured by using the semiconductor structure manufacturing method based on a silicon carbide substrate according to any one of the above embodiments, wherein the semiconductor structure includes:
a silicon carbide substrate layer;
(In x Ga 1-x ) 2 O 3 the buffer layer is positioned on the surface of the silicon carbide substrate layer;
Ga 2 O 3 a thin film layer located on the (In x Ga 1-x ) 2 O 3 Above the surface of the buffer layer.
The invention has the beneficial effects that:
the preparation method of the semiconductor structure based on the silicon carbide substrate provided by the invention comprises the steps of firstly forming (In) on the surface of a silicon carbide substrate layer x Ga 1-x ) 2 O 3 Buffer layer, thereby reducing dislocation defects due to lattice mismatch, and then In (In x Ga 1-x ) 2 O 3 Forming Ga on the surface of a buffer layer 2 O 3 Thin film layer to enhance subsequent growth of Ga 2 O 3 Crystallinity of the thin film layer, ultimately achieving the preparation of highly crystalline Ga on silicon carbide substrate layers 2 O 3 The structure of the film material.
The present invention will be described in further detail with reference to the accompanying drawings and examples.
Drawings
Fig. 1 is a schematic structural diagram of an apparatus for preparing a silicon carbide epitaxial gallium oxide film according to an embodiment of the present invention;
FIG. 2 is a schematic flow chart of a method for fabricating a semiconductor structure based on a silicon carbide substrate according to an embodiment of the present invention;
FIGS. 3 a-3 c are schematic diagrams of a method for fabricating a silicon carbide substrate-based semiconductor structure according to embodiments of the present invention;
FIG. 4 shows a schematic diagram of an embodiment of the present invention (In x Ga 1-x ) 2 O 3 Schematic annealing environment of the buffer layer;
fig. 5 is a schematic diagram of a semiconductor structure according to an embodiment of the present invention.
Reference numerals illustrate:
a silicon carbide substrate layer-1; (In) x Ga 1-x ) 2 O 3 Buffer layer-2; ga 2 O 3 Film layer-3; a radio frequency power supply-4; target container-5; a target baffle-6; an air inlet-7; an air extraction pipeline-8; a substrate baffle-9; a tray-10; a substrate heating plate-11; a rotary machine-12; sputtering chamber-13.
Detailed Description
The present invention will be described in further detail with reference to specific examples, but embodiments of the present invention are not limited thereto.
Example 1
Before describing the method for manufacturing a semiconductor structure based on a silicon carbide substrate provided in this embodiment, this embodiment first provides an apparatus for manufacturing a silicon carbide epitaxial gallium oxide film, please refer to fig. 1, fig. 1 is a schematic structural diagram of an apparatus for manufacturing a silicon carbide epitaxial gallium oxide film provided in this embodiment, where the apparatus includes a radio frequency power source 4, two target containers 5, two target baffles 6, an air inlet 7, an air exhaust pipe 8, a substrate baffle 9, a tray 10, a substrate heating plate 11, a rotating machine 12, and a sputtering chamber 13. A radio frequency power supply 4 is connected to the target container 5 through the sputtering chamber 13 for supplying power to the sputtering target. The target container 5 is used for placing sputtering targets, and two target baffles 6 are respectively arranged above the two target containers 5. The gas inlet 7 can be provided with a plurality of gas pipes, into which different gases are respectively introduced, and in this embodiment, the gas inlet 7 can simultaneously introduce sputtering gases, oxygen and argon. The evacuation line 8 is connected to a vacuum system for evacuating the sputtering chamber 13. The lower end of the rotating machine 12 is sequentially connected with the substrate heating plate 11 and the tray 10, so that the substrate heating plate 11 and the tray 10 can rotate simultaneously, and uniformity of film deposition on the surface of the substrate in the sputtering process is ensured.
The method for manufacturing the semiconductor structure based on the silicon carbide substrate provided by the embodiment of the invention can be manufactured based on the equipment, and can also be manufactured based on other equipment, and the embodiment is not particularly limited.
In order to better describe the method for preparing a semiconductor structure based on a silicon carbide substrate provided by the embodiment, the method for preparing a semiconductor structure based on a silicon carbide substrate is described on the basis of the apparatus for preparing a silicon carbide epitaxial gallium oxide thin film, please refer to fig. 2, fig. 2 is a schematic flow chart of the method for preparing a semiconductor structure based on a silicon carbide substrate provided by the embodiment of the invention, and the method for preparing a semiconductor structure based on a silicon carbide substrate specifically includes the following steps:
s1, referring to FIG. 3a, selecting a silicon carbide substrate layer 1;
specifically, the production technology of the silicon carbide substrate layer is mature, and the quality of the prepared device is good; in addition, the silicon carbide has higher heat conductivity and good stability, and can be applied to the high-temperature growth process; finally, silicon carbide has excellent physicochemical properties, and the combination with gallium oxide enables high-power electronic devices with high performance. Therefore, the substrate layer of this embodiment is made of silicon carbide.
Further, the thickness of the silicon carbide substrate layer is 300 to 700 μm, and preferably, the thickness of the silicon carbide substrate layer is 500 μm.
S2, referring to FIG. 3b, a silicon carbide substrate layer 1 is prepared on its surface (In x Ga 1-x ) 2 O 3 A buffer layer 2;
s21, sputtering Ga on the surface of the silicon carbide substrate layer by utilizing a magnetron sputtering process in an oxygen and argon environment 2 O 3 Target material and In 2 O 3 Target formation (In) x Ga 1-x ) 2 O 3 The magnetron sputtering technology utilizes interaction of a magnetic field and an electric field to enable electrons to spirally run near the surface of the target, so that probability that the electrons strike argon to generate ions is increased, and the generated ions strike the target surface under the action of the electric field to sputter the target. Because the radius of In atoms is smaller than that of Ga atoms, in is doped to Ga 2 O 3 In (In) x Ga 1-x ) 2 O 3 The lattice constant is reduced, and when x is proper, (In) x Ga 1-x ) 2 O 3 With SiC (In) x Ga 1-x ) 2 O 3 With Ga 2 O 3 The lattice constant mismatch between them is smaller, so that the defect density caused by dislocation can be reduced.
Specifically, firstly, oxygen and argon are used as sputtering gases and are simultaneously introduced into a sputtering cavity; then sputtering Ga on the surface of the silicon carbide substrate layer simultaneously by utilizing a magnetron sputtering process 2 O 3 Target material and In 2 O 3 A target material formed on the surface of the silicon carbide substrate layer (In x Ga 1-x ) 2 O 3 A material layer.
Preferably, (In) x Ga 1-x ) 2 O 3 The value range of x in the material layer is 0.58-0.76. When the value of x is In the range of 0.58 to 0.76, it is ensured that (In x Ga 1-x ) 2 O 3 With SiC (In) x Ga 1-x ) 2 O 3 With Ga 2 O 3 The lattice constant mismatch degree between the twoSmall, so that dislocation-induced defect density can be reduced. If the value of X is too small, the effect of reducing the lattice constant is not achieved, but if the value of X is too large, phase transition occurs due to limited saturation of the alloy compound, and the effect of reducing the lattice constant and dislocation is not achieved.
Further, the mass percentage purity of the oxygen and the argon is 99.999%, and the flow rate of the oxygen can be 2cm 3 A/sec; the flow rate of argon gas can be 20cm 3 Per second, at the same time Ga 2 O 3 Target material and In 2 O 3 The mass ratio purity of the target material is more than 99.99 percent.
In addition, this example prepares (In x Ga 1-x ) 2 O 3 The conditions of the magnetron sputtering process provided in the buffer layer include: substrate temperature (i.e. substrate layer heating temperature), vacuum degree, ga 2 O 3 Sputtering power, in, of target 2 O 3 Sputtering power of the target, sputtering target base distance and sputtering time. Wherein, the sputtering target material base distance refers to the distance between the sputtering target material and the silicon carbide substrate layer. The substrate temperature was room temperature. This example shows the preparation of (In x Ga 1-x ) 2 O 3 The magnetron sputtering process conditions in the buffer layer are preferably as follows: the substrate temperature was 25 ℃; vacuum degree of 5X 10 -4 ～7×10 -4 Pa, preferably 5.0X10 -4 Pa；Ga 2 O 3 The sputtering power of the target is 60W; in (In) 2 O 3 The sputtering power of the target is 60W-80W; the base distance of the sputtering target material is 5cm; the sputtering time period was 1 hour. In the present embodiment, since a crystal having a suitable lattice constant (In x Ga 1-x ) 2 O 3 Can have similar lattice constant with the SiC substrate, the range of x determines the change of the lattice constant, the experimental growth condition determines the range of the value of x, and a large number of experiments prove that the proper lattice constant (In x Ga 1-x ) 2 O 3 That is, the value of x can be set to a range of 0.58 to 0.76 only under the above conditions.
The embodiment is realized by setting different In 2 O 3 The sputtering power of the target material can obtain (In x Ga 1-x ) 2 O 3 A material. When In 2 O 3 When the sputtering power of the target was adjusted to 60W-80W, the generated (In x Ga 1-x ) 2 O 3 The value range of x in the material is 0.18-0.26. For example, when In 2 O 3 When the sputtering power of the target is 65W, x=0.21; when In 2 O 3 When the sputtering power of the target is 70W, x=0.24; when In 2 O 3 When the target sputtering power is 80W, x=0.26.
S22, utilizing an annealing process pair (In x Ga 1-x ) 2 O 3 The material layer is annealed to form (In x Ga 1-x ) 2 O 3 And a buffer layer.
Specifically, referring to fig. 4, the method of sequentially performing the steps of (In x Ga 1-x ) 2 O 3 The material layer is subjected to an annealing treatment to cause (In x Ga 1-x ) 2 O 3 The material layer becomes (In x Ga 1-x ) 2 O 3 Buffer layer, prepared (In x Ga 1-x ) 2 O 3 The buffer layer has the structural characteristics of amorphous and nanocrystalline. First annealing under oxygen is mainly to reduce (In x Ga 1-x ) 2 O 3 The concentration of oxygen vacancies In (In) is then annealed In vacuum primarily to increase (In x Ga 1-x ) 2 O 3 The final annealing In nitrogen is mainly to improve (In x Ga 1-x ) 2 O 3 Is used for the conductive performance of the battery.
Further, the annealing treatment temperature in this embodiment is 600±5 ℃, preferably 600 ℃, the annealing time in oxygen is 2 hours, the annealing time in vacuum is 1 hour, the annealing time in nitrogen is 2 hours, and when the annealing time is shorter, the film cannot fully react, which is unfavorable for recrystallization; longer times can cause greater stress within the film, resulting in film breakage, and therefore require suitable annealing times.
Preferably, (In) x Ga 1-x ) 2 O 3 The thickness of the buffer layer was 100.+ -.5 nm. (In) x Ga 1-x ) 2 O 3 If the thickness of the buffer layer is too small, ga is adversely affected by the larger crystal grains 2 O 3 Growth of the thin film layer, while if too thick, it affects SiC/Ga 2 O 3 Performance of heterojunction devices.
S3, please see 3c, in (In x Ga 1-x ) 2 O 3 Preparation of Ga on the surface of buffer layer 2 2 O 3 A film layer 3;
specifically, in an argon atmosphere, a magnetron sputtering process was used to produce a sputtering target In (In x Ga 1-x ) 2 O 3 Sputtering Ga on the surface of a buffer layer 2 O 3 Target material generation Ga 2 O 3 A thin film layer.
Further, argon is firstly introduced into the sputtering chamber as sputtering gas, wherein the mass percent purity of the argon is 99.999%, and the flow rate of the argon can be 20cm, for example 3 A/sec; thereafter, a magnetron sputtering process is used to produce a film on the surface of the substrate (In x Ga 1-x ) 2 O 3 Sputtering Ga on the surface of a buffer layer 2 O 3 Target material generation Ga 2 O 3 A thin film layer.
Preferably, ga 2 O 3 The mass ratio purity of the target material is more than 99.99 percent.
In addition, this example prepares Ga 2 O 3 The conditions of the magnetron sputtering process provided in the thin film layer include: vacuum degree, sputtering target base distance and working current. This example shows the preparation of Ga 2 O 3 The magnetron sputtering process conditions in the case of the thin film layer are preferably: vacuum degree of 5X 10 -4 ～7×10 -4 Pa, preferably 5.0X10 -4 Pa, the base distance of the sputtering target is 5cm, and the working current is 2A. If the vacuum degree is low, the impurity gas in the chamber is more, and the prepared Ga is polluted 2 O 3 When the vacuum degree is high, the time required for the film layer is increased, which is unfavorable for the experiment.
Preferably, ga 2 O 3 Thickness of thin film layerThe degree is 220+ -5 nm. Ga 2 O 3 Too thick a film thickness will result in SiC/Ga 2 O 3 The performance of the heterojunction device is affected.
The method for preparing the silicon carbide epitaxial gallium oxide film provided by the embodiment of the invention is to prepare a material (In) on a silicon carbide substrate layer x Ga 1-x ) 2 O 3 After annealing treatment in oxygen, vacuum and nitrogen environment, the buffer layer can reduce defects caused by lattice mismatch between the buffer layer and the silicon carbide substrate layer, thereby being more beneficial to subsequent preparation of high-crystallization-quality Ga at proper temperature 2 O 3 A thin film layer.
Example two
Referring to fig. 5, fig. 5 is a schematic diagram of a semiconductor structure according to an embodiment of the invention. The embodiment of the invention provides a semiconductor structure, which comprises: silicon carbide substrate layer 1, (In) x Ga 1-x ) 2 O 3 Buffer layer 2 and Ga 2 O 3 A thin film layer 3 In which (In x Ga 1-x ) 2 O 3 The buffer layer 2 is arranged on the surface of the silicon carbide substrate layer 1, ga 2 O 3 The thin film layer 3 is located at (In x Ga 1-x ) 2 O 3 Above the surface of the buffer layer 2.
The semiconductor structure of this embodiment is prepared by using the method for preparing a semiconductor structure based on a silicon carbide substrate provided in the above embodiment, and its implementation principle and technical effects are similar, and will not be described here again
In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings are merely for convenience in describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present invention.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms are not necessarily directed to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Further, one skilled in the art can engage and combine the different embodiments or examples described in this specification.
The foregoing is a further detailed description of the invention in connection with the preferred embodiments, and it is not intended that the invention be limited to the specific embodiments described. It will be apparent to those skilled in the art that several simple deductions or substitutions may be made without departing from the spirit of the invention, and these should be considered to be within the scope of the invention.
Claims (6)
1. A method for fabricating a semiconductor structure based on a silicon carbide substrate, comprising:
selecting a silicon carbide substrate layer;
sputtering Ga on the surface of the silicon carbide substrate layer by utilizing a magnetron sputtering process in an oxygen and argon environment 2 O 3 Target material and In 2 O 3 Target formation (In) x Ga 1-x ) 2 O 3 A material layer;
the (In) was sequentially subjected to a reaction under oxygen, vacuum and nitrogen atmosphere x Ga 1-x ) 2 O 3 Annealing the material layer to form the (In x Ga 1-x ) 2 O 3 A buffer layer;
after the (In) x Ga 1-x ) 2 O 3 BufferingPreparation of Ga on the surface of a layer 2 O 3 A thin film layer;
the (In) x Ga 1-x ) 2 O 3 The value range of x in the buffer layer is 0.58-0.76;
the (In) x Ga 1-x ) 2 O 3 The thickness of the buffer layer was 100.+ -.5 nm.
2. The method of manufacturing a silicon carbide substrate-based semiconductor structure according to claim 1, wherein the silicon carbide substrate layer has a thickness of 300 μm to 700 μm.
3. The method for manufacturing a silicon carbide substrate-based semiconductor structure according to claim 1, wherein Ga is sputtered on the surface of the silicon carbide substrate layer by a magnetron sputtering process 2 O 3 Target material and In 2 O 3 Target formation (In) x Ga 1-x ) 2 O 3 A material layer comprising:
at a vacuum degree of 5X 10 -4 ～7×10 -4 Sputtering Ga on the surface of the silicon carbide substrate layer by utilizing a magnetron sputtering process under the condition of Pa 2 O 3 Target material and In 2 O 3 Target formation (In) x Ga 1-x ) 2 O 3 A material layer in which the Ga is sputtered 2 O 3 Sputtering power of the target material is 60W, and sputtering the In 2 O 3 The sputtering power of the target is 60W-80W.
4. The method for manufacturing a silicon carbide substrate-based semiconductor structure according to claim 1, wherein the silicon carbide substrate is formed In the (In x Ga 1-x ) 2 O 3 Preparation of Ga on the buffer layer surface 2 O 3 A film layer comprising:
in the argon atmosphere, the sputtering process was performed under the condition of the (In x Ga 1-x ) 2 O 3 Sputtering Ga on the surface of a buffer layer 2 O 3 Target material generation Ga 2 O 3 A thin film layer.
5. The method for manufacturing a silicon carbide substrate-based semiconductor structure according to claim 4, wherein the (In x Ga 1-x ) 2 O 3 Sputtering Ga on the surface of a buffer layer 2 O 3 Target material generation Ga 2 O 3 A film layer comprising:
at a vacuum degree of 5X 10 -4 ～7×10 -4 Under the condition of Pa, the sputtering process was performed under the conditions of (In x Ga 1-x ) 2 O 3 Sputtering Ga on the surface of a buffer layer 2 O 3 Target material generation Ga 2 O 3 And the film layer, wherein the base distance of the sputtering target is 5cm, and the working current is 2A.
6. A semiconductor structure prepared using the method of preparing a silicon carbide substrate-based semiconductor structure of any one of claims 1 to 5, wherein the semiconductor structure comprises:
a silicon carbide substrate layer;
(In x Ga 1-x ) 2 O 3 the buffer layer is positioned on the surface of the silicon carbide substrate layer;
Ga 2 O 3 a thin film layer located on the (In x Ga 1-x ) 2 O 3 Above the surface of the buffer layer.
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