TW201638363A - Layered product and process for producing layered product - Google Patents

Abstract

A layered product which comprises a support layer and a metal oxide layer superposed in this order or comprises a support layer, a mixing layer, and a metal oxide layer superposed in this order, wherein the mixing layer has a film thickness larger than 0 nm but not larger than 5.0 nm.

Description

Method for manufacturing laminated body and laminated body

The present invention relates to a method for producing a laminate and a laminate.

Among the metal oxides, a degraded semiconductor such as indium tin oxide (ITO) or indium zinc oxide (IZO (registered trademark)), and a non-degraded semiconductor such as ZnO or indium gallium zinc oxide (IGZO) are known. These systems have been put to practical use in displays, sensors, varistors, etc., with a wide band gap.

Regarding an electronic device using an oxide material, depending on the selection of the electrode material, the oxygen of the oxide reacts with the electrode to easily become a metal-insulator-semiconductor (MIS) structure. The MIS structure has the following conditions: an increase in contact resistance, an increase in power consumption, or a decrease in response.

For example, in a display device, when an ITO which is a pixel electrode is sputter-deposited on an Al wiring as a signal line, an oxide layer is formed on the surface of Al. Therefore, there is a case where the contact resistance between the signal line and the pixel electrode is increased, resulting in a decrease in the display quality of the screen.

Patent Document 1 proposes a technique of suppressing the generation of an oxide film by using an Al alloy in which a noble metal which is not easily oxidized or a metal having a relatively low conductivity as an oxide is added in a small amount in Al.

[Previous Technical Literature] [Patent Literature]

[Patent Document 1] Japanese Patent Laid-Open Publication No. 2004-214606

An object of the present invention is to provide a laminate having no contact resistance and a method of producing a laminate.

The problem of contact resistance becomes more pronounced when the material of the laminate is not the case of an oxide semiconductor exhibiting degraded conduction of ITO and being a higher resistance oxide semiconductor. For example, in a thin film transistor (TFT) using an oxide semiconductor, the contact resistance of the bottom contact type TFT in which the oxide semiconductor is formed on the back surface of the source and the drain electrode is likely to be high. If the contact resistance becomes high, the voltage-current characteristic deviates from the ohmic characteristic, so that in the case of the TFT, the image quality is lowered, and in the case of the power device, the power conversion efficiency is lowered. A typical example of the voltage-current characteristic when the contact resistance is high is shown in Fig. 10. A typical example of the voltage-current characteristic when the contact resistance is suppressed to be small is shown in Fig. 11.

Further, when an oxide semiconductor is formed on the germanium wafer, the contact resistance is likely to be high. The present inventors believe that the reason for these phenomena is that a mixing layer of the two is formed at the interface between the metal and the metal oxide, and the resistance is higher than that of either the metal or the metal oxide, thereby completing the present invention. invention.

According to the invention, the following method for producing a laminate or a laminate is provided.

A laminated body obtained by sequentially laminating a support layer or a metal oxide layer, or sequentially laminating a support layer, a mixed layer, and a metal oxide layer, and the film thickness of the mixed layer exceeds 0 nm and is 5.0. Below nm.

2. The laminate according to 1, wherein the mixed layer is a mixed phase of an element constituting the metal oxide layer and an element constituting the support layer.

3. The laminate according to 1 or 2, wherein the support layer is selected from the group consisting of a Si substrate, a SiC substrate, a GaN substrate, an Al ₂ O ₃ substrate, a ZnO substrate, a Ga ₂ O ₃ substrate, a yttria-stabilized zirconia substrate, and titanium. A substrate in a bismuth substrate.

4. The laminate according to any one of 1 to 3, wherein the metal oxide layer contains at least one of In, Sn, Ge, Ti, Zn, Y, Sm, Ce, Nd, Ga, and Al. Metal oxides.

5. The laminate according to any one of 1 to 4, wherein the metal oxide layer is selected from the group consisting of In ₂ O ₃ , ZnO, Ga ₂ O ₃ , SnO ₂ , indium aluminum oxide, indium gallium zinc oxide, One or more metal oxides of indium tin zinc oxide, gallium zinc oxide, indium zinc oxide, and indium gallium oxide.

A layered body obtained by sequentially laminating a support layer, a first metal layer, a metal oxide layer, or sequentially stacking a support layer, a first metal layer, a mixed layer, and a metal oxide layer, and The film thickness of the mixed layer is more than 0 nm and 5.0 nm or less.

7. The laminate according to 6, wherein the mixed layer is a mixed phase of an element constituting the metal oxide layer and an element constituting the first metal layer.

8. The laminate according to 6 or 7, wherein the support layer is selected from the group consisting of a Si substrate, a SiC substrate, a GaN substrate, an Al ₂ O ₃ substrate, a ZnO substrate, a Ga ₂ O ₃ substrate, a yttria-stabilized zirconia substrate, and titanium. A substrate in a bismuth substrate.

The laminate according to any one of the above aspects, wherein the metal oxide layer contains at least one of In, Sn, Ge, Ti, Zn, Y, Sm, Ce, Nd, Ga, and Al. Metal oxides.

10. The laminate according to any one of 6 to 9, wherein the metal oxide layer comprises a material selected from the group consisting of In ₂ O ₃ , ZnO, Ga ₂ O ₃ , SnO ₂ , indium aluminum oxide, indium gallium zinc oxide, One or more metal oxides of indium tin zinc oxide, gallium zinc oxide, indium zinc oxide, and indium gallium oxide.

A method for producing a laminate, which is selected from the group consisting of a low voltage sputtering method, a plasma chemical vapor deposition method, an organometallic chemical vapor deposition method, an atomization chemical vapor deposition method, a molecular beam epitaxy method, and an ion plating method. The film formation method in the method forms a metal oxide layer on the support layer.

12. A method for producing a laminate, which is selected from the group consisting of a low voltage sputtering method, a plasma chemical vapor deposition method, an organometallic chemical vapor deposition method, an atomization chemical vapor deposition method, a molecular beam epitaxy method, and an ion plating method. The film formation method in the method forms a metal oxide layer on the metal layer.

An electronic component comprising the laminate according to any one of 1 to 5, further comprising a metal layer on the metal oxide layer, and exhibiting ohmic characteristics between the metal oxide layer and the support layer.

An electronic component comprising the laminate according to any one of 6 to 10, further comprising a second metal layer on the metal oxide layer, and displaying between the metal oxide layer and the first metal layer Ohmic characteristics.

15. The electronic component according to 13 or 14, wherein the metal oxide layer and the metal layer or the metal oxide layer and the second metal layer exhibit nonlinear electrical characteristics.

A circuit, an electric device, or a vehicle, which uses one or more of the electronic components according to any one of 13 to 15.

According to the present invention, it is possible to provide a laminated body having no contact resistance and a method of manufacturing the laminated body.

1‧‧ ‧ laminated body

2‧‧‧Laminated body

10‧‧‧Support body layer

15‧‧‧First metal layer

20‧‧‧ mixed layer

30‧‧‧Metal oxide layer

BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a view showing an example of a first aspect of a laminate of the present invention.

Fig. 2 is a view showing an example of a second aspect of the laminated body of the present invention.

Fig. 3 is a graph showing the IV characteristics of Example 1 and Comparative Example 1.

4 is a TEM (Transmission Electron Microscope) photograph of a Si/Mo/Ga ₂ O ₃ /Ti laminate of Example 1. FIG.

Fig. 5 is a cross-sectional TEM photograph of a Si/Mo/Ga ₂ O ₃ /Ti laminate of Comparative Example 1.

Fig. 6 is a view showing the IV characteristics of Example 2 and Comparative Example 2.

Fig. 7 is a cross-sectional TEM photograph of the Si/Ga ₂ O ₃ /Ti laminate of Example 2.

Fig. 8 is a cross-sectional TEM photograph of a Si/Ga ₂ O ₃ /Ti laminate of Comparative Example 2.

Fig. 9 is a graph showing the IV characteristics of Example 4, Comparative Example 3, and Comparative Example 4.

Fig. 10 is a view showing a typical example of voltage-current characteristics when the contact resistance of the thin film transistor is high.

Figure 11 is a diagram showing the voltage when the contact resistance of the thin film transistor is suppressed to be small. - A diagram of a typical example of current characteristics.

The first aspect of the laminate of the present invention is formed by sequentially laminating a support layer, a metal oxide layer, or sequentially stacking a support layer, a mixed layer, and a metal oxide layer, and the film thickness of the mixed layer exceeds 0 nm. It is 5.0 nm or less.

Moreover, the second aspect of the laminated body of the present invention is a sequential buildup support layer, a first metal layer, a metal oxide layer, or a sequential buildup support layer, a first metal layer, a mixed layer, and a metal oxide layer. The film thickness of the mixed layer is more than 0 nm and 5.0 nm or less.

The first aspect and the second aspect are combined and referred to as a laminate of the present invention.

When a metal oxide layer is formed on a substrate, the substrate reacts with the metal oxide to form a thin insulating layer (mixed layer), and electrical characteristics cannot be controlled.

However, the laminated body of the present invention can achieve good ohmic characteristics by preventing the mixed layer generated at the initial stage of film formation from being formed when the oxide metal layer is laminated, or by controlling the thickness thereof appropriately.

One of the first aspect and the second aspect of the laminate of the present invention is illustrated in Figs. 1 and 2. The laminate 1 is an example of a first aspect of the laminate of the present invention, and includes a support layer 10, a mixed layer 20, and a metal oxide layer 30. The laminate 2 is an example of a second aspect of the laminate of the present invention, and includes a support layer 10, a first metal layer 15, a mixed layer 20, and a metal oxide layer 30.

Hereinafter, each layer for a laminate will be described.

The support layer is a substrate on which a metal oxide layer or a first metal layer is formed.

As the support layer, a wafer substrate, a glass substrate, or a resin substrate of Si, SiC, GaN, Al ₂ O ₃ , ZnO, Ga ₂ O ₃ , yttria-stabilized zirconia (YSZ), or barium titanate (STO) can be used. Wait. Further, the support layer also includes an element substrate on which a transistor such as a TFT or a MOSFET is mounted.

When it is used in the vertical direction (thickness direction), it is preferable to use a Si wafer, a SiC wafer, or a GaN wafer as a support layer.

The Si wafer substrate is preferred in view of mass productivity or cost. The Si wafer has an n-type, an i-type, and a p-type depending on the presence or absence of the doping, and is preferably an n-type or a p-type having a small electric resistance in terms of flowing a current in the longitudinal direction. As the dopant, previously known B, P, Sb, or the like can be used. In particular, when reducing the resistance, As or red phosphorus can be used as a dopant.

The thickness of the support layer is not particularly limited and is usually 200 to 1000 μm. In the case where the resistance in the longitudinal direction is to be lowered, the polishing can be performed by a chemical mechanical polishing (CMP) method or the like. In the case where the warpage of the substrate is a problem, a structure of a TAIKO type which leaves the outer peripheral portion (a structure in which only the outer peripheral portion of the back surface is back-polished) can be used. Grinding can be carried out before the lamination of the metal oxide, or after the lamination of the metal oxide.

In the case of using a Si wafer, the material of the wafer may be either single crystal or polycrystalline. Regarding the production method, a Czochralski method or a floating zone method or the like can be used, and a previously known Si substrate can be used.

The first metal layer is formed on the support layer in the second aspect. The first metal layer is not particularly limited as long as it has excellent conductivity, and is preferably excellent in stability to heat, less in structural change, and excellent in adhesion.

The film thickness of the first metal layer is not particularly limited, and is preferably 5 to 30 nm as a film thickness capable of exhibiting a work function of the metal.

Examples of the first metal layer include Mo, Ti, Pd, Pt, Cr, Al, Ag, Au, Cu, In, ITO, and IZO (registered trademark). In addition, when it is used in the case of crystallization as in the case of ITO, since the unevenness of the grain boundary causes an increase in contact resistance, it is preferably used by flattening using a CMP method or the like. In order to achieve both conductivity, stability, and adhesion, two or more metals may be laminated, or an alloy of two or more metals may be used. Examples of the alloy include MoTa, MoW, and AlNd. A previously known alloy such as AgPdCu, AgCe, CuMn or the like.

Preferred examples of the metal constituting the first metal layer include Ti, Pd, Cr, In, IZO, and Mo.

In the case where an ohmic junction is to be obtained for the metal oxide layer in which the mixed layers are interposed, a metal having a work function similar to that of the metal oxide layer may be appropriately selected as the first metal layer. In the case where a Schottky junction is to be obtained for the metal oxide layer, a metal having a work function larger than that of the metal oxide layer may be appropriately selected as the first metal layer.

The work function of the first metal layer is measured in the atmosphere by a photoelectron spectroscopic device (for example, a cytometer AC-3).

In the laminate of the present invention, a mixed layer may be present or a mixed layer may not be present.

The mixed layer is formed on the support layer or the first metal layer. The film thickness of the mixed layer is more than 0 nm and 5.0 nm or less.

The mixed layer is preferably a mixed phase of elements constituting the metal oxide layer and the support layer, or a mixed phase of elements constituting the metal oxide layer and the first metal layer.

The mixed layer is formed using a low energy film forming process to form a metal oxide layer on the support layer or the first metal layer.

Examples of the low-energy film formation process include low-power sputtering, plasma chemical vapor deposition (PECVD), organometallic CVD, atomization CVD, molecular beam epitaxy (MBE), and ion plating. Wait.

Among them, the low-power sputtering method and the ion plating method can form a film uniformly on a substrate having an area of 300 cm 2 or more, which is advantageous in production. For example, it can be applied to large-diameter Si wafers such as 8 inches, 12 inches, and 18 inches, or large LCD glass of 7th generation, 8th generation, and 10th generation, or resin film of long winding type.

The implantation of the metal oxide layer to the support layer or the first metal can be suppressed by a low energy film formation process.

In general, if a metal oxide layer is formed by a vacuum process, the underlayer is The interface of the metal oxide layer generates a mixed layer containing an element constituting the underlayer and an element constituting the metal oxide layer.

The resistance of the mixed layer formed in the high energy film forming process is lower than that of SiO ₂ , but it causes a rise in resistance.

Further, in consideration of the productivity, in the usual film formation method, the low power process can be performed only at the initial stage of film formation. For example, in the case of the sputtering method, the power can be reduced only at the initial stage of film formation, and the sputtering power can be increased at the end of the deposition of the mixed layer.

Furthermore, the sputtering power of the low-power sputtering method varies depending on the shape of the device to be used, the strength of the magnetic field, and the like. For example, in the case of direct current (DC) sputtering, the cathode potential can be set to -100V to -300V. In the case of high frequency (RF) sputtering, the power density may be set to 1.5 W/cm ² or less. The power density of RF sputtering is 1.5 W/cm ² or less, and since it is distributed according to the magnet strength of the sputtering apparatus, it is not singular, and it is 4 inches. In the case of a target, it is roughly equivalent to a power of 100 W or less.

The film thickness of the mixed layer is preferably more than 0 nm and 4.0 nm or less, more preferably more than 0 nm and 3.0 nm or less. The film thickness of the mixed layer is preferably thin.

When the thickness of the mixed layer exceeds 5.0 nm, it becomes an MIS structure, and control of ohmic bonding or Schottky bonding becomes difficult.

The film thickness of the mixed layer depends on the film formation method of the metal oxide or the heat treatment temperature. The film thickness of the mixed layer was measured by TEM (transmission electron microscope). Further, the constituent elements of the mixed layer can be confirmed by SIMS (Secondary Ion Mass Spectrometry) or an energy dispersive X-ray analyzer.

The metal oxide layer contains a layer of one or more metal oxides.

The film thickness of the metal oxide layer is not particularly limited, but is preferably 10 nm to 10 μm, more preferably 500 to 2,000 nm. The film thickness of the metal oxide layer can be appropriately selected depending on the performance values of the withstand voltage, on-resistance, and driving voltage of the target element.

Examples of the metal oxide include an oxide of any one or more of In, Sn, Ge, Ti, Zn, Y, Sm, Ce, Nd, Ga, and Al. For example, ITO, IZO (registered trademark, the same below), aluminum zinc oxide (AZO), gallium zinc oxide (GZO), degenerate semiconductor such as SnO ₂ , or ZnO, indium aluminum oxide (IAO), IGZO ( Non-degenerate semiconductors such as registered trademarks, the same as below), Ga ₂ O ₃ , In ₂ O ₃ , indium tin zinc oxide (ITZO), indium gallium oxide (IGO), and indium gallium aluminum oxide (IGAO).

The metal oxide constituting the metal oxide layer is preferably one or more selected from the group consisting of In ₂ O ₃ , ZnO, Ga ₂ O ₃ , SnO ₂ , IAO, IGZO, ITZO, GZO, IZO, and IGO.

The composition of the metal oxide is by ICP (Inductively Coupled Plasma) luminescence analyzer or XRF (X-ray Fluorescence Analysis) or SIMS (Secondary Ion Mass Spectrometry). ) Perform the measurement.

The metal oxide may be amorphous or crystalline, the crystal may be microcrystalline or single crystal, and the metal oxide is preferably amorphous or microcrystalline.

The term "microcrystalline structure" means that the size of the crystal grain size is submicron or less and there is no clear grain boundary.

The laminate of the present invention preferably has a second metal layer (metal layer in the first aspect) on the metal oxide layer. Examples of the second metal layer include metals such as Ti, Al, Cr, Ni, Cu, Mo, Ag, Pt, and Au, and deteriorated semiconductor oxides such as IZO and ITO.

The film thickness of the second metal layer is not particularly limited, but is preferably 30 to 500 nm, more preferably 50 to 300 nm.

The film formation method of the first metal layer and the second metal layer is not particularly limited, and examples thereof include a sputtering method, a vacuum deposition method, an electrolytic plating method, an electroless plating method, and various CVD methods.

The laminate of the present invention can be used for an electronic component, a sensor, or the like. Further, the electronic component of the present invention including the laminate of the present invention can be used in various circuits, electric equipment, vehicles, and the like.

As the electronic component, a diode, a vertical MOSFET (metal-oxide- A semiconductor field-effect transistor, a TFT (Thin Film Transistor), a TVS (Transient Voltage Suppressor) diode, a capacitor, a resistor, and the like.

In particular, it is possible to use various power supply circuits such as a rectifier circuit or a DC-DC converter mounted on an integrated circuit, various control circuits, voltage conversion circuits, and the like, which are easy to form and use in the laminated body of the present invention. External interface. It can be used for a thin film resistor, a fixed capacitor, a variable capacitor, a switching transistor, a protective diode, a constant voltage diode, a reflow diode, or the like which are the element parts.

It is important for these devices to withstand the balance between voltage and capacitance. By using the laminate of the present invention and changing the material composition, the dielectric constant and the band gap can be adjusted, and the size and thickness of the device can be optimized. For example, in the case of a varistor diode, as long as the varistor voltage can be controlled at a low leakage current and a low dielectric constant, since the dielectric constant and the leakage current are smaller than the prior zinc oxide system, it can be appropriately selected and used. The best material. In this case, the varistor voltage can be accurately designed by setting the film thickness of the mixed layer existing at the interface between the oxide semiconductor and the metal electrode to more than 0.0 nm and 5.0 nm or less.

The laminated body of the present invention can be used in a rectifying circuit, a power supply circuit, a standby monitoring circuit, and the like when receiving electric power or signals from an electromagnetic field in an environment of a wireless tag or an energy harvester. The low-voltage Si-SBD or Ge diode can be used for the rectifying diodes used, but the reverse leakage current is large, which is problematic in terms of power conversion efficiency. However, when the laminated body of the present invention is used, the leakage current is small due to the wide energy gap, and the rectifying effect can be improved. The forward voltage can also utilize the tunneling effect or the like by the adjustment of the film thickness and the energy level, and the suppression is low. This laminate can maintain a high rectification effect especially for changes in temperature. At this time, a preferable thickness of the mixed layer existing at the interface between the oxide semiconductor and the metal electrode is more than 0.0 nm and 5.0 nm or less. Further, since the oxide semiconductor is different from a non-oxide semiconductor such as Si, SiC or GaN, it is not necessary to perform annealing treatment, so that a rectifying circuit can be mounted on a resin substrate such as PET or PC, and the operation is difficult to implement before. Now.

When the laminate of the present invention is used as a cathode electrode of an OLED (Organic Light Emitting Diode), reduction in driving voltage or improvement in image quality can be expected. The oxide semiconductor that has recently received attention is an n-channel, and thus the source electrode is connected to the anode side of the OLED. In the case of the connection method, there is a concern that a change in the driving voltage of the OLED also affects the operation of the TFT, resulting in uneven brightness. Therefore, if a metal oxide layer used in the present invention is laminated on the gate electrode as a cathode, it is possible to prevent the change in the driving voltage of the OLED from affecting the operation of the TFT and improve the image quality. Further, when a transparent cathode such as C12A7 is used, by sandwiching the metal oxide layer between the drain electrode and C12A7, the degree of electron injection can be matched, and the driving voltage can be further reduced. At this time, it is required that there is no high-resistance mixed layer at the interface between the gate electrode and the metal oxide layer. With such a configuration, it is possible to realize an OLED which is capable of preventing deterioration in image quality due to uneven brightness, and having a low driving voltage and a large area.

Examples of the sensor include a photosensor such as ultraviolet rays or radiation, a gas sensor such as oxygen or nitrogen, a biosensor such as an ion concentration or a microorganism, and a thermal sensor that senses a temperature change.

In addition, it is effective to apply the laminated body of the present invention to a portion where a contact resistance between a combination interface of an electrode and an oxide semiconductor is small, such as a nonvolatile phase change memory or a solar cell.

The electronic component of the present invention exhibits ohmic or Schottky characteristics between the metal oxide layer and the first metal layer, or between the metal oxide layer and the support layer.

Further, it is preferable that the metal oxide layer and the second metal layer (metal layer) exhibit nonlinear electrical characteristics. The so-called nonlinear electrical property refers to the electrical conduction that does not follow Ohm's law.

As the nonlinear electrical characteristics, rectification characteristics and Schottky characteristics are preferable.

The Schottky junction element can be fabricated by exhibiting nonlinear electrical characteristics between the metal oxide layer and the second metal layer.

In particular, when the laminate of the present invention is used in the case of a diode, high-speed switching, high withstand voltage, and low on-resistance can be realized in mass production stages.

When the metal oxide is easily changed to an n-type due to oxygen vacancies and it is difficult to form a p-type, it is preferably a unipolar device and is used for high-speed switching.

When the laminate of the present invention is used in the case of a diode, the ideal coefficient of the diode is preferably in the range of n=1 to 5. The ideal coefficient of the diode is represented by n which is determined by approximating the voltage-current characteristic of the electrical characteristic exhibiting nonlinearity according to the following formula. In the formula, I is a current, I ₀ is a constant, q is a basic charge amount, V is an applied voltage, k is a Boltzmann constant, and T is an absolute temperature.

I=I ₀ {exp(qV/nkT)-1}

Further, it is preferable to use the laminate of the present invention in the case of a diode because the substrate side is ohmic junction, and the affinity of the subsequent step becomes high.

When the laminated body of the present invention is combined with a switching element such as an insulated gate bipolar transistor (IGBT) or a MOSFET as a high-speed FWD (Freewheel Diode) wafer, the same wiring as before can be used. The layout is designed. Further, since the forward rising voltage can be kept low, it is also suitable for the low voltage diode used in the environmental power generating circuit.

[Examples]

Hereinafter, an embodiment of the present invention will be described with reference to the drawings. The invention is not limited by the examples.

Example 1

As a support, an n-type Si substrate (4 in. diameter, n-type Si substrate manufactured by KST World Co., Ltd.) having a resistivity of 0.02 Ω ‧ cm was prepared. It was mounted on a sputtering apparatus CS-200 (manufactured by ULVAC), and first processed in a reverse sputtering mode for 15 seconds. After etching a part of the natural oxide film, DC sputtering was performed on the Mo target to form a film of 15 nm of Mo ( First metal layer).

Then, the support substrate with the Mo is placed in the ion plating apparatus SIP-800 (manufactured by Showa Vacuum), and the film is formed by ion plating (IP). 1000 nm Ga ₂ O ₃ film (metal oxide layer).

The Si wafer/Mo/Ga ₂ O ₃ laminated body was again mounted on the sputtering apparatus CS-200, and the region for the intervening electrode was masked on the Ga ₂ O ₃ film to form Ti (second metal layer) at 150 nm. .

The IV characteristics of the obtained Si/Mo/Ga ₂ O ₃ /Ti laminate were evaluated by 4200-SCS (manufactured by Keithley Instruments Co., Ltd.), and as a result, ohmic characteristics were obtained.

The results are shown in Fig. 3. Fig. 3 is a graph showing the IV characteristics of Example 1 and Comparative Example 1.

Further, the interface between the Mo layer and the Ga ₂ O ₃ layer was processed by a focused ion beam (FIB), and then observed by TEM. A cross-sectional TEM photograph of the Si/Mo/Ga ₂ O ₃ /Ti laminate of Example 1 is shown in Fig. 4 .

The intersection of the diagonal of the metal oxide layer and the field of view of the intersection of the intersection and the apex are observed as the observation position, and the metal oxide layer is placed at a position equally divided by 10 at the same time. The interface of the first metal layer was measured, and the average value of the meter 55 was taken as the film thickness of the mixed layer. As a result, below the analytical limit, the presence of a mixed layer was not confirmed.

Comparative example 1

Si/Mo/Ga _{2 was} produced in the same manner as in Example 1 except that the ion plating apparatus CS-200 was used instead of the ion plating apparatus SIP-800, and the Ga ₂ O ₃ film was formed by RF sputtering. The O ₃ /Ti laminate was evaluated.

Further, regarding the RF power, it is 300 W (3.70 W/cm ² ) with respect to a 4-inch target. The ideal coefficient of the diode is n=5.5.

The IV characteristics were evaluated, and as a result, rectification characteristics were obtained. The results are shown in Fig. 3.

The film thickness of the mixed layer was 6 nm. Fig. 5 is a cross-sectional TEM photograph of a Si/Mo/Ga ₂ O ₃ /Ti laminate of Comparative Example 1. Further, it was confirmed by an energy dispersive X-ray analyzer, and as a result, the mixed layer was a mixed layer of an element constituting the oxide layer and an element constituting the first metal layer.

Example 2

A Si/Ga ₂ O ₃ /Ti laminate was produced and evaluated in the same manner as in Example 1 except that Mo was not formed.

The IV characteristics were evaluated, and as a result, ohmic characteristics were obtained. The results are shown in Fig. 6. Fig. 6 is a view showing the IV characteristics of Example 2 and Comparative Example 2.

The film thickness of the mixed layer was 4 nm. Fig. 7 is a cross-sectional TEM photograph showing a Si/Ga ₂ O ₃ /Ti laminate of Example 2. Further, it was confirmed by an energy dispersive X-ray analyzer, and as a result, the mixed layer was a mixed layer of an element constituting the oxide layer and an element constituting the first metal layer.

Comparative example 2

A Si/Ga ₂ O ₃ /Ti laminate was produced and evaluated in the same manner as in Comparative Example 1, except that Mo was not formed.

The IV characteristics were evaluated, and as a result, a negative resistance was obtained. The results are shown in Fig. 6. It is considered to be represented by the tunneling current brought about by the MIS structure.

The film thickness of the mixed layer was 9 nm. Fig. 8 is a cross-sectional TEM photograph of a Si/Ga ₂ O ₃ /Ti laminate of Comparative Example 2. Further, it was confirmed by an energy dispersive X-ray analyzer, and as a result, the mixed layer was a mixed layer of an element constituting the oxide layer and an element constituting the first metal layer.

Example 3

IZO is used instead of Ti, except that, in the same manner as in Example 1 A _{Si / Mo / Ga 2 O 3} / IZO laminate.

The IV characteristics of the obtained Si/Mo/Ga ₂ O ₃ /IZO laminate were evaluated in the same manner as in Example 1. As a result, the interface between the Ga ₂ O ₃ layer and the Mo layer was ohmic, and the Ga ₂ O ₃ layer was The interface of the IZO layer is a rectifying property. A Schottky joint element is obtained.

Further, the film thickness of the mixed layer was measured in the same manner as in Example 1. As a result, it was lower than The limit was analyzed and the presence of a mixed layer was not confirmed.

Example 4

As a support, the same type of Si as in Example 1 was prepared, and after immersing in dilute hydrofluoric acid (HF:H ₂ O = 1:50) for 1 minute to remove the surface of the natural oxide film, it was quickly introduced into the sputtering apparatus. CS-200 (manufactured by ULVAC) and vacuum evacuates the chamber. After exhausting to 10 ^-4 Pa, DC sputtering was performed on the Ti target to form Ti having a thickness of 50 nm, followed by DC sputtering on the Ni target to obtain a Ni thin film having a thickness of 50 nm.

After the atmosphere is released, the Si/Ti/Ni laminate is mounted on a sputtering device SRV-4300 (manufactured by Shenkang Seiki), DC sputtering is performed on the In target, and an In film having a thickness of 50 nm is formed on the Ni film (first Metal layer). Then, the target of a-IGZO (In:Ga:Zn=1:1:1) was sputtered at a power of RF 100W (1.23 W/cm ² ) without breaking the vacuum state, and formed on the In film. A-IGZO film (metal oxide layer) of a film of 200 nm.

Temporarily taken out to the atmosphere, annealed in air at 300 ° C for 1 hour, and then re-attached to the sputtering apparatus SRV-4300, covered with an electrode mask, and sputtered in the order of Ti and Au. (second metal layer).

With respect to the laminate of Au/Ti/a-IGZO/In/Ni/Ti/Si obtained in this manner, the IV characteristics were evaluated using 4200-SCS, and as a result, ohmic characteristics were obtained. The results are shown in Fig. 9.

The thickness of the mixed layer of the interface between the In layer and the a-IGZO layer was evaluated in the same manner as in Example 1 and found to be 4 nm. Further, it was confirmed by an energy dispersive X-ray analyzer, and as a result, the mixed layer was a mixed layer of an element constituting the oxide layer and an element constituting the first metal layer.

Comparative example 3

Film formation was carried out in the same manner as in Example 4 except that Mo was used instead of In, and the film formation power of IGZO was changed to 200 W (2.47 W/cm ² ), and Au/Ti/a-IGZO/Mo was obtained. /Ni/Ti/Si consists of a laminate. For the laminate, the IV characteristics were evaluated using 4200-SCS, and as a result, non-ohmic characteristics were obtained. The results are shown in Fig. 9.

Further, the thickness of the mixed layer at the interface between the Mo layer and the a-IGZO layer was evaluated in the same manner as in Example 1 and found to be 8 nm. Further, it was confirmed by an energy dispersive X-ray analyzer, and as a result, the mixed layer was a mixed layer of an element constituting the oxide layer and an element constituting the first metal layer.

Comparative example 4

Film formation was carried out in the same manner as in Example 4 except that Cr was used instead of In, and the film formation power of IGZO was set to 400 W (4.93 W/cm ² ), and Au/Ti/a-IGZO/Cr was obtained. /Ni/Ti/Si consists of a laminate. For the laminate, the IV characteristics were evaluated using 4200-SCS, and as a result, non-ohmic characteristics were obtained. The results are shown in Fig. 9.

Further, the thickness of the mixed layer at the interface between the Cr layer and the a-IGZO layer was evaluated in the same manner as in Example 1 and found to be 20 nm. Further, it was confirmed by an energy dispersive X-ray analyzer, and as a result, the mixed layer was a mixed layer of an element constituting the oxide layer and an element constituting the first metal layer.

In Example 4, since RF sputtering of IGZO was performed at a power of 1.5 W/cm ² or less, the implantation effect on In was suppressed, and the mixed layer was less than 5 nm, and ohmic characteristics were obtained. On the other hand, in Comparative Example 3 and Comparative Example 4, since RF sputtering of IGZO was performed at a high power exceeding 1.5 W/cm ² , Mo or Cr was oxidized to form a mixed layer of high resistance, which became non-ohmic characteristics. .

Example 5

As a support, a resin substrate (Toray PET substrate, Lumirror 60) was prepared, and this was mounted on a sputtering apparatus CS-200 (manufactured by ULVAC), and a Pd target was subjected to DC sputtering to form a 50 nm Pd (first). Metal layer). Temporarily first taken out to the atmosphere, and the support substrate with the Pd is again placed on the sputtering device CS-200, and the RF sputtering is performed (power 100W, 1.23W). /cm ² ) A 50 nm IGO film (In: Ga = 50: 50 at%) (metal oxide layer) was formed.

The PET/Pd/IGO laminate was taken out again to the atmosphere, and the region for the electrode was placed in a mask and mounted on a sputtering apparatus CS-200, and 50 nm was formed on the IGO film in the order of Ti and Au (second metal). Floor).

The IV characteristics of the obtained PET/Pd/IGO/Ti/Au laminate were evaluated by 4200-SCS (manufactured by Keithley Instruments Co., Ltd.), and as a result, the first metal layer Pd and the metal oxide layer IGO were obtained. The interface is ohmic junction and the interface between the metal oxide layer IGO and the second metal layer Ti is set to the Schottky junction diode property. Further, the ideal coefficient n of the diode was evaluated and found to be 4.7.

Further, the thickness of the mixed layer of the interface between the first metal layer Pd and the metal oxide layer IGO was evaluated in the same manner as in Example 1. As a result, it was 3 nm. Further, it was confirmed by an energy dispersive X-ray analyzer, and as a result, the mixed layer was a mixed layer of an element constituting the oxide layer and an element constituting the first metal layer.

Comparative Example 5

A PET/Pd/IGO/Ti/Au composition was obtained in the same manner as in Example 5 except that the RF power at the time of sputtering the film-forming metal oxide layer was 300 W (3.70 W/cm ² ). Base barrier diode. With respect to the obtained diode characteristics, it was confirmed that the interface between the first metal layer Pd and the metal oxide layer IGO was Schottky junction in the same manner as in Example 5, but the diode ideal coefficient n was 15.

The thickness of the mixed layer of the interface between the first metal layer Pd and the metal oxide layer IGO was evaluated in the same manner as in Example 1 and found to be 7 nm. Further, it was confirmed by an energy dispersive X-ray analyzer, and as a result, the mixed layer was a mixed layer of an element constituting the oxide layer and an element constituting the first metal layer.

The evaluation results of Examples 1 and 3-5 and Comparative Examples 1 and 3-5, which were produced by laminating a metal layer (first metal layer) between the support and the metal oxide layer, were shown. In Table 1.

In addition, the evaluation results of Example 2 and Comparative Example 2, which were produced without a laminate of a metal layer between the support and the metal oxide layer, are shown in Table 2.

[Industrial availability]

The laminate of the present invention can be used for an electronic component or the like. Moreover, the electronic component of the present invention can be used in circuits, electrical equipment, or vehicles.

The embodiments and/or the embodiments of the present invention have been described in detail hereinabove, and the embodiments and/or implementations of the embodiments of the present invention can be readily implemented without departing from the novel teachings and effects of the present invention. There are a lot of changes in the examples. Accordingly, such numerous modifications are intended to be included within the scope of the present invention.

The contents of the Japanese application specification which is the basis of the Paris priority of this application are all incorporated herein by reference.

1‧‧ ‧ laminated body

10‧‧‧Support body layer

20‧‧‧ mixed layer

30‧‧‧Metal oxide layer

Claims (16)

A laminated body obtained by sequentially laminating a support layer or a metal oxide layer, or sequentially laminating a support layer, a mixed layer, and a metal oxide layer, and the film thickness of the mixed layer is more than 0 nm and is 5.0 nm or less . The laminate according to claim 1, wherein the mixed layer is a mixed phase of an element constituting the metal oxide layer and an element constituting the support layer. The laminate according to claim 1 or 2, wherein the support layer is selected from the group consisting of a Si substrate, a SiC substrate, a GaN substrate, an Al ₂ O ₃ substrate, a ZnO substrate, a Ga ₂ O ₃ substrate, a yttria-stabilized zirconia substrate, and a titanic acid. The substrate in the substrate. The laminate according to claim 1 or 2, wherein the metal oxide layer contains a metal oxide containing at least one of In, Sn, Ge, Ti, Zn, Y, Sm, Ce, Nd, Ga, and Al. The laminate according to claim 1 or 2, wherein the metal oxide layer comprises an oxide selected from the group consisting of In ₂ O ₃ , ZnO, Ga ₂ O ₃ , SnO ₂ , indium aluminum oxide, indium gallium zinc oxide, indium tin zinc oxide One or more metal oxides of gallium zinc oxide, indium zinc oxide, and indium gallium oxide. a laminated body obtained by sequentially laminating a support layer, a first metal layer, a metal oxide layer, or sequentially stacking a support layer, a first metal layer, a mixed layer, a metal oxide layer, and the mixed layer The film thickness exceeds 0 nm and is 5.0 nm or less. The laminate according to claim 6, wherein the mixed layer is a mixed phase of an element constituting the metal oxide layer and an element constituting the first metal layer. The laminate according to claim 6 or 7, wherein the support layer is selected from the group consisting of a Si substrate, a SiC substrate, a GaN substrate, an Al ₂ O ₃ substrate, a ZnO substrate, a Ga ₂ O ₃ substrate, a yttria-stabilized zirconia substrate, and a titanic acid. The substrate in the substrate. The laminate of claim 6 or 7, wherein the metal oxide layer comprises In, A metal oxide of any one or more of Sn, Ge, Ti, Zn, Y, Sm, Ce, Nd, Ga, and Al. The laminate according to claim 6 or 7, wherein the metal oxide layer comprises an oxide selected from the group consisting of In ₂ O ₃ , ZnO, Ga ₂ O ₃ , SnO ₂ , indium aluminum oxide, indium gallium zinc oxide, indium tin zinc oxide. One or more metal oxides of gallium zinc oxide, indium zinc oxide, and indium gallium oxide. A method for producing a laminate, which is selected from the group consisting of a low voltage sputtering method, a plasma chemical vapor deposition method, an organic metal chemical vapor deposition method, an atomization chemical vapor deposition method, a molecular beam epitaxy method, and an ion plating method. The film formation method forms a metal oxide layer on the support layer. A method for producing a laminate, which is selected from the group consisting of a low voltage sputtering method, a plasma chemical vapor deposition method, an organic metal chemical vapor deposition method, an atomization chemical vapor deposition method, a molecular beam epitaxy method, and an ion plating method. The film formation method forms a metal oxide layer on the metal layer. An electronic component comprising the laminate of any one of claims 1 to 5, further comprising a metal layer on the metal oxide layer, exhibiting ohmic characteristics between the metal oxide layer and the support layer. An electronic component comprising the laminate of any one of claims 6 to 10, further comprising a second metal layer on the metal oxide layer, exhibiting ohmic between the metal oxide layer and the first metal layer characteristic. The electronic component of claim 13 or 14, wherein the electrical properties of the metal oxide layer and the metal layer or between the metal oxide layer and the second metal layer are nonlinear. A circuit, an electric device, or a vehicle that uses one or more of the electronic components according to any one of claims 13 to 15.