CN110957437B - 封装结构及其制造方法 - Google Patents

封装结构及其制造方法 Download PDF

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Publication number
CN110957437B
CN110957437B CN201910216280.2A CN201910216280A CN110957437B CN 110957437 B CN110957437 B CN 110957437B CN 201910216280 A CN201910216280 A CN 201910216280A CN 110957437 B CN110957437 B CN 110957437B
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die
adhesive layer
retaining wall
package structure
wall structure
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CN110957437A (zh
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郑礼辉
高金福
简智源
卢思维
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Abstract

一种封装结构包括衬底、管芯、粘着层、挡墙结构及包封体。所述管芯设置在所述衬底上。所述粘着层设置在所述衬底与所述管芯之间。所述粘着层具有弯曲的表面。所述挡墙结构设置在所述衬底上且被所述粘着层环绕。所述包封体包封所述管芯。

Description

封装结构及其制造方法
技术领域
本发明实施例涉及一种封装结构及其制造方法。更具体来说，本发明实施例涉及一种具有插座的封装结构及其制造方法。
背景技术
各种电子装置(例如，手机及其他移动电子设备)中所使用的半导体器件及集成电路通常是在单个半导体晶片(semiconductor wafer)上制造的。晶片的管芯可以在晶片级(wafer level)来与其他半导体器件或管芯一起进行处理及封装，且已针对晶片级封装(wafer level packaging)开发了各种技术。如何确保晶片级封装的可靠性已成为此领域中的挑战。
发明内容
一种封装结构包括衬底、管芯、粘着层、挡墙结构及包封体。所述管芯设置在所述衬底上。所述粘着层设置在所述衬底与所述管芯之间。所述粘着层具有弯曲的表面。所述挡墙结构设置在所述衬底上且被所述粘着层环绕。所述包封体包封所述管芯。
一种封装结构包括第一管芯、第二管芯、第三管芯、粘着层、挡墙结构及包封体。所述第二管芯以及所述第三管芯并排地设置在所述第一管芯上。所述第三管芯具有暴露出所述第一管芯的贯穿孔。粘着层夹置在所述第三管芯与所述第一管芯之间。所述粘着层包括位于所述贯穿孔中的凹陷部分。所述挡墙结构设置在所述第一管芯上且位于所述贯穿孔中。所述包封体包封所述第二管芯及所述第三管芯。
一种封装结构的制造方法包括至少以下步骤。提供第一管芯，所述第一管芯具有第一区及与所述第一区相邻的第二区。在所述第二区中形成挡墙结构。在所述第二区中配置粘着层。所述粘着层环绕所述挡墙结构。在所述第一区中放置第二管芯以及在所述第二区中放置第三管芯。所述第三管芯具有内侧部分、外侧部分以及位于所述内侧部分与所述外侧部分之间的沟槽。所述沟槽被介电材料局部地填充。使用包封体包封所述第二管芯及所述第三管芯。减小所述第三管芯的厚度以显露出填充在所述第三管芯的所述沟槽中的所述介电材料。移除所述第三管芯的所述内侧部分以暴露出所述第一管芯。
附图说明
结合附图阅读以下详细说明，会最好地理解本公开的各个方面。应注意，根据本行业中的标准惯例，各种特征并未按比例绘制。事实上，为论述清晰起见，可任意增大或减小各种特征的尺寸。
图1A到图1P是根据本公开一些实施例的封装结构的制造工艺的示意性剖视图。
图2是图1C所示的封装结构的制造工艺的中间阶段的示意性俯视图。
图3是图1D所示的第三管芯的示意性俯视图。
图4A是根据本公开一些实施例的图1E所示的区的示意性放大图。
图4B是根据本公开一些替代性实施例的图1E所示的区的示意性放大图。
图4C是根据本公开一些替代性实施例的图1E所示的区的示意性放大图。
图5是根据本公开一些实施例的图1P所示的封装结构的应用的示意性剖视图。
附图标号说明
10：封装结构
20：光学器件
100：第一管芯
102、502：半导体衬底
104：半导体穿孔
200：连接件
202、1002：导电柱
204、1004：导电凸块
300：挡墙结构
400：粘着层
400a：下沉部分
400b：溢流部分
500：第二管芯
504：导电接垫
600：第三管芯
602：内侧部分
604：外侧部分
606：沟槽
700：介电材料
800：包封体
800a：包封材料
900：重布线结构
902：介电层
904：重布线导电层
1000：导电端子
1100：衬底
AG：气隙
C：载板
CP：切割工艺
DB：剥离层
F：框架结构
H300：厚度
H400：最大厚度
R：区
R1：第一区
R100：后表面
R2：第二区
S：间距
SW：侧壁
T400a、T400b：弯曲的表面
T500、T600、T700、T800、T800a：顶表面
TH：贯穿孔
TP：胶带
UF1、UF2：底部填充层
W400、W600：宽度。
具体实施方式
以下公开内容提供用于实施所提供主题的不同特征的许多不同的实施例或实例。以下阐述组件及排列的具体实例以简化本公开。当然，这些仅为实例而非旨在进行限制。举例来说，在以下说明中，在第二特征之上或第二特征上形成第一特征可包括其中第一特征与第二特征被形成为直接接触的实施例，且也可包括其中第一特征与第二特征之间可形成附加特征从而使得第一特征与第二特征可不直接接触的实施例。另外，本公开在各种实例中可重复使用参考编号及/或字母。此种重复使用是为了简明及清晰起见，且自身并不表示所论述的各个实施例及/或配置之间的关系。
此外，为易于说明，本文中可能使用例如“在…之下(beneath)”、“在…下方(below)”、“下部的(lower)”、“在…上方(above)”、“上部的(upper)”等空间相对性用语来阐述图中所示一个元件或特征与另一(其他)元件或特征的关系。所述空间相对性用语旨在除图中所绘示的取向外还囊括器件在使用或操作中的不同取向。装置可具有其他取向(旋转90度或处于其他取向)，且本文中所用的空间相对性描述语可同样相应地进行解释。
本公开也可包括其他特征及工艺。举例来说，可包括测试结构，以帮助对三维(three-dimensional，3D)封装或三维集成电路(three-dimensional integratedcircuit，3DIC)器件进行验证测试。所述测试结构可包括例如在重布线层中或在衬底上形成的测试接垫，以使得能够对三维封装或三维集成电路进行测试、对探针及/或探针卡(probe card)进行使用等。可对中间结构以及最终结构执行验证测试。另外，本文中所公开的结构及方法可与包括对已知良好管芯(known good die)进行中间验证的测试方法结合使用，以提高良率并降低成本。
图1A到图1P是根据本公开一些实施例的封装结构10的制造工艺的示意性剖视图。参照图1A，提供第一管芯100。第一管芯100具有第一区R1及第二区R2。在一些实施例中，第一区R1与第二区R2相邻。举例来说，第一区R1可紧邻第二区R2。在一些实施例中，第一管芯100包括半导体衬底102及嵌置在半导体衬底102中的多个半导体穿孔(硅穿孔)(throughsemiconductor via(through silicon via)，TSV)104。
在一些实施例中，半导体衬底102可由以下材料制成：合适的元素半导体，例如晶体硅、金刚石或锗；合适的化合物半导体，例如砷化镓、碳化硅、砷化铟或磷化铟；或者合适的合金半导体，例如碳化硅锗、磷化镓砷或磷化镓铟。在一些实施例中，半导体衬底102具有形成在其中的多个半导体器件(例如，晶体管、电容器、光电二极管、其组合等)以及多个光学器件(例如，波导、滤波器、光电二极管、发光二极管、其组合等)。在一些实施例中，半导体器件形成在第一区R1中且光学器件形成在第二区R2中。由此，第一管芯100的第二区R2可适于传送/接收光学信号。然而，本公开并非仅限于此。在一些替代性实施例中，半导体器件及光学器件可分别形成在第一区R1及第二区R2二者中。
在一些实施例中，TSV 104位于第一区R1内。换句话说，第一管芯100的第二区R2不含TSV。如图1A所示，TSV 104的深度小于半导体衬底102的厚度。也就是说，在这一阶段，TSV104不穿透半导体衬底102。
参照图1B，在第一管芯100上形成多个连接件200及挡墙结构300。在一些实施例中，连接件200形成在第一区R1中。在一些实施例中，每一连接件200包括导电柱202及设置在导电柱202上的导电凸块204。如图1B所示，导电柱202设置为与TSV 104对应。在一些实施例中，连接件200被称为“微凸块(micro bump)”。在一些实施例中，连接件200可通过以下步骤形成。首先，在第一管芯100上毯覆地(blanketly)形成晶种层(未示出)。晶种层可通过例如溅射工艺、物理气相沉积(physical vapor deposition，PVD)工艺等来形成。在一些实施例中，晶种层可包含例如铜、钛-铜合金或其他合适的材料。接着，在晶种层上形成光刻胶图案层(未示出)。光刻胶图案层具有暴露出晶种层的一些部分的开口。在一些实施例中，晶种层的被暴露出的部分的位置对应于第一管芯100的TSV 104的位置。之后，在被暴露出的晶种层上依序沉积导电材料(未示出)及焊料材料(未示出)。也就是说，导电材料及焊料材料位于光刻胶图案层的开口内。在一些实施例中，导电材料及焊料材料可通过镀覆工艺形成。镀覆工艺为例如电镀、无电镀覆、浸镀等。在一些实施例中，导电材料包括例如铜、铜合金等。在形成导电材料及焊料材料之后，移除光刻胶图案层。在移除光刻胶图案层后，暴露出晶种层的未被导电材料及焊料材料覆盖的部分。在一些实施例中，可通过例如刻蚀、灰化或其他合适的移除工艺来移除/剥除光刻胶图案层。接着，移除未被导电材料及焊料材料覆盖的晶种层。可通过刻蚀工艺来移除晶种层的被暴露出的部分。在一些实施例中，剩余的晶种层与导电材料构成导电柱202。之后，对焊料材料执行回焊工艺以将焊料材料转变成导电凸块204。
在一些实施例中，在第二区R2中形成挡墙结构300。在一些实施例中，第一区R1中的连接件200与第二区R2中的挡墙结构300可同时形成。举例来说，连接件200的导电柱202与挡墙结构300可由同一工艺步骤形成。也就是说，形成在第一区R1中的导电材料及晶种层被称为导电柱202而形成在第二区R2中的导电材料及晶种层被称为挡墙结构300。如图1B所示，在第二区R2中未形成导电凸块204。然而，本公开并非仅限于此。在一些替代性实施例中，可在第一区R1及第二区R2两者中皆形成导电凸块204，且挡墙结构300是由位于第二区R2中的导电材料、晶种层以及导电凸块所构成。也就是说，在剖视图中，挡墙结构300可具有与连接件200的几何形状相同的几何形状。在一些实施例中，挡墙结构300的材料包括金属。举例来说，挡墙结构300可由铜、铜合金、钛-铜合金、焊料、其他合适的材料或其组合制成。
参照图1C，在第一管芯100的半导体衬底102上形成粘着层400。在一些实施例中，在第二区R2中配置(dispense)粘着层400。在一些实施例中，粘着层400是液体型粘着层。举例来说，粘着层400包括液体型管芯贴合膜(dieattach film，DAF)或液体型导线上膜(filmover wire，FOW)。在一些实施例中，液体型粘着层的粘性(viscosity)比传统的膜型粘着层的粘性低。在一些实施例中，粘着层400不含填料(filler)。不同于传统的膜型粘着层，液体型粘着层可通过配置方法(dispensing method)形成为任何期望的图案。举例来说，粘着层400可通过网版印刷、喷墨印刷、三维印刷等形成。以下将结合图1C及图2来论述连接件200、挡墙结构300及粘着层400的配置。
图2是图1C所示的封装结构10的制造工艺的中间阶段的示意性俯视图。参照图1C及图2，连接件200位于第一区R1中。在一些实施例中，连接件200排列成阵列。另一方面，挡墙结构300及粘着层400是环形的。在一些实施例中，粘着层400被形成为围绕或环绕挡墙结构300。在一些实施例中，挡墙结构300与粘着层400彼此分开。也就是说，在环形挡墙结构300与环形粘着层400之间可存在间距S。在一些实施例中，挡墙结构300与粘着层400可为同心环。
参照图1D，提供第二管芯500及第三管芯600。在一些实施例中，第二管芯500包括半导体衬底502及多个导电接垫504。在一些实施例中，半导体衬底502可由以下材料制成：合适的元素半导体，例如晶体硅、金刚石或锗；合适的化合物半导体，例如砷化镓、碳化硅、砷化铟或磷化铟；或者合适的合金半导体，例如碳化硅锗、磷化镓砷或磷化镓铟。在一些实施例中，半导体衬底502可包括形成在半导体衬底502中的有源组件(例如，晶体管等)及可选的无源组件(例如，电阻器、电容器、电感器等)。导电接垫504分布在半导体衬底502上。在一些实施例中，导电接垫504包括例如铝接垫、铜接垫或其他合适的金属接垫。
以下将结合图1D及图3论述第三管芯600的配置。参照图1D及图3，第三管芯600具有内侧部分602、外侧部分604以及位于内侧部分602与外侧部分604之间的沟槽606。在一些实施例中，第三管芯600是其中形成有沟槽606的大体积/块状(bulky)半导体衬底。在一些实施例中，沟槽606在俯视图中展现出环形形状。沟槽606将半导体衬底划分成内侧部分602及外侧部分604。如图1D所示，沟槽606的深度小于第三管芯600的厚度。也就是说，沟槽606不穿透第三管芯600。因此，在这一阶段，内侧部分602与外侧部分604通过半导体衬底的底部部分彼此连接。在一些实施例中，半导体衬底可由以下材料制成：合适的元素半导体，例如晶体硅、金刚石或锗；合适的化合物半导体，例如砷化镓、碳化硅、砷化铟或磷化铟；或者合适的合金半导体，例如碳化硅锗、磷化镓砷或磷化镓铟。在一些实施例中，第三管芯600是虚设管芯(dummydie)。举例来说，第三管芯600可不含有源组件及无源组件。作为另外一种选择，第三管芯600可包括有源组件及无源组件，但是这些组件的功能被禁用。
在一些实施例中，第三管芯600的沟槽606被介电材料700部分地填充。举例来说，介电材料700覆盖沟槽606的底表面以及沟槽606的侧壁的一部分。另一方面，沟槽606的侧壁的另一部分未被介电材料700覆盖。在一些实施例中，介电材料700包括聚酰亚胺、环氧树脂、丙烯酸树脂、酚醛树脂、苯并环丁烯(benzocyclobutene，BCB)、聚苯并恶唑(polybenzooxazole，PBO)或任何其他合适的聚合物系介电材料。
参照图1E，将图1D所示的第二管芯500及第三管芯600放置在图1C所示的第一管芯100上。在一些实施例中，可通过拾取及放置工艺(pick-and-placeprocess)来放置第二管芯500及第三管芯600。在一些实施例中，第二管芯500与第三管芯600并排地设置在第一管芯100上。举例来说，第二管芯500被放置在第一区R1中且第三管芯600被放置在第二区R2中。应注意，由于第一管芯100为用作支撑第二管芯500及第三管芯600的载板，因此第一管芯100在一些实施例中可被称为“衬底”。
如图1E所示，第二管芯500被放置成使第二管芯500的导电接垫504贴合到连接件200。举例来说，每一导电接垫504与对应的导电凸块204直接接触。在将第二管芯500放置在连接件200上之后，可执行回焊工艺来将导电接垫504固定到导电凸块204上。由此，第二管芯500与第一管芯100之间的电连接可通过连接件200来实现。也就是说，连接件200设置在第一管芯100与第二管芯500之间，且第二管芯500经由连接件200与第一管芯100电连接。在一些实施例中，在第一管芯100与第二管芯500之间形成底部填充层UF1。举例来说，可形成底部填充层UF1来包绕连接件200及导电接垫504的周围以保护这些元件。在一些实施例中，底部填充层UF1可为可选的。
在一些实施例中，可通过以下步骤将第三管芯600放置在第一管芯100上。首先，将第三管芯600的沟槽606与挡墙结构300对齐。之后，使第三管芯600向下移动以将挡墙结构300安置(fitting)到第三管芯600的沟槽606中。也就是说，将挡墙结构300插入到沟槽606中。同时，将第三管芯600的外侧部分604贴合到粘着层400。换句话说，粘着层400夹置在第一管芯100与第三管芯600之间。通过将挡墙结构300安置到沟槽606中以及通过将第三管芯600的外侧部分604贴合到粘着层400，可将第三管芯600临时固定就位。接着，按压抵靠粘着层400的第三管芯600以确保第三管芯600的外侧部分604被牢固地固定到粘着层400上。之后，将粘着层400固化(cure)以强化第一管芯100与第三管芯600的外侧部分604之间的粘着力。如图1E所示，介电材料700与挡墙结构300间隔开。另一方面，在第三管芯600的内侧部分602与第一管芯100之间形成气隙(air gap)AG。举例来说，位于第三管芯600的内侧部分602正下方的区不含粘着层。也就是说，粘着层400被形成为与第三管芯600的外侧部分604的形状对应。如上所述，液体型粘着层能够被形成为任何期望的图案。因此，通过使用液体型粘着层作为粘着层400的材料，可将粘着层400形成为与外侧部分604的形状对应从而容易地获得前述配置。
在一些实施例中，粘着层400在固化之前是粘性流体(viscous fluid)。由于在粘着层400固化之前按压抵靠粘着层400的第三管芯600，因此粘着层400的一些部分将被横向挤压。举例来说，粘着层400将朝挡墙结构300流动。由此，在对第三管芯600进行按压后，挡墙结构300与粘着层400之间的间距S(图1C及图2所示)将不再存在且粘着层400将接触挡墙结构300。以下将结合图1E及图4A论述粘着层400的几何形状。
图4A是根据本公开一些实施例的图1E所示的区R的示意性放大图。参照图1E及图4A，横向流动的粘着层400可被挡墙结构300阻挡。也就是说，挡墙结构300不仅可做为将第一管芯100与第三管芯600对齐的对位标记，而且还被用作阻挡粘着层400外溢的障壁结构。举例来说，如图4A所示，粘着层400朝挡墙结构300的流动被挡墙结构300阻挡。由于粘着层400的粘性特质，在第三管芯600的外侧部分604与挡墙结构300之间的粘着层400中可能形成下沉部分400a。在一些实施例中，粘着层400的下沉部分400a具有弯曲的表面T400a。在一些实施例中，弯曲的表面T400a是凹陷表面，因此下沉部分400a可被称为“凹陷部分”。在一些实施例中，弯曲的表面T400a位于第三管芯600的沟槽606中。举例来说，弯曲的表面T400a位于挡墙结构300的顶表面的边缘与第三管芯600的外侧部分604的底表面的边缘之间。如图4A所示，粘着层400的最大厚度H400实质上等于挡墙结构300的厚度H300。也就是说，粘着层400完全覆盖挡墙结构300的侧壁。另一方面，粘着层400不覆盖沟槽606的侧壁及外侧部分604的侧壁。应注意，图4A所示的粘着层400的配置仅用作示例性例示，且本公开并非仅限于此。根据在图1C所示的步骤中配置的粘着层400的量而定，图1E所示的粘着层400在一些替代性实施例中可表现出其他几何形状。以下将结合图4B及图4C论述粘着层400的其他几何形状。
图4B是根据本公开一些替代性实施例的图1E所示的区R的示意性放大图。参照图4B，当所配置的粘着层400的量不足时，粘着层400的流动可容易地被挡墙结构300阻挡。应注意，本文所用用语“不足”是指所配置的粘着层400的量小于图4A所示的量，但仍足以将第三管芯600牢固地固定在第一管芯100上的情况。由于粘着层400的粘性特质，在第三管芯600的外侧部分604与挡墙结构300之间的粘着层400中可能形成下沉部分400a。在一些实施例中，粘着层400的下沉部分400a具有弯曲的表面T400a。在一些实施例中，弯曲的表面T400a是凹陷表面，因此下沉部分400a可被称为“凹陷部分”。在一些实施例中，弯曲的表面T400a位于第三管芯600的沟槽606中。举例来说，弯曲的表面T400a位于挡墙结构300的侧壁与第三管芯600的外侧部分604的底表面的边缘之间。如图4B所示，粘着层400的最大厚度H400小于挡墙结构300的厚度H300。也就是说，粘着层400部分地覆盖挡墙结构300的侧壁。举例来说，挡墙结构300的侧壁的至少一部分被暴露出。另一方面，粘着层400不覆盖沟槽606的侧壁及外侧部分604的侧壁。
图4C是根据本公开一些替代性实施例的图1E所示的区R的示意性放大图。参照图4C，当所配置的粘着层400的量过量时，粘着层400朝挡墙结构300的流动无法被挡墙结构300的高度阻挡。因此，粘着层400将在挡墙结构300的顶表面上外溢且在挡墙结构300上会产生粘着层400的溢流部分400b。应注意，本文所用用语“过量”是指所配置的粘着层400的量比图4A所示的量多的情况。在一些实施例中，粘着层400完全覆盖挡墙结构300的侧壁且粘着层400的最大厚度H400大于挡墙结构300的厚度H300。应注意，尽管粘着层400的外溢无法被挡墙结构300的高度阻挡，然而挡墙结构300的顶表面仍可用作缓冲区来防止粘着层400外溢到挡墙结构300的另一侧。也就是说，挡墙结构300的顶表面提供足够的缓冲面积来使粘着层400的溢流部分400b部分地覆盖挡墙结构300的顶表面。在一些实施例中，粘着层400的溢流部分400b也部分地覆盖沟槽606的侧壁及外侧部分604的侧壁。
在一些实施例中，粘着层400的溢流部分400b具有弯曲的表面T400b。在一些实施例中，弯曲的表面T400b是凹陷表面，因此溢流部分400b可被称为“凹陷部分”。在一些实施例中，弯曲的表面T400b位于第三管芯600的沟槽606中。举例来说，弯曲的表面T400b位于沟槽606的侧壁与挡墙结构300的顶表面之间。
参照图1F，在将第二管芯500及第三管芯600放置在第一管芯100上之后，在第一管芯100上形成包封材料800a以包封第二管芯500及第三管芯600。在一些实施例中，包封材料800a例如是模塑化合物、模塑底部填充胶、树脂(例如环氧树脂)等。在一些实施例中，包封材料800a包含填料。填料可为由二氧化硅、二氧化铝等制成的粒子。在一些实施例中，包封材料800a的材料不同于粘着层400的材料。包封材料800a可通过模塑工艺(例如压缩模塑工艺(compression molding process))来形成。在一些实施例中，第二管芯500与第三管芯600被包封材料800a完全包封。举例来说，包封材料800a的顶表面T800a位于比第二管芯500的顶表面T500及第三管芯600的顶表面T600高的水平高度处。换句话说，第二管芯500及第三管芯600不会被显露出而是被包封材料800a很好地保护住。如图1F所示，气隙AG以及第三管芯600的沟槽606被第三管芯600的外侧部分604、第三管芯600的内侧部分602、粘着层400以及挡墙结构300密封，因此包封材料800a不会填充到气隙AG以及第三管芯600的沟槽606中。
参照图1F及图1G，包封材料800a的一部分被移除以暴露出第二管芯500的顶表面T500以及第三管芯600的顶表面T600。在一些实施例中，包封材料800a的所述部分可通过研磨工艺(例如，机械研磨工艺、化学机械抛光(chemical mechanical polishing，CMP)工艺或其他合适的机制)来移除。在对包封材料800a进行研磨之后，在第一管芯100上形成包封体800以横向包封第二管芯500及第三管芯600。如图1G所示，包封体800的顶表面T800、第二管芯500的顶表面T500及第三管芯600的顶表面T600实质上共面。
参照图1H，提供上面形成有剥离层DB的载板C。在一些实施例中，剥离层DB形成在载板C的顶表面上。图1G所示的结构被上下翻转且置于载板C上。举例来说，图1G所示的结构可被放置成使第二管芯500的顶表面T500、第三管芯600的顶表面T600及包封体800的顶表面T800贴合到剥离层DB。载板C为例如玻璃衬底。在一些实施例中，剥离层DB可为形成在玻璃衬底上的光热转换(light-to-heat conversion，LTHC)释放层。在一些替代性实施例中，剥离层DB可为胶水层或聚合物系缓冲层。然而，以上列出的载板C及剥离层DB的材料仅为示例性例示，且本公开并非仅限于此。在一些替代性实施例中，可改用其他材料作为载板C，只要所述材料能够在承载/支撑随后形成的元件的同时耐受后续工艺即可。类似地，也可改用其他材料作为剥离层DB，只要所述材料能够在后续工艺中执行释放功能即可。
参照图1H及图1I，对第一管芯100的后表面R100执行平坦化工艺。在一些实施例中，平坦化工艺包括机械研磨工艺及/或化学机械抛光(CMP)工艺。在一些实施例中，将半导体衬底102平坦化直到显露出TSV 104为止。举例来说，在平坦化工艺之后，TSV 104穿透半导体衬底102。TSV 104能够实现第一管芯100的前侧与背侧之间的电连通。在一些实施例中，在显露出TSV 104之后，可进一步对第一管芯100进行研磨以减小第一管芯100的总厚度。
参照图1J，在第一管芯100上与第二管芯500及第三管芯600相对侧依序形成重布线结构900及多个导电端子1000。在一些实施例中，重布线结构900与第一管芯100及第二管芯500电连接。另一方面，重布线结构900与第三管芯600电绝缘。在一些实施例中，重布线结构900包括交替堆叠的多个介电层902与多个重布线导电层904。在一些实施例中，重布线导电层904与第一管芯100的TSV 104电连接。举例来说，TSV 104接触重布线结构900的最底部重布线导电层904。在一些实施例中，重布线导电层904的材料包括铝、钛、铜、镍、钨及/或其合金。重布线导电层904可通过例如电镀、沉积及/或光刻及刻蚀形成。在一些实施例中，介电层902的材料包括聚酰亚胺、环氧树脂、丙烯酸树脂、酚醛树脂、苯并环丁烯(BCB)、聚苯并恶唑(PBO)或其他合适的聚合物系介电材料。举例来说，可通过例如旋转涂布(spin-oncoating)、化学气相沉积(chemical vapor deposition，CVD)、等离子体增强型化学气相沉积(plasma-enhanced chemical vapor deposition，PECVD)等合适的制作技术来形成介电层902。
在一些实施例中，每一导电端子1000包括导电柱1002及设置在导电柱1002上的导电凸块1004。在一些实施例中，导电端子1000被称为“受控塌陷晶粒连接(controlledcollapse chip connection，C4)凸块”。在一些实施例中，导电端子1000可通过以下步骤形成。首先，在最顶部介电层902上形成晶种层(未示出)。晶种层延伸到最顶部介电层902的开口中以接触最顶部重布线导电层904。晶种层可通过例如溅射工艺、物理气相沉积(PVD)工艺等来形成。在一些实施例中，晶种层可包含例如铜、钛-铜合金或其他合适的材料。接着，在晶种层上形成具有多个开口的光刻胶图案层(未示出)。光刻胶图案层的开口暴露出位于最顶部介电层902的开口中的晶种层且暴露出位于最顶部介电层902上的晶种层的至少一部分。之后，在被暴露出的晶种层上依序沉积导电材料(未示出)及焊料材料(未示出)。也就是说，导电材料及焊料材料位于光刻胶图案层的开口内。在一些实施例中，导电材料及焊料材料可通过镀覆工艺形成。镀覆工艺为例如电镀、无电镀覆、浸镀等。在一些实施例中，导电材料包括例如铜、铜合金等。在形成导电材料及焊料材料之后，移除光刻胶图案层。在移除光刻胶图案层后，暴露出晶种层的未被导电材料及焊料材料覆盖的部分。在一些实施例中，可通过例如刻蚀、灰化或其他合适的移除工艺来移除/剥除光刻胶图案层。接着，移除未被导电材料及焊料材料覆盖的晶种层。可通过刻蚀工艺来移除晶种层的被暴露出的部分。在一些实施例中，剩余的晶种层与导电材料构成导电柱1002。之后，对焊料材料执行回焊工艺以将焊料材料转变成导电凸块1004。
参照图1J及图1K，将图1J所示的结构上下翻转且将所述结构放置在胶带TP上。接着，将载板C及剥离层DB从第二管芯500、第三管芯600及包封体800移除。在一些实施例中，可通过紫外激光辐照剥离层DB(例如，LTHC释放层)来使载板C及剥离层DB可从第二管芯500、第三管芯600及包封体800剥落。然而，剥离工艺并非仅限于此。在一些替代性实施例中，可使用其他合适的载板去除方法。
参照图1K及图1L，减小第二管芯500的厚度、第三管芯600的厚度及包封体800的厚度。在一些实施例中，将包封体800、第二管芯500及第三管芯600研磨到填充在第三管芯600的沟槽606中的介电材料700被显露出为止。也就是说，移除包封体800的一部分、第二管芯500的一部分及第三管芯600的一部分。在一些实施例中，研磨工艺可包括机械研磨工艺、化学机械抛光(CMP)工艺或其他合适的机制。在一些实施例中，在显露出介电材料700之后，可对第二管芯500、第三管芯600、包封体800以及介电材料700进行进一步研磨以减小随后形成的封装结构的总厚度。在研磨工艺之后，介电材料700的顶表面T700、包封体800的顶表面T800、第二管芯500的顶表面T500及第三管芯600的顶表面T600实质上共面。另一方面，沟槽606穿透第三管芯600。如图1L所示，在这一阶段，第三管芯600的内侧部分602与外侧部分604彼此间隔开。举例来说，介电材料700夹置在第三管芯600的内侧部分602与外侧部分604之间以将这两个元件分隔开。
参照图1L及图1M，移除胶带TP并将图1L所示的结构安装在框架结构F上以进行进一步处理。举例来说，可执行清洁工艺来移除由之前的工艺步骤产生的杂质或残留物。
参照图1N，对被暴露出的介电材料700执行切割工艺CP。在一些实施例中，切割工艺CP可包括激光钻孔工艺、机械钻孔工艺、其组合或任何其他合适的分割工艺。在一些实施例中，在切割工艺CP期间移除介电材料700的一部分。举例来说，可切穿介电材料700来使介电材料700的一部分残留在外侧部分604的侧壁上而介电材料700的另一部分残留在内侧部分602的侧壁上。在切割工艺CP之后，内侧部分602与外侧部分604彼此断开。
参照图1O，移除内侧部分602及介电材料700残留在内侧部分602的侧壁上的部分以在第三管芯600中形成贯穿孔TH。如上所述，位于内侧部分602正下方的区包括气隙AG且不含粘着层。据此，液体型粘着层400能够牢固地固定第三管芯600的外侧部分604且同时使第三管芯600的内侧部分602能够被容易地移除。在一些实施例中，由于内侧部分602被移除而外侧部分604留下来，因此外侧部分604在下文中可被称为第三管芯600。如上所述，第三管芯600可为虚设管芯。因此，在一些实施例中，第三管芯600是电浮动(electricallyfloating)的。如图1O所示，第三管芯600的贯穿孔TH暴露出第一管芯100的第二区R2的一些部分。举例来说，形成在第一管芯100的第二区R2中的光学器件可被贯穿孔TH暴露出。在一些实施例中，残留的介电材料700局部地覆盖贯穿孔TH的侧壁SW。如图1O所示，挡墙结构300及凹陷部分(图4A及图4B所示的下沉部分400a及图4C所示的溢流部分400b)位于第三管芯600的贯穿孔TH中。参照图1N及图1O，由于贯穿孔TH是通过将内侧部分602以及介电材料700的位于沟槽606中的部分移除来获得的，因此贯穿孔TH的侧壁SW对应于沟槽606的侧壁。因此，在一些实施例(举例来说，与图4C对应的实施例)中，凹陷部分(图4C所示的溢流部分400b)部分地覆盖贯穿孔TH的侧壁SW及挡墙结构300的顶表面。如图1O所示，粘着层400的宽度W400大于第三管芯600的宽度W600。然而，本公开并非仅限于此。在一些替代性实施例中，粘着层400的宽度W400可实质上等于或小于第三管芯600的宽度W600。
参照图1P，移除框架结构F且对图1O所示的结构执行单体化工艺。在一些实施例中，分割工艺或单体化工艺通常涉及利用旋转刀片或激光束进行分割。换句话说，分割工艺或单体化工艺为例如激光切割工艺、机械切割工艺或其他合适的工艺。之后，将被单体化的结构放置在衬底1100上以获得封装结构10。在一些实施例中，衬底1100可包括印刷电路板(printed circuit board，PCB)等。在一些实施例中，可在衬底1100上可选地形成底部填充层UF2以保护重布线结构900及导电端子1000。在一些实施例中，图1P所示的封装结构10可被称为“衬底上晶片上芯片(Chip on Wafer on Substrate，CoWoS)封装”。也就是说，在一些实施例中，第一管芯100可用作中介层(interposer)。然而，本公开并非仅限于此。在一些替代性实施例中，图1A到图1P所示的工艺步骤可适用于制作其他类型的封装，例如集成扇出型(integrated fan-out，InFO)封装等。
在一些实施例中，通过移除第三管芯600的内侧部分602以形成贯穿孔TH，可在贯穿孔TH中放置其他光学器件以实现光学应用。图5是根据本公开一些实施例的图1P所示的封装结构10的应用的示意性剖视图。参照图5，光学器件20插入到第三管芯600的贯穿孔TH中。也就是说，贯穿孔TH可用作插座(socket)。光学器件20包括例如光纤、激光发射器等。如上所述，贯穿孔TH暴露出嵌置在第一管芯100中的光学器件。由此，在插入到贯穿孔TH中后，光学器件20能够与第一管芯100中的光学器件进行光学通信，从而实现光学应用。
根据本公开的一些实施例，一种封装结构包括衬底、管芯、粘着层、挡墙结构及包封体。所述管芯设置在所述衬底上。所述粘着层设置在所述衬底与所述管芯之间。所述粘着层具有弯曲的表面。所述挡墙结构设置在所述衬底上且被所述粘着层环绕。所述包封体包封所述管芯。
根据本公开的一些实施例，所述粘着层包括液体型管芯贴合膜(die attachfilm，DAF)或液体型导线上膜(film over wire，FOW)。
根据本公开的一些实施例，所述粘着层不含填料。
根据本公开的一些实施例，所述粘着层具有下沉部分，且所述下沉部分的表面是所述弯曲的表面。
根据本公开的一些实施例，所述粘着层的最大厚度小于或实质上等于所述挡墙结构的厚度。
根据本公开的一些实施例，所述粘着层具有溢流部分，所述溢流部分局部地覆盖所述管芯的侧壁以及所述挡墙结构的顶表面，且所述溢流部分的表面是所述弯曲的表面。
根据本公开的一些实施例，所述粘着层的最大厚度大于所述挡墙结构的厚度。
根据本公开的一些替代性实施例，一种封装结构包括第一管芯、第二管芯、第三管芯、粘着层、挡墙结构及包封体。所述第二管芯以及所述第三管芯并排地设置在所述第一管芯上。所述第三管芯具有暴露出所述第一管芯的贯穿孔。粘着层夹置在所述第三管芯与所述第一管芯之间。所述粘着层包括位于所述贯穿孔中的凹陷部分。所述挡墙结构设置在所述第一管芯上且位于所述贯穿孔中。所述包封体包封所述第二管芯及所述第三管芯。
根据本公开的一些替代性实施例，所述封装结构还包括重布线结构与多个导电端子。所述重布线结构与所述第二管芯及所述第三管芯相对地位于所述第一管芯上。所述导电端子位于所述重布线结构上。
根据本公开的一些替代性实施例，所述封装结构还包括设置在所述第二管芯与所述第一管芯之间的多个连接件，且所述第二管芯通过所述多个连接件与所述第一管芯电连接。
根据本公开的一些替代性实施例，所述封装结构还包括局部地覆盖所述贯穿孔的侧壁的介电材料。
根据本公开的一些替代性实施例，所述第三管芯是电浮动(electricallyfloating)的。
根据本公开的一些替代性实施例，所述凹陷部分局部地覆盖所述贯穿孔的侧壁及所述挡墙结构的顶表面。
根据本公开的一些替代性实施例，所述挡墙结构包括金属。
根据本公开的一些实施例，一种封装结构的制造方法包括至少以下步骤。提供第一管芯，所述第一管芯具有第一区及与所述第一区相邻的第二区。在所述第二区中形成挡墙结构。在所述第二区中配置粘着层。所述粘着层环绕所述挡墙结构。在所述第一区中放置第二管芯以及在所述第二区中放置第三管芯。所述第三管芯具有内侧部分、外侧部分以及位于所述内侧部分与所述外侧部分之间的沟槽。所述沟槽被介电材料局部地填充。使用包封体包封所述第二管芯及所述第三管芯。减小所述第三管芯的厚度以显露出填充在所述第三管芯的所述沟槽中的所述介电材料。移除所述第三管芯的所述内侧部分以暴露出所述第一管芯。
根据本公开的一些实施例，在所述第二区中放置所述第三管芯的所述步骤包括至少以下步骤。将所述挡墙结构与所述第三管芯的所述沟槽对齐。将所述挡墙结构安置(fitting)到所述第三管芯的所述沟槽中。将所述第三管芯的所述外侧部分贴合到所述粘着层。
根据本公开的一些实施例，移除所述第三管芯的所述内侧部分的所述步骤包括至少以下步骤。执行激光钻孔工艺，以移除所述介电材料的一部分来使所述第三管芯的所述内侧部分与所述外侧部分彼此断开。移除所述第三管芯的所述内侧部分，以形成暴露出所述第一管芯的贯穿孔。
根据本公开的一些实施例，所述第一管芯在所述第一区中包括多个硅穿孔(through silicon via，TSV)且在所述第二区中不含硅穿孔。
根据本公开的一些实施例，所述封装结构的制造方法还包括在所述第一区中形成多个连接件，其中所述第一区中的所述多个连接件及所述第二区中的所述挡墙结构是同时形成的。
根据本公开的一些实施例，所述封装结构的制造方法还包括在所述第一管芯上与所述第二管芯及所述第三管芯相对侧依序形成重布线结构及多个导电端子。
以上概述了若干实施例的特征，以使所属领域中的技术人员可更好地理解本公开的各个方面。所属领域中的技术人员应理解，其可容易地使用本公开作为设计或修改其他工艺及结构的基础来施行与本文中所介绍的实施例相同的目的及/或实现与本文中所介绍的实施例相同的优点。所属领域中的技术人员还应认识到，这些等效构造并不背离本公开的精神及范围，而且他们可在不背离本公开的精神及范围的条件下对其作出各种改变、代替及变更。

Claims (26)

1.一种封装结构，其特征在于，包括：
衬底；
管芯，设置在所述衬底上，其中所述管芯具有暴露出所述衬底的贯穿孔；
粘着层，设置在所述衬底与所述管芯之间，其中所述粘着层具有弯曲的表面；
挡墙结构，设置在所述衬底上且被所述粘着层环绕；以及
包封体，包封所述管芯。
2.根据权利要求1所述的封装结构，其特征在于，所述粘着层包括液体型管芯贴合膜或液体型导线上膜。
3.根据权利要求1所述的封装结构，其特征在于，所述粘着层不含填料。
4.根据权利要求1所述的封装结构，其特征在于，所述粘着层具有下沉部分，且所述下沉部分的表面是所述弯曲的表面。
5.根据权利要求4所述的封装结构，其特征在于，所述粘着层的最大厚度小于或等于所述挡墙结构的厚度。
6.根据权利要求1所述的封装结构，其特征在于，所述粘着层具有溢流部分，所述溢流部分局部地覆盖所述管芯的侧壁以及所述挡墙结构的顶表面，且所述溢流部分的表面是所述弯曲的表面。
7.根据权利要求6所述的封装结构，其特征在于，所述粘着层的最大厚度大于所述挡墙结构的厚度。
8.一种封装结构，其特征在于，包括：
第一管芯；
第二管芯以及第三管芯，并排地设置在所述第一管芯上，其中所述第三管芯具有暴露出所述第一管芯的贯穿孔；
粘着层，夹置在所述第三管芯与所述第一管芯之间，其中所述粘着层包括位于所述贯穿孔中的凹陷部分；
挡墙结构，设置在所述第一管芯上且位于所述贯穿孔中；以及
包封体，包封所述第二管芯及所述第三管芯。
9.根据权利要求8所述的封装结构，其特征在于，还包括：
重布线结构，与所述第二管芯及所述第三管芯相对地位于所述第一管芯上；以及
多个导电端子，位于所述重布线结构上。
10.根据权利要求8所述的封装结构，其特征在于，还包括设置在所述第二管芯与所述第一管芯之间的多个连接件，且所述第二管芯通过所述多个连接件与所述第一管芯电连接。
11.根据权利要求8所述的封装结构，其特征在于，还包括局部地覆盖所述贯穿孔的侧壁的介电材料。
12.根据权利要求8所述的封装结构，其特征在于，所述第三管芯是电浮动的。
13.根据权利要求8所述的封装结构，其特征在于，所述凹陷部分局部地覆盖所述贯穿孔的侧壁及所述挡墙结构的顶表面。
14.根据权利要求8所述的封装结构，其特征在于，所述挡墙结构包括金属。
15.一种制造封装结构的方法，其特征在于，包括：
提供第一管芯，所述第一管芯具有第一区及与所述第一区相邻的第二区；
在所述第二区中形成挡墙结构；
在所述第二区中配置粘着层，其中所述粘着层环绕所述挡墙结构；
在所述第一区中放置第二管芯以及在所述第二区中放置第三管芯，其中所述第三管芯具有内侧部分、外侧部分以及位于所述内侧部分与所述外侧部分之间的沟槽，且所述沟槽被介电材料局部地填充；
使用包封体包封所述第二管芯及所述第三管芯；
减小所述第三管芯的厚度以显露出填充在所述第三管芯的所述沟槽中的所述介电材料；以及
移除所述第三管芯的所述内侧部分以暴露出所述第一管芯。
16.根据权利要求15所述的方法，其特征在于，在所述第二区中放置所述第三管芯的步骤包括：
将所述挡墙结构与所述第三管芯的所述沟槽对齐；
将所述挡墙结构安置到所述第三管芯的所述沟槽中；以及
将所述第三管芯的所述外侧部分贴合到所述粘着层。
17.根据权利要求15所述的方法，其特征在于，移除所述第三管芯的所述内侧部分的步骤包括：
执行激光钻孔工艺，以移除所述介电材料的一部分来使所述第三管芯的所述内侧部分与所述外侧部分彼此断开；以及
移除所述第三管芯的所述内侧部分，以形成暴露出所述第一管芯的贯穿孔。
18.根据权利要求15所述的方法，其特征在于，所述第一管芯在所述第一区中包括多个硅穿孔且在所述第二区中不含硅穿孔。
19.根据权利要求15所述的方法，其特征在于，还包括在所述第一区中形成多个连接件，其中所述第一区中的所述多个连接件及所述第二区中的所述挡墙结构是同时形成的。
20.根据权利要求15所述的方法，其特征在于，还包括在所述第一管芯上与所述第二管芯及所述第三管芯相对侧依序形成重布线结构及多个导电端子。
21.一种封装结构，其特征在于，包括：
衬底；
管芯，设置在所述衬底上，其中所述管芯是电浮动的，且所述管芯具有暴露出所述衬底的贯穿孔；
粘着层，设置在所述衬底与所述管芯之间，其中所述粘着层具有弯曲的表面；
挡墙结构，设置在所述衬底上且被所述粘着层环绕；以及
包封体，包封所述管芯。
22.根据权利要求21所述的封装结构，其特征在于，所述粘着层不含填料。
23.根据权利要求21所述的封装结构，其特征在于，所述粘着层具有下沉部分，且所述下沉部分的表面是所述弯曲的表面。
24.根据权利要求23所述的封装结构，其特征在于，所述粘着层的最大厚度小于或等于所述挡墙结构的厚度。
25.根据权利要求21所述的封装结构，其特征在于，所述粘着层具有溢流部分，所述溢流部分局部地覆盖所述管芯的侧壁以及所述挡墙结构的顶表面，且所述溢流部分的表面是所述弯曲的表面。
26.根据权利要求25所述的封装结构，其特征在于，所述粘着层的最大厚度大于所述挡墙结构的厚度。
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