CN110931604A - Preparation method of solar cell with Topcon structure - Google Patents

Preparation method of solar cell with Topcon structure Download PDF

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Publication number
CN110931604A
CN110931604A CN201911262690.7A CN201911262690A CN110931604A CN 110931604 A CN110931604 A CN 110931604A CN 201911262690 A CN201911262690 A CN 201911262690A CN 110931604 A CN110931604 A CN 110931604A
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silicon
layer
cleaning
silicon oxide
amorphous silicon
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张密超
李翔
姚俊
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Jiangsu Leadmicro Nano Technology Co Ltd
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Jiangsu Leadmicro Nano Technology Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/20Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
    • H01L31/202Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials including only elements of Group IV of the Periodic System
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0216Coatings
    • H01L31/02161Coatings for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/02167Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/20Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
    • H01L31/208Particular post-treatment of the devices, e.g. annealing, short-circuit elimination
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Abstract

The invention provides a preparation method of a Topcon structure solar cell, which comprises the following steps: s1, providing a prefabricated silicon wafer; s2, sequentially manufacturing tunneling silicon oxide, amorphous silicon and silicon oxide on the back of the silicon wafer; s3, cleaning the amorphous silicon which is plated in a winding way, and then cleaning the BSG on the front side and the silicon oxide on the back side; s4, carrying out phosphorus diffusion on the amorphous silicon to form an n + layer; s5, cleaning the phosphorosilicate glass on the back; s6, preparing passivation layers on the front side and the back side respectively; and S7, manufacturing an electrode.

Description

Preparation method of solar cell with Topcon structure
Technical Field
The invention relates to the technical field of photovoltaic power generation, in particular to a preparation method of a solar cell with a topcon structure.
Background
A traditional passivated emitter back contact (PERC) solar cell adopts an Atomic Layer Deposition (ALD) method to form full-coverage aluminum oxide (Al) on the back surface of the cell2O3) Passivation layer, but due to Al2O3The dielectric property of (2) is that a part of the passivation layer needs to be removed through laser grooving in the subsequent process to form a back surface structure of the part of the metallization passivation layer.
In order to further reduce the back recombination rate, realize the back integral passivation and remove the back film opening process, the passivation contact technology becomes an industrial research hotspot. The TOPCon (tunnel Oxide Passivated contact) technology is to prepare an ultra-thin tunneling Oxide layer and a highly doped amorphous silicon thin layer on the back of a battery, and the ultra-thin tunneling Oxide layer and the highly doped amorphous silicon thin layer form a passivation contact structure together. The Topcon structure battery can block minority carrier hole recombination, improves the open-circuit voltage and short-circuit current of the battery, does not need back hole opening and alignment, has no additional doping process, greatly simplifies the battery production process, improves the energy output, and has a space for further improving the conversion efficiency.
However, the existing manufacturing process of Topcon structure battery has many problems, such as: the back tunneling layer and the amorphous silicon manufacture can be seriously wrapped and plated, and the efficiency and yield of the battery are low due to the incomplete cleaning; in the process of cleaning the amorphous silicon with the front surface coated, the P + layer and the like on the front surface are inevitably damaged.
Disclosure of Invention
The invention aims to provide a preparation method of a solar cell with a Topcon structure.
In order to achieve one of the above objects, the present invention provides a method for preparing a Topcon structure solar cell, comprising the following steps: s1, providing a prefabricated silicon wafer; s2, sequentially manufacturing tunneling silicon oxide, amorphous silicon and silicon oxide on the back of the silicon wafer; s3, cleaning the amorphous silicon which is plated in a winding way, and then cleaning the BSG on the front side and the silicon oxide on the back side; s4, carrying out phosphorus diffusion on the amorphous silicon to form an n + layer; s5, cleaning the phosphorosilicate glass on the back; s6, preparing passivation layers on the front side and the back side respectively; and S7, manufacturing an electrode.
Preferably, step S1 specifically includes: s11, cleaning and texturing the silicon wafer; s12, performing boron diffusion on the front surface of the silicon wafer to prepare a P + layer, and forming borosilicate glass on the surface of the P + layer; and S13, cleaning and polishing the back surface, and keeping the front borosilicate glass. Preferably, step S13 specifically includes: and cleaning the back of the silicon wafer by adopting hydrofluoric acid.
Preferably, in step S2, the tunneling oxide, amorphous silicon and silicon oxide three-layer film growth is sequentially completed in the same cavity of the same apparatus.
Preferably, step S2 includes: s21, alternately introducing a silicon source and an oxygen source, and growing a layer of tunneling silicon oxide in an ALD mode; s22, after the tunneling silicon oxide growth is completed, introducing a silicon source and auxiliary gas, starting PECVD, and growing amorphous silicon; and S23, after the amorphous silicon grows, alternately introducing the silicon source and the oxygen source again, starting ALD, and growing silicon oxide.
Preferably, the thickness of the tunneling silicon oxide is between 1nm and 3 nm; the thickness of the amorphous silicon is between 30nm and 250 nm; the thickness of the silicon oxide is between 1nm and 10 nm.
Preferably, step S4 includes: s41, forming a phosphorus source on the amorphous silicon on the back surface to form a covering layer; and S42, drying after printing, and then performing thermal diffusion by using an annealing furnace to form a back n + layer.
Preferably, in step S41, a phosphor-silicon paste is printed on the back amorphous silicon surface by screen printing to form a covering layer.
Preferably, in step S4, the thermal diffusion process is: under the protection of inert gas, the temperature is between 700 and 900 ℃, and the time is within the range of 10 to 40 min.
Preferably, the thickness of the n + layer is between 0.1 μm and 0.5 um.
Preferably, step S6 specifically includes the following steps: s61, manufacturing silicon nitride on the back of the silicon wafer, and plating the silicon nitride on the surface of the n + layer in a furnace tube of PECVD equipment; s62, cleaning the surface; and S63, preparing a passivation film and an antireflection film on the front surface of the silicon wafer in a cavity.
Compared with the prior art, the invention has the beneficial effects that: 1) BSG is formed on the surface of the P + layer on the front side, and a silicon oxide protective layer is formed on the surface of the amorphous silicon on the back side to form a double-sided protective structure, so that the P + layer and the amorphous silicon layer are not damaged when the amorphous silicon on the front side is wound and plated in the cleaning step S2, and the high efficiency of the cell can be ensured. 2) The amorphous silicon is prepared first, and then the n + layer is manufactured through printing a phosphorus source and thermal diffusion, so that the requirements on equipment are low, the process is simple, and the cost is low.
Detailed Description
The present application will be described in detail below in specific embodiments. These embodiments are not intended to limit the present application, and structural, methodological, or functional changes made by those skilled in the art according to these embodiments are included in the scope of the present application.
The preparation method of the Topcon structure battery comprises the following steps:
s1, providing a prefabricated silicon wafer; (ii) a
S2, sequentially manufacturing tunneling silicon oxide, amorphous silicon and silicon oxide on the back of the silicon wafer;
s3, cleaning the amorphous silicon which is plated in a winding way, and then cleaning the BSG on the front side and the silicon oxide on the back side; the front BSG protects the P + layer and the back silicon oxide protects the amorphous silicon, so that the efficiency of the cell can not be influenced when the amorphous silicon with the front surface being wound and plated is cleaned;
s4, carrying out phosphorus diffusion on the amorphous silicon to form an n + layer;
s5, cleaning the phosphorosilicate glass on the back;
s6, preparing passivation layers on the front side and the back side respectively;
and S7, manufacturing an electrode.
Compared with the prior art, the preparation method has the following advantages: 1) BSG is formed on the surface of the P + layer on the front side, and a silicon oxide protective layer is formed on the surface of the amorphous silicon on the back side to form a double-sided protective structure, so that the P + layer and the amorphous silicon layer are not damaged when the amorphous silicon on the front side is wound and plated in the cleaning step S2, and the high efficiency of the cell can be ensured. 2) The amorphous silicon is prepared first, and then the n + layer is manufactured through printing a phosphorus source and thermal diffusion, so that the requirements on equipment are low, the process is simple, and the cost is low. The above steps are not limited to the order of arrangement, and the order of the steps before and after S1 to S7 may be adjusted according to the actual situation.
Specifically, steps S1, S5, S6, and S7 may all adopt conventional technical means in the art, and are not described herein again. In addition, the preparation method of the Topcon structure cell further comprises the steps of S10, measuring and sorting, and removing unqualified solar cells.
Step S1 specifically includes: s11, cleaning and texturing the silicon wafer; s12, performing boron diffusion on the front surface of the silicon wafer to prepare a P + layer, and forming borosilicate glass on the surface of the P + layer; and S13, cleaning and polishing the back surface, and keeping the front borosilicate glass.
Step S12 specifically includes: and (3) performing front boron diffusion in a high-temperature furnace to prepare a P + layer, introducing an oxygen source, and forming borosilicate glass positioned on the surface of the P + layer at the high temperature of 850-900 ℃.
Step S13 specifically includes: cleaning the back of the silicon wafer by using acid cleaning liquid such as hydrofluoric acid, and the like, wherein the single-side cleaning can be carried out by adopting a mode of floating on the surface of the cleaning liquid but not limited; on one hand, BSG coated in the step S2 is cleaned, and on the other hand, the polished back surface is more beneficial to forming a uniform tunneling oxide layer.
In a reference embodiment, in step S2, the growth of the tunneling oxide, amorphous silicon and oxide three-layer film is completed in one step in the same cavity of the same device, without changing the cavity, and the long film can be precisely controlled according to the requirement.
Specifically, step S2 includes: s21, alternately introducing a silicon source and an oxygen source, and growing a layer of tunneling silicon oxide in an ALD mode, wherein the thickness of the tunneling silicon oxide is not more than 3nm, or the thickness of the tunneling silicon oxide is between 1nm and 3 nm; s22, after the tunneling silicon oxide growth is completed, introducing a silicon source and auxiliary gas, starting PECVD (plasma enhanced chemical vapor deposition), and growing amorphous silicon, wherein the thickness of the amorphous silicon is 30-250 nm; and S23, after the amorphous silicon grows, alternately introducing a silicon source and an oxygen source again, starting ALD (atomic layer deposition) to grow silicon oxide, wherein the thickness of the silicon oxide is between 1nm and 10nm, and the thinner the silicon oxide is, the better the silicon oxide is on the premise of realizing effective protection.
Step S4 includes: s41, forming a phosphorus source on the amorphous silicon on the back surface to form a covering layer, so that P can be effectively prevented from being diffused and plated around the front surface; and S42, drying after printing, and then performing high-temperature diffusion propelling by using an annealing furnace to complete amorphous polycrystallization and form a back n + layer.
Preferably, step S41 is to print phosphorus silicon paste on the back amorphous silicon surface by screen printing to form a covering layer; simple process and low cost. The phosphorus-silicon slurry is produced by DuPont and mainly comprises a phosphorus source, silicon powder and an organic carrier.
Of course, the phosphor source can be formed by any method in the prior art, for example, by spraying, evaporation, etc. on the surface of the amorphous silicon.
In step S42, the high temperature diffusion propulsion process is carried out at 700-900 deg.C for 10-40 min under the protection of inert gases such as nitrogen and argon. The thickness of the n + layer is between 0.1 μm and 0.5um, preferably about 0.3um, so that the battery efficiency is optimal.
Step S6 specifically includes the following steps:
s61, manufacturing silicon nitride on the back surface, and plating the silicon nitride on the whole surface of the n + layer in a furnace tube of PECVD equipment;
s62, surface cleaning, wherein the front surface is cleaned mainly, metal impurities brought by a previous film plating process are removed, and a clean surface is provided for plating a passivation film and an antireflection film;
s63, preparing a passivation film and an antireflection film on the front surface, wherein the two film layers are manufactured in one cavity, the process is simple, and process pollution is avoided; the specific film material and the coating process are all the prior art, and are not described herein again.
Step S7 "manufacturing electrode" includes screen printing electrode and sintering.
In conclusion, the method is based on the production technology of tunneling, oxidation and passivation contact on the back surface of the battery, avoids a damaged layer caused by laser grooving, and can greatly improve the efficiency; the process and the equipment scheme of the invention can greatly reduce the process flow, clean the surface sufficiently, have no damage to the emitter mechanism picture and achieve higher efficiency and yield; in addition, the scheme adopts the printing phosphorus silicon slurry to manufacture the back emitting electrode, so that the cost is lowest.
It should be understood that although the present description refers to embodiments, not every embodiment contains only a single technical solution, and such description is for clarity only, and those skilled in the art should make the description as a whole, and the technical solutions in the embodiments can also be combined appropriately to form other embodiments understood by those skilled in the art. Moreover, the above detailed description is only for the purpose of describing feasible embodiments of the present invention, and is not intended to limit the scope of the present invention, and equivalent embodiments or modifications made without departing from the technical spirit of the present invention are included in the scope of the present invention.

Claims (11)

1. A preparation method of a solar cell with a Topcon structure is characterized by comprising the following steps:
s1, providing a prefabricated silicon wafer;
s2, sequentially manufacturing tunneling silicon oxide, amorphous silicon and silicon oxide on the back of the silicon wafer;
s3, cleaning the amorphous silicon which is plated in a winding way, and then cleaning the BSG on the front side and the silicon oxide on the back side;
s4, carrying out phosphorus diffusion on the amorphous silicon to form an n + layer;
s5, cleaning the phosphorosilicate glass on the back;
s6, preparing passivation layers on the front side and the back side respectively;
and S7, manufacturing an electrode.
2. The method for preparing a Topcon structure solar cell according to claim 1, wherein step S1 specifically comprises:
s11, cleaning and texturing the silicon wafer;
s12, performing boron diffusion on the front surface of the silicon wafer to prepare a P + layer, and forming borosilicate glass on the surface of the P + layer;
and S13, cleaning and polishing the back surface, and keeping the front borosilicate glass.
3. The method for preparing a Topcon structure solar cell according to claim 2, wherein step S13 specifically comprises: and cleaning the back of the silicon wafer by adopting hydrofluoric acid.
4. The method of claim 1, wherein in step S2, the three-layer film growth of tunneling silicon oxide, amorphous silicon and silicon oxide is sequentially performed in the same cavity of the same device.
5. The method of claim 4, wherein step S2 comprises:
s21, alternately introducing a silicon source and an oxygen source, and growing a layer of tunneling silicon oxide in an ALD mode;
s22, after the tunneling silicon oxide growth is completed, introducing a silicon source and auxiliary gas, starting PECVD, and growing amorphous silicon;
and S23, after the amorphous silicon grows, alternately introducing the silicon source and the oxygen source again, starting ALD, and growing silicon oxide.
6. The preparation method of the Topcon structure solar cell according to claim 4 or 5, wherein the thickness of the tunneling silicon oxide is between 1nm and 3 nm; the thickness of the amorphous silicon is between 30nm and 250 nm; the thickness of the silicon oxide is between 1nm and 10 nm.
7. The method of claim 1, wherein step S4 comprises:
s41, forming a phosphorus source on the amorphous silicon on the back surface to form a covering layer;
and S42, drying after printing, and then performing thermal diffusion by using an annealing furnace to form a back n + layer.
8. The method of claim 7, wherein in step S41, the phosphor-silicon paste is printed on the back surface of the amorphous silicon by screen printing to form a cover layer.
9. The method of claim 7 or 8, wherein in step S4, the thermal diffusion process is: under the protection of inert gas, the temperature is between 700 and 900 ℃, and the time is within the range of 10 to 40 min.
10. The method of claim 7 or 8, wherein the thickness of the n + layer is between 0.1 μm and 0.5 um.
11. The method of claim 1, wherein step S6 comprises the following steps:
s61, manufacturing silicon nitride on the back of the silicon wafer, and plating the silicon nitride on the surface of the n + layer in a furnace tube of PECVD equipment;
s62, cleaning the surface;
and S63, preparing a passivation film and an antireflection film on the front surface of the silicon wafer in a cavity.
CN201911262690.7A 2019-12-10 2019-12-10 Preparation method of solar cell with Topcon structure Pending CN110931604A (en)

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CN111668345A (en) * 2020-06-29 2020-09-15 浙江晶科能源有限公司 Solar cell and preparation method thereof
CN111785809A (en) * 2020-07-15 2020-10-16 常州时创能源股份有限公司 Method for preparing passivated contact cell
CN112038444A (en) * 2020-08-05 2020-12-04 英利能源(中国)有限公司 Manufacturing method of N-type crystalline silicon solar cell and manufacturing method of back passivation contact structure of N-type crystalline silicon solar cell
CN112582484A (en) * 2020-12-15 2021-03-30 泰州隆基乐叶光伏科技有限公司 Solar cell and manufacturing method thereof
CN112599616A (en) * 2020-12-15 2021-04-02 泰州隆基乐叶光伏科技有限公司 Solar cell and manufacturing method thereof
CN112599636A (en) * 2020-12-07 2021-04-02 浙江晶科能源有限公司 Preparation method of crystalline silicon solar cell and crystalline silicon solar cell
CN113328008A (en) * 2021-04-08 2021-08-31 普乐新能源科技(徐州)有限公司 Preparation method of amorphous silicon integrated with tunneling oxide layer
CN113948609A (en) * 2021-09-22 2022-01-18 江苏微导纳米科技股份有限公司 Passivated contact solar cell preparation method and passivated contact solar cell
CN113972302A (en) * 2021-10-26 2022-01-25 通威太阳能(眉山)有限公司 TOPCon battery, preparation method thereof and electrical equipment
DE102020119206A1 (en) 2020-07-21 2022-01-27 Hanwha Q Cells Gmbh Process for manufacturing a solar cell
CN114335248A (en) * 2021-12-30 2022-04-12 通威太阳能(眉山)有限公司 Method for preparing passivated contact cell
CN115274869A (en) * 2021-04-30 2022-11-01 泰州中来光电科技有限公司 Passivation contact structure with same polarity, battery, preparation process, assembly and system
CN115274871A (en) * 2021-04-30 2022-11-01 泰州中来光电科技有限公司 Contact structure applied to tunneling type solar cell, solar cell with contact structure and manufacturing method of solar cell

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CN111785809A (en) * 2020-07-15 2020-10-16 常州时创能源股份有限公司 Method for preparing passivated contact cell
DE102020119206A1 (en) 2020-07-21 2022-01-27 Hanwha Q Cells Gmbh Process for manufacturing a solar cell
CN112038444A (en) * 2020-08-05 2020-12-04 英利能源(中国)有限公司 Manufacturing method of N-type crystalline silicon solar cell and manufacturing method of back passivation contact structure of N-type crystalline silicon solar cell
CN112599636A (en) * 2020-12-07 2021-04-02 浙江晶科能源有限公司 Preparation method of crystalline silicon solar cell and crystalline silicon solar cell
CN112582484A (en) * 2020-12-15 2021-03-30 泰州隆基乐叶光伏科技有限公司 Solar cell and manufacturing method thereof
CN112599616A (en) * 2020-12-15 2021-04-02 泰州隆基乐叶光伏科技有限公司 Solar cell and manufacturing method thereof
CN113328008A (en) * 2021-04-08 2021-08-31 普乐新能源科技(徐州)有限公司 Preparation method of amorphous silicon integrated with tunneling oxide layer
WO2022213460A1 (en) * 2021-04-08 2022-10-13 普乐新能源科技(徐州)有限公司 Preparation method for amorphous silicon integrated with tunneling oxide layer
CN115274869A (en) * 2021-04-30 2022-11-01 泰州中来光电科技有限公司 Passivation contact structure with same polarity, battery, preparation process, assembly and system
CN115274871A (en) * 2021-04-30 2022-11-01 泰州中来光电科技有限公司 Contact structure applied to tunneling type solar cell, solar cell with contact structure and manufacturing method of solar cell
CN115274869B (en) * 2021-04-30 2023-11-10 泰州中来光电科技有限公司 Passivation contact structure with same polarity, battery, preparation process, assembly and system
CN115274871B (en) * 2021-04-30 2024-04-02 泰州中来光电科技有限公司 Contact structure applied to tunneling solar cell, solar cell with contact structure and manufacturing method of solar cell
CN113948609A (en) * 2021-09-22 2022-01-18 江苏微导纳米科技股份有限公司 Passivated contact solar cell preparation method and passivated contact solar cell
CN113972302A (en) * 2021-10-26 2022-01-25 通威太阳能(眉山)有限公司 TOPCon battery, preparation method thereof and electrical equipment
CN114335248A (en) * 2021-12-30 2022-04-12 通威太阳能(眉山)有限公司 Method for preparing passivated contact cell

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Application publication date: 20200327