CN110797418A - Preparation method of copper alloy electrode of silicon heterojunction solar cell - Google Patents
Preparation method of copper alloy electrode of silicon heterojunction solar cell Download PDFInfo
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- 239000010703 silicon Substances 0.000 title claims abstract description 49
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- 229910000881 Cu alloy Inorganic materials 0.000 title claims abstract description 47
- 238000002360 preparation method Methods 0.000 title claims abstract description 27
- 239000010409 thin film Substances 0.000 claims abstract description 68
- 239000002184 metal Substances 0.000 claims abstract description 64
- 229910052751 metal Inorganic materials 0.000 claims abstract description 64
- 238000000034 method Methods 0.000 claims abstract description 42
- 229910052802 copper Inorganic materials 0.000 claims abstract description 35
- 239000010949 copper Substances 0.000 claims abstract description 35
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 31
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims abstract description 22
- 229910052718 tin Inorganic materials 0.000 claims abstract description 10
- 238000010438 heat treatment Methods 0.000 claims abstract description 5
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 28
- 229910021419 crystalline silicon Inorganic materials 0.000 claims description 14
- 239000000463 material Substances 0.000 claims description 12
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 12
- 238000000151 deposition Methods 0.000 claims description 11
- 238000009713 electroplating Methods 0.000 claims description 11
- 239000000758 substrate Substances 0.000 claims description 10
- 229910052709 silver Inorganic materials 0.000 claims description 9
- 238000007747 plating Methods 0.000 claims description 8
- 238000007650 screen-printing Methods 0.000 claims description 7
- 239000002002 slurry Substances 0.000 claims description 7
- 229910004205 SiNX Inorganic materials 0.000 claims description 6
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- 238000010329 laser etching Methods 0.000 claims description 6
- 229910052782 aluminium Inorganic materials 0.000 claims description 4
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 4
- 229910052804 chromium Inorganic materials 0.000 claims description 4
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
- H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type
- H01L31/0745—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
Abstract
The invention provides a preparation method of a copper alloy electrode of a silicon heterojunction solar cell. The method comprises the steps of forming a dielectric film layer through deposition, forming an electrode window on the dielectric film layer, sequentially forming a metal seed layer, a metal copper conducting layer and a tin protective layer in the electrode window, and performing heat treatment to finally form the copper alloy electrode. The method avoids the use of expensive photoresist and the investment of photoetching equipment, simplifies the mask preparation process of the copper alloy electrode, and is beneficial to reducing the cost of the silicon heterojunction battery; meanwhile, the medium thin film layer is matched with the TCO thin film, so that the light reflectivity of the surface of the cell is further reduced, and the light utilization of the cell is improved.
Description
Technical Field
The invention relates to the field of silicon heterojunction solar cells, in particular to a preparation method of a copper alloy electrode of a silicon heterojunction solar cell, and more particularly to a preparation method of a copper alloy electrode of a silicon heterojunction solar cell and a silicon heterojunction solar cell.
Background
Unlike conventional crystalline silicon cells, amorphous silicon/crystalline silicon heterojunction solar cells deposit a hydrogenated amorphous silicon emitter on a crystalline silicon substrate to form a pn heterojunction. Since hydrogen overflows from the hydrogenated amorphous silicon film at a temperature higher than about 400 ℃, the quality of the film is affected, and the passivation effect is remarkably reduced, the formation temperature of the amorphous silicon film determines the maximum preparation process temperature of the battery, and is usually about 200 ℃. In order to meet the requirement of low-temperature preparation, the silicon heterojunction solar cell also needs a low-temperature process and low-temperature slurry in the aspect of preparation of metal electrodes.
At present, the metal electrodes of the silicon heterojunction solar cell meeting the low-temperature preparation requirements mainly comprise two types: one is a silver electrode formed by screen printing of low-temperature silver paste, and because the price of metal silver is high and the contact performance between the metal silver and a TCO film needs to be improved, the electrode is not beneficial to the development of the battery towards high efficiency and low cost. The other is a copper electrode, which is usually formed by electroplating or the like, and the conductivity of the metal copper is equivalent to that of silver, but the price is low, so that the copper electrode is an electrode technology which is actively and widely developed in the industry at present.
However, the preparation method of the copper alloy electrode of the silicon heterojunction solar cell with simple process and low cost needs to be further developed.
Disclosure of Invention
The present application is based on the inventors' recognition of the following facts and problems:
in the prior art, electroplating a copper electrode on the surface of a silicon heterojunction solar cell generally comprises depositing a TCO film, forming an electrode pattern by using a photolithography technique, and then depositing copper by using electroplating and other methods. The photoetching part comprises the process steps of coating photoresist, exposing, developing and the like. Although the photoetching technology is mature and the pattern quality is high, the whole process steps are very complicated, equipment and core material photoresist are expensive, and a photoetching mask layer needs to be removed subsequently, so that the early investment and the process time are greatly increased, the cost of the silicon heterojunction solar cell is increased, and the production efficiency of the cell is reduced. Based on the problems, the invention provides a preparation method of a copper alloy electrode of a silicon heterojunction solar cell, which avoids the use of expensive photoresist and the investment of photoetching equipment, simplifies the mask preparation process of the copper alloy electrode and is beneficial to the reduction of the cost of the silicon heterojunction solar cell; meanwhile, the medium thin film layer is matched with the TCO thin film, so that the light reflectivity of the surface of the cell is further reduced, and the light utilization of the cell is improved.
Therefore, in the first aspect of the invention, the invention provides a preparation method of a copper alloy electrode of a silicon heterojunction solar cell. According to an embodiment of the invention, the method comprises:
(1) depositing a first dielectric thin film layer on the upper surface of the first transparent conductive oxide layer, and depositing a second dielectric thin film layer on the lower surface of the second transparent conductive oxide layer;
(2) forming at least one first electrode window in the first dielectric thin film layer through laser etching or screen printing corrosive slurry, and forming at least one second electrode window in the second dielectric thin film layer;
(3) forming a first metal seed layer in the first electrode window, and forming a second metal seed layer in the second electrode window;
(4) sequentially forming a first metal copper layer and a first metal tin layer on the upper surface of the first metal seed layer, and sequentially forming a second metal copper layer and a second metal tin layer on the lower surface of the second metal seed layer;
(5) carrying out heat treatment on the sample obtained in the step (4) so as to prepare and obtain a first copper alloy electrode and a second copper alloy electrode;
the first transparent conductive oxide layer is formed on the upper surface of the silicon heterojunction structure, and the second transparent conductive oxide layer is formed on the lower surface of the silicon heterojunction structure.
According to the method provided by the embodiment of the invention, the dielectric thin film layer is not required to be removed when the electrode is prepared, the dielectric thin film layer is not only used as a mask layer, but also matched with the TCO thin film, so that a double antireflection layer is formed, the light rays incident into the battery are increased, the light reflectivity of the surface of the battery is reduced, and the light utilization of the battery is improved. In addition, the opening of the electrode position is realized by laser etching or screen printing of corrosive slurry, a photoetching process in conventional preparation is replaced, a series of complicated process steps such as photoresist coating, exposure, development, photoresist removal and the like are avoided, the use of expensive photoresist and the investment of photoetching equipment are avoided, the mask preparation process of the copper alloy electrode is simplified, and the production cost of the battery is reduced.
According to an embodiment of the invention, the method further comprises at least one of the following accessory technical features:
according to the embodiment of the invention, the thickness of the first dielectric thin film layer and the second dielectric thin film layer is 0.01-5 μm. When the thickness of the dielectric thin film layer is within this range, the dielectric thin film layer can function as a mask layer as well as a photoresist.
According to the embodiment of the invention, the thickness of the first dielectric thin film layer and the second dielectric thin film layer is 0.02-0.5 μm. If the thickness of the dielectric thin film layer is too small, the continuity and uniformity of the thin film are not ideal, and the thin film cannot be effectively used as a mask layer; if the thickness is too large, unnecessary waste is caused while the light absorption of the battery is affected.
According to the embodiment of the invention, the material of the first dielectric thin film layer and the second dielectric thin film layer comprises SiNx, SiOx, SiON and Al2O3At least one of MgF. The dielectric films SiNx, SiOx, SiON and the like with mature processes and widely researched properties are used as the mask layer materials, and the method is compatible with the existing crystalline silicon battery process, is convenient for electrode preparation, does not need additional equipment investment, and is more beneficial to cost reduction.
According to the embodiment of the invention, the first dielectric thin film layer and the second dielectric thin film layer are formed through at least one of PVD, PECVD and ALD methods. The dielectric film layer is formed by deposition by the method, the process is mature, the preparation of the copper alloy electrode is convenient, and the cost is reduced.
According to an embodiment of the present invention, the material of the first and second metal seed layers comprises at least one selected from Cu, Ni, Ta, Mo, W, Ti, Cr, Al, Mg, Sn, Zn, Ag. The metal seed layer formed by the material is beneficial to forming good adhesive force with a battery matrix on one hand, and can be used as a base layer for depositing a metal copper layer subsequently on the other hand.
According to the embodiment of the invention, the thickness of the first metal seed layer and the second metal seed layer is 5-5000 nm. Preferably, the thickness of the first metal seed layer and the second metal seed layer is 5-500 nm.
According to the embodiment of the invention, the first metal seed layer and the second metal seed layer are formed by at least one of electroplating and light-induced plating.
According to the embodiment of the invention, the first metallic copper layer, the second metallic copper layer, the first metallic tin layer and the second metallic tin layer are formed by at least one of electroplating, electroless plating and light-induced plating.
In a second aspect of the invention, a silicon heterojunction solar cell is presented. According to an embodiment of the invention, the battery comprises:
a silicon heterojunction structure;
a first transparent conductive oxide layer formed on an upper surface of the silicon heterojunction structure;
a second transparent conductive oxide layer formed on a lower surface of the silicon heterojunction structure; and
a first copper alloy electrode and a second copper alloy electrode;
wherein the first copper alloy electrode and/or the second copper alloy electrode is formed by any one of the above-described methods.
According to the dielectric thin film layer of the battery provided by the embodiment of the invention, the dielectric thin film layer is not only used as a mask layer, but also matched with the TCO thin film, so that a double antireflection layer is formed, light rays incident into the battery are increased, and the performance of the battery is improved.
According to an embodiment of the present invention, the battery may further include at least one of the following additional features:
according to an embodiment of the present invention, the silicon heterojunction structure comprises:
an n-type crystalline silicon substrate;
a first lightly doped n-type amorphous silicon layer formed on the upper surface of the n-type crystalline silicon substrate, preferably with a doping concentration of 108-1017/cm3；
A second lightly doped n-type amorphous silicon layer formed on the lower surface of the n-type crystalline silicon substrate, preferably with a doping concentration of 108-1017/cm3；
The heavily doped p-type amorphous silicon emitter layer is formed on the upper surface of the first lightly doped n-type amorphous silicon layer;
and the heavily doped n-type amorphous silicon back field layer is formed on the lower surface of the second lightly doped n-type amorphous silicon layer.
Drawings
Fig. 1 is a schematic flow chart of a method for preparing a copper alloy electrode of a silicon heterojunction solar cell according to an embodiment of the invention;
FIG. 2 is a schematic diagram of a partial structure of a silicon heterojunction solar cell according to an embodiment of the invention;
FIG. 3 is a schematic diagram of the structural details of a silicon heterojunction solar cell according to an embodiment of the invention; and
fig. 4 is a schematic structural diagram of a silicon heterojunction solar cell according to an embodiment of the invention.
Reference numerals:
silicon heterojunction structure: 100
First transparent conductive oxide layer: 210
Second transparent conductive oxide layer: 220
First dielectric thin film layer: 310
Second dielectric thin film layer: 320
First copper alloy electrode: 410
A first metal seed layer: 411
First metallic copper layer: 412
A first metallic tin layer: 413
Second copper alloy electrode: 420
A second metal seed layer: 421
Second metallic copper layer: 422
A second metallic tin layer: 423
First electrode window: 510
A second electrode window: 520
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings. The embodiments described below with reference to the drawings are illustrative and intended to be illustrative of the invention and are not to be construed as limiting the invention.
It should be noted that the processing steps of the upper and lower surfaces may be performed simultaneously or in steps.
Preparation method of copper alloy electrode of silicon heterojunction solar cell
In a first aspect of the invention, the invention provides a preparation method of a copper alloy electrode of a silicon heterojunction solar cell. According to an embodiment of the invention, the flow of the method refers to fig. 1, the method comprising:
s100: forming a dielectric thin film layer
In this step, a first dielectric thin film layer (310) is deposited on the upper surface of the first transparent conductive oxide layer (210), and a second dielectric thin film layer (320) is deposited on the lower surface of the second transparent conductive oxide layer (220), and the structure diagram refers to fig. 2.
According to the embodiment of the invention, the thickness of the first dielectric thin film layer and the second dielectric thin film layer is 0.01-5 μm. When the thickness of the dielectric thin film layer is within this range, the dielectric thin film layer can function as a mask layer as well as a photoresist.
According to the embodiment of the invention, the thickness of the first dielectric thin film layer and the second dielectric thin film layer is 0.02-0.5 μm. If the thickness of the dielectric thin film layer is too small, the continuity and uniformity of the thin film are not ideal, and the thin film cannot be effectively used as a mask layer; if the thickness is too large, unnecessary waste is caused while the light absorption of the battery is affected.
According to the embodiment of the invention, the material of the first dielectric thin film layer and the second dielectric thin film layer comprises SiNx, SiOx, SiON and Al2O3At least one of MgF. The dielectric films SiNx, SiOx, SiON and the like with mature processes and widely researched properties are used as the mask layer materials, and the method is compatible with the existing crystalline silicon battery process, is convenient for electrode preparation, does not need additional equipment investment, and is more beneficial to cost reduction.
According to the embodiment of the invention, the first dielectric thin film layer and the second dielectric thin film layer are formed through at least one of PVD, PECVD and ALD methods. The dielectric film layer is formed by deposition by the method, the process is mature, the preparation of the copper alloy electrode is convenient, and the cost is reduced.
S200: opening to form electrode window
In the step, at least one first electrode window (510) is formed by opening a hole in the first dielectric thin film layer (310) through laser etching or screen printing of corrosive slurry, and at least one second electrode window (520) is formed by opening a hole in the second dielectric thin film layer (320), and the structural schematic diagram refers to fig. 2.
S300: forming a metal seed layer
In this step, a first metal seed layer (411) is formed in the first electrode window (510), and a second metal seed layer (421) is formed in the second electrode window (520), and the schematic structural diagram refers to fig. 3.
According to an embodiment of the present invention, the material of the first and second metal seed layers comprises at least one selected from Cu, Ni, Ta, Mo, W, Ti, Cr, Al, Mg, Sn, Zn, Ag. The metal seed layer formed by the material is beneficial to forming good adhesive force with a battery matrix on one hand, and can be used as a base layer for depositing a metal copper layer subsequently on the other hand.
According to the embodiment of the invention, the thickness of the first metal seed layer and the second metal seed layer is 5-5000 nm. Preferably, the thickness of the first metal seed layer and the second metal seed layer is 5-500 nm.
According to the embodiment of the invention, the first metal seed layer and the second metal seed layer are formed by at least one of electroplating and light-induced plating.
S400: forming a metallic copper layer and a metallic tin layer
In this step, a first metallic copper layer (412) and a first metallic tin layer (413) are sequentially deposited and formed on the upper surface of the first metallic seed layer (411), and a second metallic copper layer (422) and a second metallic tin layer (423) are sequentially deposited and formed on the lower surface of the second metallic seed layer (421), and the structural schematic diagram refers to fig. 3.
According to the embodiment of the invention, the first metallic copper layer, the second metallic copper layer, the first metallic tin layer and the second metallic tin layer are formed by at least one of electroplating, electroless plating and light-induced plating.
S500: post-treatment
And (4) carrying out heat treatment on the product obtained in the step (S400) so as to prepare and obtain a first copper alloy electrode (410) and a second copper alloy electrode (420), wherein the structural schematic diagram refers to FIG. 4.
In conclusion, the dielectric thin film layer does not need to be removed when the electrode is prepared according to the method provided by the embodiment of the invention, the dielectric thin film layer is not only used as a mask layer, but also matched with the TCO thin film, so that a double antireflection layer is formed, light rays incident into the battery are increased, the light reflectivity of the surface of the battery is reduced, and the light utilization of the battery is improved. In addition, the opening of the electrode position is realized by laser etching or screen printing of corrosive slurry, a photoetching process in conventional preparation is replaced, a series of complicated process steps such as photoresist coating, exposure, development, photoresist removal and the like are avoided, the use of expensive photoresist and the investment of photoetching equipment are avoided, the mask preparation process of the copper alloy electrode is simplified, and the production cost of the battery is reduced.
Two, silicon heterojunction solar cell
In a second aspect of the invention, a silicon heterojunction solar cell is presented. According to an embodiment of the present invention, referring to fig. 2 or 4, the battery includes:
a silicon heterojunction structure 100;
a first transparent conductive oxide layer 210, the first transparent conductive oxide layer 210 being formed on an upper surface of the silicon heterojunction structure 100;
a second transparent conductive oxide layer 220, the second transparent conductive oxide layer 220 being formed on a lower surface of the silicon heterojunction structure 100;
a first dielectric thin film layer 310, the first dielectric thin film layer 310 being formed on an upper surface of the first transparent conductive oxide layer 210, the first dielectric thin film layer defining at least one first electrode window 510;
a second dielectric thin film layer 320, the second dielectric thin film layer 320 being formed on a lower surface of the second transparent conductive oxide layer 220, the second dielectric thin film layer defining at least one second electrode window 520;
a first copper alloy electrode 410, the first copper alloy electrode 410 being formed on an upper surface of the first transparent conductive oxide layer 210 and disposed in the first electrode window 510, the first copper alloy electrode 410 corresponding to the first electrode window 510 one to one; and
a second copper alloy electrode 420, wherein the second copper alloy electrode 420 is formed on the lower surface of the second transparent conductive oxide layer 220 and is disposed in the second electrode window 520, and the second copper alloy electrode 420 corresponds to the second electrode window 520 one to one;
wherein the first copper alloy electrode and/or the second copper alloy electrode is formed by any one of the above-described methods.
According to an embodiment of the present invention, referring to fig. 3, the first copper alloy electrode 410 includes:
a first metal seed layer 411, the first metal seed layer 411 being formed on an upper surface of the first transparent conductive oxide layer 210, the first metal seed layer 411 being disposed in the first electrode window 510,
a first metallic copper layer 412, the first metallic copper layer 412 being formed on an upper surface of the first metallic seed layer 411, and
a first metallic tin layer 413, the first metallic tin layer 413 being formed on an upper surface of the first metallic copper layer 412;
the second copper alloy electrode 420 includes:
a second metal seed layer 421, the second metal seed layer 421 being formed on a lower surface of the second transparent conductive oxide layer 220, the second metal seed layer 421 being disposed in the second electrode window 520,
a second metallic copper layer 422, the second metallic copper layer 422 being formed on a lower surface of the second metallic seed layer 421, and
a second metallic tin layer 423, wherein the second metallic tin layer 423 is formed on a lower surface of the second metallic copper layer 422.
According to another embodiment of the present invention, the silicon heterojunction structure comprises:
an n-type crystalline silicon substrate;
a first lightly doped n-type amorphous silicon layer formed on the upper surface of the n-type crystalline silicon substrate, preferably with a doping concentration of 108-1017/cm3；
A second lightly doped n-type amorphous silicon layer formed on the lower surface of the n-type crystalline silicon substrate, preferably with a doping concentration of 108-1017/cm3；
The heavily doped p-type amorphous silicon emitter layer is formed on the upper surface of the first lightly doped n-type amorphous silicon layer;
and the heavily doped n-type amorphous silicon back field layer is formed on the lower surface of the second lightly doped n-type amorphous silicon layer.
According to the dielectric thin film layer of the battery provided by the embodiment of the invention, the dielectric thin film layer is not only used as a mask layer, but also matched with the TCO thin film, so that a double antireflection layer is formed, light rays incident into the battery are increased, and the performance of the battery is improved.
The scheme of the invention will be explained below with reference to specific examples. It will be appreciated by those skilled in the art that the following examples are illustrative of the invention only and should not be taken as limiting the scope of the invention.
Example 1
The invention provides a preparation method of a copper alloy electrode of a silicon heterojunction solar cell, which comprises the following steps of firstly depositing a medium film layer on the surface of a silicon heterojunction structure deposited with a TCO film, then using the medium film as a mask, opening an electrode window on the surface of the medium film by adopting laser etching or screen printing corrosive slurry, then sequentially preparing a metal seed layer, a metal copper conducting layer and a tin protective layer on the medium film, and finally performing heat treatment to form the copper alloy electrode.
The dielectric film layer in the invention is SiNx, SiOx, SiON, Al2O3At least one of MgF, etc., with a thickness of 0.01-5 μm, formed by at least one of PVD, PECVD or ALD, etc. The metal seed layer is at least one of Cu, Ni, Ta, Mo, W, Ti, Cr, Al, Mg, Sn, Zn and Ag or an alloy containing more than one of the elements, the thickness of the metal seed layer is 5-5000nm, and the metal seed layer is formed by at least one of electroplating or light-induced plating and the like. The metallic copper and the metallic tin are formed by at least one of electroplating, electroless plating, light-induced plating, and the like.
The structure of the silicon heterojunction solar cell comprises:
(1) n-type silicon chip
(2) Lightly doped n-type amorphous silicon (a-Si: H) layers respectively positioned on the front surface and the back surface of the silicon wafer, wherein the doping concentration is 108-1017/cm3Range of
(3) Heavily doped p-type a-Si/H emitter layer on front surface lightly doped amorphous silicon layer
(4) Heavily doped n-type a-Si/H back field layer on back surface lightly doped amorphous silicon layer
(5) Transparent conductive oxide layers respectively on the emitter layer and the back field layer
(6) A metal front electrode layer on the front surface transparent conductive oxide layer
(7) A metal back electrode layer on the back surface transparent conductive oxide layer
Wherein, the metal front electrode layer (6) or the metal back electrode layer (7) is formed by the preparation method of the scheme.
In the description of the present invention, it is to be understood that the terms "central," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," "circumferential," and the like are used in the orientations and positional relationships indicated in the drawings for convenience in describing the invention and to simplify the description, and are not intended to indicate or imply that the referenced devices or elements must have a particular orientation, be constructed and operated in a particular orientation, and are therefore not to be considered limiting of the invention.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
In the present invention, unless otherwise expressly stated or limited, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can, for example, be fixedly connected, detachably connected, or integrally formed; may be mechanically coupled, may be electrically coupled or may be in communication with each other; they may be directly connected or indirectly connected through intervening media, or they may be connected internally or in any other suitable relationship, unless expressly stated otherwise. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
In the present invention, unless otherwise expressly stated or limited, the first feature "on" or "under" the second feature may be directly contacting the first and second features or indirectly contacting the first and second features through an intermediate. Also, a first feature "on," "over," and "above" a second feature may be directly or diagonally above the second feature, or may simply indicate that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature may be directly under or obliquely under the first feature, or may simply mean that the first feature is at a lesser elevation than the second feature.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention, and that variations, modifications, substitutions and alterations can be made to the above embodiments by those of ordinary skill in the art within the scope of the present invention.
Claims (10)
1. A preparation method of a copper alloy electrode of a silicon heterojunction solar cell is characterized by comprising the following steps:
(1) depositing a first dielectric thin film layer on the upper surface of the first transparent conductive oxide layer, and depositing a second dielectric thin film layer on the lower surface of the second transparent conductive oxide layer;
(2) forming at least one first electrode window in the first dielectric thin film layer through laser etching or screen printing corrosive slurry, and forming at least one second electrode window in the second dielectric thin film layer;
(3) forming a first metal seed layer in the first electrode window, and forming a second metal seed layer in the second electrode window;
(4) sequentially forming a first metal copper layer and a first metal tin layer on the upper surface of the first metal seed layer, and sequentially forming a second metal copper layer and a second metal tin layer on the lower surface of the second metal seed layer;
(5) carrying out heat treatment on the sample obtained in the step (4) so as to prepare and obtain a first copper alloy electrode and a second copper alloy electrode;
the first transparent conductive oxide layer is formed on the upper surface of the silicon heterojunction structure, and the second transparent conductive oxide layer is formed on the lower surface of the silicon heterojunction structure.
2. The method according to claim 1, wherein the thickness of the first dielectric thin film layer and the second dielectric thin film layer is 0.01-5 μm;
preferably, the thickness is 0.02-0.5. mu.m.
3. The method of claim 1, wherein the first and second dielectric thin film layers comprise a material selected from the group consisting of SiNx, SiOx, SiON, Al2O3At least one of MgF.
4. The method of claim 1, wherein the first dielectric thin film layer and the second dielectric thin film layer are formed by at least one of PVD, PECVD, ALD.
5. The method of claim 1, wherein the material of the first and second metal seed layers comprises at least one selected from the group consisting of Cu, Ni, Ta, Mo, W, Ti, Cr, Al, Mg, Sn, Zn, Ag.
6. The method of claim 1, wherein the first and second metal seed layers have a thickness of 5-5000 nm;
preferably, the thickness is 5-500 nm.
7. The method of claim 1, wherein the first and second metal seed layers are formed by at least one of electroplating and light-induced plating.
8. The method of claim 1, wherein the first metallic copper layer, the second metallic copper layer, the first metallic tin layer, and the second metallic tin layer are formed by at least one of electroplating, electroless plating, and light-induced plating.
9. A silicon heterojunction solar cell, comprising:
a silicon heterojunction structure;
a first transparent conductive oxide layer formed on an upper surface of the silicon heterojunction structure;
a second transparent conductive oxide layer formed on a lower surface of the silicon heterojunction structure; and
a first copper alloy electrode and a second copper alloy electrode;
wherein the first copper alloy electrode and/or the second copper alloy electrode is formed by the method of any one of claims 1 to 8.
10. The cell of claim 9, wherein the silicon heterojunction structure comprises:
an n-type crystalline silicon substrate;
a first lightly doped n-type amorphous silicon layer formed on the upper surface of the n-type crystalline silicon substrate, preferably with a doping concentration of 108-1017/cm3；
Second lightly doped n-type amorphous siliconA second lightly doped n-type amorphous silicon layer formed on the lower surface of the n-type crystalline silicon substrate, preferably with a doping concentration of 108-1017/cm3；
The heavily doped p-type amorphous silicon emitter layer is formed on the upper surface of the first lightly doped n-type amorphous silicon layer;
and the heavily doped n-type amorphous silicon back field layer is formed on the lower surface of the second lightly doped n-type amorphous silicon layer.
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