CN110690131B - Three-dimensional heterogeneous welding method with large bonding force - Google Patents
Three-dimensional heterogeneous welding method with large bonding force Download PDFInfo
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- CN110690131B CN110690131B CN201910905503.6A CN201910905503A CN110690131B CN 110690131 B CN110690131 B CN 110690131B CN 201910905503 A CN201910905503 A CN 201910905503A CN 110690131 B CN110690131 B CN 110690131B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/114—Manufacturing methods by blanket deposition of the material of the bump connector
- H01L2224/1146—Plating
- H01L2224/11462—Electroplating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81193—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
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- Microelectronics & Electronic Packaging (AREA)
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- Manufacturing & Machinery (AREA)
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Abstract
The invention discloses a three-dimensional heterogeneous welding method with large bonding force, which specifically comprises the following steps: 101) a first carrier plate manufacturing step, 102) a retreating step, 103) a tinning step, 104) a second carrier plate manufacturing step and 105) a bonding step; the invention respectively manufactures mutually matched patterns on the surfaces of the carrier plates for bonding by a metal wet etching process or an electroplating process, increases the contact area, provides a place for subsequent metal melting reaction, and can greatly increase the welding force of the carrier plates and the carrier plates.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a three-dimensional heterogeneous welding method with large bonding force.
Background
The microwave millimeter wave radio frequency integrated circuit technology is the basis of modern national defense weaponry and internet industry, and along with the rapid rise of the economy of internet plus such as intelligent communication, intelligent home, intelligent logistics, intelligent transportation and the like, the microwave millimeter wave radio frequency integrated circuit which bears the functions of data access and transmission also has huge practical requirements and potential markets.
However, for a high-frequency micro-system, the area of the antenna array is smaller and smaller, and the distance between the antennas needs to be kept within a certain range, so that the whole module has excellent communication capability. However, for an analog device chip such as a radio frequency chip, the area of the analog device chip cannot be reduced by the same magnification as that of a digital chip, so that a radio frequency micro system with a very high frequency will not have enough area to simultaneously place a PA/LNA, and the PA/LNA needs to be stacked.
In practical applications, the module stacking process is generally a process of metal fusion bonding of metal dams on the upper and lower surfaces of the module, the welding force is completely from the tensile strength of tin on the top of the metal and copper, the tensile strength is proportional to the contact area of the metal surface, and for some regions with larger stress, the tensile strength is often too small due to insufficient contact area, and finally the module is separated.
Disclosure of Invention
The invention overcomes the defects of the prior art and provides a three-dimensional heterogeneous welding method with large bonding force.
The technical scheme of the invention is as follows:
a three-dimensional heterogeneous welding method with large bonding force specifically comprises the following steps:
101) a first carrier plate manufacturing step: the upper surface of the first carrier plate is manufactured into a seed layer through a physical sputtering, magnetron sputtering or evaporation process; coating a first layer of photoresist on the seed layer, removing part of the seed layer through a developing process to expose a region to be electroplated, and electroplating metal to form a metal column, wherein the upper surface of the metal column is a plane;
102) and a second treatment step: coating a second layer of photoresist on the upper surface of the first carrier plate processed in the step 101), exposing and developing to expose the part of the metal column, electroplating metal to remove the photoresist, and obtaining a convex point or a welding ring with a protrusion, namely forming a groove in the exposed area of the top of the metal column;
103) tin plating step: removing the second layer of photoresist electroplated tin or directly soldering tin in the electroplated metal area, and removing the second layer of photoresist, the first layer of photoresist and the seed layer;
104) a second carrier plate manufacturing step: the upper surface of the first carrier plate is manufactured into a seed layer through a physical sputtering, magnetron sputtering or evaporation process; coating a first layer of photoresist on the seed layer, removing part of the seed layer through a developing process to expose a region to be electroplated, and electroplating metal to form a metal column, wherein the upper surface of the metal column is a plane; coating a second layer of photoresist on the upper surface of the second carrier plate, exposing and developing to expose the part of the metal column, electroplating metal to remove the photoresist, and obtaining a boss structure matched with the first carrier plate;
removing the second layer of photoresist electroplated tin or directly soldering tin in the electroplated metal area, and removing the second layer of photoresist, the first layer of photoresist and the seed layer; coating soldering flux, and cleaning the soldering flux after refluxing to obtain a structure with a soldering tin layer on the upper surface of the carrier plate;
105) bonding: the surfaces of the first carrier plate and the second carrier plate are pasted through a surface pasting process, so that the grooves and the boss structures on the first carrier plate and the second carrier plate are matched, and a three-dimensional heterogeneous structure for increasing the bonding force is formed.
Furthermore, the seed layer is one or more layers with thickness ranging from 1nm to 100um, and is made of one or more of titanium, copper, aluminum, silver, palladium, gold, thallium, tin and nickel.
Furthermore, the thickness of the metal column ranges from 1nm to 100um, the structure of the metal column is a one-layer or multi-layer structure, and the material is one or a mixture of more of titanium, copper, aluminum, silver, palladium, gold, thallium, tin, nickel and gallium metal alloy.
Further, the depth of the groove ranges from 1nm to 100um, and the width ranges from 1um to 1000 um.
Furthermore, before the seed layer is disposed on the first carrier and the second carrier, a cushion layer is disposed, and the cushion layer of the first carrier and the cushion layer of the second carrier are respectively configured in a shape of a boss and a groove.
Further, the cushion layer is an insulating layer formed by depositing silicon oxide or silicon nitride or directly thermally oxidizing; or a seed layer is manufactured on the surface as a cushion layer through a physical sputtering, magnetron sputtering or evaporation process; or electroplating a metal layer as a cushion layer; or the cushion layer is formed by stacking a plurality of metal inorganic matters.
Compared with the prior art, the invention has the advantages that: the invention respectively makes mutually matched patterns on the surface of the carrier plate for bonding through a metal wet etching process or an electroplating process, so that the metal on the surfaces of the cofferdam and the welding pad is not in the same plane, the higher height of the cofferdam or the welding pad can enter the pit of the other cofferdam or the welding pad in the bonding process of a wafer or a chip, the contact area of the metal of the cofferdam and the welding pad on the upper bonding surface and the lower bonding surface can be greatly increased, a place is provided for the subsequent metal melting reaction, and the welding force of the cofferdam and the welding pad can be greatly increased.
Drawings
Fig. 1 is a schematic view of a first carrier according to the present invention;
FIG. 2 is a schematic view of the seed layer and the electroplating area of FIG. 1;
FIG. 3 is a schematic illustration of the electroplating process of FIG. 2 according to the present invention;
FIG. 4 is a schematic view of FIG. 3 with a second layer of photoresist provided in accordance with the present invention;
FIG. 5 is a schematic illustration of the electroplating process of FIG. 4 according to the present invention;
FIG. 6 is a schematic view illustrating a first carrier molding process according to the present invention;
FIG. 7 is a schematic view illustrating a second carrier molding process according to the present invention;
FIG. 8 is a schematic view of FIG. 6 with solder added in accordance with the present invention;
FIG. 9 is a schematic view of FIG. 7 with solder added in accordance with the present invention;
fig. 10 is a schematic structural diagram of the present invention.
The labels in the figure are: the structure comprises a first carrier 101, a seed layer 102, a first layer of photoresist 103, an electroplating region 104, a metal column 105, a second layer of photoresist 106, and solder 107.
Detailed Description
Reference will now be made in detail to the embodiments of the present invention, wherein like or similar reference numerals refer to like or similar elements or elements of similar function throughout. The embodiments described below with reference to the drawings are exemplary only, and are not intended as limitations on the present invention.
It will be understood by those skilled in the art that, unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the prior art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
Reference numerals in the various embodiments are provided for steps of the description only and are not necessarily associated in a substantially sequential manner. Different steps in each embodiment can be combined in different sequences, so that the purpose of the invention is achieved.
The invention is further described with reference to the following figures and detailed description.
Example 1:
as shown in fig. 1 to 10, a three-dimensional heterogeneous welding method with a large bonding force specifically includes the following steps:
101) the first carrier 101 manufacturing step: the seed layer 102 is manufactured on the upper surface of the first carrier plate 101 through a physical sputtering, magnetron sputtering or evaporation process; the thickness of the seed layer 102 ranges from 1nm to 100um, the structure thereof may be one layer or multiple layers, and the metal material may be one or more of titanium, copper, aluminum, silver, palladium, gold, thallium, tin, nickel, and the like. Coating a first layer of photoresist 103 on the seed layer 102, removing part of the seed layer 102 through a developing process to expose a region 104 to be electroplated, and electroplating metal to form a metal column 105, wherein the upper surface of the metal column 105 is a plane; the thickness of the metal column 105 ranges from 1nm to 100um, and the structure thereof may be one layer or multiple layers, and the material may also be one or more of titanium, copper, aluminum, silver, palladium, gold, thallium, tin, nickel, and gallium metal alloy.
102) And a second treatment step: coating a second layer of photoresist 106 on the upper surface of the first carrier 101 processed in the step 101), exposing and developing to expose the part of the metal column 105, electroplating metal to remove the photoresist, and obtaining a bump or a welding ring with a protrusion, namely forming a groove in the exposed area of the top of the metal column 105. The depth of the groove ranges from 1nm to 100um, and the width ranges from 1um to 1000 um. The seed layer 102 and the metal pillar 105 disposed on the second carrier and the first carrier 101 are all of the same specification without special description.
103) Tin plating step: the second layer of photoresist 106 is removed and electroplated with tin or directly subjected to soldering 107 in the electroplated metal area, and the second layer of photoresist 106, the first layer of photoresist 103 and the seed layer 102 are removed.
104) A second carrier plate manufacturing step: the seed layer 102 is manufactured on the upper surface of the first carrier plate 101 through a physical sputtering, magnetron sputtering or evaporation process; coating a first layer of photoresist 103 on the seed layer 102, removing part of the seed layer 102 through a developing process to expose a region 104 to be electroplated, and electroplating metal to form a metal column 105, wherein the upper surface of the metal column 105 is a plane; and coating a second layer of photoresist 106 on the upper surface of the second carrier plate, exposing and developing to expose the part of the metal column 105, and electroplating metal to remove the photoresist to obtain a boss structure adapted to the first carrier plate 101.
Removing the second layer of photoresist 106 and electroplating tin or directly performing soldering tin 107 on the electroplated metal area, and removing the second layer of photoresist 106, the first layer of photoresist 103 and the seed layer 102; and coating the soldering flux, and cleaning the soldering flux after refluxing to obtain the structure of which the upper surface of the carrier plate is provided with 107 layers of soldering tin.
105) Bonding: the surfaces of the first carrier plate 101 and the second carrier plate are pasted through a surface pasting process, so that the grooves and the boss structures on the first carrier plate 101 and the second carrier plate are matched, the length of a welding surface is increased, the bonding force is increased, and a three-dimensional heterogeneous structure for increasing the bonding force is formed.
Example 2:
the difference from embodiment 1 is that a cushion layer is disposed before the seed layer 102 is disposed on the first carrier 101 and the second carrier, and the cushion layers of the first carrier 101 and the second carrier are respectively disposed in a convex and a concave shape, and then the same seed layer 102 is covered.
Wherein, the cushion layer is an insulating layer formed by depositing silicon oxide or silicon nitride or directly thermally oxidizing; or the seed layer 102 is manufactured on the surface as a cushion layer through a physical sputtering, magnetron sputtering or evaporation process; or electroplating a metal layer as a cushion layer; or the cushion layer is formed by stacking a plurality of metal inorganic matters.
Namely, the pad layers are manufactured on the surfaces of the first carrier 101 and the second carrier, and may be insulating layers such as silicon oxide or silicon nitride deposited above a silicon wafer, or pad layers formed by direct thermal oxidation, and the thickness of the pad layers ranges from 10nm to 100 um.
Or the cushion layers are manufactured on the surfaces of the first carrier plate 101 and the second carrier plate through physical sputtering, magnetron sputtering or evaporation process, the thickness of the cushion layer ranges from 1nm to 100um, the structure of the cushion layer can be one layer or multiple layers, and the metal material can be one or more of titanium, copper, aluminum, silver, palladium, gold, thallium, tin, nickel and the like.
The cushion layer can also be electroplated metal with a thickness ranging from 1nm to 100um, the structure of the cushion layer can be one layer or multiple layers, and the metal material can be one or more of titanium, copper, aluminum, silver, palladium, gold, thallium, tin, nickel and the like.
The cushion layer can also be formed by stacking a plurality of metal inorganic matters, and the rest of the processing steps are the same.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, several modifications and decorations can be made without departing from the spirit of the present invention, and these modifications and decorations should also be regarded as being within the scope of the present invention.
Claims (1)
1. A three-dimensional heterogeneous welding method with large bonding force is characterized in that: the method specifically comprises the following steps:
101) a first carrier plate manufacturing step: the upper surface of the first carrier plate is manufactured into a seed layer through a physical sputtering, magnetron sputtering or evaporation process; coating a first layer of photoresist on the seed layer, removing part of the seed layer through a developing process to expose a region to be electroplated, and electroplating metal to form a metal column, wherein the upper surface of the metal column is a plane;
102) and a second treatment step: coating a second layer of photoresist on the upper surface of the first carrier plate processed in the step 101), exposing and developing to expose the part of the metal column, electroplating metal to remove the photoresist, and obtaining a convex point or a welding ring with a protrusion, namely forming a groove in the exposed area of the top of the metal column;
103) tin plating step: removing the second layer of photoresist electroplated tin or directly soldering tin in the electroplated metal area, and removing the second layer of photoresist, the first layer of photoresist and the seed layer;
104) a second carrier plate manufacturing step: the upper surface of the first carrier plate is manufactured into a seed layer through a physical sputtering, magnetron sputtering or evaporation process; coating a first layer of photoresist on the seed layer, removing part of the seed layer through a developing process to expose a region to be electroplated, and electroplating metal to form a metal column, wherein the upper surface of the metal column is a plane; coating a second layer of photoresist on the upper surface of the second carrier plate, exposing and developing to expose the part of the metal column, electroplating metal to remove the photoresist, and obtaining a boss structure matched with the first carrier plate;
removing the second layer of photoresist electroplated tin or directly soldering tin in the electroplated metal area, and removing the second layer of photoresist, the first layer of photoresist and the seed layer; coating soldering flux, and cleaning the soldering flux after refluxing to obtain a structure with a soldering tin layer on the upper surface of the carrier plate;
105) bonding: the surfaces of the first carrier plate and the second carrier plate are pasted through a surface pasting process, so that the grooves and the boss structures on the first carrier plate and the second carrier plate are matched to form a three-dimensional heterogeneous structure for increasing the bonding force;
the seed layer has one or more layers with thickness ranging from 1nm to 100um, and is made of one or more of titanium, copper, aluminum, silver, palladium, gold, thallium, tin and nickel;
the thickness range of the metal column is 1nm to 100um, the structure of the metal column is a one-layer or multi-layer structure, and the material is one or a mixture of more of titanium, copper, aluminum, silver, palladium, gold, thallium, tin, nickel and gallium metal alloy;
the depth range of the groove is 1nm to 100um, and the width range is 1um to 1000 um;
arranging cushion layers before arranging seed layers on the first carrier plate and the second carrier plate, wherein the cushion layers of the first carrier plate and the second carrier plate are respectively arranged into a boss shape and a groove shape;
the cushion layer is an insulating layer formed by depositing silicon oxide or silicon nitride or directly thermally oxidizing; or a seed layer is manufactured on the surface as a cushion layer through a physical sputtering, magnetron sputtering or evaporation process; or electroplating a metal layer as a cushion layer; or the cushion layer is formed by stacking a plurality of metal inorganic matters.
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| CN201910905503.6A CN110690131B (en) | 2019-09-24 | 2019-09-24 | Three-dimensional heterogeneous welding method with large bonding force |
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| CN201910905503.6A CN110690131B (en) | 2019-09-24 | 2019-09-24 | Three-dimensional heterogeneous welding method with large bonding force |
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| CN110690131B true CN110690131B (en) | 2021-08-31 |
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| CN111952195B (en) * | 2020-08-24 | 2022-03-15 | 浙江集迈科微电子有限公司 | Liquid micro-channel interconnection interface and welding process thereof |
| CN115117012A (en) * | 2022-05-09 | 2022-09-27 | 上海沛塬电子有限公司 | Manufacturing method and application of carrier plate with metal bump structure on surface |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JPS6489345A (en) * | 1987-09-29 | 1989-04-03 | Fujitsu Ltd | Metal bump and manufacture thereof |
| US7015590B2 (en) * | 2003-01-10 | 2006-03-21 | Samsung Electronics Co., Ltd. | Reinforced solder bump structure and method for forming a reinforced solder bump |
| TWI273667B (en) * | 2005-08-30 | 2007-02-11 | Via Tech Inc | Chip package and bump connecting structure thereof |
| US8409979B2 (en) * | 2011-05-31 | 2013-04-02 | Stats Chippac, Ltd. | Semiconductor device and method of forming interconnect structure with conductive pads having expanded interconnect surface area for enhanced interconnection properties |
| TWI467718B (en) * | 2011-12-30 | 2015-01-01 | Ind Tech Res Inst | Bump structure and electronic packaging solder joint structure and fabricating method thereof |
| US9553053B2 (en) * | 2012-07-25 | 2017-01-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bump structure for yield improvement |
| CN103579149B (en) * | 2012-08-01 | 2016-08-03 | 颀邦科技股份有限公司 | Semiconductor structure and manufacturing process thereof |
| JP2014116367A (en) * | 2012-12-06 | 2014-06-26 | Fujitsu Ltd | Electronic component, method of manufacturing electronic device and electronic device |
| US8957524B2 (en) * | 2013-03-15 | 2015-02-17 | Globalfoundries Inc. | Pillar structure for use in packaging integrated circuit products and methods of making such a pillar structure |
| US9607959B2 (en) * | 2014-08-27 | 2017-03-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Packaging device having plural microstructures disposed proximate to die mounting region |
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