CN110660654B - 一种超高质量SOI基键合Ge薄膜的制备方法 - Google Patents
一种超高质量SOI基键合Ge薄膜的制备方法 Download PDFInfo
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Abstract
本发明公开了一种超高质量SOI基键合Ge薄膜的制备方法，其是将Ge片和SOI片经表面处理后，分别在其上溅射一层a‑Ge薄膜，然后在大气中将两者进行贴合，放入退火炉中进行低温热退火，以实现高强度Ge/SOI的键合，再采用化学腐蚀结合化学机械抛光对键合的Ge片进行减薄抛光，以获得超高质量SOI基键合Ge薄膜。
Description
技术领域
本发明涉及一种超高质量SOI基键合Ge薄膜的制备方法，尤其是涉及一种利用化学腐蚀和化学机械抛光相结合实现超高质量Si基键合Ge薄膜的制备新方法。
背景技术
在传统半导体异质混合集成中，传统的CVD和MBE技术主导了薄膜材料的生长（Vivien, Laurent, et al. "Zero-bias 40 Gbit/s germanium waveguidephotodetector on silicon." Optics express 20.2 (2012): 1096-1101；Yin, Tao, etal. "31GHz Ge nip waveguide photodetectors on Silicon-on-Insulatorsubstrate." Optics Express 15.21 (2007): 13965-13971.），采用这两种技术结合改良外延工艺[低高温两步生长法（Huang, Shihao, et al. "Depth-dependent etch pitdensity in Ge epilayer on Si substrate with a self-patterned Ge coalescenceisland template." Thin Solid Films 520.6 (2012): 2307-2310；Zhou, Zhiwen, etal. "Normal incidence p-i-n Ge heterojunction photodiodes on Si substrategrown by ultrahigh vacuum chemical vapor deposition." Optics Communications283.18 (2010): 3404-3407.）、选区外延法（Li, Qiming, et al. "Selective growth ofGe on Si (100) through vias of SiO2 nanotemplate using solid source molecularbeam epitaxy." Applied Physics Letters 83.24 (2003): 5032-5034；Park, J-S., etal. "Defect reduction of selective Ge epitaxy in trenches on Si (001)substrates using aspect ratio trapping." Applied Physics Letters 90.5 (2007):052113.）等]可以在Si衬底上异质外延高质量的Ge薄膜材料，然而Ge/Si异质外延技术是将晶格常数不同的Ge (0.565 nm)和Si (0.543 nm)两种材料集成在一起，由于异质材料之间存在晶格失配，因此在外延过程中晶格失配形成的应力会通过在外延界面形成失配位错而得到释放，失配位错在高温生长环境下的传播速率快，而且倾向于在Ge薄膜的表面终结（Hull, Robert, and John C. Bean. "Misfit dislocations in lattice-mismatchedepitaxial films." Critical Reviews in Solid State and Material Sciences 17.6(1992): 507-546），因此在薄膜生长过程中会在Ge薄膜表面形成高密度的穿透位错[109cm-2 （Buca, D., et al. "Metal-germanium-metal ultrafast infrared detectors."Journal of applied physics 92.12 (2002): 7599-7605.）]。虽然外延后的Ge薄膜可以采用循环热退火通过穿透位错的相互作用来降低材料中的位错密度（Hull, Robert, andJohn C. Bean. "Misfit dislocations in lattice-mismatched epitaxial films."Critical Reviews in Solid State and Material Sciences 17.6 (1992): 507-546），然而循环退火后的穿透位错密度仍然在106~107 cm-2数量级（Liu, Ziheng, et al. "Cyclic thermal annealing on Ge/Si (100) epitaxial films grown by magnetronsputtering." Thin Solid Films 574 (2015): 99-102；Ghosh, Aheli, et al. "Growth, structural, and electrical properties of germanium-on-siliconheterostructure by molecular beam epitaxy." AIP Advances 7.9 (2017):095214.）。由于晶格失配的存在，目前采用外延技术很难进一步降低Ge薄膜中穿透位错密度。
近几年，有研究人员采用低温异质键合技术来实现Si基Ge薄膜的制备，由于在低温下失配位错的成核和传播速率较低，很难在Ge薄膜中形成穿透位错，因此采用低温键合技术可以尽可能的保留体Ge的晶体质量。Gity和Byun等人采用等离子体表面处理技术在300 ℃实现了Ge/Si低温异质键合（Gity, F., et al. "Characterization ofgermanium/silicon p-n junction fabricated by low temperature direct waferbonding and layer exfoliation." Applied Physics Letters 100.9 (2012): 092102；Byun, K., et al. "Comprehensive investigation of Ge-Si bonded interfacesusing oxygen radical activation." Journal of Applied Physics 109.12 (2011):123529.），键合强度达到了体Ge的断裂强度，然而由于H+注入Ge片时会在Ge片内形成Frenkel pair（点缺陷），因此采用这种剥离的Ge薄膜制备的异质结二极管暗电流高、正向电流低、器件开关比低。其次如果使用高温快速热退火对Ge薄膜中点缺陷进行修复，由于高温下Ge和Si的热失配应力非常的大，快速升温退火过程中Ge薄膜很容易从Si衬底脱落，因此，如何在低温下乃至室温下实现超高质量Si基Ge薄膜的制备是目前键合工艺遇到的一大技术难题。
本发明首先采用a-Ge中间层键合技术在低温下实现Ge/SOI键合，接着通过化学溶液腐蚀将Ge片初步减薄到20 μm，最后采用化学机械抛光将Ge片厚度减薄到1 μm，相比于智能剥离技术制备的Ge薄膜，由于不存在Ge片注H+的过程，因此采用腐蚀减薄的方法可以尽可能的保留体Ge的晶体质量，最终实现超高质量SOI基Ge薄膜的制备。
发明内容
本发明针对传统外延技术制备的SOI基Ge薄膜中存在高密度穿透位错、晶体质量较差的问题，提供了一种超高质量SOI基键合Ge薄膜的制备方法，其采用低温a-Ge中间层键合技术实现Ge/SOI键合，并采用化学腐蚀方法结合化学机械抛光工艺将键合Ge片减薄到1μm，从而实现高质量SOI基Ge薄膜的制备。
为实现上述目的，本发明采用如下技术方案：
一种超高质量SOI基键合Ge薄膜的制备方法，其包括以下步骤：
1）将Ge片和SOI片用丙酮、乙醇和去离子水分别依次超声清洗10~15 min，以去除基底表面吸附的颗粒物和有机物；
2）将步骤1）清洗后的SOI片先用体积比为4:1的H2SO4/H2O2溶液煮沸10~15 min，去离子水冲洗10~15次，再用体积比为1:20的HF/H2O溶液浸泡2~4 min，去离子水冲洗10~15次；
3）将步骤2）处理后的SOI片先用体积比为1:1:4的NH4OH/H2O2/H2O溶液煮沸10~15min，去离子水冲洗10~15次，再用体积比为1:20的HF/H2O溶液浸泡2~4min，去离子水冲洗10~15次；
4）将步骤3）处理后的SOI片用体积比为1:1:4的HCl/H2O2/H2O溶液煮沸10~15 min，去离子水冲洗10~15次；
5）将步骤1）处理后的Ge片和步骤4）处理后的SOI片分别用体积比为1:20的HF/H2O溶液浸泡2~4 min，去离子水冲洗10~15次；
6）将步骤5）表面处理后的Ge片和SOI片用涂胶机甩干，然后放入磁控溅射系统中，待溅射室本底真空度小于1×10-4 Pa时，向溅射室内充入纯度为5N的Ar气，通过Ar气流量控制使溅射室内气压达0.3 Pa；
7）室温下，在Ge片和SOI片上溅射一层厚2 nm的a-Ge薄膜，通过控制磁控溅射靶位电流和样品托转速来调节溅射a-Ge薄膜的速率；
8）将溅射完a-Ge薄膜的Ge片和SOI片迅速取出，将两者在大气中以溅射有a-Ge薄膜的一侧进行贴合；
9）将步骤8）获得的Ge/SOI贴合片放入管式退火炉中，于300℃低温热退火20 h，以实现高强度Ge/SOI的键合；
10）对获得的Ge/SOI键合片采用体积比为1:6:3的H3PO4/H2O2/H2O溶液对键合的Ge片进行初步腐蚀，使Ge薄膜厚度降至20 μm；
11）将步骤10）经初步腐蚀后的Ge/SOI键合片采用化学机械抛光进行进一步减薄抛光，直至Ge薄膜厚度为1 μm，制得所述超高质量SOI基键合Ge薄膜；所述化学机械抛光采用体积比为1:3:0.2的compol-80/H2O/H2O2溶液作为抛光液。
本发明的显著优点在于：本发明创新性地提出利用H3PO4/H2O2/H2O溶液结合化学机械抛光工艺对键合Ge片进行减薄，以制得超高质量的SOI基Ge薄膜。其中，H3PO4/H2O2/H2O溶液能均匀、平整、缓慢的腐蚀Ge片而不至于使Ge表面变得粗糙，再配合化学机械抛光工艺，可以在对Ge片进一步减薄的同时对Ge表面进行抛光，而最终获得高质量的SOI基键合Ge薄膜材料。
附图说明
图1为实施例所得化学机械抛光后SOI基键合Ge薄膜的表面金相显微镜图；
图2为实施例所得化学机械抛光后SOI基键合Ge薄膜的双晶XRD测试图。
具体实施方式
为了使本发明所述的内容更加便于理解，下面结合具体实施方式对本发明所述的技术方案做进一步的说明，但是本发明不仅限于此。
所用设备为TRP-450复合薄膜溅射沉积系统，生长室内安置两个直流靶位和一个射频靶位。所用的靶材为5N（99.999%以上）的高纯Ge圆形靶材。所用的SOI衬底材料顶层单晶Si薄膜厚度为220 nm，晶向为（100），杂质类型为N型，电阻率为10Ω·cm，BOX层厚度为2μm。所用的Ge衬底材料为晶向（100）的P型单晶Ge片，单面抛光，电阻率为0.05Ω·cm。
实施例
一、SOI片和Ge片的表面处理
1）将SOI片和Ge片用丙酮、乙醇、去离子水分别依次超声清洗10~15 min，以去除基底表面附着的颗粒物和有机物；
2）将超声清洗后的SOI片先用H2SO4:H2O2 =4:1（v/v）的溶液煮沸10~15 min，去离子水冲洗10~115次，再用HF:H2O=1:20（v/v）的溶液浸泡2~4 min，去离子水冲洗10~15次；
3）接着将SOI片用NH4OH:H2O2:H2O=1:1:4（v/v/v）的溶液煮沸10~15 min，去离子水冲洗10~15次，再用HF:H2O=1:20（v/v）的溶液浸泡2~4 min，去离子水冲洗10~15次；
4）最后将SOI片用HCl:H2O2:H2O=1:1:4（v/v/v）的溶液煮沸10~15 min，去离子水冲洗10~15次；
5）将清洗后的SOI片和Ge片用HF:H2O=1:20（v/v）的溶液浸泡2~4 min，去离子水冲洗10~15次；
二、Ge/SOI键合
1）将清洗后的SOI片和Ge片用涂胶机以4000rpm甩干30 s后，放入溅射沉积系统，待溅射室本底真空度小于1×10-4 Pa时，向溅射室内充入纯度为5N的Ar气体，通过通入流量为3 sccm的气体使溅射室内的压强保持在0.3 Pa，同时开启直流溅射电源；
2）在室温下，调节直流溅射电源电流为0.05 A，电压为396V，样品托转速为10rpm，在SOI片和Ge片上溅射一层厚度为2 nm的a-Ge薄膜，沉积速率为3.95 nm/min；
3）将溅射完a-Ge薄膜的Ge片和SOI片取出后，在大气中以溅射有a-Ge薄膜的一侧将两者迅速贴合在一起，并用手指施加一定的压力，以挤出界面气泡并使贴合样品的贴合强度更高；
三、Ge片减薄
1）将贴合后的样品放入管式退火炉中，在300℃退火20 h，以实现高强度Ge/SOI的键合；其升温降温速率为0.5 ℃ /min；
2）将退火后的样品放入H3PO4:H2O2:H2O=1:6:3（v/v/v）的溶液中进行键合Ge片的化学腐蚀，在腐蚀过程中采用螺旋测微器对Ge片的厚度进行测量，将Ge片的厚度降低到20 μm；
3）将腐蚀后的Ge/SOI键合片采用compol-80:H2O:H2O2=1:3:0.2（v/v/v）的溶液对Ge片进行进一步的化学机械抛光，将Ge片的厚度减薄至1 μm。
对减薄后的键合Ge薄膜进行金相显微镜测试和双晶XRD测试，其结果分别如图1和图2所示。从图1中可以看出化学机械抛光后Ge表面光滑，无明显凸起；从图2中可以看出，化学机械抛光后Ge薄膜的Ge(004)峰的峰型对称，半高宽仅为37’’，远低于外延Ge薄膜中Ge(004)峰的半高宽（约为300’’，参见Huang Z, Mao Y, Yi X, et al. Impacts of excimerlaser annealing on Ge epilayer on Si[J]. Applied Physics A, 2017, 123(2):148.），也远低于智能剥离的Ge薄膜的半高宽（约为100’’，参见Ruan Y, Liu R, Lin W, etal. Impacts of thermal annealing on hydrogen-implanted germanium andgermanium-on-insulator substrates[J]. Journal of The Electrochemical Society,2011, 158(11): H1125-H1128.），证明所制备的SOI基键合Ge薄膜的晶体质量非常高。
以上所述仅为本发明的较佳实施例，凡依本发明申请专利范围所做的均等变化与修饰，皆应属本发明的涵盖范围。
Claims (3)
1.一种超高质量SOI基键合Ge薄膜的制备方法，其特征在于：包括以下步骤：
1）将Ge片和SOI片分别进行表面处理后，用涂胶机甩干，然后放入磁控溅射系统中，待溅射室本底真空度小于1×10-4 Pa时，向溅射室内充入纯度为5N的Ar气，使溅射室内气压达0.3 Pa；
2）室温下，在Ge片和SOI片上溅射一层厚2 nm的a-Ge薄膜；
3）将溅射完a-Ge薄膜的Ge片和SOI片迅速取出，将两者在大气中以溅射有a-Ge薄膜的一侧进行贴合；
4）将步骤3）获得的Ge/SOI贴合片放入管式退火炉中，于300℃低温热退火20 h，以实现高强度Ge/SOI的键合；
5）对获得的Ge/SOI键合片采用H3PO4/H2O2/H2O溶液对键合的Ge片进行初步腐蚀，使Ge薄膜厚度降至20 μm；
6）将步骤5）经初步腐蚀后的Ge/SOI键合片采用化学机械抛光进行进一步减薄抛光，直至Ge薄膜厚度为1 μm，制得所述超高质量SOI基键合Ge薄膜；
步骤5）所述H3PO4/H2O2/H2O溶液是将H3PO4、H2O2、H2O按体积比1:6:3混合制成；
步骤6）所述化学机械抛光是采用体积比为1:3:0.2的compol-80/H2O/H2O2溶液作为抛光液。
2. 根据权利要求1所述的一种超高质量SOI基键合Ge薄膜的制备方法，其特征在于：步骤1）中Ge片的表面处理方法为：先将Ge片用丙酮、乙醇和去离子水分别依次超声清洗10~15min，以去除基底表面吸附的颗粒物和有机物，再用体积比为1:20的HF/H2O溶液浸泡2~4min，去离子水冲洗10~15次。
3.根据权利要求1所述的一种超高质量SOI基键合Ge薄膜的制备方法，其特征在于：步骤1）中SOI片的表面处理步骤为：
a）将SOI片用丙酮、乙醇和去离子水分别依次超声清洗10~15 min，以去除基底表面吸附的颗粒物和有机物；
b）将步骤a）清洗后的SOI片先用体积比为4:1的H2SO4/H2O2溶液煮沸10~15 min，去离子水冲洗10~15次，再用体积比为1:20的HF/H2O溶液浸泡2~4 min，去离子水冲洗10~15次；
c）将步骤b）处理后的SOI片先用体积比为1:1:4的NH4OH/H2O2/H2O溶液煮沸10~15 min，去离子水冲洗10~15次，再用体积比为1:20的HF/H2O溶液浸泡2~4min，去离子水冲洗10~15次；
d）将步骤c）处理后的SOI片用体积比为1:1:4的HCl/H2O2/H2O溶液煮沸10~15 min，去离子水冲洗10~15次；
e）将步骤d）处理后的SOI片用体积比为1:20的HF/H2O溶液浸泡2~4 min，去离子水冲洗10~15次。
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