CN110581207A - Light emitting assembly and method of manufacturing the same - Google Patents
Light emitting assembly and method of manufacturing the same Download PDFInfo
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- CN110581207A CN110581207A CN201910454453.4A CN201910454453A CN110581207A CN 110581207 A CN110581207 A CN 110581207A CN 201910454453 A CN201910454453 A CN 201910454453A CN 110581207 A CN110581207 A CN 110581207A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
- H01L33/385—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending at least partially onto a side surface of the semiconductor body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0016—Processes relating to electrodes
Abstract
A light emitting assembly, comprising: a first region having a second semiconductor layer, an active layer, a first semiconductor layer, and a first electrode in contact with the first semiconductor layer; a second region having a second semiconductor layer, an active layer, and a first semiconductor layer; a third region which is formed by removing at least the first semiconductor layer and the active layer so as to surround the second region and which separates the first region from the second region; a second electrode covering at least a part of the top portion of the second region, the side portion of the second region, and the third region, and contacting the second semiconductor layer and the window layer/support substrate in the third region, wherein the coating area of the second electrode in the third region is 300 μm2The above.
Description
Technical Field
The invention relates to a light-emitting component and a manufacturing method thereof.
Background
Products such as Chip On Board (COB) are used as an LED chip mounting method for applications such as lighting because they have excellent heat dissipation from LED modules. When an LED is mounted on a COB or the like, flip chip mounting in which a chip is directly bonded to a substrate is required. In order to realize flip chip mounting, it is necessary to fabricate a flip chip in which power-on pads having different polarities are provided on one surface of a light emitting element. The surface opposite to the surface provided with the current-carrying pads must be made of a material having a light extraction function.
When the yellow to red LEDs are used to fabricate flip-chip, AlGaInP-based material is used for the light-emitting layer. Since AlGaInP based material does not have bulk crystal and the LED portion is formed by epitaxy, a material different from AlGaInP is selected as the starting substrate. Since GaAs or Ge is often selected as the starting substrate and these substrates have a characteristic of absorbing light of visible light, the starting substrate is removed when the flip chip is manufactured. However, the epitaxial layer forming the light-emitting layer is very thin, and thus the initial substrate cannot be self-supporting after being removed. Therefore, it is necessary to replace the starting substrate with a material and a structure having a function as a window layer which is slightly transparent to the emission wavelength of the light-emitting layer and a function as a support substrate which is thick enough to be self-supporting.
In this case, when flip chip mounting is performed on a light emitting element having two electrodes with different polarities on the upper surface, mounting becomes easy if the electrode surfaces have the same height.
Patent document 1 describes: in order to provide two electrodes having the same height, an insulating film is provided on the light-emitting layer, and electrodes having different polarities are formed thereon.
Patent document 2 describes: a columnar semiconductor layer region is formed, and an electrode on the light-emitting layer and an electrode having different polarities are formed in the columnar semiconductor region.
Documents of the prior art
Patent document
Patent document 1: japanese patent laid-open publication No. 2005-322722
Patent document 2: japanese patent No. 6291400
Disclosure of Invention
Problems to be solved by the invention
However, in the technique described in patent document 1, it is difficult to improve the adhesion strength of the electrode formed on the insulating film to the same extent as in the case of directly contacting the semiconductor, and peeling defects are likely to occur. Further, since the linear expansion of the insulating film and the metal is a difference in number, there is a problem that insulation defects due to expansion and contraction of the metal film are likely to occur when the temperature of the device changes due to energization.
In the technique described in patent document 2, an electrode having a polarity different from that of an electrode formed on a light-emitting layer is directly formed on a columnar semiconductor layer, and thus, compared with the technique described in patent document 1, there is an advantage that the adhesion strength between the electrode and the semiconductor can be sufficiently ensured. On the other hand, it is necessary to form an electrode layer having very low resistance on the side surface of the columnar semiconductor, and the gap between the columnar semiconductor portions is narrow, so that it is difficult to form a uniform metal film by a vapor deposition method. Further, if a seed layer having a sufficient thickness and quality cannot be formed, it is difficult to form a metal layer having a very low resistance in the side surface portion by a plating method.
In view of the above problems, an object of the present invention is to provide: a flip-chip mounted light emitting device and a method of manufacturing the light emitting device, in which electrodes having different polarities are formed at substantially the same height, and which has very low resistance, and in which disconnection defects and peeling defects are suppressed and which can be free from tilt.
means for solving the problems
In order to achieve the above object, the present invention provides a light emitting device including a window layer/support substrate and a light emitting layer portion provided on the window layer/support substrate, the light emitting layer portion including a second semiconductor layer of a second conductivity type, an active layer, and a first semiconductor layer of a first conductivity type in this order from the window layer/support substrate side, the light emitting device comprising: a first region having the second semiconductor layer, the active layer, the first semiconductor layer, and a first electrode connected to the first semiconductor layer; a second region having the second semiconductor layer, the active layer and the first semiconductor layer; a third region which is formed by removing at least the first semiconductor layer and the active layer so as to surround the second region and which separates the first region from the second region; a second electrode covering the top of the second region, the side surface of the second region, and at least a part of the third region, and contacting the second semiconductor layer and the window layer/support substrate in the third region, wherein the coating area of the second electrode in the third region is 300 μm2The above.
According to such a light emitting element, electrodes having different polarities are formed at substantially the same height, and a flip chip mounting object having very low resistance, suppressed disconnection defects, and suppressed peeling defects, and free from tilt can be obtained.
In this case, the window layer/support substrate can be made of GaAszP1-zwherein 0.0 < z < 0.1, and the luminescent layer part is (Al)xGa1-x)yIn1-yP, wherein x is 0.0 ≦ 1.0 and y is 0.4 ≦ 0.6.
Thus, the light emitting efficiency is good, and the disconnection defect and the peeling defect are suppressed.
At this time, a method for manufacturing a light emitting device can be provided, which includes the steps of: forming at least a first semiconductor layer, an active layer and a second semiconductor layer in this order by epitaxial growth on an initial substrate; forming a window layer and a support substrate by epitaxial growth or bonding; removing the starting substrate to expose the first semiconductor layer; forming a first electrode on a part of a surface of the first semiconductor layer; removing at least the first semiconductor layer and the active layer around a second region to form a third region in a manner that the first region and the second region are formed, wherein the first region includes the first electrode, the second region does not include the first electrode and has the first semiconductor layer and the active layer, and the first semiconductor layer and the active layer of the second region are separated from the first region; forming a second electrode over the top of the second region, the side of the second region, and at least a portion of the third region, wherein the second electrode in the third region has a coating area of 300 μm2The above.
Thus, it is possible to manufacture a flip-chip mounted light emitting element in which electrodes having different polarities are formed at substantially the same height, which has very low resistance, and which is capable of suppressing disconnection defects and peeling defects and which is free from tilt, with high ease.
In this case, the window layer/support substrate can be made of GaAszP1-zWherein 0.0 < z < 0.1, and the luminescent layer part is (Al)xGa1-x)yIn1-yp, wherein the luminescence of 0.0 ≦ x ≦ 1.0 and 0.4 ≦ y ≦ 0.6A method of manufacturing an assembly.
Thus, a light-emitting element having excellent light-emitting efficiency and further suppressed disconnection defects and peeling defects can be manufactured.
Comparing the efficacy of the prior art
As described above, according to the light emitting device of the present invention, the electrodes having different polarities are formed at substantially the same height, have very low resistance, and can be flip chip mounted without tilting with the disconnection defect and the peeling defect suppressed. In addition, according to the method for manufacturing a light emitting element of the present invention, it is possible to manufacture a flip chip mounted light emitting element in which electrodes having different polarities are formed at substantially the same height, which has very low resistance, and which is suppressed in disconnection defects and peeling defects and which is free from tilt, extremely easily.
drawings
Fig. 1 shows a build-up structure in the middle of the manufacturing process of the light emitting device according to the first embodiment.
Fig. 2 shows a light emitting module according to a first embodiment.
Fig. 3 is a plan view and a cross-sectional view showing a chip design of the light emitting module according to the first embodiment.
Fig. 4 shows a build-up structure in the middle of the manufacturing process of the light emitting device according to the second embodiment.
Fig. 5 shows a light emitting module according to a second embodiment.
Fig. 6 is a plan view and a cross-sectional view showing a chip design of the light emitting module according to the second embodiment.
Fig. 7 shows a build-up structure in the middle of the manufacturing process of the light emitting device according to the third embodiment.
Fig. 8 shows a light emitting module according to a third embodiment.
Fig. 9 is a plan view and a cross-sectional view showing a chip design of the light emitting module according to the third embodiment.
Fig. 10 shows a light emitting device according to a first comparative example.
Fig. 11 is a plan view and a cross-sectional view showing a chip design of a light emitting device according to a first comparative example.
Fig. 12 shows a light emitting module according to a second comparative example.
Fig. 13 shows the incidence of crystal grain tilt defects in mounting of the first to third examples and the first comparative example.
fig. 14 shows the disconnection defect rate due to the second electrode in examples one to three and comparative example two.
Fig. 15 shows mounting defects due to ionization peeling at the time of mounting in examples one to three and comparative example two.
Fig. 16 shows the relationship between the film area and VF (forward voltage) in examples one to six and comparative examples one, three, and four.
Detailed Description
The present invention will be described in detail below, but the present invention is not limited to these.
As above, it is sought: a flip-chip light emitting device in which electrodes having different polarities are formed at substantially the same height, which has very low resistance, and in which disconnection defects and peeling defects are suppressed and which can be mounted without tilting, and a method for manufacturing the light emitting device.
The inventors of the present invention have made extensive studies to solve the above problems, and have found: the light emitting device includes a window layer/support substrate and a light emitting layer portion provided on the window layer/support substrate, the light emitting layer portion including a second semiconductor layer of a second conductivity type, an active layer, and a first semiconductor layer of a first conductivity type in this order from the window layer/support substrate side, the light emitting device including: a first region having the second semiconductor layer, the active layer, the first semiconductor layer, and a first electrode connected to the first semiconductor layer; a second region having the second semiconductor layer, the active layer and the first semiconductor layer; a third region which is formed by removing at least the first semiconductor layer and the active layer so as to surround the second region and which separates the first region from the second region; a second electrode covering the top of the second region, the side surface of the second region, and at least a part of the third region, and contacting the second semiconductor layer and the window layer/support substrate in the third regionThe second electrode had a film area of 300 μm2The above light emitting device has a lower resistance, and is more inhibited from suffering disconnection defects and peeling defects, and the present invention has been completed.
Further, the present inventors found out that: by comprising the following steps: forming at least a first semiconductor layer, an active layer and a second semiconductor layer in this order by epitaxial growth on an initial substrate; forming a window layer and a support substrate by epitaxial growth or bonding; removing the starting substrate to expose the first semiconductor layer; forming a first electrode on a part of a surface of the first semiconductor layer; removing at least the first semiconductor layer and the active layer around the second region to form a third region in a manner that a first region and a second region are formed, wherein the first region includes the first electrode, the second region does not include the first electrode and has the first semiconductor layer and the active layer, and the first semiconductor layer and the active layer of the second region are separated from the first region; forming a second electrode over the top of the second region, the side of the second region, and at least a portion of the third region, wherein the second electrode in the third region has a film area of 300 μm2The above method for manufacturing a light emitting device can manufacture a flip chip light emitting device in which electrodes having different polarities are formed at substantially the same height, which has very low resistance, and which can be mounted without tilting with minimal disconnection defects and peeling defects, and the present invention has been completed.
Hereinafter, the description is made with reference to the drawings.
First embodiment
Fig. 1 shows a build-up structure in the middle of a manufacturing process of a light emitting device according to the present embodiment, fig. 2 shows a light emitting device according to the present embodiment, and fig. 3 shows a design plan view and a cross-sectional view of a chip design of a light emitting device according to the present embodiment.
For example, AlGaInP is an epitaxial wafer 001 capable of being oriented in [001 ]]On a GaAs substrate 100 as a starting substrate inclined at 15 degrees in direction, (Al) is deposited by metal organic vapor deposition (MOVPE)xGa1-x)yIn1-yA first semiconductor layer 101 of a lower (n-type) clad layer comprising P (0.0 ≦ x ≦ 1.0, 0.4 ≦ y ≦ 0.6), (Al)xGa1-x)yIn1-yAn active layer 102 of P (0.0 ≦ x ≦ 1.0, 0.4 ≦ y ≦ 0.6), (Al)xGa1-x)yIn1-yA second semiconductor layer 103 of an upper (P-type) cladding layer composed of P (0.0 ≦ x ≦ 1.0, 0.4 ≦ y ≦ 0.6), GayIn1-yAn intermediate composition layer 104 of P (0.0 ≦ y ≦ 1.0) and a GaP window layer 105 having a thickness of 0.5 μm or more are formed in this order. The portion including the first semiconductor layer 101, the active layer 102, and the second semiconductor layer 103 constitutes a light-emitting layer portion 107. The fabrication method is not limited to MOVPE, and the film may be fabricated by a Molecular Beam Epitaxy (MBE) method or a Chemical Beam Epitaxy (CBE) method.
Next, GaAs is formed in contact with the GaP window layer 105 and having a thickness of, for example, 100 μmzP1-z(0.0 ≦ z ≦ 0.1) the window layer/support substrate 106. The window layer/support substrate 106 can be formed by MOVPE, MBE, or hydride vapor deposition (HVPE) which is inexpensive and has a high deposition rate.
After the formation of the window layer/support substrate 106, the wafer 011 (see fig. 2) in which the GaAs substrate 100 serving as the starting substrate of the AlGaInP-based epitaxial wafer 001 is removed by chemical etching is formed. The chemical etchant is preferably selective to AlGaInP based materials, and is usually removed with an ammonia-containing etchant.
after the GaAs substrate 100 is removed, a first electrode 151 is formed on the first semiconductor layer 101 of the wafer 011. In addition, at least the first semiconductor layer 101 and the active layer 102 are removed so as to surround the second region 125, so that the second region 125 where the first semiconductor layer 101, the active layer 102, the second semiconductor layer 103, and the like are left is formed, and the third region 120 is formed. This results in a structure including the first region 111 having the first electrode 151, the second region 125, and the third region 120. Although fig. 2 shows an example in which the third region 120 reaches the window layer/support substrate 106, it may be stopped at the second semiconductor layer 103, the intermediate composition layer 104, or the GaP window layer 105.
Next, the second electrode 161 is formed so as to cover at least a part of the top 125A, the side 125B, and the bottom 120A of the third region 120 of the second region 125. Although fig. 2 shows an example in which the second electrode 161 is not formed on the side surface portion 125C on the first region 111 side, the second electrode 161 may be formed on the side surface portion 125C without negating the formation of the metal electrode on the side surface portion 125C.
Since the heights of the top 125A, which is the upper surface of the first semiconductor layer 101 in the first region 111 and the upper surface of the first semiconductor layer 101 in the second region 125, are substantially the same, the heights of the upper surface of the first electrode 151 and the upper surface of the second electrode 161 can be substantially the same.
The coating area of the bottom portion 120A of the third region 120 on which the second electrode 161 is formed is 300 μm2The above. Further 700 μm2The above is more preferable. In this way, the second region 125 is provided, the second electrode 161 is formed so as to cover at least a part of the top 125A of the second region 125, the side 125B of the second region 125, and the bottom 120A of the third region 120, and the film area of the bottom 120A on which the second electrode 161 is formed is 300 μm2As described above, a flip-chip mounted light-emitting device can be obtained which has very low resistance, and in which disconnection defects and peeling defects are suppressed and which can be free from tilt.
The upper limit of the coating area of the bottom part 120A is not particularly limited, but if the coating area is larger, the area of the light emitting part is relatively smaller and the efficiency is deteriorated, so 7000 μm is used as the coating area2The following are preferred. This is the same in the second and third embodiments described later.
Next, the dielectric portion 140 is provided in at least a part of the first region 111 where the first electrode 151 is not provided. This makes it possible to obtain: the light emitting element a01 having the dielectric portion 140 is provided on at least a part of the sidewall 130 between the first region 111 and the third region 120. The positional relationship among the first electrode 151, the dielectric portion 140, and the second electrode 161 provided in the light emitting element a01 is shown in the plan view and the cross-sectional view of fig. 3.
Although this embodiment shows an example in which the dielectric portion 140 covers the entire upper surface and the sidewall 130 of the first region 111 except for the first electrode 151, the dielectric portion may cover only a part of the upper surface and the sidewall.
Although this embodiment shows an example in which the dielectric portion 140 has a single-layer structure in the first region 111, a light reflecting film or a light reflecting portion may be provided between the dielectric portion 140 and the first region 111, or a light reflecting film or a light reflecting portion may be provided on the side of the dielectric portion 140 not in contact with the first region 111.
Although this embodiment shows an example in which the first region 111 has a flat surface, it is not said that the same effect can be obtained even with a surface having irregularities. With respect to a surface having concavities and convexities, comprising: a simple rough surface by wet etching, a facet rough surface having facets, a patterned rough surface by photolithography having an interval of several tens of μm to several hundreds of nm, and a photonic rough surface having a groove shape having an interval of several to several hundreds of nm.
Although this embodiment shows an example in which the side wall 130 and the third region 120 are flat surfaces without irregularities, the side wall may be a surface having irregularities.
Although this embodiment shows an example in which the window layer/support substrate 106 has a flat surface, it is not said that the same effects can be obtained even if the window layer/support substrate has a surface having irregularities. With respect to a surface having concavities and convexities, comprising: a simple rough surface by wet etching, a facet rough surface having facets, a patterned rough surface by photolithography having an interval of several tens of μm to several hundreds of nm, and a photonic rough surface having a groove shape having an interval of several to several hundreds of nm.
Although the present embodiment does not describe forming another film on the surface of the window layer/support substrate 106, an antireflection film made of a dielectric material may be provided.
After the light emitting element a01 is formed, if necessary, Au bumps are formed on the first electrode 151 and the second electrode 161, and the resultant is linearly irradiated with a laser beam having a light absorption characteristic of GaP to perform scribing, and after a defect line is formed, a cleavage process is performed to perform individual dicing. Alternatively, a diamond wire is scribed to form a defective flat cable, and then a splitting process is performed to perform individual graining.
When the light emitting element a01 is directly mounted on the drive substrate, the light emitting element a01 is directly mounted on the mounting substrate without performing the scribing and cleaving process, and therefore the scribing and cleaving process is not performed. In addition, the scribing and splitting treatment is not carried out, and the effect of the invention is the same.
After being individually granulated, the respective chips are mounted to the driving substrate through the Au bumps. In this case, the die can be pressed by ultrasonic waves, a temperature of 150 ℃ or higher, or both of them.
Second embodiment
Fig. 4 is a plan view and a cross-sectional view showing a chip design of the light emitting device according to the second embodiment, fig. 5 is a laminated structure in the middle of a manufacturing process of the light emitting device according to the second embodiment, and fig. 6 is a plan view and a cross-sectional view showing the chip design of the light emitting device according to the second embodiment.
For example, the AlGaInP epitaxial wafer 002 can be oriented in [001 ]]On a GaAs substrate 200 as a starting substrate inclined at 15 degrees, for example, (Al) is deposited by metal organic vapor deposition (MOVPE)xGa1-x)yIn1-yA first semiconductor layer 201 of a lower (n-type) clad layer composed of P (0.0 ≦ x ≦ 1.0, 0.4 ≦ y ≦ 0.6), (Al)xGa1-x)yIn1-yAn active layer 202 comprising P (0.0 ≦ x ≦ 1.0, 0.4 ≦ y ≦ 0.6), (Al)xGa1-x)yIn1-yP (0.0 ≦ x ≦ 1.0, 0.4 ≦ y ≦ 0.6) is formed in this order from the second semiconductor layer 203 which is an upper (P-type) cladding layer and the GaP window layer 205 having a thickness of 0.5 μm or more. The portion including the first semiconductor layer 201, the active layer 202, and the second semiconductor layer 203 constitutes the light-emitting layer portion 207. The fabrication method is not limited to MOVPE, and the film may be fabricated by a Molecular Beam Epitaxy (MBE) method or a Chemical Beam Epitaxy (CBE) method.
After the GaP window layer 205 is formed, a first adhesion enhancing layer 20 is formed to contact the GaP window layer 2059. The adhesion enhancement layer can be selected from SiO transparent to the emission wavelength2SiNx, ITO, or the like. Next, a transparent substrate 250 such as GaP is prepared, and a second adhesion enhancing layer 259 is formed. The adhesion enhancement layer can be selected from SiO transparent to the emission wavelength2SiNx, ITO, or the like.
Although this embodiment shows an example in which GaP is used as the transparent substrate 250, the present invention is not limited to GaP, and other materials such as sapphire, quartz, gallium nitride, gallium oxide, and titanium oxide can be selected as long as they are transparent to the emission wavelength.
After the first adhesion enhancing layer 209 and the second adhesion enhancing layer 259 are formed, the BCB adhesive 260 is applied to at least one of the first adhesion enhancing layer 209 and the second adhesion enhancing layer 259 by spin coating, and the first adhesion enhancing layer 209 and the second adhesion enhancing layer 259 are overlapped in such a manner as to be opposed to each other, and heat of 150 ℃ or more and pressure of 100N or more are applied to bond and join the two. These GaP window layer 205, first adhesion enhancing layer 209, BCB adhesive 260, second adhesion enhancing layer 259 and transparent substrate 250 are the window layer and support substrate 206. In addition, although the first adhesion reinforcing layer 209 and the second adhesion reinforcing layer 259 are formed in this embodiment, they may not be formed.
After bonding, the GaAs substrate 200 as a starting substrate is removed by chemical etching from the AlGaInP epitaxial wafer (this structure is not shown) to which the transparent substrate 250 is bonded, thereby forming a wafer 021. The chemical etchant is preferably selective to AlGaInP based materials, and is usually removed with an ammonia-containing etchant.
After the GaAs substrate 200 is removed, a first electrode 251 is formed on the first semiconductor layer 201 of the wafer 021. In addition, at least the first semiconductor layer 201 and the active layer 202 are removed so as to surround the second region 225, so that the second region 225 where the first semiconductor layer 201, the active layer 202, the second semiconductor layer 203, and the like are left is formed, thereby forming the third region 220. This results in a structure including the first region 211 including the first electrode 251, the second region 225, and the third region 220. Although fig. 5 shows an example in which the third region 220 reaches the window layer 205, the third region may be stopped at the second semiconductor layer 203.
Next, the second electrode 261 is formed so as to cover at least a part of the top 225A, the side 225B, and the bottom 220A of the third region 220 in the second region 225. Although fig. 5 shows an example in which the second electrode 261 is not formed on the side surface portion 225C on the first region 211 side, the second electrode 261 may be formed on the side surface portion 225C without negating the formation of a metal electrode on the side surface portion 225C.
Since the heights of the top portion 225A, which is the top surface of the first semiconductor layer 201 in the first region 211 and the top surface of the first semiconductor layer 201 in the second region 225, are substantially the same, the heights of the top surface of the first electrode 251 and the top surface of the second electrode 261 can be substantially the same.
The area of the bottom 220A in the third region 220 where the second electrode 261 is formed is 300 μm2The above. Further 700 μm2The above is more preferable. In this way, the second region 225 is provided, the second electrode 261 is formed so as to cover at least a part of the top 225A of the second region 225, the side surface 225B of the second region 225, and the bottom 220A of the third region 220, and the coating area of the bottom 220A on which the second electrode 261 is formed is 300 μm2As described above, a flip-chip mounted light-emitting device can be obtained which has very low resistance, and in which disconnection defects and peeling defects are suppressed and which can be free from tilt.
Next, the dielectric portion 240 is provided in at least a part of a portion of the first region 211 where the first electrode 251 is not provided. This makes it possible to obtain: the light emitting element a02 having the dielectric portion 240 is provided on at least a part of the sidewall 230 between the first region 211 and the third region 220. The positional relationship among the first electrode 251, the dielectric portion 240, and the second electrode 261 provided in the light-emitting element a02 is shown in the plan view and the cross-sectional view of fig. 6.
Although this embodiment shows an example in which the dielectric portion 240 covers the entire upper surface and the sidewall 230 of the first region 211 except for the first electrode 251, the dielectric portion does not necessarily cover the entire upper surface, and may cover only a part of the upper surface and the sidewall.
Although this embodiment shows an example in which the dielectric portion 240 in the first region 211 has a single-layer structure, a light reflecting film or a light reflecting portion may be provided between the dielectric portion 240 and the first region 211, or a light reflecting film or a light reflecting portion may be provided on the side of the dielectric portion 240 not in contact with the first region 211.
Although the embodiment shows the example in which the first region 211 has a flat surface, it may have a surface having irregularities. With respect to a surface having concavities and convexities, comprising: a simple rough surface by wet etching, a facet rough surface having facets, a patterned rough surface by photolithography having an interval of several tens of μm to several hundreds of nm, and a photonic rough surface having a groove shape having an interval of several to several hundreds of nm.
Although the embodiment shows an example in which the side wall 230 and the third region 220 are flat surfaces without irregularities, the side wall may be a surface having irregularities.
Although this embodiment shows an example in which the window layer/support substrate 206 has a flat surface, it may have a surface having irregularities. With respect to a surface having concavities and convexities, comprising: a simple rough surface by wet etching, a facet rough surface having facets, a patterned rough surface by photolithography having an interval of several tens of μm to several hundreds of nm, and a photonic rough surface having a groove shape having an interval of several to several hundreds of nm.
Although the present embodiment does not describe formation of another film on the surface of the window layer/support substrate 206, an antireflection film made of a dielectric material may be provided.
After the light emitting element a02 is formed, if necessary, Au bumps are formed on the first electrode 251 and the second electrode 261, and the Au bumps are linearly irradiated with a laser beam having a light absorption characteristic of GaP to perform scribing, and after a defect line is formed, a cleaving process is performed to perform individual dicing. Alternatively, a diamond wire is scribed to form a defective flat cable, and then a splitting process is performed to perform individual graining.
When the light emitting element a02 is directly mounted on the drive substrate, the light emitting element a02 is directly mounted on the mounting substrate without performing the scribing and cleaving process, and thus the scribing and cleaving process is not performed. In addition, the scribing and splitting treatment is not carried out, and the effect of the invention is the same.
after being individually granulated, the respective chips are mounted to the driving substrate through the Au bumps. In this case, the die can be pressed by ultrasonic waves, a temperature of 150 ℃ or higher, or both of them.
Third embodiment
Fig. 7 shows a build-up structure in the middle of the manufacturing process of the light emitting device according to the third embodiment. Fig. 8 shows a light emitting module according to a third embodiment. Fig. 9 is a plan view and a cross-sectional view showing a chip design of the light emitting module according to the third embodiment.
For example, the AlGaInP epitaxial wafer 003 can be oriented in the [001 ] direction]On a GaAs substrate 300 as a starting substrate inclined at 15 degrees in direction, (Al) for example was deposited by metal organic vapor deposition (MOVPE)xGa1-x)yIn1-yA first semiconductor layer 301 of a lower (n-type) cladding layer comprising P (0.0 ≦ x ≦ 1.0, 0.4 ≦ y ≦ 0.6), (Al)xGa1-x)yIn1-yAn active layer 302 of P (0.0 ≦ x ≦ 1.0, 0.4 ≦ y ≦ 0.6), (Al)xGa1-x)yIn1-yP (0.0 ≦ x ≦ 1.0, 0.4 ≦ y ≦ 0.6) is formed in this order from the second semiconductor layer 303 which is an upper (P-type) cladding layer and the GaP window layer 305 having a thickness of 0.5 μm or more. The portion including the first semiconductor layer 301, the active layer 302, and the second semiconductor layer 303 constitutes a light-emitting layer portion 307. The fabrication method is not limited to MOVPE, and the film may be fabricated by a Molecular Beam Epitaxy (MBE) method or a Chemical Beam Epitaxy (CBE) method.
Subsequently, the transparent substrate 350 made of GaP or the like and the AlGaInP epitaxial wafer 003 are subjected to wet treatment with an OH-containing liquid. After the wet treatment, the transparent substrate 350 and the GaP window layer 305 of the AlGaInP epitaxial wafer 003 are overlapped so as to face each other, and heat of 150 ℃ or higher and pressure of 100N or higher are applied to bond and join the substrates. The transparent substrate 350 and the GaP window layer 305 are the window layer/support substrate 306.
Although this embodiment shows an example in which GaP is used as the transparent substrate 350, the present invention is not limited to GaP, and other materials such as sapphire, quartz, gallium nitride, gallium oxide, and titanium oxide can be selected as long as they are transparent to the emission wavelength.
After bonding, the GaAs substrate 300 of the AlGaInP epitaxial wafer 003 is removed by chemical etching to form a wafer 031. The chemical etchant is preferably selective to AlGaInP based materials, and is usually removed with an ammonia-containing etchant.
After the GaAs substrate 300 is removed, the first electrode 351 is formed on the first semiconductor layer 301 of the wafer 031. In addition, at least the first semiconductor layer 301 and the active layer 302 are removed so as to surround the second region 325, so that the second region 325 where the first semiconductor layer 301, the active layer 302, the second semiconductor layer 303, and the like are left is formed, thereby forming a third region 320. This results in a structure including the first region 311 having the first electrode 351, the second region 325, and the third region 320. Although fig. 8 shows an example in which the third region 320 reaches the GaP window layer 305, the third region may stop at the second semiconductor layer 303.
The second electrode 361 is formed so as to cover at least a part of the top 325A of the second region 325, the side 325B, and the bottom 320A of the third region 320. Although the drawings show an example in which the second electrode 361 is not formed on the side surface portion 325C on the first region 311 side, the side surface portion 325C may be formed with the second electrode 361 without negating the formation of the metal electrode on the side surface portion 325C.
Since the heights of the top portions 325A of the top surfaces of the first semiconductor layer 301 in the first region 311 and the first semiconductor layer 301 in the second region 325 are substantially the same, the heights of the top surfaces of the first electrode 351 and the second electrode 361 can be substantially the same.
Here, the area of the bottom 320A of the third region 320, on which the second electrode 361 is formed, is 300 μm2The above. Further 700 μm2The above is more preferable. Thus, the second region 3 is provided25, the second electrode 361 is formed so as to cover at least a part of the top 325A of the second region 325, the side 325B of the second region 325, and the bottom 320A of the third region 320, and the coating area of the bottom 320A on which the second electrode 361 is formed is 300 μm2As described above, a flip-chip mounted light-emitting device can be obtained which has very low resistance, and in which disconnection defects and peeling defects are suppressed and which can be free from tilt.
Next, the dielectric portion 340 is provided in at least a part of the first region 311 where the first electrode 351 is not provided. This makes it possible to obtain: the light emitting element a03 having the dielectric portion 340 is provided at least in a part of the sidewall 330 between the first region 311 and the third region 320. The positional relationship among the first electrode 351, the dielectric portion 340, and the second electrode 361 provided in the light-emitting element a03 is shown in the plan view and the cross-sectional view of fig. 9.
Although this embodiment shows an example in which the dielectric portion 340 covers the entire upper surface and the sidewall 330 of the first region 311 except for the portion of the first electrode 351, the dielectric portion does not necessarily cover the entire portion, and may cover only a part of the portion.
Although this embodiment shows an example in which the dielectric portion 340 in the first region 311 has a single-layer structure, a light reflective film or a light reflective portion may be provided between the dielectric portion 340 and the first region 311, or a light reflective film or a light reflective portion may be provided on the side of the dielectric portion 340 not in contact with the first region 311.
Although the embodiment shows the example in which the first region 311 has a flat surface, it may have a surface having irregularities. With respect to a surface having concavities and convexities, comprising: a simple rough surface by wet etching, a facet rough surface having facets, a patterned rough surface by photolithography having an interval of several tens of μm to several hundreds of nm, and a photonic rough surface having a groove shape having an interval of several to several hundreds of nm.
Although the embodiment shows an example in which the side wall 330 and the third region 320 are flat surfaces without irregularities, the side wall may be a surface having irregularities.
Although this embodiment shows an example in which the window layer/support substrate 306 has a flat surface, it may have a surface having irregularities. With respect to a surface having concavities and convexities, comprising: a simple rough surface by wet etching, a facet rough surface having facets, a patterned rough surface by photolithography having an interval of several tens of μm to several hundreds of nm, and a photonic rough surface having a groove shape having an interval of several to several hundreds of nm.
Although the present embodiment does not describe formation of another film on the surface of the window layer/support substrate 306, an antireflection film made of a dielectric material may be provided.
After the light emitting element a03 is formed, if necessary, Au bumps are formed on the first electrode 351 and the second electrode 361, and the Au bumps are linearly irradiated with a laser beam having a light absorption characteristic of GaP to perform scribing, and after a defect line is formed, a cleaving process is performed to perform individual dicing. Alternatively, a diamond wire is scribed to form a defective flat cable, and then a splitting process is performed to perform individual graining.
When the light emitting element a03 is directly mounted on the drive substrate, the light emitting element a03 is not subjected to the scribing and cleaving process because the light emitting element a03 is directly mounted on the mounting substrate without the scribing and cleaving process. In addition, the scribing and splitting treatment is not carried out, and the effect of the invention is the same.
After being individually granulated, the respective chips are mounted to the driving substrate through the Au bumps. In this case, the die can be pressed by ultrasonic waves, a temperature of 150 ℃ or higher, or both of them.
Examples
The present invention will be described in detail with reference to examples, but the present invention is not limited thereto.
Example one
The light emitting module was manufactured based on the first embodiment (fig. 1 to 3).
a substrate (starting substrate) made of GaAs (001) was prepared as a starting substrate, and a double hetero layer (light-emitting layer) as a functional layer was formed on this substrate by MOVPE. The light-emitting layer is formed by sequentially laminating a lower cladding layer (first semiconductor layer), an active layer, and an upper cladding layer (second semiconductor layer).
The first semiconductor layer and the second semiconductor layer are made of (Al)xGa1-x)yIn1-yP (0.6 ≦ x ≦ 1.0, 0.4 ≦ y ≦ 0.6).
The first semiconductor layer is an n-type AlInP cladding layer with a thickness of 0.7 μm (doping concentration of 3.0 × 10)17/cm3) And n-type Al0.85GaInP layer 0.3 μm (doping concentration 1.0X 10)17/cm3) The double-layer structure of (1).
The active layer is selected from (Al)xGa1-x)yIn1-yP (0.15 ≦ x ≦ 0.80, 0.4 ≦ y ≦ 0.6), and the compositions x and y are changed depending on the wavelength. In this example, multiple active layers were used as the active layers. The film thicknesses of the active layer and the barrier layer are changed according to the desired wavelength, and are respectively adjusted within the range of 4 to 12nm according to the wavelength.
The second semiconductor layer is a p-type AlInP cladding layer with a thickness of 0.9 μm (doping concentration of 3.0 × 10)17/cm3) And p-type Al0.6GaInP layer 0.1 μm (doping concentration 1.0X 10)17/cm3) The double-layer structure of (1).
An intermediate composition layer made of GaInP is formed on the light-emitting layer. Then, GaP window layers with a thickness of 1.0 μm are sequentially laminated on the intermediate component layer. GaP epitaxial layers (window layers and support substrates) having a thickness of 100 μm in contact with the GaP window layers are formed. The window layer/support substrate is formed by hydride vapor deposition (HVPE).
Next, the GaAs substrate is removed with an etchant containing ammonia. The etch stop layer is then removed.
Next, a portion of the first semiconductor layer and a portion of the active layer are cut off to expose a portion of the second semiconductor layer.
Next, a dielectric layer is formed so as to cover the cut side surfaces, and an opening is provided. The dielectric layer is SiO2Using TEOS and O2The P-CVD method. The opening is formed by forming a dielectric layer, forming a shield portion by photolithography, and forming an exposed portion by wet etching using BHF.
After the GaAs substrate is removed, a first electrode is formed on the first semiconductor layer. In addition, the first semiconductor layer and the active layer are removed so as to surround the second region, and a third region is formed, so that the second region which is a separation portion where the first semiconductor layer, the active layer, the second semiconductor layer, and the like are left is formed. Then, a second electrode is formed so as to cover the top of the second region, the side surface of the second region, and a part of the bottom of the third region (see fig. 2 to 3).
Here, the area of the coating film on the bottom portion where the second electrode was formed was 314 μm2。
Laser having light absorption characteristic of GaP is linearly irradiated to perform scribing treatment, and after forming a defect line, cleavage treatment is performed to perform individual crystallization.
After being individually granulated, the respective chips are mounted to the driving substrate through the Au bumps.
Example two
The area of the coating film except the bottom portion where the second electrode was formed was 491 μm2Except that the light emitting element was fabricated under the same conditions as in the first embodiment, and mounted on the driving substrate.
EXAMPLE III
The area of the coating film except the bottom portion where the second electrode was formed was 707 μm2Except that the light emitting element was fabricated under the same conditions as in the first embodiment, and mounted on the driving substrate.
Example four
The area of the coating film except the bottom portion where the second electrode was formed was 962 μm2Except that the light emitting element was fabricated under the same conditions as in the first embodiment, and mounted on the driving substrate.
EXAMPLE five
The area of the coating film except the bottom portion where the second electrode was formed was 1257 μm2Except that the light emitting element was fabricated under the same conditions as in the first embodiment, and mounted on the driving substrate.
EXAMPLE six
The area of the coating film except the bottom portion where the second electrode was formed was 1590 μm2Except that the light emitting element was fabricated under the same conditions as in the first embodiment, and mounted on the driving substrate.
Comparative example 1
As shown in fig. 10, the second electrode 461 was formed thick except that the second region corresponding to the first embodiment was not formed, and the area of the bottom portion on which the second electrode was formed was 7665 μm2Except for the point (b), the light emitting element a04 was formed and mounted on the drive substrate under the same conditions as in the first example. Fig. 11 is a plan view and a cross-sectional view showing a chip design according to a first comparative example.
Comparative example II
As shown in fig. 12, a light-emitting element a05 was formed under the same conditions as in the first embodiment except that a second electrode 561 was formed from the insulating film 540 over the window layer/support substrate 506 without forming a second region, and was attached to the drive substrate.
Comparative example III
The area of the coating film except the bottom portion where the second electrode was formed was 177 μm2Except that the light emitting element was fabricated under the same conditions as in the first embodiment, and mounted on the driving substrate.
Comparative example four
The area of the coating film except the bottom portion where the second electrode was formed was 113 μm2Except that the light emitting element was fabricated under the same conditions as in the first embodiment, and mounted on the driving substrate.
Fig. 13 shows the incidence of defects in the tilt of the die during mounting in examples one to three and comparative example one. In the first comparative example, since the difference in height between the first electrode and the second electrode is large, a tilt defect is likely to occur. On the other hand, in the first to third embodiments, since the height difference between the first electrode and the second electrode is small, the occurrence rate of defects becomes small.
In the first comparative example, although the height of the second electrode can be adjusted to be as uniform as possible as the height of the first electrode, it is difficult to make the heights uniform from the surface to be recessed and there is variation in the surface of the wafer, and therefore it is extremely difficult to make the heights of the first electrode and the second electrode uniform in principle. If there is a difference in the height between the first electrode and the second electrode, the difference in height will cause the light extraction surface of the crystal grain to tilt, and the defect of angular misalignment will easily occur.
Fig. 14 shows the disconnection defect rate due to the second electrode in examples one to three and comparative example two. In the second comparative example, the second electrode was formed on the insulating film, and a large amount of disconnection occurred due to a difference in expansion coefficient caused by heat during the process or due to heat generation of the light emitting element during the operation. On the other hand, it is found that in the first to third embodiments, the disconnection defect due to heat hardly occurs, and the second electrode is formed well and stably.
Fig. 15 shows mounting defects due to ionization peeling at the time of mounting in examples one to three and comparative example two. It is understood that although the interface between the insulating film and the electrode was largely peeled off and the defect rate was increased in the second comparative example, the interface where peeling was not generated and defects were not generated in the first to third examples, and thus the improvement was significant.
Table 1 shows the measurement results of forward voltage (forward voltage, VF) when the IF is 20mA in examples one to six and comparative examples one, three, and four.
TABLE 1
Fig. 16 shows the relationship between the film area (contact area) at the bottom and the average forward voltage (forward voltage, VF) in examples one to six and comparative examples one, three, and four. The horizontal axis represents the contact area as the area of the coating at the bottom, and the vertical axis represents VF when IF is 20 mA. It is found that VF tends to increase (rise) as the contact area decreases. In the first to sixth examples, by setting 300 μm2VF ≦ 2.35V is realized in the above contact area region. However, in the third and fourth comparative examples, the contact area was less than 300. mu.m2Therefore, VF becomes extremely high. In addition, although the second electrode 461 is formed thick in the comparative example, the contact area is 300 μm2Thus, VF was 2.18V, which was low.
The present invention is not limited to the above-described embodiments. The above-described embodiments are merely illustrative, and any substance having substantially the same structure and the same function as the technical idea described in the claims of the present invention is included in the technical scope of the present invention.
Description of the symbols
001 AlGaInP is epitaxial wafer
002 AlGaInP is epitaxial wafer
003 AlGaInP is an epitaxial wafer
011 wafer
021 wafer
031 wafer
100 GaAs substrate
101 first semiconductor layer
102 active layer
103 second semiconductor layer
104 intermediate component layer
105 GaP window layer
106 window layer and support substrate
107 light emitting layer part
111 first region
120 third region
Bottom 120A
125 second region
125A top
125B side part
125C side part
130 side wall
140 dielectric part
151 first electrode
161 second electrode
200 GaAs substrate
201 first semiconductor layer
202 active layer
203 second semiconductor layer
205 GaP window layer
206 window layer and support substrate
207 light emitting layer part
209 first adhesion promotion layer
211 first region
220 third region
220A bottom
225 second region
225A top
225B side part
225C side face part
230 side wall
240 dielectric part
250 transparent substrate
251 first electrode
259 second adhesion enhancement layer
260 BCB adhesive
261 second electrode
300 GaAs substrate
301 first semiconductor layer
302 active layer
303 second semiconductor layer
305 GaP window layer
306 window layer and support substrate
307 light emitting layer part
311 first region
320 third region
Bottom part of 320A
325 second region
325A top
325B side part
325C side surface part
330 side wall
340 dielectric part
350 transparent substrate
351 first electrode
361 second electrode
461 second electrode
506 Window layer and support substrate
540 insulating film
561 second electrode
A01 luminous component
A02 luminous component
A03 luminous component
A04 luminous component
A05 luminous component
Claims (4)
1. A light-emitting device including a window layer and support substrate and a light-emitting layer portion provided on the window layer and support substrate, the light-emitting layer portion including a second semiconductor layer of a second conductivity type, an active layer, and a first semiconductor layer of a first conductivity type in this order from the window layer and support substrate side, the light-emitting device comprising:
A first region having the second semiconductor layer, the active layer, the first semiconductor layer, and a first electrode in contact with the first semiconductor layer;
A second region having the second semiconductor layer, the active layer, and the first semiconductor layer;
A third region that is separated from the first region and the second region by removing at least the first semiconductor layer and the active layer so as to surround the second region;
A second electrode covering at least a part of the top portion of the second region, the side surface of the second region, and the third region, and contacting the second semiconductor layer and the window layer/support substrate in the third region,
Wherein the third regionThe area of the second electrode coating was 300 μm2The above.
2. The light emitting assembly of claim 1 wherein the window layer and support substrate is GaAszP1-zWherein 0.0 ≦ z ≦ 0.1, and the luminescent layer portion is (Al)xGa1-x)yIn1-yP, wherein x is 0.0 ≦ 1.0 and y is 0.4 ≦ 0.6.
3. A method for manufacturing a light emitting device includes the following steps:
Forming at least a first semiconductor layer, an active layer and a second semiconductor layer in this order by epitaxial growth on an initial substrate;
Forming a window layer and a support substrate by epitaxial growth or bonding;
Removing the starting substrate to expose the first semiconductor layer;
Forming a first electrode on a portion of a surface of the first semiconductor layer;
Removing at least the first semiconductor layer and the active layer around a second region to form a third region in such a manner that the first region and the second region are formed, the first region including the first electrode, the second region not including the first electrode and including the first semiconductor layer and the active layer, the first semiconductor layer and the active layer of the second region being separated from the first region;
Forming a second electrode over a top portion of the second region, a side portion of the second region, and at least a portion of the third region,
Wherein a coating film area of the second electrode in the third region is 300 μm2The above.
4. The light emitting assembly of claim 3, wherein the window layer and support substrate is GaAszP1-zWherein 0.0 ≦ z ≦ 0.1, and the luminescent layer portion is (Al)xGa1-x)yIn1-yP, whichX is 0.0 ≦ 1.0 and y is 0.4 ≦ 0.6.
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| JPS5789273A (en) * | 1980-11-25 | 1982-06-03 | Hitachi Ltd | Manufacture of light emitting element |
| JPS57192088A (en) * | 1981-05-22 | 1982-11-26 | Hitachi Ltd | Manufacture of light emitting diode |
| JPS63301573A (en) * | 1987-05-31 | 1988-12-08 | Shimadzu Corp | Light emitting diode |
| JP5713650B2 (en) | 2009-12-08 | 2015-05-07 | Ｄｏｗａエレクトロニクス株式会社 | LIGHT EMITTING ELEMENT AND MANUFACTURING METHOD THEREOF |
| JP5427585B2 (en) | 2009-12-18 | 2014-02-26 | 昭和電工株式会社 | Flip chip type light emitting diode and method for manufacturing the same |
| JP5652234B2 (en) | 2011-02-07 | 2015-01-14 | 日亜化学工業株式会社 | Semiconductor light emitting device |
| US9461212B2 (en) * | 2012-07-02 | 2016-10-04 | Seoul Viosys Co., Ltd. | Light emitting diode module for surface mount technology and method of manufacturing the same |
| CN102832302A (en) | 2012-08-31 | 2012-12-19 | 扬州中科半导体照明有限公司 | Method for manufacturing N electrode of GaN-based light-emitting diode (LED) |
| JP6136624B2 (en) | 2013-06-19 | 2017-05-31 | 信越半導体株式会社 | Light emitting element |
| KR20150035656A (en) | 2013-09-27 | 2015-04-07 | 삼성전자주식회사 | Semiconductor light emitting device and semiconductor light emitting apparatus having the same |
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| TW202002330A (en) | 2020-01-01 |
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