JP2019212834A - Light-emitting element and method of manufacturing the same - Google Patents

Abstract

To provide a light-emitting element that has electrodes of different polarities formed to the same height and also has sufficiently low electric resistance, suppresses a wire breaking defect and a peeling defect, and enables flip mounting free of inclination, and a method of manufacturing the light-emitting element.SOLUTION: A light-emitting element has: a first region 111 having a second semiconductor layer 103, an active layer 102, a first semiconductor layer 101, and a first electrode 151 in contact with the first semiconductor layer; a second region 125 having the second semiconductor layer, active layer, and first semiconductor layer; a third region 120 which has the first semiconductor layer and active layer so removed as to surround the second region, and separates the first region and second region; and a second electrode 161 which covers a top part 125A of the second region, a side face part 125C of the second region, and at least a part of the third region, and is in contact with the second semiconductor layer or a window layer support substrate 106 in the third region, the second electrode in the third region having a coating area of 300 μmor larger.SELECTED DRAWING: Figure 2

Description

  The present invention relates to a light emitting device and a method for manufacturing the same.

  Products such as chip-on-board (COB) are LED chip mounting methods that are excellent in heat dissipation from LED elements and are employed in applications such as lighting. When mounting an LED on a COB or the like, flip mounting in which a chip is directly bonded to a board is essential. In order to realize flip mounting, it is necessary to manufacture a flip chip in which energization pads having different polarities are provided on one surface of a light emitting element. Further, the surface opposite to the surface provided with the energization pad needs to be made of a material having a light extraction function.

When a flip chip is manufactured using yellow to red LEDs, an AlGaInP-based material is used for the light emitting layer. Since the AlGaInP-based material has no bulk crystal and the LED portion is formed by an epitaxial method, a material different from that of AlGaInP is selected for the starting substrate. In many cases, GaAs or Ge is selected as a starting substrate, and these substrates have a property of absorbing light with respect to visible light. Therefore, when a flip chip is manufactured, the starting substrate is removed. However, since the epitaxial layer forming the light emitting layer is an extremely thin film, it cannot stand by itself after the starting substrate is removed. Therefore, the starting substrate is replaced with a material / structure that is substantially transparent to the emission wavelength of the light emitting layer, has a function as a window layer, and has a function as a support substrate having a sufficient thickness to be self-supporting.
In this case, when performing flip mounting of a light emitting element having two electrodes with different polarities on the upper surface, the electrode surfaces having the same height facilitate mounting.

Patent Document 1 discloses a technique in which an insulating film is provided on a light emitting layer in order to provide two electrodes having the same height, and electrodes having different polarities are formed thereon.
Patent Document 2 describes that a columnar semiconductor layer region is formed, and an electrode having a polarity different from that of the electrode on the light emitting layer is formed in the columnar semiconductor region portion.

JP 2005-322722 A Patent 6291400

  However, in the technique described in Patent Document 1, it is difficult to increase the adhesion strength of the electrode formed on the insulating film to the same level as that in the case of directly contacting the semiconductor, and it is easy to cause a peeling failure. In addition, due to the difference in coefficient of linear expansion between the insulating film and the metal, there is a problem that an insulation failure is likely to occur due to expansion and contraction of the metal film when the element temperature is changed by energization.

  In the technique described in Patent Document 2, an electrode having a polarity different from that of the electrode formed on the light emitting layer is directly formed on the columnar semiconductor layer, and the adhesive strength between the electrode and the semiconductor is described in Patent Document 1 described above. Compared to this technology, there is an advantage that can be secured sufficiently. On the other hand, it is necessary to form an electrode layer having a sufficiently low electrical resistance on the side surface of the columnar semiconductor, but the gap between the columnar semiconductor portions is narrow, and it is difficult to form a uniform metal film by vapor deposition. If a seed layer having a sufficient thickness and quality cannot be formed, it is difficult to form a metal layer having a sufficiently low electric resistance on the side surface portion by plating.

  The present invention has been made in view of the above problems, and electrodes having different polarities are formed at substantially the same height, and have sufficiently low electric resistance, and disconnection failure and peeling failure are suppressed, and there is no inclination. It is an object of the present invention to provide a light emitting element capable of flip mounting and a method for manufacturing the light emitting element.

The present invention has been made to achieve the above-described object, and is provided on the window layer / support substrate and the window layer / support substrate, and the second conductivity type second from the window layer / support substrate side. A light emitting device having a semiconductor layer, an active layer, and a light emitting layer part including a first conductivity type first semiconductor layer in this order, the light emitting device includes the second semiconductor layer, the active layer, the first semiconductor layer, Surrounding the first region having the first electrode in contact with the first semiconductor layer, the second region having the second semiconductor layer, the active layer, and the first semiconductor layer, and the second region. At least the first semiconductor layer and the active layer are removed, the third region separating the first region and the second region, the top of the second region, and the second region And covering at least a part of the third region, And a second electrode in contact with the second semiconductor layer or window layer and the support substrate in the third region, the coating area of the second electrode in the third region to provide a light-emitting element is 300 [mu] m ² or more .

  According to such a light emitting element, electrodes having different polarities are formed at substantially the same height, and have sufficiently low electric resistance, so that disconnection failure and peeling failure are suppressed, and flip mounting without inclination is possible. To be.

At this time, the window layer and supporting substrate is GaAs _z P _1-z (0.0 ≦ z ≦ 0.1), and the light emitting layer portion is (Al _x Ga _1-x ) _y In _1-y P A light-emitting element that satisfies (0.0 ≦ x ≦ 1.0, 0.4 ≦ y ≦ 0.6) can be obtained.

  Thereby, the luminous efficiency is good, and disconnection failure and peeling failure are further suppressed.

At this time, a method for manufacturing a light-emitting element, comprising: forming a light-emitting layer portion by epitaxial growth of at least a first semiconductor layer, an active layer, and a second semiconductor layer in this order on a starting substrate; Forming by epitaxial growth or bonding, removing the starting substrate to expose the first semiconductor layer, forming a first electrode on a part of the surface of the first semiconductor layer, and the first A first region that includes one electrode, and a second region that does not include the first electrode and includes the first semiconductor layer and the active layer, wherein the first semiconductor layer and the active layer are the first region. Forming a third region by removing at least the first semiconductor layer and the active layer around the second region so as to form the second region separated from the second region; The top of the second region and the front And side portions of the second region, and forming a second electrode over at least a portion of said third region, a coating area of the second electrode in the third region is 300 [mu] m ² or more A method for manufacturing a light-emitting element can be provided.

  This makes it very easy to form a light-emitting element in which electrodes with different polarities are formed at substantially the same height, have a sufficiently low electrical resistance, suppress disconnection failure and peeling failure, and enable flip mounting without inclination. Can be manufactured.

At this time, the window layer / support substrate is GaAs _z P _1-z (0.0 ≦ z ≦ 0.1), and the light emitting layer portion is (Al _x Ga _1-x ) _y In _1-y P (0 0.0 ≦ x ≦ 1.0, 0.4 ≦ y ≦ 0.6).

  Thereby, it is possible to manufacture a light emitting element that has high light emission efficiency and is further suppressed in disconnection failure and peeling failure.

  As described above, according to the light emitting device of the present invention, electrodes having different polarities are formed at substantially the same height, and have sufficiently low electric resistance, so that disconnection failure and peeling failure are suppressed and there is no inclination. Flip mounting is possible. In addition, according to the method for manufacturing a light emitting element of the present invention, electrodes having different polarities are formed at substantially the same height, and have sufficiently low electric resistance, and disconnection failure and peeling failure are suppressed, and there is no inclination. It becomes possible to manufacture a light emitting element capable of flip mounting very easily.

The laminated structure in the middle of the light emitting element manufacturing process which concerns on 1st embodiment is shown. The light emitting element which concerns on 1st embodiment is shown. The design top view and sectional drawing of the chip design of the light emitting element which concern on 1st embodiment are shown. The laminated structure in the middle of the light emitting element manufacturing process which concerns on 2nd embodiment is shown. The light emitting element which concerns on 2nd embodiment is shown. The design top view and sectional drawing of the chip design of the light emitting element which concern on 2nd embodiment are shown. The laminated structure in the middle of the light emitting element manufacturing process which concerns on 3rd embodiment is shown. The light emitting element which concerns on 3rd embodiment is shown. The design top view and sectional drawing of the chip design of the light emitting element which concern on 3rd embodiment are shown. 1 shows a light emitting device according to Comparative Example 1; The design top view and sectional drawing of the chip design of the light emitting element concerning the comparative example 1 are shown. The light emitting element which concerns on the comparative example 2 is shown. The die inclination generation defect rate at the time of mounting of Example 1-3 and Comparative Example 1 is shown. The disconnection defect rate resulting from the 2nd electrode of Example 1-3 and Comparative Example 2 is shown. The mounting defect by the electrode peeling at the time of mounting of Example 1-3 and Comparative Example 2 is shown. The relationship between the film area and VF (forward voltage) of Example 1-6 and Comparative Examples 3 and 4 is shown.

  Hereinafter, the present invention will be described in detail, but the present invention is not limited thereto.

  As described above, light-emitting elements and light-emitting elements in which electrodes having different polarities are formed at the same height, have sufficiently low electric resistance, and are capable of flip mounting without tilting, in which disconnection failure and peeling failure are suppressed. There has been a demand for a method for manufacturing an element.

As a result of intensive studies on the above problems, the present inventors have provided a window layer / support substrate and the window layer / support substrate on the second layer of the second conductivity type from the window layer / support substrate side. A light-emitting element including a layer, an active layer, and a light-emitting layer portion including a first-conductivity-type first semiconductor layer in this order, the light-emitting element includes the second semiconductor layer, the active layer, the first semiconductor layer, A first region having a first electrode in contact with the first semiconductor layer, a second region having the second semiconductor layer, the active layer, and the first semiconductor layer, and at least so as to surround the second region The third region separating the first region and the second region, the top of the second region, and the second region from which the first semiconductor layer and the active layer have been removed Covering the side surface portion and at least a part of the third region, and And a second electrode in the third region in contact with said second semiconductor layer or window layer and the supporting substrate, the light emitting element coating area of the second electrode in the third region is 300 [mu] m ² or more, lower The present invention has been completed by finding out that it has electrical resistance and wire breakage failure and peeling failure are further suppressed.

The present inventors also provide a method for manufacturing a light emitting device, comprising: forming a light emitting layer portion by epitaxial growth of at least a first semiconductor layer, an active layer, and a second semiconductor layer in this order on a starting substrate; Forming a layer / support substrate by epitaxial growth or bonding; removing the starting substrate to expose the first semiconductor layer; and forming a first electrode on a portion of the surface of the first semiconductor layer. A first region including the first electrode, and a second region not including the first electrode but having the first semiconductor layer and the active layer, the first semiconductor layer and the active layer And forming the second region separated from the first region by removing at least the first semiconductor layer and the active layer around the second region. And forming the second region Parts and the and the side surface portion of the second region, and forming a second electrode over at least a portion of said third region, 300 [mu] m the coating area of the second electrode in the third region By using a light emitting device manufacturing method of ² or more, electrodes having different polarities are formed at substantially the same height, and have sufficiently low electrical resistance, and disconnection failure and peeling failure are suppressed, and flip mounting without inclination is performed. The inventors have found that a light-emitting element that can be made can be manufactured very easily, and completed the present invention.

  Hereinafter, description will be given with reference to the drawings.

(First embodiment)
FIG. 1 shows a laminated structure in the middle of a light emitting device manufacturing process according to the present embodiment, FIG. 2 shows a light emitting device according to the present embodiment, and FIG. 3 shows a design top view and a sectional view of a chip design of the light emitting device according to the present embodiment. .
For example, an AlGaInP-based epitaxial wafer 001 is formed on a GaAs substrate 100 as a starting substrate inclined by 15 degrees in the [001] direction by, for example, (Al _x Ga _1-x ) _y In by a metal organic vapor phase epitaxy (MOVPE) method. _{1-y P (0.0 ≦ x} ≦ 1.0,0.4 ≦ y ≦ 0.6) first semiconductor layer ₁₀₁ is lower (n-type) cladding layer formed _{of, (Al x Ga 1-x} ) active layer 102 made of _y In _1-y P (0.0 ≦ x ≦ 1.0, 0.4 ≦ y ≦ 0.6), (Al _x Ga _1-x ) _y In _1-y P (0. Second semiconductor layer 103 which is an upper (p-type) clad layer composed of 0 ≦ x ≦ 1.0 and 0.4 ≦ y ≦ 0.6, Ga _y In _1-y P (0.0 ≦ y ≦ 1) 0.0), and an GaP window layer 105 having a thickness of 0.5 μm or more. It can be obtained by laminating. Among these, the portion including the first semiconductor layer 101, the active layer 102, and the second semiconductor layer 103 becomes the light emitting layer portion 107. Note that the manufacturing method is not limited to MOVPE, and may be manufactured by a molecular beam epitaxy (MBE) method or an actinic beam epitaxy (CBE) method.

Next, a GaAs _z P _1-z (0.0 ≦ z ≦ 0.1) window layer / support substrate 106 having a thickness of, for example, 100 μm is formed in contact with the GaP window layer 105. The window layer / support substrate 106 can be formed by the MOVPE method, the MBE method, or the hydride vapor phase epitaxy (HVPE) method which is inexpensive and has a high growth rate.

  After the window layer / support substrate 106 is formed, a wafer 011 is formed by removing the GaAs substrate 100, which is the starting substrate of the AlGaInP epitaxial wafer 001, by chemical etching (see FIG. 2). The chemical etchant preferably has an etching selectivity with respect to the AlGaInP-based material, and is generally removed with an ammonia-containing etchant.

  After removing the GaAs substrate 100, a first electrode 151 is formed on the first semiconductor layer 101 of the wafer 011. In addition, at least the first semiconductor layer 101 and the active layer 102 are formed with the second region 125 so as to form the second region 125 in which the first semiconductor layer 101, the active layer 102, the second semiconductor layer 103, and the like are left. The third region 120 is formed by being removed so as to surround. Thereby, a structure having the first region 111 having the first electrode 151, the second region 125, and the third region 120 is formed. FIG. 2 illustrates the case where the third region 120 reaches the window layer / supporting substrate 106, but may stop at the second semiconductor layer 103, the intermediate composition layer 104, or the GaP window layer 105. .

Next, the second electrode 161 is formed so as to cover the top portion 125A of the second region 125, the side surface portion 125B, and at least a part of the bottom portion 120A of the third region 120. FIG. 2 illustrates the case where the second electrode 161 is not formed on the side surface portion 125C on the first region 111 side, but it does not deny that a metal electrode is formed on the side surface portion 125C. The second electrode 161 may be formed on the side surface portion 125C.
The top surface of the first semiconductor layer 101 in the first region 111 and the height of the top portion 125A that is the top surface of the first semiconductor layer 101 in the second region 125 are substantially the same. The height of the upper surface of the two electrodes 161 can also be made substantially the same.

Here, the coating area of the bottom 120A where the second electrode 161 is formed in the third region 120 is set to 300 μm ² or more. More preferably, it is 700 μm ² or more. As described above, the second region 125 is provided so as to cover the top portion 125A of the second region 125, the side surface portion 125B of the second region 125, and at least a part of the bottom portion 120A of the third region 120. The second electrode 161 is formed on the bottom portion 120A, and the coating area of the bottom 120A on which the second electrode 161 is formed is 300 μm ² or more, so that it has a sufficiently low electrical resistance, suppresses disconnection failure and peeling failure, A light-emitting element that enables no flip mounting can be obtained.
Although not limit particularly limited coating area of the bottom 120A, the efficiency becomes relatively small area of the light emitting unit by increasing coating area is deteriorated, it is preferable that the 7000Myuemu ² or less. The same applies to the second and third embodiments described later.

  Next, the dielectric part 140 is provided in at least a part of the first region 111 where the first electrode 151 is not provided. Thereby, the light emitting element A01 in which the dielectric part 140 is provided on at least a part of the side wall 130 between the first region 111 and the third region 120 can be obtained. The positional relationship among the first electrode 151, the dielectric portion 140, and the second electrode 161 provided in the light emitting element A01 is as shown in the top view and the cross-sectional view of FIG.

  In the present embodiment, the case where the dielectric portion 140 covers all of the upper surface and the side wall 130 other than the first electrode 151 portion of the first region 111 is illustrated, but it is not always necessary to cover all. You may make it coat | cover only one part.

  In the present embodiment, the dielectric portion 140 has a single layer structure in the first region 111, but a light reflecting film or light reflecting portion is provided between the dielectric portion 140 and the first region 111. Alternatively, a light reflecting film or a light reflecting portion may be provided on the surface of the dielectric portion 140 that does not contact the first region 111.

  In the present embodiment, the case where the first region 111 has a flat surface is illustrated, but it goes without saying that the same effect can be obtained even if the first region 111 has a surface having irregularities. Concerning uneven surfaces, a simple rough surface by wet etching, a faceted rough surface having a faceted surface, a patterned rough surface patterned by photolithography having a pitch of several tens of μm to several hundreds nm, and several to several hundreds nm Any case of a photonic rough surface having a pitch trench shape is included.

  In the present embodiment, the side wall 130 and the third region 120 are illustrated as flat surfaces without unevenness, but may be surfaces having unevenness.

  In the present embodiment, the case where the window layer / supporting substrate 106 has a flat surface is illustrated, but it goes without saying that the same effect can be obtained even if the window layer / supporting substrate 106 has a surface having irregularities. As for the surface having irregularities, a simple rough surface by wet etching, a faceted rough surface having a facet surface, a patterned rough surface patterned by photolithography having a pitch of several tens of μm to several hundreds of nm, and several to several hundreds of nanometers Any case of a photonic rough surface having a pitch trench shape is included.

  In this embodiment, the formation of another film on the surface of the window layer / support substrate 106 is not described, but an antireflection film made of a dielectric may be provided.

  After forming the light emitting element A01, if necessary, Au bumps are formed on the first electrode 151 and the second electrode 161, and a laser having light absorption characteristics in GaP is linearly irradiated to perform scribing. After forming the line, the braking process is performed to make individual dice. Alternatively, a linear scribing process is performed with diamond, a defect dislocation line is formed, and then a breaking process is performed to form individual dice.

  When the light emitting element A01 is directly mounted on the driving substrate, the scribe / braking process is not performed because the light emitting element A01 is mounted directly on the mounting substrate without performing the scribe / braking process. Further, the effect of the invention is the same without performing the scribing / braking process.

  After dicing into individual dice, it is mounted on the drive substrate via Au bumps. In that case, it can implement | achieve by crimping | bonding to a die | dye at the temperature of 150 degreeC or more, or both conditions.

(Second embodiment)
FIG. 4 shows a laminated structure in the middle of a light emitting device manufacturing process according to the second embodiment, FIG. 5 shows a light emitting device according to the second embodiment, and FIG. 6 shows a design upper surface of a chip design of the light emitting device according to the second embodiment. A figure and sectional drawing are shown.

For example, an AlGaInP-based epitaxial wafer 002 is formed on a GaAs substrate 200 as a starting substrate inclined at 15 degrees in the [001] direction by using a metal organic vapor phase epitaxy (MOVPE) method, for example, (Al _x Ga _1-x ). a first semiconductor layer 201 which is a lower (n-type) cladding layer made of yIn _1-y P (0.0 ≦ x ≦ 1.0, 0.4 ≦ y ≦ 0.6), (Al _x Ga _{1-x ) y In 1-y P (} 0.0 ≦ x ≦ 1.0,0.4 ≦ y ≦ 0.6) active layer ₂₀₂ made _{of, (Al x Ga 1-x} ) y In 1-y P (0 A second semiconductor layer 203 which is an upper (p-type) clad layer composed of 0.0 ≦ x ≦ 1.0 and 0.4 ≦ y ≦ 0.6, and a GaP window layer 205 having a thickness of 0.5 μm or more. It can be obtained by sequentially laminating. Among these, the portion including the first semiconductor layer 201, the active layer 202, and the second semiconductor layer 203 becomes the light emitting layer portion 207. The manufacturing method is not limited to MOVPE, and may be manufactured by a molecular beam epitaxy (MBE) method or a chemical beam epitaxy (CBE) method.

After the GaP window layer 205 is formed, the first adhesion enhancing layer 209 is formed in contact with the GaP window layer 205. For the adhesion enhancing layer, SiO ₂ , SiN _x , ITO, or the like that is transparent to the emission wavelength can be selected. Next, for example, a transparent substrate 250 such as GaP is prepared, and the second adhesion enhancing layer 259 is formed. As the adhesion enhancing layer, SiO ₂ , SiN _x , ITO or the like which is transparent with respect to the emission wavelength can be selected.
In this embodiment, GaP is exemplified as the transparent substrate 250. However, the transparent substrate 250 is not limited to GaP, and is not limited to GaP, but sapphire, quartz, gallium nitride, gallium oxide, titanium oxide, and other materials having a light-transmitting wavelength. Any can be selected.

  After forming the first adhesion enhancing layer 209 and the second adhesion enhancing layer 259, the BCB adhesive 260 is applied to at least one of the first adhesion enhancing layer 209 and the second adhesion enhancing layer 259 by spin coating, and the first adhesion is achieved. The enhancement layer 209 and the second adhesion enhancement layer 259 are overlapped so as to face each other, and are bonded and bonded by applying heat of 150 ° C. or higher and pressure of 100 N or higher. The GaP window layer 205, the first adhesion enhancing layer 209, the BCB adhesive 260, the second adhesion enhancing layer 259, and the transparent substrate 250 are the window layer / supporting substrate 206. In the present embodiment, the case where the first adhesion enhancing layer 209 and the second adhesion enhancing layer 259 are formed is illustrated, but it may not be formed.

  After the bonding, the starting substrate GaAs substrate 200 is removed by chemical etching from an AlGaInP-based epitaxial wafer (this structure is not shown) to which the transparent substrate 250 is bonded to form a wafer 021. The chemical etchant preferably has an etching selectivity with respect to the AlGaInP-based material, and is generally removed with an ammonia-containing etchant.

  After removing the GaAs substrate 200, a first electrode 251 is formed on the first semiconductor layer 201 of the wafer 021. In addition, at least the first semiconductor layer 201 and the active layer 202 are formed so as to form the second region 225 so as to leave the first semiconductor layer 201, the active layer 202, the second semiconductor layer 203, and the like. The third region 220 is formed by being removed so as to surround. Thereby, a structure including the first region 211 having the first electrode 251, the second region 225, and the third region 220 is formed. Note that FIG. 5 illustrates the case where the third region 220 reaches the window layer 205, but it may be stopped at the second semiconductor layer 203.

Next, the second electrode 261 is formed so as to cover the top portion 225A of the second region 225, the side surface portion 225B, and at least a part of the bottom portion 220A of the third region 220. FIG. 5 illustrates the case where the second electrode 261 is not formed on the side surface portion 225C on the first region 211 side, but it does not deny that a metal electrode is formed on the side surface portion 225C. A second electrode 261 may be formed on the portion 225C.
Since the height of the top surface 225 </ b> A that is the top surface of the first semiconductor layer 201 in the first region 211 and the top surface of the first semiconductor layer 201 in the second region 225 is substantially the same, The height of the upper surface of the two electrodes 261 can also be made substantially the same.

Here, the area of the bottom 220A where the second electrode 261 is formed in the third region 220 is set to 300 μm ² or more. More preferably, it is 700 μm ² or more. As described above, the second region 225 is provided so as to cover the top portion 225A of the second region 225, the side surface portion 225B of the second region 225, and at least a part of the bottom portion 220A of the third region 220. By forming the second electrode 261 and setting the coating area of the bottom 220A on which the second electrode 261 is formed to 300 μm ² or more, it has a sufficiently low electric resistance, suppresses disconnection failure and peeling failure, and has no tilt It can be set as the light emitting element which enables mounting.

  Next, the dielectric portion 240 is provided in at least a part of the first region 211 where the first electrode 251 is not provided. Thus, the light emitting element A02 in which the dielectric portion 240 is provided on at least a part of the side wall 230 between the first region 211 and the third region 220 is obtained. The positional relationship among the first electrode 251, the dielectric portion 240, and the second electrode 261 provided in the light emitting element A02 is as illustrated in the top view and the cross-sectional view of FIG.

  In the present embodiment, the case where the dielectric portion 240 covers the entire upper surface and the side wall 230 other than the first electrode 251 portion of the first region 211 is illustrated, but it is not always necessary to cover the entire portion. You may make it coat | cover only.

  In the present embodiment, the dielectric region 240 has a single-layer structure in the first region 211, but a light reflecting film or light reflecting portion is provided between the dielectric portion 240 and the first region 211. Alternatively, a light reflecting film or a light reflecting portion may be provided on the surface of the dielectric portion 240 that does not contact the first region 211.

  In the present embodiment, the case where the first region 211 has a flat surface is exemplified, but the first region 211 may have a surface having unevenness. As for the surface having irregularities, a simple rough surface by wet etching, a faceted rough surface having a facet surface, a patterned rough surface patterned by photolithography having a pitch of several tens of μm to several hundreds of nm, and several to several hundreds of nanometers Any case of a photonic rough surface having a pitch trench shape is included.

  In the present embodiment, the side wall 230 and the third region 220 are illustrated as flat surfaces having no unevenness, but may be surfaces having unevenness.

  In the present embodiment, the case where the window layer / supporting substrate 206 has a flat surface is exemplified, but the window layer / supporting substrate 206 may have a surface having irregularities. As for the surface having irregularities, a simple rough surface by wet etching, a faceted rough surface having a facet surface, a patterned rough surface patterned by photolithography having a pitch of several tens of μm to several hundreds of nm, and several to several hundreds of nanometers Any case of a photonic rough surface having a pitch trench shape is included.

  In the present embodiment, the formation of another film on the surface of the window layer / supporting substrate 206 is not described, but an antireflection film made of a dielectric may be provided.

  After forming the light emitting element A02, Au bumps are formed on the first electrode 251 and the second electrode 261 as necessary, and a laser having light absorption characteristics in GaP is linearly irradiated to perform a scribing process. After forming the line, the braking process is performed to make individual dice. Alternatively, a linear scribing process is performed with diamond, a defect dislocation line is formed, and then a breaking process is performed to form individual dice.

  When the light emitting element A02 is directly mounted on the driving substrate, the scribing / braking process is not performed because the light emitting element A02 is directly mounted on the mounting substrate without performing the scribe / braking process. Further, the effect of the invention is the same without performing the scribing / braking process.

  After dicing into individual dice, it is mounted on the drive substrate via Au bumps. In that case, it can implement | achieve by crimping | bonding to a die | dye at the temperature of 150 degreeC or more, or both conditions.

(Third embodiment)
7 shows a laminated structure in the middle of a light emitting device manufacturing process according to the third embodiment, FIG. 8 shows a light emitting device according to the third embodiment, and FIG. 9 shows a design upper surface of a chip design of the light emitting device according to the third embodiment. A figure and sectional drawing are shown.

For example, an AlGaInP-based epitaxial wafer 003 is formed by, for example, (Al _x Ga _1-x ) _y In on a GaAs substrate 300 as a starting substrate inclined at 15 degrees in the [001] direction by a metal organic vapor phase epitaxy (MOVPE) method. _{1-y P (0.0 ≦ x} ≦ 1.0,0.4 ≦ y ≦ 0.6) consisting of a lower (n-type) first semiconductor layer ₃₀₁ is a cladding _{layer, (Al x Ga 1-x} ) active layer 302 made of _y In _1-y P (0.0 ≦ x ≦ 1.0, 0.4 ≦ y ≦ 0.6), (Al _x Ga _1-x ) _y In _1-y P (0. A second semiconductor layer 303 which is an upper (p-type) cladding layer composed of 0 ≦ x ≦ 1.0 and 0.4 ≦ y ≦ 0.6, and a GaP window layer 305 having a thickness of 0.5 μm or more are sequentially provided. It can be obtained by laminating. Among these, the portion including the first semiconductor layer 301, the active layer 302, and the second semiconductor layer 303 becomes the light emitting layer portion 307. The manufacturing method is not limited to MOVPE, and may be manufactured by a molecular beam epitaxy (MBE) method or a chemical beam epitaxy (CBE) method.

Next, the transparent substrate 350 made of, for example, GaP or the like and the AlGaInP-based epitaxial wafer 003 are wet-treated with an OH group-containing liquid. After the wet treatment, the transparent substrate 350 and the GaP window layer 305 of the AlGaInP-based epitaxial wafer 003 are stacked so as to face each other, and bonded by applying heat of 150 ° C. or higher and pressure of 100 N or higher. The transparent substrate 350 and the GaP window layer 305 are the window layer / support substrate 306.
In this embodiment, GaP is exemplified as the transparent substrate 350, but is not limited to GaP, and is not limited to GaP, but sapphire, quartz, gallium nitride, gallium oxide, titanium oxide, and other materials that are transparent to the emission wavelength. Any can be selected.

  After bonding, the GaAs substrate 300 of the AlGaInP epitaxial wafer 003 is removed by chemical etching to form a wafer 031. The chemical etchant preferably has an etching selectivity with respect to the AlGaInP-based material, and is generally removed with an ammonia-containing etchant.

  After removing the GaAs substrate 300, the first electrode 351 is formed on the first semiconductor layer 301 of the wafer 031. In addition, at least the first semiconductor layer 301 and the active layer 302 are formed with the second region 325 so as to form the second region 325 in which the first semiconductor layer 301, the active layer 302, the second semiconductor layer 303, and the like are left. The third region 320 is formed by being removed so as to surround. Accordingly, a structure including the first region 311 having the first electrode 351, the second region 325, and the third region 320 is formed. Although FIG. 8 illustrates the case where the third region 320 reaches the GaP window layer 305, it may be stopped at the second semiconductor layer 303.

The second electrode 361 is formed so as to cover the top portion 325A of the second region 325, the side surface portion 325B, and at least part of the bottom portion 320A of the third region 320. Although the figure illustrates the case where the second electrode 361 is not formed on the side surface portion 325C on the first region 311 side, it does not deny that the metal electrode is formed on the side surface portion 325C. A second electrode 361 may be formed on 325C.
The height of the top surface of the first semiconductor layer 301 in the first region 311 and the height of the top portion 325A, which is the top surface of the first semiconductor layer 301 in the second region 325, are substantially the same. The height of the upper surface of the two electrodes 361 can also be made substantially the same.

Here, the area of the bottom 320A where the second electrode 361 is formed in the third region 320 is set to 300 μm ² or more. More preferably, it is 700 μm ² or more. In this manner, the second region 325 is provided so as to cover the top portion 325A of the second region 325, the side surface portion 325B of the second region 325, and at least a part of the bottom portion 320A of the third region 320. By forming the second electrode 361 and setting the coating area of the bottom 320A on which the second electrode 361 is formed to be 300 μm ² or more, it has a sufficiently low electric resistance, suppresses disconnection failure and peeling failure, and has no tilt It can be set as the light emitting element which enables mounting.

  Next, the dielectric portion 340 is provided in at least a part of the first region 311 where the first electrode 351 is not provided. Thus, the light emitting element A03 in which the dielectric portion 340 is provided on at least a part of the side wall 330 between the first region 311 and the third region 320 is obtained. The positional relationship among the first electrode 351, the dielectric portion 340, and the second electrode 361 provided in the light emitting element A03 is as illustrated in the top view and the cross-sectional view in FIG.

  In the present embodiment, the case where the dielectric portion 340 covers the entire upper surface and the side wall 330 other than the first electrode 351 portion of the first region 311 is illustrated, but it is not always necessary to cover all of them. You may make it coat | cover only a part.

  In the present embodiment, the first region 311 has a structure in which the dielectric portion 340 has a single layer, but a light reflecting film or light reflecting portion is provided between the dielectric portion 340 and the first region 311. Alternatively, a light reflecting film or a light reflecting portion may be provided on the surface of the dielectric portion 340 that is not in contact with the first region 311.

  In the present embodiment, the case where the first region 311 has a flat surface is illustrated, but the first region 311 may have a surface having unevenness. As for the surface having irregularities, a simple rough surface by wet etching, a faceted rough surface having a facet surface, a patterned rough surface patterned by photolithography having a pitch of several tens of μm to several hundreds of nm, and several to several hundreds of nanometers Any case of a photonic rough surface having a pitch trench shape is included.

  In the present embodiment, the side wall 330 and the third region 320 are illustrated as flat surfaces without unevenness, but may be surfaces having unevenness.

  In this embodiment, the case where the window layer / supporting substrate 306 has a flat surface is exemplified, but it goes without saying that the same effect can be obtained even if the window layer / supporting substrate 306 has a surface having irregularities. As for the surface having irregularities, a simple rough surface by wet etching, a faceted rough surface having a facet surface, a patterned rough surface patterned by photolithography having a pitch of several tens of μm to several hundreds of nm, and several to several hundreds of nanometers Any case of a photonic rough surface having a pitch trench shape is included.

  In this embodiment, the formation of another film on the surface of the window layer / supporting substrate 306 is not described, but an antireflection film made of a dielectric may be provided.

  After forming the light emitting element A03, Au bumps are formed on the first electrode 351 and the second electrode 361 as necessary, and a laser having a light absorption characteristic in GaP is linearly irradiated to perform a scribing process. After forming the line, the braking process is performed to make individual dice. Alternatively, a linear scribing process is performed with diamond, a defect dislocation line is formed, and then a breaking process is performed to form individual dice.

  When the light emitting element A03 is directly mounted on the drive board, the scribe / braking process is not performed because the light emitting element A03 is directly mounted on the mounting board without performing the scribe / braking process. Further, the effect of the invention is the same without performing the scribing / braking process.

  After dicing into individual dice, it is mounted on the drive substrate via Au bumps. In that case, it can implement | achieve by crimping | bonding to a die | dye at the temperature of 150 degreeC or more, or both conditions.

  EXAMPLES Hereinafter, although an Example is given and this invention is demonstrated in detail, this does not limit this invention.

Example 1
Based on 1st embodiment (FIGS. 1-3), the light emitting element was manufactured.
A substrate (starting substrate) made of GaAs (001) was prepared as a starting substrate, and a double hetero layer (light emitting layer) as a functional layer was formed on the substrate by the MOVPE method. The light emitting layer was formed by sequentially laminating a lower clad layer (first semiconductor layer), an active layer, and an upper clad layer (second semiconductor layer).
The first semiconductor layer and the second semiconductor _layer, the composition of _{(Al x Ga 1-x)} y In 1-y P (0.6 ≦ x ≦ 1.0,0.4 ≦ y ≦ 0.6) Selected.
The first semiconductor layer has an n-type AlInP cladding layer of 0.7 μm (doping concentration 3.0 × 10 ¹⁷ / cm ³ ) and an n-type Al _0.85 GaInP layer of 0.3 μm (doping concentration 1.0 × 10 ¹⁷ / Cm ³ ).
The active layer is selected from (Al _x Ga _1-x ) _y In _1-y P (0.15 ≦ x ≦ 0.80, 0.4 ≦ y ≦ 0.6), and the composition x and y depend on the wavelength. changed. In this embodiment, a multiple active layer is used as the active layer. The film thicknesses of the active layer and the barrier layer were changed depending on the desired wavelength, and were adjusted according to the wavelength in the range of 4 to 12 nm.
The second semiconductor layer has a p-type AlInP cladding layer of 0.9 μm (doping concentration 3.0 × 10 ¹⁷ / cm ³ ) and a p-type Al _0.6 GaInP layer of 0.1 μm (doping concentration 1.0 × 10 ^17). / Cm ³ ).
An intermediate composition layer made of GaInP was formed on the light emitting layer. Next, a GaP window layer having a thickness of 1.0 μm was sequentially laminated on the intermediate composition layer. A GaP epitaxial layer (window layer and supporting substrate) having a thickness of 100 μm was formed in contact with the GaP window layer. The window layer / support substrate was formed by a hydride vapor phase epitaxy (HVPE) method.
Next, the GaAs substrate was removed with an ammonia-containing etchant. Subsequently, the etch stop layer was removed.
Next, a part of the first semiconductor layer and the active layer was cut out to expose a part of the second semiconductor layer.
Next, a dielectric layer was formed so as to cover the notched side surface, and an opening was provided. The dielectric layer was made of SiO ₂ and formed by P-CVD using TEOS and O ₂ . The openings were formed by forming a dielectric layer, forming a mask portion by photolithography, and forming an exposed portion by wet etching using BHF.
After removing the GaAs substrate, a first electrode was formed on the first semiconductor layer. In addition, the first semiconductor layer and the active layer are removed so as to surround the second region so as to form a second region which is a separation portion leaving the first semiconductor layer, the active layer, the second semiconductor layer, and the like. Thus, a third region was formed. Then, a second electrode was formed so as to cover the top of the second region, the side surface of the second region, and a part of the bottom of the third region (see FIG. 2-3).
Here, the coating area at the bottom where the second electrode was formed was 314 μm ² .
A laser having light absorption characteristics in GaP was irradiated linearly to form a scribing process, and after forming a defect line, a braking process was performed to form individual dice.
After forming into individual dice, it was mounted on the drive substrate via Au bumps.

(Example 2)
A light emitting device was manufactured under the same conditions as in Example 1 except that the coating area at the bottom where the second electrode was formed was 491 μm ² and mounted on the driving substrate.

(Example 3)
A light emitting element was manufactured under the same conditions as in Example 1 except that the coating area of the bottom where the second electrode was formed was 707 μm ² and mounted on the drive substrate.

(Example 4)
A light emitting device was manufactured under the same conditions as in Example 1 except that the coating area at the bottom where the second electrode was formed was 962 μm ² and mounted on the drive substrate.

(Example 5)
A light emitting element was manufactured under the same conditions as in Example 1 except that the coating area of the bottom where the second electrode was formed was 1257 μm ² and mounted on the drive substrate.

(Example 6)
A light emitting device was manufactured under the same conditions as in Example 1 except that the coating area at the bottom where the second electrode was formed was 1590 μm ² and mounted on the drive substrate.

(Comparative Example 1)
As shown in FIG. 10, the portion corresponding to the second region in Example 1 was not formed, the second electrode 461 was formed thick, and the area of the bottom where the second electrode was formed was 7665 μm ^2. Except for the above, the light-emitting element A04 was formed under the same conditions as in Example 1, and mounted on the drive substrate. FIG. 11 shows a design top view and a cross-sectional view of the chip design of Comparative Example 1.

(Comparative Example 2)
As shown in FIG. 12, the portion corresponding to the second region in the first embodiment is not formed, and the second electrode 561 is formed from the insulating film 540 to the window / support substrate 506, and the first embodiment is the same as the first embodiment. A light emitting element A05 was formed under the same conditions and mounted on a driving substrate.

(Comparative Example 3)
A light emitting device was manufactured under the same conditions as in Example 1 except that the coating area at the bottom where the second electrode was formed was 177 μm ² and mounted on the drive substrate.

(Comparative Example 4)
A light emitting element was manufactured under the same conditions as in Example 1 except that the coating area at the bottom where the second electrode was formed was 113 μm ² and mounted on the drive substrate.

  FIG. 13 shows the rate of occurrence of die tilt failure during mounting in Examples 1 to 3 and Comparative Example 1. In Comparative Example 1, since the height variation between the first electrode and the second electrode is large, a tilt failure is likely to occur. On the other hand, in Examples 1 to 3, since the variation in height difference between the first electrode and the second electrode is small, the defect occurrence rate is small.

  In Comparative Example 1, it is possible to adjust the height of the second electrode so that it matches the height of the first electrode as much as possible. In principle, it is extremely difficult to match the heights of the first electrode and the second electrode. When there is a difference in height between the first electrode and the second electrode, the die light extraction surface is inclined due to the difference in height, and a defect in which the directivity angle is shifted easily occurs.

  In FIG. 14, the disconnection defect rate resulting from the 2nd electrode in Examples 1-3 and the comparative example 2 is shown. In Comparative Example 2, the second electrode is formed on the insulating film, and a large number of disconnections due to a difference in expansion coefficient due to heat during the process or due to heat generation of the light emitting element during operation occur. Yes. On the other hand, in Examples 1-3, the disconnection defect resulting from heat hardly occurred, and it can be seen that the second electrode can be formed satisfactorily and stably.

  FIG. 15 shows the rate at which mounting failures occur in Examples 1 to 3 and Comparative Example 2 due to electrode peeling during mounting. In Comparative Example 2, a large amount of peeling occurs at the interface between the insulating film and the electrode, and the defect rate is increased. However, in Examples 1 to 3, since there is no interface that causes peeling, no failure occurs. It can be seen that there is a significant improvement.

  Table 1 shows the measurement results of the forward voltage (forward voltage; VF) at the time of IF = 20 mA in Examples 1 to 6 and Comparative Examples 1, 3, and 4.

FIG. 16 shows the relationship between the bottom coating area (contact area) and the average forward voltage (forward voltage; VF) in Examples 1 to 6 and Comparative Examples 1, 3, and 4. The horizontal axis represents the coating area at the bottom as the contact area, and the vertical axis represents VF at IF = 20 mA. It can be seen that VF tends to increase (rise) as the contact area decreases. In Examples 1 to 6, VF ≦ 2.35V is realized by providing a contact area region of 300 μm ² or more. However, in Comparative Examples 3 and 4, since the contact area was less than 300 μm ² , VF was extremely high. In Comparative Example 1, the second electrode 461 is formed thick. However, since the contact area is 300 μm ² or more, a low VF of VF = 2.18 V is obtained.

  The present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and the present invention has any configuration that has substantially the same configuration as the technical idea described in the claims of the present invention and that exhibits the same effects. Are included in the technical scope.

100: GaAs substrate (starting substrate) 101: First semiconductor layer 102: Active layer
103 ... second semiconductor layer, 104 ... intermediate composition layer, 105 ... GaP window layer,
106 ... window layer and supporting substrate, 107 ... light emitting layer,
001 ... AlGaInP epitaxial wafer,
011 ... wafer from which the starting substrate has been removed, 111 ... first region,
120 ... third region, 120A ... bottom,
125 ... 2nd area | region, 125A ... Top part, 125B ... Side part, 125C ... Side part,
130 ... sidewall, 140 ... dielectric part, 151 ... first electrode, 161 ... second electrode,
A01 ... light emitting element,
200 ... GaAs substrate (starting substrate), 201 ... first semiconductor layer, 202 ... active layer,
203 ... second semiconductor layer, 205 ... GaP window layer, 206 ... window layer and supporting substrate,
207 ... luminescent layer portion, 209 ... first adhesion enhancing layer,
002 ... AlGaInP based epitaxial wafer,
021 ... Wafer from which the starting substrate has been removed; 211 ... First region;
220 ... third region, 220A ... bottom,
225 ... second region, 225A ... top, 225B ... side, 225C ... side,
230 ... Side wall, 240 ... Dielectric part, 250 ... Transparent substrate, 251 ... First electrode,
259 ... second adhesion enhancing layer, 260 ... BCB adhesive, 261 ... second electrode,
A02: Light emitting element,
300 ... GaAs substrate (starting substrate), 301 ... first semiconductor layer, 302 ... active layer,
303 ... second semiconductor layer, 305 ... GaP window layer, 306 ... window layer and supporting substrate,
307: Light emitting layer portion 003: AlGaInP epitaxial wafer,
031 ... Wafer from which the starting substrate has been removed, 311 ... First region, 320 ... Third region,
320A ... bottom, 325 ... second region, 325A ... top,
325B ... side surface part, 325C ... side surface part, 330 ... side wall, 340 ... dielectric part,
350 ... transparent substrate, 351 ... first electrode,
361 ... second electrode, A03 ... light emitting element,
461 ... second electrode, A04 ... light emitting element,
506 ... Window layer and supporting substrate, 540 ... Dielectric part, 561 ... Second electrode,
A05: Light emitting element.

The laminated structure in the middle of the light emitting element manufacturing process which concerns on 1st embodiment is shown. The light emitting element which concerns on 1st embodiment is shown. The design top view and sectional drawing of the chip design of the light emitting element which concern on 1st embodiment are shown. The laminated structure in the middle of the light emitting element manufacturing process which concerns on 2nd embodiment is shown. The light emitting element which concerns on 2nd embodiment is shown. The design top view and sectional drawing of the chip design of the light emitting element which concern on 2nd embodiment are shown. The laminated structure in the middle of the light emitting element manufacturing process which concerns on 3rd embodiment is shown. The light emitting element which concerns on 3rd embodiment is shown. The design top view and sectional drawing of the chip design of the light emitting element which concern on 3rd embodiment are shown. 1 shows a light emitting device according to Comparative Example 1; The design top view and sectional drawing of the chip design of the light emitting element concerning the comparative example 1 are shown. The light emitting element which concerns on the comparative example 2 is shown. The die inclination generation | occurrence | production defect rate at the time of mounting of Example 1-3 and Comparative Example 1 is shown. The disconnection defect rate resulting from the 2nd electrode of Example 1-3 and Comparative Example 2 is shown. The mounting defect by the electrode peeling at the time of mounting of Example 1-3 and Comparative Example 2 is shown. The relationship between the film area and VF (forward voltage) of Example 1-6 and Comparative Examples 1, 3, and 4 is shown.

Claims (4)

A window layer / support substrate, and a second conductivity type second semiconductor layer, an active layer, and a first conductivity type first semiconductor layer provided on the window layer / support substrate side from the window layer / support substrate side. In a light emitting element having a light emitting layer portion including in order,
The light-emitting element includes a first region having a first electrode in contact with the second semiconductor layer, the active layer, the first semiconductor layer, and the first semiconductor layer;
A second region having the second semiconductor layer, the active layer, and the first semiconductor layer;
A third region separating the first region and the second region, wherein at least the first semiconductor layer and the active layer are removed so as to surround the second region;
Covering the top of the second region, the side surface of the second region, and at least part of the third region, and supporting the second semiconductor layer or window layer in the third region A second electrode in contact with the substrate,
The light emitting element, wherein a coating area of the second electrode in the third region is 300 μm ² or more. The window layer and supporting substrate is GaAs _z P _1-z (0.0 ≦ z ≦ 0.1), and the light emitting layer portion is (Al _x Ga _1-x ) _y In _1-y P (0. The light-emitting element according to claim 1, wherein 0 ≦ x ≦ 1.0 and 0.4 ≦ y ≦ 0.6. A method of manufacturing a light emitting device,
Forming a light emitting layer portion by epitaxial growth of at least a first semiconductor layer, an active layer, and a second semiconductor layer in this order on a starting substrate;
Forming a window layer and supporting substrate by epitaxial growth or bonding;
Removing the starting substrate to expose the first semiconductor layer;
Forming a first electrode on a portion of the surface of the first semiconductor layer;
A first region that includes the first electrode; and a second region that does not include the first electrode and includes the first semiconductor layer and the active layer, wherein the first semiconductor layer and the active layer are A third region is formed by removing at least the first semiconductor layer and the active layer around the second region so as to form the second region separated from the first region. Process,
Forming a second electrode across the top of the second region, the side surface of the second region, and at least a portion of the third region;
A method of manufacturing a light emitting element, wherein a coating area of the second electrode in the third region is 300 μm ² or more. The window layer and supporting substrate is GaAs _z P _1-z (0.0 ≦ z ≦ 0.1), and the light emitting layer portion is (Al _x Ga _1-x ) _y In _1-y P (0.0 ≦ 4. The method for manufacturing a light-emitting element according to claim 3, wherein x ≦ 1.0 and 0.4 ≦ y ≦ 0.6.

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