JP7087693B2 - Light emitting device and its manufacturing method - Google Patents

Description

The present invention relates to a light emitting device and a method for manufacturing the same.

Products such as chip-on-board (COB) are excellent in heat dissipation from LED elements, and are LED chip mounting methods adopted in applications such as lighting. When mounting an LED on a COB or the like, flip mounting in which the chip is directly bonded to the board is indispensable. In order to realize flip mounting, it is necessary to manufacture flip chips in which energizing pads having different polarities are provided on one surface of a light emitting element. Further, the surface opposite to the surface on which the energizing pad is provided needs to be made of a material having a light extraction function.

When a flip chip is manufactured from a yellow to red LED, an AlGaInP-based material is used for the light emitting layer. Since bulk crystals do not exist in the AlGaInP-based material and the LED portion is formed by the epitaxial method, a material different from AlGaInP is selected as the starting substrate. GaAs and Ge are often selected as the starting substrate, and since these substrates have the property of absorbing light with respect to visible light, the starting substrate is removed when the flip chip is manufactured. However, since the epitaxial layer forming the light emitting layer is an extremely thin film, it cannot stand on its own after the starting substrate is removed. Therefore, a material / configuration that is substantially transparent to the emission wavelength of the light emitting layer, has a function as a window layer, and has a function as a support substrate having a sufficient thickness to be self-supporting is used to replace the starting substrate.
In this case, when flip-mounting a light emitting element having two electrodes having different polarities on the upper surface, having the same height on the electrode surfaces facilitates the mounting.

Patent Document 1 discloses a technique in which an insulating film is provided on the upper part of a light emitting layer and electrodes having different polarities are formed on the insulating film in order to provide two electrodes having the same height.
Patent Document 2 describes that a columnar semiconductor layer region is formed, and an electrode having a polarity different from that of an electrode on the light emitting layer is formed in the columnar semiconductor region portion.

Japanese Unexamined Patent Publication No. 2005-322722 Patent No. 6291400

However, in the technique described in Patent Document 1, it is difficult to increase the adhesion strength of the electrode formed on the insulating film to the same level as when the electrode is directly contacted with the semiconductor, and peeling failure is likely to occur. Further, due to the difference in the linear expansion coefficient between the insulating film and the metal, there is a problem that insulation failure is likely to occur due to expansion and contraction of the metal film when the element temperature changes due to energization.

In the technique described in Patent Document 2, an electrode having a polarity different from that of the electrode formed on the light emitting layer is directly formed on the columnar semiconductor layer, and the adhesive strength between the electrode and the semiconductor is described in the above-mentioned Patent Document 1. There is an advantage that it can be sufficiently secured compared to the technology of. On the other hand, it is necessary to form an electrode layer having a sufficiently low electric resistance on the side surface of the columnar semiconductor, but the gap between the columnar semiconductor portions is narrow, and it is difficult to form a uniform metal film by the vapor deposition method. Further, unless a seed layer having a sufficient thickness and quality can be formed, it is difficult to form a metal layer having a sufficiently low electric resistance on the above-mentioned side surface portion by the plating method.

The present invention has been made in view of the above problems, and electrodes having different polarities are formed at substantially the same height, have sufficiently low electrical resistance, suppress wire breakage and peeling failure, and have no inclination. It is an object of the present invention to provide a light emitting element capable of flip mounting and a method for manufacturing the light emitting element.

The present invention has been made to achieve the above-mentioned problems, and is provided on the window layer / support substrate and the window layer / support substrate, and is a second conductive type second from the window layer / support substrate side. In a light emitting element having a semiconductor layer, an active layer, and a light emitting layer portion including a first conductive type first semiconductor layer in this order, the light emitting element includes the second semiconductor layer, the active layer, and the first semiconductor layer. A first region having a first electrode in contact with the first semiconductor layer, a second region having the second semiconductor layer, the active layer, and the first semiconductor layer, and the second region so as to surround the second region. A third region from which at least the first semiconductor layer and the active layer have been removed, a third region separating the first region and the second region, the top of the second region, and the second region. It has a second electrode that covers at least a part of the third region and is in contact with the second semiconductor layer or the window layer / support substrate in the third region. Provided is a light emitting element having a coating area of the second electrode of 300 μm ² or more in the region of.

According to such a light emitting element, electrodes having different polarities are formed at substantially the same height, have sufficiently low electrical resistance, suppress disconnection defects and peeling defects, and enable flip mounting without inclination. Will be.

At this time, the window layer and support substrate is GaAs _z P _1-z (0.0 ≦ z ≦ 0.1), and the light emitting layer portion is (Al _x Ga _1-x ) _y In _1-y P. The light emitting element can be (0.0 ≦ x ≦ 1.0, 0.4 ≦ y ≦ 0.6).

As a result, the luminous efficiency is good, and the disconnection defect and the peeling defect are further suppressed.

At this time, in the method of manufacturing a light emitting element, a step of forming a light emitting layer portion by epitaxial growth of at least a first semiconductor layer, an active layer, and a second semiconductor layer on a starting substrate in this order, and a window layer and support substrate are provided. A step of forming by epitaxial growth or laminating, a step of removing the starting substrate to expose the first semiconductor layer, a step of forming a first electrode on a part of the surface of the first semiconductor layer, and the first step. A first region including one electrode and a second region not including the first electrode and having the first semiconductor layer and the active layer, wherein the first semiconductor layer and the active layer are the first. A step of removing at least the first semiconductor layer and the active layer around the second region to form a third region so as to form the second region separated from the region. The step of forming the second electrode over the top of the second region, the side surface of the second region, and at least a part of the third region, the third in the third region. It is possible to provide a method for manufacturing a light emitting element having a coating area of two electrodes of 300 μm ² or more.

As a result, electrodes having different polarities are formed at substantially the same height, and a sufficiently low electric resistance is suppressed. Can be manufactured to.

At this time, the window layer and support substrate is GaAs _z P _1-z (0.0 ≦ z ≦ 0.1), and the light emitting layer portion is (Al _x Ga _1-x ) _y In _1-y P (0). It is possible to use a method for manufacturing a light emitting element in which 0.0 ≦ x ≦ 1.0 and 0.4 ≦ y ≦ 0.6).

As a result, it is possible to manufacture a light emitting element having good luminous efficiency and further suppressed disconnection failure and peeling failure.

As described above, according to the light emitting element of the present invention, electrodes having different polarities are formed at substantially the same height, have sufficiently low electrical resistance, suppress wire breakage and peeling failure, and have no inclination. It enables flip mounting. Further, according to the method for manufacturing a light emitting element of the present invention, electrodes having different polarities are formed at substantially the same height, and the electric resistance is sufficiently low, disconnection defects and peeling defects are suppressed, and there is no inclination. It becomes possible to manufacture a light emitting element that enables flip mounting extremely easily.

The laminated structure in the middle of the light emitting element manufacturing process which concerns on 1st Embodiment is shown. The light emitting element which concerns on the 1st Embodiment is shown. The design top view and the sectional view of the chip design of the light emitting element which concerns on 1st Embodiment are shown. The laminated structure in the middle of the light emitting element manufacturing process which concerns on the 2nd Embodiment is shown. The light emitting element which concerns on the 2nd Embodiment is shown. The design top view and the sectional view of the chip design of the light emitting element which concerns on the 2nd Embodiment are shown. The laminated structure in the middle of the light emitting element manufacturing process which concerns on 3rd Embodiment is shown. The light emitting element which concerns on the 3rd Embodiment is shown. The design top view and the sectional view of the chip design of the light emitting element which concerns on 3rd Embodiment are shown. The light emitting element which concerns on Comparative Example 1 is shown. The design top view and the sectional view of the chip design of the light emitting element which concerns on Comparative Example 1 are shown. The light emitting element which concerns on the comparative example 2 is shown. The defective rate of dice tilt occurrence at the time of mounting in Examples 1-3 and Comparative Example 1 is shown. The disconnection defect rate due to the second electrode of Example 1-3 and Comparative Example 2 is shown. The mounting defects of Example 1-3 and Comparative Example 2 due to electrode peeling during mounting are shown. The relationship between the coating area and the VF (forward voltage) of Examples 1-6 and Comparative Examples 1, 3 and 4 is shown.

Hereinafter, the present invention will be described in detail, but the present invention is not limited thereto.

As described above, a light emitting element and light emitting element having electrodes having different polarities formed at the same height, having sufficiently low electric resistance, suppressing disconnection failure and peeling failure, and enabling flip mounting without inclination. There has been a demand for a method for manufacturing an element.

As a result of diligent studies on the above problems, the present inventors have provided the window layer / support substrate and the window layer / support substrate, and the second conductive type second semiconductor is provided from the window layer / support substrate side. In a light emitting element having a layer, an active layer, and a light emitting layer portion including a first conductive type first semiconductor layer in this order, the light emitting element is the second semiconductor layer, the active layer, the first semiconductor layer, and the above. At least a first region having a first electrode in contact with the first semiconductor layer, a second region having the second semiconductor layer, the active layer, and the first semiconductor layer, and the second region so as to surround the second region. A third region from which the first semiconductor layer and the active layer have been removed, a third region separating the first region and the second region, the top of the second region, and the second region. The third region has a side surface portion and a second electrode that covers at least a part of the third region and is in contact with the second semiconductor layer or the window layer / support substrate in the third region. The present invention has been completed by finding that a light emitting element having a coating area of the second electrode of 300 μm ² or more in the region has a lower electric resistance and further suppresses disconnection defects and peeling defects.

Further, the present inventors are a method for manufacturing a light emitting element, which is a step of forming a light emitting layer portion by epitaxial growth of at least a first semiconductor layer, an active layer, and a second semiconductor layer on a starting substrate in this order, and a window. A step of forming a layer / support substrate by epitaxial growth or laminating, a step of removing the starting substrate to expose the first semiconductor layer, and a step of forming a first electrode on a part of the surface of the first semiconductor layer. The step, the first region including the first electrode, the second region not including the first electrode and having the first semiconductor layer and the active layer, the first semiconductor layer and the active layer. The third region is obtained by removing at least the first semiconductor layer and the active layer around the second region so as to form the second region separated from the first region. The step of forming the second electrode over the top of the second region, the side surface portion of the second region, and at least a part of the third region. By the method of manufacturing a light emitting element in which the coating area of the second electrode in the region 3 is 300 μm ² or more, electrodes having different polarities are formed at substantially the same height, and the electric resistance is sufficiently low. We have found that it is extremely easy to manufacture a light emitting element that suppresses peeling defects and enables flip mounting without tilting, and completed the present invention.

Hereinafter, description will be given with reference to the drawings.

(First embodiment)
FIG. 1 shows a laminated structure in the middle of the light emitting element manufacturing process according to the present embodiment, FIG. 2 shows a light emitting element according to the present embodiment, and FIG. 3 shows a design top view and a cross-sectional view of a chip design of the light emitting element according to the present embodiment. ..
For example, the AlGaInP-based epitaxial wafer 001 is placed on a GaAs substrate 100 as a starting substrate inclined by 15 degrees in the [001] direction by an organic metal vapor phase growth method (MOVPE), for example, (Al _x Ga _1-x ) _y In. First semiconductor layer 101, which is a lower (n-type) clad layer composed of _1-y P (0.0 ≦ x ≦ 1.0, 0.4 ≦ y ≦ 0.6), (Al _x Ga _1-x ). An active layer 102 composed of _y In _1-y P (0.0 ≦ x ≦ 1.0, 0.4 ≦ y ≦ 0.6), (Al _x Ga _1-x ) _y In _1-y P (0. Second semiconductor layer 103, which is an upper (p-type) clad layer composed of 0 ≦ x ≦ 1.0, 0.4 ≦ _y ≦ 0.6), Gay In _1-y P (0.0 ≦ y ≦ 1) It can be obtained by sequentially laminating an intermediate composition layer 104 composed of 0.0) and a GaP window layer 105 having a thickness of 0.5 μm or more. Of these, the portion including the first semiconductor layer 101, the active layer 102, and the second semiconductor layer 103 is the light emitting layer portion 107. The production method is not limited to MOVPE, and may be produced by a molecular beam epitaxy (MBE) method or a chemical beam epitaxy (CBE) method.

Next, in contact with the GaP window layer 105, a GaAs _z P _1-z (0.0 ≦ z ≦ 0.1) window layer and support substrate 106 having a thickness of, for example, 100 μm is formed. The window layer / support substrate 106 can be formed by the MOVPE method, the MBE method, or the hydride vapor phase growth (HVPE) method, which is inexpensive and has a high growth rate.

After the window layer and support substrate 106 is formed, the wafer 011 from which the GaAs substrate 100, which is the starting substrate of the AlGaInP-based epitaxial wafer 001, is removed is formed by chemical etching (see FIG. 2). The chemical etching solution is preferably an AlGaInP-based material and has etching selectivity, and is generally removed with an ammonia-containing etchant.

After removing the GaAs substrate 100, the first electrode 151 is formed on the first semiconductor layer 101 of the wafer 011. Further, at least the first semiconductor layer 101 and the active layer 102 are formed in the second region 125 so as to form the second region 125 in which the first semiconductor layer 101, the active layer 102, the second semiconductor layer 103 and the like are left. It is removed so as to surround it to form a third region 120. As a result, a structure having a first region 111 having a first electrode 151, a second region 125, and a third region 120 is formed. Although FIG. 2 illustrates the case where the third region 120 reaches the window layer and support substrate 106, it may be stopped at the second semiconductor layer 103, the intermediate composition layer 104, or the GaP window layer 105. ..

Next, the second electrode 161 is formed so as to cover at least a part of the top portion 125A of the second region 125, the side surface portion 125B, and the bottom portion 120A of the third region 120. FIG. 2 illustrates a case where the second electrode 161 is not formed on the side surface portion 125C on the first region 111 side, but it does not deny that the metal electrode is formed on the side surface portion 125C. The second electrode 161 may be formed on the side surface portion 125C.
Since the heights of the top surface 125A, which is the upper surface of the first semiconductor layer 101 of the second region 125, and the upper surface of the first semiconductor layer 101 of the first region 111 are substantially the same, the height of the top surface 125A is substantially the same as that of the upper surface of the first electrode 151. The height of the upper surface of the two electrodes 161 can also be substantially the same.

Here, the coating area of the bottom portion 120A on which the second electrode 161 is formed in the third region 120 is set to 300 μm ² or more. Further, it is more preferably 700 μm ² or more. Thus, the second region 125 is provided to cover at least a portion of the top 125A of the second region 125, the side surface 125B of the second region 125, and the bottom 120A of the third region 120. By forming the second electrode 161 on the surface and setting the coating area of the bottom 120A on which the second electrode 161 is formed to 300 μm ² or more, the electric resistance is sufficiently low, disconnection failure and peeling failure are suppressed, and the inclination is increased. It can be a light emitting element that enables no flip mounting.
Further, the upper limit of the coating area of the bottom portion 120A is not particularly limited, but if the coating area is increased, the area of the light emitting portion becomes relatively small and the efficiency deteriorates, so that it is preferably 7000 μm ² or less. This also applies to the second embodiment and the third embodiment described later.

Next, the dielectric portion 140 is provided in at least a part of the first region 111 where the first electrode 151 is not provided. As a result, it is possible to obtain a light emitting element A01 in which the dielectric portion 140 is provided in at least a part of the side wall 130 between the first region 111 and the third region 120. The positional relationship between the first electrode 151, the dielectric portion 140, and the second electrode 161 provided on the light emitting element A01 is as shown in the top view and the cross-sectional view of FIG.

In the present embodiment, the case where the dielectric portion 140 covers all of the upper surface and the side wall 130 other than the first electrode 151 portion of the first region 111 is illustrated, but it is not always necessary to cover all of them. It may be possible to cover only a part.

In the present embodiment, the structure in which the dielectric portion 140 is a single layer is exemplified in the first region 111, but a light reflecting film or a light reflecting portion is provided between the dielectric portion 140 and the first region 111. Alternatively, the light reflecting film or the light reflecting portion may be provided on the surface side of the dielectric portion 140 that does not come into contact with the first region 111.

In the present embodiment, the case where the first region 111 has a flat surface is illustrated, but it goes without saying that the same effect can be obtained even if the first region 111 has a surface having irregularities. For surfaces with irregularities, simple rough surface by wet etching, facet rough surface with facet surface, patterned rough surface with photolithography having a pitch of several tens of μm to several hundred nm, and several to several hundred nm. Any case of a photonic rough surface having a pitch trench shape is included.

In the present embodiment, the side wall 130 and the third region 120 are exemplified as a flat surface without unevenness, but a surface having unevenness may be used.

In the present embodiment, the case where the window layer / support substrate 106 has a flat surface is illustrated, but it goes without saying that the same effect can be obtained even if the window layer / support substrate 106 has a surface having irregularities. For surfaces with irregularities, simple rough surface by wet etching, facet rough surface with facet surface, patterned rough surface with photolithography having a pitch of several tens of μm to several hundred nm, and several to several hundred nm. Any case of a photonic rough surface having a pitch trench shape is included.

In the present embodiment, it is not described that another film is formed on the surface of the window layer / support substrate 106, but an antireflection film made of a dielectric may be provided.

After forming the light emitting element A01, Au bumps are formed on the first electrode 151 and the second electrode 161 as needed, and a laser having light absorption characteristics in GaP is linearly irradiated to perform scribing treatment, resulting in defects. After forming the line, braking processing is performed to make individual dies. Alternatively, it is linearly injured with diamond and scribed to form a defect dislocation line, and then braked to make individual dice.

When the light emitting element A01 is directly mounted on the drive board, the scribe braking process is not performed because the light emitting element A01 is mounted directly on the mounting board without performing the scribe braking process. Further, the effect of the invention is the same even if the scribe braking process is not performed.

After making individual dice, it is mounted on the drive board via Au bumps. At that time, it can be realized by crimping the die with ultrasonic waves, a temperature of 150 ° C. or higher, or both conditions.

(Second embodiment)
FIG. 4 shows a laminated structure in the middle of the light emitting element manufacturing process according to the second embodiment, FIG. 5 shows the light emitting element according to the second embodiment, and FIG. 6 shows the design top surface of the chip design of the light emitting element according to the second embodiment. The figure and the sectional view are shown.

For example, the AlGaInP-based epitaxial wafer 002 uses the organic metal vapor phase growth method (MOVPE) method on a GaAs substrate 200 as a starting substrate inclined by 15 degrees in the [001] direction, for example (Al _x Ga _1-x ). First semiconductor layer 201, (Al _x Ga _1-x ), which is a lower (n-type) clad layer composed of yIn _1-y P (0.0 ≦ x ≦ 1.0, 0.4 ≦ y ≦ 0.6) ) _Y In _1-y P (0.0 ≦ x ≦ 1.0, 0.4 ≦ y ≦ 0.6) in the active layer 202, (Al _x Ga _1-x ) _y In _1-y P (0) The second semiconductor layer 203, which is an upper (p-type) clad layer composed of 0.0 ≦ x ≦ 1.0 and 0.4 ≦ y ≦ 0.6), and the GaP window layer 205 having a thickness of 0.5 μm or more are provided. It can be obtained by sequentially laminating. Of these, the portion including the first semiconductor layer 201, the active layer 202, and the second semiconductor layer 203 is the light emitting layer portion 207. The production method is not limited to MOVPE, and may be produced by a molecular beam epitaxy (MBE) method or a chemical beam epitaxy (CBE) method.

After the formation of the GaP window layer 205, the first adhesion enhancing layer 209 is formed in contact with the GaP window layer 205. For the adhesion enhancing layer, SiO ₂ , SiN _x , ITO, etc., which are transparent to the emission wavelength, can be selected. Next, for example, a transparent substrate 250 such as GaP is prepared to form a second adhesive strengthening layer 259. For the adhesion enhancing layer, SiO ₂ , SiN _x , ITO, etc., which are transparent to the emission wavelength, can be selected.
In the present embodiment, GaP is exemplified as the transparent substrate 250, but the present invention is not limited to GaP, and is not limited to GaP, but is sapphire, quartz, gallium nitride, gallium oxide, titanium oxide, and other materials that are translucent with respect to emission wavelengths. Any can be selected.

After forming the first adhesion-enhancing layer 209 and the second adhesion-enhancing layer 259, BCB adhesive 260 is applied to at least one of the first adhesion-enhancing layer 209 and the second adhesion-enhancing layer 259 by a spin coat, and the first adhesion is performed. The reinforcing layer 209 and the second adhesive reinforcing layer 259 are superposed so as to face each other, and are bonded and bonded by applying heat of 150 ° C. or higher and a pressure of 100 N or higher. The GaP window layer 205, the first adhesive strengthening layer 209, the BCB adhesive 260, the second adhesive strengthening layer 259, and the transparent substrate 250 are the window layer and support substrate 206. In this embodiment, the case where the first adhesive strengthening layer 209 and the second adhesive strengthening layer 259 are formed is illustrated, but it is not necessary to form them.

After joining, the GaAs substrate 200, which is the starting substrate, is removed from the AlGaInP-based epitaxial wafer (this structure is not shown) to which the transparent substrate 250 is bonded by chemical etching to form the wafer 022. The chemical etching solution preferably has etching selectivity with an AlGaInP-based material, and is generally removed with an ammonia-containing etchant.

After removing the GaAs substrate 200, the first electrode 251 is formed on the first semiconductor layer 201 of the wafer 021. Further, at least the first semiconductor layer 201 and the active layer 202 are formed in the second region 225 so as to form the second region 225 in which the first semiconductor layer 201, the active layer 202, the second semiconductor layer 203 and the like are left. It is removed so as to surround it to form a third region 220. As a result, a structure having a first region 211 having a first electrode 251, a second region 225, and a third region 220 is formed. Although FIG. 5 illustrates the case where the third region 220 reaches the window layer 205, it may be stopped at the second semiconductor layer 203.

Next, the second electrode 261 is formed so as to cover at least a part of the top portion 225A of the second region 225, the side surface portion 225B, and the bottom portion 220A of the third region 220. FIG. 5 illustrates a case where the second electrode 261 is not formed on the side surface portion 225C on the first region 211 side, but it does not deny that the metal electrode is formed on the side surface portion 225C, and the side surface is not denied. The second electrode 261 may be formed in the portion 225C.
Since the heights of the top surface 225A, which is the upper surface of the first semiconductor layer 201 of the second region 225, and the upper surface of the first semiconductor layer 201 of the first region 211 are substantially the same, the height of the top surface 225A is substantially the same as that of the upper surface of the first electrode 251. The height of the upper surface of the two electrodes 261 can also be substantially the same.

Here, the area of the bottom 220A on which the second electrode 261 is formed in the third region 220 is set to 300 μm ² or more. Further, it is more preferably 700 μm ² or more. Thus, the second region 225 is provided so as to cover the top 225A of the second region 225, the side surface portion 225B of the second region 225, and at least a part of the bottom 220A of the third region 220. By forming the second electrode 261 and setting the coating area of the bottom 220A on which the second electrode 261 is formed to be 300 μm ² or more, it has sufficiently low electrical resistance, disconnection failure and peeling failure are suppressed, and flip without inclination. It can be a light emitting element that can be mounted.

Next, the dielectric portion 240 is provided in at least a part of the first region 211 where the first electrode 251 is not provided. As a result, a light emitting element A02 having a dielectric portion 240 provided on at least a part of the side wall 230 between the first region 211 and the third region 220 is obtained. The positional relationship between the first electrode 251 and the dielectric portion 240 and the second electrode 261 provided on the light emitting element A02 is as shown in the top view and the cross-sectional view of FIG.

In the present embodiment, the case where the dielectric portion 240 covers all the upper surface and the side wall 230 other than the first electrode 251 portion of the first region 211 is illustrated, but it is not always necessary to cover all of them, and a part of them is covered. You may try to cover only.

In the present embodiment, in the first region 211, the dielectric portion 240 exemplifies the structure of a single layer, but a light reflecting film or a light reflecting portion is provided between the dielectric portion 240 and the first region 211. Alternatively, the light reflecting film or the light reflecting portion may be provided on the surface side of the dielectric portion 240 that does not come into contact with the first region 211.

In the present embodiment, the case where the first region 211 has a flat surface is illustrated, but a surface having irregularities may be provided. For surfaces with irregularities, simple rough surface by wet etching, facet rough surface with facet surface, patterned rough surface with photolithography having a pitch of several tens of μm to several hundred nm, and several to several hundred nm. Any case of a photonic rough surface having a pitch trench shape is included.

In the present embodiment, the side wall 230 and the third region 220 are exemplified as a flat surface without unevenness, but may be a surface having unevenness.

In the present embodiment, the case where the window layer / support substrate 206 has a flat surface is illustrated, but a surface having irregularities may be provided. For surfaces with irregularities, simple rough surface by wet etching, facet rough surface with facet surface, patterned rough surface with photolithography having a pitch of several tens of μm to several hundred nm, and several to several hundred nm. Any case of a photonic rough surface having a pitch trench shape is included.

In the present embodiment, it is not described that another film is formed on the surface of the window layer / support substrate 206, but an antireflection film made of a dielectric may be provided.

After forming the light emitting element A02, Au bumps are formed on the first electrode 251 and the second electrode 261 as needed, and a laser having light absorption characteristics in GaP is linearly irradiated to perform scribing treatment, resulting in defects. After forming the line, braking processing is performed to make individual dies. Alternatively, it is linearly injured with diamond and scribed to form a defect dislocation line, and then braked to make individual dice.

When the light emitting element A02 is directly mounted on the drive board, the scribe braking process is not performed because the light emitting element A02 is mounted directly on the mounting board without performing the scribe braking process. Further, the effect of the invention is the same even if the scribe braking process is not performed.

After making individual dice, it is mounted on the drive board via Au bumps. At that time, it can be realized by crimping the die with ultrasonic waves, a temperature of 150 ° C. or higher, or both conditions.

(Third embodiment)
FIG. 7 shows a laminated structure in the middle of the light emitting element manufacturing process according to the third embodiment, FIG. 8 shows the light emitting element according to the third embodiment, and FIG. 9 shows the design top surface of the chip design of the light emitting element according to the third embodiment. The figure and the sectional view are shown.

For example, the AlGaInP-based epitaxial wafer 003 is placed on a GaAs substrate 300 as a starting substrate inclined by 15 degrees in the [001] direction by a metalorganic vapor phase growth method (MOVPE) method, for example, (Al _x Ga _1-x ) _y In. First semiconductor layer 301, (Al _x Ga _1-x ), which is a lower (n-type) clad layer composed of _1-y P (0.0 ≦ x ≦ 1.0, 0.4 ≦ y ≦ 0.6). Active layer 302 composed of _y In _1-y P (0.0 ≦ x ≦ 1.0, 0.4 ≦ y ≦ 0.6), (Al _x Ga _1-x ) _y In _1-y P (0. The second semiconductor layer 303, which is an upper (p-type) clad layer composed of 0 ≦ x ≦ 1.0 and 0.4 ≦ y ≦ 0.6), and the GaP window layer 305 having a thickness of 0.5 μm or more are sequentially formed. It can be obtained by stacking. Of these, the portion including the first semiconductor layer 301, the active layer 302, and the second semiconductor layer 303 is the light emitting layer portion 307. The production method is not limited to MOVPE, and may be produced by a molecular beam epitaxy (MBE) method or a chemical beam epitaxy (CBE) method.

Next, for example, a transparent substrate 350 made of GaP or the like and an AlGaInP-based epitaxial wafer 003 are wet-treated with an OH group-containing liquid. After the wet treatment, the transparent substrate 350 and the GaP window layer 305 of the AlGaInP-based epitaxial wafer 003 are superposed so as to face each other, and heat of 150 ° C. or higher and a pressure of 100 N or higher are applied to join them. The transparent substrate 350 and the GaP window layer 305 are the window layer and support substrate 306.
In the present embodiment, GaP is exemplified as the transparent substrate 350, but the present invention is not limited to GaP, and sapphire, quartz, gallium nitride, gallium oxide, titanium oxide, and other materials that are translucent with respect to emission wavelengths. Any can be selected.

After joining, the GaAs substrate 300 of the AlGaInP-based epitaxial wafer 003 is removed by chemical etching to form the wafer 031. The chemical etching solution is preferably an AlGaInP-based material and has etching selectivity, and is generally removed with an ammonia-containing etchant.

After removing the GaAs substrate 300, the first electrode 351 is formed on the first semiconductor layer 301 of the wafer 031. Further, at least the first semiconductor layer 301 and the active layer 302 are formed in the second region 325 so as to form the second region 325 in which the first semiconductor layer 301, the active layer 302, the second semiconductor layer 303 and the like are left. It is removed so as to surround it to form a third region 320. As a result, a structure having a first region 311 having a first electrode 351 and a second region 325 and a third region 320 is formed. Although FIG. 8 illustrates the case where the third region 320 reaches the GaP window layer 305, it may be stopped at the second semiconductor layer 303.

The second electrode 361 is formed so as to cover at least a part of the top portion 325A of the second region 325, the side surface portion 325B, and the bottom portion 320A of the third region 320. The figure illustrates a case where the second electrode 361 is not formed on the side surface portion 325C on the first region 311 side, but it does not deny that the metal electrode is formed on the side surface portion 325C, and the side surface portion. The second electrode 361 may be formed on the 325C.
Since the heights of the top surface 325A, which is the upper surface of the first semiconductor layer 301 of the second region 325 and the upper surface of the first semiconductor layer 301 of the first region 311 are substantially the same, the height of the top surface 325A is substantially the same as that of the upper surface of the first electrode 351. The height of the upper surface of the two electrodes 361 can also be substantially the same.

Here, the area of the bottom 320A on which the second electrode 361 is formed in the third region 320 is set to 300 μm ² or more. Further, it is more preferably 700 μm ² or more. Thus, the second region 325 is provided so as to cover the top 325A of the second region 325, the side surface 325B of the second region 325, and at least a part of the bottom 320A of the third region 320. By forming the second electrode 361 and setting the coating area of the bottom 320A on which the second electrode 361 is formed to be 300 μm ² or more, it has sufficiently low electrical resistance, disconnection failure and peeling failure are suppressed, and flip without inclination. It can be a light emitting element that can be mounted.

Next, the dielectric portion 340 is provided in at least a part of the first region 311 where the first electrode 351 is not provided. As a result, a light emitting device A03 having a dielectric portion 340 provided at least a part of the side wall 330 between the first region 311 and the third region 320 is obtained. The positional relationship between the first electrode 351 and the dielectric portion 340 and the second electrode 361 provided on the light emitting element A03 is as shown in the top view and the cross-sectional view of FIG.

In the present embodiment, the case where the dielectric portion 340 covers all of the upper surface and the side wall 330 other than the first electrode 351 portion of the first region 311 is illustrated, but it is not always necessary to cover all of them. It may be possible to cover only the portion.

In the present embodiment, in the first region 311 the dielectric portion 340 exemplifies the structure of a single layer, but a light reflecting film or a light reflecting portion is provided between the dielectric portion 340 and the first region 311. Alternatively, the light reflecting film or the light reflecting portion may be provided on the surface side of the dielectric portion 340 that does not come into contact with the first region 311.

In the present embodiment, the case where the first region 311 has a flat surface is illustrated, but a surface having irregularities may be provided. For surfaces with irregularities, simple rough surface by wet etching, facet rough surface with facet surface, patterned rough surface with photolithography having a pitch of several tens of μm to several hundred nm, and several to several hundred nm. Any case of a photonic rough surface having a pitch trench shape is included.

In the present embodiment, the side wall 330 and the third region 320 are exemplified as a flat surface without unevenness, but may be a surface having unevenness.

In the present embodiment, the case where the window layer / support substrate 306 has a flat surface is illustrated, but it goes without saying that the same effect can be obtained even if the window layer / support substrate 306 has a surface having irregularities. For surfaces with irregularities, simple rough surface by wet etching, facet rough surface with facet surface, patterned rough surface with photolithography having a pitch of several tens of μm to several hundred nm, and several to several hundred nm. Any case of a photonic rough surface having a pitch trench shape is included.

In the present embodiment, it is not described that another film is formed on the surface of the window layer / support substrate 306, but an antireflection film made of a dielectric may be provided.

After forming the light emitting element A03, Au bumps are formed on the first electrode 351 and the second electrode 361 as needed, and a laser having light absorption characteristics in GaP is linearly irradiated to perform scribing treatment, resulting in defects. After forming the line, braking processing is performed to make individual dies. Alternatively, it is linearly injured with diamond and scribed to form a defect dislocation line, and then braked to make individual dice.

When the light emitting element A03 is directly mounted on the drive board, the scribe braking process is not performed because the light emitting element A03 is mounted directly on the mounting board without performing the scribe braking process. Further, the effect of the invention is the same even if the scribe braking process is not performed.

After making individual dice, it is mounted on the drive board via Au bumps. At that time, it can be realized by crimping the die with ultrasonic waves, a temperature of 150 ° C. or higher, or both conditions.

Hereinafter, the present invention will be described in detail with reference to examples, but this is not limited to the present invention.

(Example 1)
A light emitting device was manufactured based on the first embodiment (FIG. 1-3).
A substrate (starting substrate) made of GaAs (001) was prepared as a starting substrate, and a double hetero layer (light emitting layer) as a functional layer was formed on this substrate by the MOVPE method. The light emitting layer was formed by sequentially laminating a lower clad layer (first semiconductor layer), an active layer, and an upper clad layer (second semiconductor layer).
As the first semiconductor layer and the second semiconductor layer, the composition of (Al _x Ga _1-x ) _y In _1-y P (0.6 ≦ x ≦ 1.0, 0.4 ≦ y ≦ 0.6) is used. Selected.
As for the first semiconductor layer, the n-type AlInP clad layer is 0.7 μm (doping concentration 3.0 × 10 ¹⁷ / cm ³ ), and the n-type Al _0.85 GaInP layer is 0.3 μm (doping concentration 1.0 × 10 ¹⁷ ). It has a two-layer structure of / cm ³ ).
The active layer is selected from (Al _x Ga _1-x ) _y In _1-y P (0.15 ≦ x ≦ 0.80, 0.4 ≦ y ≦ 0.6), and the compositions x and y are determined according to the wavelength. changed. In this example, a multiple active layer was used as the active layer. The film thicknesses of the active layer and the barrier layer were changed depending on the desired wavelength, and were adjusted according to the wavelength in the range of 4 to 12 nm, respectively.
As for the second semiconductor layer, the p-type AlInP clad layer is 0.9 μm (doping concentration 3.0 × 10 ¹⁷ / cm ³ ), and the p-type Al _0.6 GaInP layer is 0.1 μm (doping concentration 1.0 × 10 ¹⁷ ). It has a two-layer structure of / cm ³ ).
An intermediate composition layer made of GaInP was formed on the light emitting layer. Next, a GaP window layer having a thickness of 1.0 μm was sequentially laminated on the intermediate composition layer. A GaP epitaxial layer (window layer and support substrate) having a thickness of 100 μm was formed in contact with the GaP window layer. The window layer and support substrate was formed by a hydride vapor phase deposition (HVPE) method.
Next, the GaAs substrate was removed with an ammonia-containing etchant. The etch stop layer was subsequently removed.
Next, a part of the first semiconductor layer and the active layer was cut out to expose a part of the second semiconductor layer.
Next, a dielectric layer was formed so as to cover the notched side surface, and an opening was provided. The dielectric layer was SiO ₂ , and a film was formed by a P-CVD method using TEOS and O ₂ . After forming a dielectric layer on the opening, a mask portion was formed by a photolithography method, and an exposed portion was formed by a wet etching method using BHF.
After removing the GaAs substrate, the first electrode was formed on the first semiconductor layer. Further, the first semiconductor layer layer and the active layer are removed so as to surround the second region so as to form a second region which is a separation portion where the first semiconductor layer, the active layer, the second semiconductor layer, etc. are left. Then, a third region was formed. Then, the second electrode was formed so as to cover a part of the top of the second region, the side surface of the second region, and the bottom of the third region (see FIG. 2-3).
Here, the coating area of the bottom on which the second electrode was formed was set to 314 μm ² .
A laser having a light absorption characteristic in GaP was linearly irradiated to perform scribe treatment, and after forming defective lines, braking treatment was performed to form individual dice.
After making individual dies, they were mounted on the drive board via Au bumps.

(Example 2)
A light emitting device was manufactured under the same conditions as in Example 1 except that the coating area of the bottom on which the second electrode was formed was 491 μm ² , and mounted on a drive substrate.

(Example 3)
A light emitting device was manufactured under the same conditions as in Example 1 except that the coating area of the bottom on which the second electrode was formed was 707 μm ² , and mounted on a drive substrate.

(Example 4)
A light emitting device was manufactured under the same conditions as in Example 1 except that the coating area of the bottom on which the second electrode was formed was 962 μm ² , and mounted on a drive substrate.

(Example 5)
A light emitting device was manufactured under the same conditions as in Example 1 except that the coating area of the bottom on which the second electrode was formed was 1257 μm ² , and mounted on a drive substrate.

(Example 6)
A light emitting device was manufactured under the same conditions as in Example 1 except that the coating area of the bottom on which the second electrode was formed was 1590 μm ² , and mounted on a drive substrate.

(Comparative Example 1)
As shown in FIG. 10, the point corresponding to the second region in Example 1 was not formed, the second electrode 461 was formed thickly, and the area of the bottom on which the second electrode was formed was 7665 μm ² . Except for this, the light emitting element A04 was formed under the same conditions as in Example 1 and mounted on the drive substrate. FIG. 11 shows a design top view and a cross-sectional view of the chip design of Comparative Example 1.

(Comparative Example 2)
As shown in FIG. 12, the second electrode 561 is formed from the insulating film 540 over the window / support substrate 506 without forming the portion corresponding to the second region in the first embodiment. The light emitting element A05 was formed under the same conditions and mounted on the drive substrate.

(Comparative Example 3)
A light emitting device was manufactured under the same conditions as in Example 1 except that the coating area of the bottom on which the second electrode was formed was 177 μm ² , and mounted on a drive substrate.

(Comparative Example 4)
A light emitting device was manufactured under the same conditions as in Example 1 except that the coating area of the bottom on which the second electrode was formed was 113 μm ² , and mounted on a drive substrate.

FIG. 13 shows the tilt occurrence defect rate of the dice at the time of mounting in Examples 1 to 3 and Comparative Example 1. In Comparative Example 1, since the height variation between the first electrode and the second electrode is large, tilt failure is likely to occur. On the other hand, in Examples 1 to 3, since the variation in the height difference between the first electrode and the second electrode is small, the defect occurrence rate is small.

In Comparative Example 1, it is possible to adjust the height of the second electrode to match the height of the first electrode as much as possible, but it is difficult to match the height from the deeply dug surface, and it is in the wafer surface. It is extremely difficult to match the heights of the first electrode and the second electrode in principle because of the variation in the height. If there is a difference in height between the first electrode and the second electrode, the dice light extraction surface is tilted due to the height difference, and defects such as deviation of the directivity angle are likely to occur.

FIG. 14 shows the disconnection defect rate due to the second electrode in Examples 1 to 3 and Comparative Example 2. In Comparative Example 2, the second electrode is formed on the insulating film, and a large amount of disconnection occurs due to the difference in expansion coefficient due to heat during the process or the heat generation of the light emitting element during operation. There is. On the other hand, in Examples 1 to 3, it can be seen that the disconnection defect due to heat hardly occurs, and the second electrode can be formed satisfactorily and stably.

FIG. 15 shows the rate at which mounting defects occur due to peeling of electrodes during mounting in Examples 1 to 3 and Comparative Example 2. In Comparative Example 2, a large amount of peeling occurs at the interface between the insulating film and the electrode, which increases the defect rate. However, in Examples 1 to 3, since there is no interface that causes peeling, defects occur. It can be seen that there is a significant improvement.

Table 1 shows the measurement results of the forward voltage (forward voltage; VF) at IF = 20 mA in Examples 1 to 6 and Comparative Examples 1, 3 and 4.

FIG. 16 shows the relationship between the coating area (contact area) at the bottom and the average forward voltage (forward voltage; VF) in Examples 1 to 6 and Comparative Examples 1, 3 and 4. The coating area at the bottom is shown on the horizontal axis as the contact area, and the VF at IF = 20 mA is shown on the vertical axis. It can be seen that the VF tends to increase (increase) as the contact area decreases. In Examples 1 to 6, VF ≦ 2.35V is realized by providing a contact area area of 300 μm ² or more. However, in Comparative Examples 3 and 4, since the contact area area was less than 300 μm ² , the VF was extremely high. In Comparative Example 1, the second electrode 461 is thickly formed, but since the contact area region is 300 μm ² or more, a low VF of VF = 2.18V is obtained.

The present invention is not limited to the above embodiment. The above-described embodiment is an example, and any one having substantially the same structure as the technical idea described in the claims of the present invention and having the same effect and effect is the present invention. Is included in the technical scope of.

100 ... GaAs substrate (starting substrate), 101 ... first semiconductor layer, 102 ... active layer,
103 ... Second semiconductor layer, 104 ... Intermediate composition layer, 105 ... GaP window layer,
106 ... Window layer and support substrate, 107 ... Light emitting layer part,
001 ... AlGaInP-based epitaxial wafer,
011 ... Wafer from which the starting substrate has been removed, 111 ... First region,
120 ... third area, 120A ... bottom,
125 ... second area, 125A ... top, 125B ... side, 125C ... side,
130 ... side wall, 140 ... dielectric part, 151 ... first electrode, 161 ... second electrode,
A01 ... Light emitting element,
200 ... GaAs substrate (starting substrate), 201 ... first semiconductor layer, 202 ... active layer,
203 ... Second semiconductor layer, 205 ... GaP window layer, 206 ... Window layer and support substrate,
207 ... Light emitting layer portion, 209 ... First adhesion enhancing layer,
002 ... AlGaInP-based epitaxial wafer,
021 ... Wafer from which the starting substrate has been removed, 211 ... First region,
220 ... third area, 220A ... bottom,
225 ... second area, 225A ... top, 225B ... side, 225C ... side,
230 ... Side wall, 240 ... Dielectric part, 250 ... Transparent substrate, 251 ... First electrode,
259 ... Second Adhesive Strengthening Layer, 260 ... BCB Adhesive, 261 ... Second Electrode,
A02 ... Light emitting element,
300 ... GaAs substrate (starting substrate), 301 ... first semiconductor layer, 302 ... active layer,
303 ... Second semiconductor layer, 305 ... GaP window layer, 306 ... Window layer and support substrate,
307 ... Light emitting layer part 003 ... AlGaInP-based epitaxial wafer,
031 ... Wafer from which the starting substrate has been removed, 311 ... First region, 320 ... Third region,
320A ... bottom, 325 ... second region, 325A ... top,
325B ... side surface, 325C ... side surface, 330 ... side wall, 340 ... dielectric part,
350 ... transparent substrate, 351 ... first electrode,
361 ... Second electrode, A03 ... Light emitting element,
461 ... Second electrode, A04 ... Light emitting element,
506 ... Window layer and support substrate, 540 ... Dielectric part, 561 ... Second electrode,
A05 ... Light emitting element.

Claims (4)

The window layer / support substrate and the second conductive type second semiconductor layer, the active layer, and the first conductive type first semiconductor layer provided on the window layer / support substrate from the window layer / support substrate side. In a light emitting element having a light emitting layer portion included in order,
The light emitting device includes a second semiconductor layer, an active layer, a first semiconductor layer, and a first region having a first electrode in contact with the first semiconductor layer.
The second semiconductor layer, the active layer, the second region having the first semiconductor layer, and
The first region and the second region are separated from each other by removing at least a part of the first semiconductor layer, the active layer, and the window layer / supporting substrate so as to surround the second region. Area 3 and
It covers the top of the second region, the side surface of the second region, and at least a part of the third region, and also supports the second semiconductor layer or the window layer in the third region. It has a second electrode in contact with the substrate and has
The coating area of the second electrode in the third region is 300 μm ² or more, and the coating area is 300 μm 2.
The light emitting layer portion is (Al _x Ga _1-x ) _y In _1-y P (0.0 ≦ x ≦ 1.0, 0.4 ≦ y ≦ 0.6).
In the first region, at least a part of the portion where the first electrode is not provided has a dielectric portion.
The light emitting element is characterized in that the second electrode is not provided in the third region between the first region and the second region . The light emitting element according to claim 1, wherein the window layer / support substrate is GaAs _z P _1-z (0.0 ≦ z ≦ 0.1). It is a manufacturing method of a light emitting element.
A step of forming a light emitting layer portion by epitaxially growing at least a first semiconductor layer, an active layer, and a second semiconductor layer on a starting substrate in this order.
The process of forming the window layer and support substrate by epitaxial growth or bonding,
The step of removing the starting substrate to expose the first semiconductor layer and
The step of forming the first electrode on a part of the surface of the first semiconductor layer and
The first region including the first electrode and the second region not including the first electrode and having the first semiconductor layer and the active layer, wherein the first semiconductor layer and the active layer are the same. At least a part of the first semiconductor layer, the active layer, and the window layer / support substrate around the second region so as to form the second region separated from the first region. The process of removing to form a third region,
No second electrode is formed in the third region between the first region and the second region, and the top of the second region, the side surface portion of the second region, and the second region are formed. It has a step of forming the second electrode over at least a part of the region of 3.
The coating area of the second electrode in the third region is set to 300 μm ² or more.
The light emitting layer portion is defined as (Al _x Ga _1-x ) _y In _1-y P (0.0 ≦ x ≦ 1.0, 0.4 ≦ y ≦ 0.6).
A method for manufacturing a light emitting device, characterized in that a dielectric portion is formed in at least a part of a portion of the first region where the first electrode is not provided. The method for manufacturing a light emitting element according to claim 3, wherein the window layer and support substrate is GaAs _z P _1-z (0.0 ≦ z ≦ 0.1).

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