JP2014022380A - Semiconductor element and manufacturing method of the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make it possible to inhibit the occurrence of peeling at a junction part even when flip-chip mounting is performed.SOLUTION: A semiconductor element comprises: a semiconductor layer 20 having at least a first conductivity type layer 21 and a second conductivity type layer 23; a first electrode 50 formed to form ohmic junction with an exposed surface of the first conductivity type layer 21 of the semiconductor layer 20; and a first electrode pad 60 formed to have a terminal face 63 which is arranged on an upper side of an exposed surface of the second conductivity layer 23 of the semiconductor layer 20 and used for junction with the outside, a junction surface 61 which directly forms junction with the exposed surface of the second conductivity type layer 23 and a connection part 62 which is electrically connected with the first electrode 50.

Description

  The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly to a semiconductor device used by being flip-chip mounted and a manufacturing method thereof.

  In recent years, light-emitting elements such as LEDs (Light Emitting Diodes) are widely used as a kind of semiconductor elements. For light-emitting elements such as LEDs, it has been proposed to form bumps with the surface of the Ni layer covered with an Au layer on the element side and flip-chip mounting on the printed wiring board using the bumps. (For example, refer to Patent Document 1).

As a light emitting element corresponding to flip chip mounting, for example, there is an element configured as shown in FIG. 4 (see, for example, Patent Document 2). The light emitting device of the illustrated example includes a semiconductor layer 20 in which an n-type first conductive type layer 21, a light emitting layer 22, and a p-type second conductive type layer 23 are sequentially stacked on a sapphire substrate (not shown). Yes. The semiconductor layer 20 has a groove structure 24 formed by etching from the second conductivity type layer 23 side. The groove structure 24 divides the second conductivity type layer 23 into a plurality of regions, and The first conductivity type layer 21 has an exposed portion. A second electrode 30 is formed on one of the divided second conductivity type layers 23, and a second electrode pad 40 is formed on the second electrode 30. On the other second conductivity type layer 23, the first electrode 110 is formed so as to extend to the exposed portion of the first conductivity type layer 21 at the bottom of the groove structure 24. A first electrode pad 120 is formed on the electrode 110.
In the light emitting device having such a configuration, the upper surfaces of the first electrode pad 120 and the second electrode pad 40 become terminal surfaces used for bonding to the outside, and bumps are formed on the terminal surfaces. Since the heights of the upper surfaces of the first electrode pad 120 and the second electrode pad 40 can be easily aligned, it is possible to suppress the occurrence of inconvenience such as tilting of the element during flip chip mounting.

JP 2006-128457 A JP 2011-142308 A

  However, in a conventional light emitting device, when bumps are formed in advance on the device side and flip chip mounting is performed using the bumps, depending on the interface state between the bumps and the formation surface, a substrate by flip chip mounting is used. It has been found that there is a possibility that peeling occurs at the joint portion (particularly, the joint portion between the bump formed by plating and the formation surface) after the element is assembled upward.

  SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor element and a method for manufacturing the same that can prevent peeling at a joint portion even when flip chip mounting is performed.

In order to achieve the above-described object, the inventor of the present application first examined factors that cause separation at the joint portion.
Specifically, for example, bumps are previously formed as disclosed in Patent Document 1 on the upper surface of an electrode pad that is a bump formation planned surface in a light emitting element having a configuration disclosed in Patent Document 2 (see FIG. 4). We examined the case to keep. In this case, it has been found that a problem that the bump formed by plating on the first electrode pad 120 may be peeled off may occur. This is presumed to be greatly affected by the interface state (particularly the surface roughness) between the bump and the first electrode pad 120 that is the formation surface thereof. More specifically, in the separation of the joint portion between the bump and the first electrode pad 120, the interface between them (particularly the upper surface of the first electrode pad 120) is not flat, and the surface becomes rough enough to produce fine irregularities. If this is the case, it is considered that voids or the like that may occur in the concave and convex portions have an adverse effect. Then, it is considered that the interface state between the first electrode pad 120 and the first electrode 110 below the surface roughness of the first electrode pad 120 has a great influence. That is, when the surface of the first electrode 110 is rough, the surface of the first electrode pad 120 laminated on the surface is also rough as in the case of the first electrode 110. Therefore, it is considered that in order to suppress separation of the joint portion, it is only necessary to flatten the upper surfaces of the first electrode 110 and the first electrode pad 120 so as to suppress the surface roughness to a predetermined value or less.
However, the first electrode 110 needs to have a low-resistance ohmic property with respect to the first conductivity type layer 21. In order to provide ohmic properties, for example, it may be possible to perform a heat treatment at a predetermined temperature while using a specific type of metal material as a material for forming the first electrode 110. The surface becomes rough to the extent that fine irregularities are formed on the surface of one electrode 110. That is, in order to provide ohmic properties, the surface of the first electrode 110 may have to be rough.
Based on these points, the inventor of the present application made further intensive studies. In other words, since the electrode structure in the light emitting element is generally configured using a metal thin film, it is considered rare that attention is paid to the surface roughness because the uniformity and conductivity of the film are emphasized. The inventor intensively studied paying attention to the surface roughness. As a result, the inventor of the present application does not form the first electrode pad 120 on the first electrode 110 while ensuring the electrical connection with the first electrode 110, and instead of forming the first electrode pad 120 on the first electrode 110. A region on the upper surface of the first electrode pad (hereinafter referred to as “terminal surface”) which is formed so as to be directly bonded to the second conductive type layer 23 located below, and is to be a surface on which an external connection terminal such as a bump is to be formed. If the surface of the first electrode 110 is rough in order to provide ohmic properties, the terminal of the first electrode pad 120 is not affected by this. It came to the idea that the surface could be flattened.
The present invention has been made based on the above-described new idea by the present inventors.

The first aspect of the present invention is:
A semiconductor layer having at least a first conductivity type layer and a second conductivity type layer;
A first electrode formed in ohmic contact with an exposed surface of the first conductivity type layer in the semiconductor layer;
A terminal surface that is arranged to be positioned above the exposed surface of the second conductivity type layer in the semiconductor layer and is used for bonding to the outside, and a bonding surface that is directly bonded to the exposed surface of the second conductivity type layer And a first electrode pad formed having a connection portion electrically connected to the first electrode,
A semiconductor device comprising:
The second aspect of the present invention is:
A semiconductor layer having at least a first conductivity type layer and a second conductivity type layer;
A first electrode formed in ohmic contact with an exposed surface of the first conductivity type layer in the semiconductor layer;
A terminal surface that is arranged to be positioned above the exposed surface of the second conductivity type layer in the semiconductor layer and is used for bonding to the outside, and a bonding surface that is directly bonded to the exposed surface of the second conductivity type layer And a first electrode pad formed having a connection portion electrically connected to the first electrode,
A bump made of a metal material formed on the terminal surface of the first electrode pad;
A semiconductor device comprising:
According to a third aspect of the present invention, in the invention according to the first or second aspect,
The semiconductor layer is a group III nitride semiconductor layer,
The first electrode is formed of a metal material containing aluminum,
The first electrode pad is formed of a metal material having a lower aluminum content than the first electrode.
According to a fourth aspect of the present invention, in the invention according to the first or second aspect,
The semiconductor layer is for a light emitting element in which the first conductive type layer and the second conductive type layer are arranged with a light emitting layer interposed therebetween.
According to a fifth aspect of the present invention, in the invention described in the fourth aspect,
The semiconductor layer has a groove structure portion dug in the stacking direction of the first conductivity type layer, the light emitting layer, and the second conductivity type layer, and the light emitting region and the non-light emitting region are divided by the groove structure portion. And the exposed surface of the first conductivity type layer is formed at the bottom of the groove structure portion,
The first electrode pad is formed so as to be directly bonded to the exposed surface of the second conductivity type layer in the non-light emitting region,
On the exposed surface of the second conductivity type layer in the light emitting region, a second electrode formed so as to be directly bonded to the exposed surface, and electrically connected to the second electrode and bonded to the outside A second electrode pad having a terminal surface to be used is formed.
According to a sixth aspect of the present invention, in the invention according to the fifth aspect,
A bump made of a metal material is formed on the terminal surface of the second electrode pad.
The seventh aspect of the present invention is
Forming a semiconductor layer having a stacked structure including a first conductivity type layer, a light emitting layer, and a second conductivity type layer on the substrate in order from the substrate side;
A groove structure is formed by etching from the second conductivity type layer side, the semiconductor layer is divided into a light emitting region and a non-light emitting region by the groove structure, and the first conductive layer is formed at the bottom of the groove structure. Exposing the mold layer;
Forming a first electrode joined to an exposed surface of the first conductivity type layer at least at the bottom of the groove structure with a metal material containing aluminum;
Performing a heat treatment on the first electrode to bring the first electrode into ohmic contact with the exposed surface of the first conductivity type layer;
A terminal surface that has a connection portion that is electrically connected to the first electrode, has a bonding surface that directly bonds to the exposed surface of the second conductivity type layer in the non-light emitting region, and is used for bonding to the outside. Forming a first electrode pad configured to be positioned above the bonding surface with a metal material having an aluminum content lower than that of the first electrode. is there.
According to an eighth aspect of the present invention, in the invention according to the seventh aspect,
Forming a second electrode on an exposed surface of the second conductivity type layer in the light emitting region;
Forming a second electrode pad having a terminal surface used for bonding to the outside on the second electrode;
Forming bumps made of a metal material on the terminal surface of the first electrode pad and on the terminal surface of the second electrode pad, respectively.

  According to the present invention, even when flip chip mounting is performed, it is possible to suppress the occurrence of peeling at the joint portion.

It is a sectional side view which shows the example of schematic structure of the light emitting element to which this invention was applied. It is explanatory drawing which shows the procedure of the manufacturing method of the light emitting element to which this invention was applied. It is a sectional side view which shows the other schematic structural example of the light emitting element to which this invention was applied. It is a sectional side view (the 1) which shows the example of schematic structure of the conventional light emitting element. It is a sectional side view (the 2) which shows the schematic structural example of the conventional light emitting element.

Hereinafter, a semiconductor device and a manufacturing method thereof according to the present invention will be described with reference to the drawings.
In the present embodiment, a light-emitting element is taken as an example of a semiconductor element, and description will be made by dividing into items in the following order.
1. 1. Configuration of light emitting element 2. Manufacturing procedure of light emitting element Effects of the present embodiment 4. Modifications etc.

<1. Configuration of light emitting element>
First, the structure of the light emitting element will be described.
FIG. 1 is a side sectional view showing a schematic configuration example of a light emitting device to which the present invention is applied. In addition, in the figure, the same code | symbol is attached | subjected to the component same as the light emitting element (refer FIG. 4) of a conventional structure.

  The light emitting device of the illustrated example includes a semiconductor layer 20 in which a first conductive type layer 21, a light emitting layer 22, and a second conductive type layer 23 are sequentially stacked on a light-transmitting sapphire substrate 10. Yes. The semiconductor layer 20 is, for example, a group III nitride semiconductor layer in which the first conductivity type layer 21 is n-type AlGaN, the light emitting layer 22 is AlInGaN, and the second conductivity type layer 23 is p-type AlGaN. The p-type may be reversed, and GaN other than AlGaN, InGaN, or the like may be used as a semiconductor material.

  Further, the semiconductor layer 20 has a groove structure portion 24 dug in the stacking direction of the first conductivity type layer 21, the light emitting layer 22, and the second conductivity type layer 23. That is, the groove structure 24 is formed in the semiconductor layer 20 by etching from the second conductivity type layer 23 side. Then, the second conductive type layer 23 is divided into a plurality of regions of the light emitting region 25 and the non-light emitting region 26 by the groove structure portion 24, and the first conductivity type is formed at the bottom of the groove structure portion 24. An exposed surface of the layer 21 is formed. The “bottom part” here may be at least one of the bottom surface of the groove structure 24 and the side wall surface in the vicinity of the bottom surface. Therefore, if the depth of formation of the groove structure portion 24 is a depth that divides the second conductivity type layer 23, even if it is etched away to the middle of the first conductivity type layer 21 as shown in the figure, The etching may be stopped when the first conductivity type layer 21 is exposed, or the first conductivity type layer 21 may be completely removed. When the first conductivity type layer 21 is completely removed, the exposed side wall surface of the first conductivity type layer 21 and the first electrode 50 described later are electrically connected. And about the 1st conductivity type layer 21, the electrical connection of the light emission area | region 25 and the non-light emission area | region 26 shall be ensured by a certain means. In addition, the formation width of the groove structure portion 24 may be a width sufficient to divide the second conductivity type layer 23.

  In the semiconductor layer 20 in which the groove structure portion 24 is formed, at least the surface of the second conductivity type layer 23 (that is, the exposed surface of the second conductivity type layer 23) is the bottom surface and the side wall surface of the groove structure portion 24. In contrast, since the epitaxial growth surface is maintained instead of the etched surface, flatness can be maintained as compared with the etched surface. Therefore, it can be said that the surface of the second conductivity type layer 23 is a surface excellent in flatness in both the light emitting region 25 and the non-light emitting region 26.

Of the plurality of regions divided by the groove structure 24, the second electrode 30 is formed on the second conductivity type layer 23 in the light emitting region 25. The second electrode 30 is preferably formed by using an Au-based metal material that is easy to ensure a low-resistance ohmic property with respect to the p-type second conductivity type layer 23. Specifically, for example, Ni / Au is used. It is conceivable to form it by using. However, it can also be formed using other known metal materials.
A second electrode pad 40 is formed on the second electrode 30. The second electrode pad 40 has an upper surface serving as a terminal surface 41, and may be formed using, for example, Ti / Au. However, it can also be formed using other known metal materials.

  On the other hand, the first electrode 50 is formed on the second conductivity type layer 23 in the non-light emitting region 26 among the plurality of regions divided by the groove structure 24. However, the first electrode 50 is formed not to cover the entire surface of the second conductivity type layer 23 but to partially leave the exposed surface of the second conductivity type layer 23. Further, the first electrode 50 is formed so as to extend from the second conductivity type layer 23 to the exposed portion of the first conductivity type layer 21 at the bottom of the groove structure 24. As a result, the first electrode 50 has a joint surface 51 that joins the exposed portion of the first conductivity type layer 21 in the groove structure 24. The first electrode 50 having such a configuration is preferably formed using an Al-based metal material that can easily ensure low-resistance ohmic properties with respect to the n-type first conductivity type layer 21. Specifically, For example, it is conceivable to form using Ti / Al / Ti or Ti / Al. However, it can also be formed using other known metal materials.

  A first electrode pad 60 is formed on the exposed surface of the second conductivity type layer 23 not covered with the first electrode 50 on the second conductivity type layer 23 in the non-light emitting region 26. . Since the first electrode pad 60 is formed on the exposed surface of the second conductivity type layer 23, the first electrode pad 60 has a bonding surface 61 that is directly bonded to the exposed surface of the second conductivity type layer 23. The first electrode pad 60 has a connection surface 62 that is electrically connected to the first electrode 50, and its upper surface serves as a terminal surface 63. The terminal surface 63 is a terminal of the second electrode pad 40. It is formed so as to be almost the same height as the surface 41. As a result, the first electrode pad 60 is disposed so as to be positioned above the exposed surface of the second conductivity type layer 23 and used for bonding to the outside. It has the joint surface 61 directly joined to the exposed surface, and the connection part 62 electrically connected to the first electrode 50. Here, “located above the exposed surface” means that the exposed surface of the second conductivity type layer 23 (that is, the bonding surface 61 of the first electrode pad 60) and the terminal surface 63 of the first electrode pad 60. In other words, it is arranged to have a planarly overlapping portion. That is, it is only necessary to have an overlapping portion, and the joining surface 61 and the terminal surface 63 do not necessarily coincide with each other in a planar manner. Further, “directly bonded to the exposed surface” means a state in which there is no intervening portion between the exposed surface of the second conductivity type layer 23 and the bonding surface 61 of the first electrode pad 60. . It is conceivable that the first electrode pad 60 having such a configuration is formed using a metal material that does not contain Al at all, such as Ti / Au. However, even if it is another known metal material, even if it contains a metal material that does not contain Al at all, or if it contains Al, its content is lower than that of the material for forming the first electrode 50 and is only a slight content. Any metal material can be used as a material for forming the first electrode pad 60.

  Bumps 70 used for bonding to the outside are formed on the terminal surface 63 of the first electrode pad 60 and the terminal surface 41 of the second electrode pad 40, respectively. For example, the bump 70 may be formed by covering the surface of a Ni plating layer to which P is added with an Au plating layer. However, it can also be formed using other known metal materials.

  The light emitting element having the above configuration is used by being flip-chip mounted on a printed wiring board (not shown). Specifically, for example, in a state where the top and bottom of the state shown in the figure are reversed, the light emitting element is placed on the printed wiring board so that the bump 70 contacts the electrode portion on the printed wiring board. The electrode part is joined. In this way, the light emitting element is flip-chip mounted on the printed wiring board. At this time, if the heights of the terminal surfaces 41 and 63 of the light emitting element are uniform and the bumps 70 are formed at substantially the same height, inconvenience such as tilting of the light emitting element occurs. Can be suppressed. This can be said to be very effective for suppressing the occurrence of poor connection during flip chip mounting.

  The flip-chip mounted light emitting element emits light toward the outside by applying a voltage between the first electrode pad 60 and the second electrode pad 40 via the bump 70. Specifically, when a voltage is applied between the first electrode pad 60 and the second electrode pad 40 via the bump 70, electrons flow from the first electrode pad 60 to the first conductivity type layer 21 through the first electrode 50. Then, holes flow from the second electrode pad 40 to the second conductivity type layer 23 through the second electrode 30. Then, in the light emitting layer 22 in the light emitting region 25, electrons and holes are recombined to generate light. This light is emitted from the light emitting layer 22 to the outside through the first conductive type layer 21 and the translucent sapphire substrate 10.

  Note that the state of the light-emitting element described here is merely one example illustrated for the description, and it is needless to say that the state is not limited to the state illustrated in the drawing or the state in which the top and bottom are reversed.

<2. Manufacturing procedure of light emitting element>
Next, a manufacturing procedure of the light emitting element having the above-described configuration will be described.
FIG. 2 is an explanatory diagram showing a procedure of a method for manufacturing a light emitting device to which the present invention is applied.

The light emitting device having the above-described configuration is manufactured according to the following procedure.
First, a sapphire substrate 10 formed in a plate shape having a desired thickness is prepared, and a first conductivity type layer 21, a light emitting layer 22, and a second conductivity type layer are sequentially formed on the sapphire substrate 10 from the sapphire substrate 10 side. A step of forming a semiconductor layer 20 having a laminated structure having 23 is performed. The first conductive type layer 21, the light emitting layer 22, and the second conductive type layer 23 are formed by a known film formation method using, for example, a group III nitride semiconductor material, similarly to the light emitting element having the conventional configuration (see FIG. 4). You can use it. The upper surface of the second conductivity type layer 23 formed in this way is a surface having excellent flatness.

  When the semiconductor layer 20 is formed on the sapphire substrate 10, as shown in FIG. 2A, a step of forming the groove structure portion 24 by etching from the second conductivity type layer 23 side with respect to the semiconductor layer 20. I do. Etching may be performed by using a known method in consideration of the material for forming the semiconductor layer 20. One specific example is reactive ion etching (RIE). As described above, the etching depth divides the second conductivity type layer 23 into the light emitting region 25 and the non-light emitting region 26 and exposes the first conductivity type layer 21 at the bottom of the groove structure 24. Any depth is sufficient.

  Thereafter, as shown in FIG. 2B, a step of forming the second electrode 30 on the exposed surface of the second conductivity type layer 23 in the light emitting region 25 is performed. The second electrode 30 may be formed by a known film deposition method such as sputtering using an Au-based metal material (for example, Ni / Au) that can easily ensure ohmic properties with respect to the second conductivity type layer 23. At this time, since the upper surface of the second conductivity type layer 23 is a surface having excellent flatness, the upper surface of the second electrode 30 formed thereon is also free from surface roughness and has excellent flatness. Become.

  Next, as shown in FIG. 2C, a step of forming the first electrode 50 is performed. In this step, first, a resist 52 is formed on the second conductivity type layer 23 in the non-light emitting region 26. The resist 52 is partially formed on the second conductivity type layer 23 so as to correspond to a portion that becomes an exposed surface of the second conductivity type layer 23 without being covered with the first electrode 50. As a forming material and a forming method of the resist 52, a known technique may be used. After the formation of the resist 52, the first electrode 50 is subsequently formed. At this time, the first electrode 50 is exposed not only on the second conductive type layer 23 in the non-light emitting region 26 but also on the exposed portion of the first conductive type layer 21 on the bottom of the groove structure 24 from the second conductive type layer 23. The film is formed so as to extend up to. The first electrode 50 may be formed by a known technique such as sputtering using an Al-based metal material (for example, Ti / Al / Ti or Ti / Al). Then, after the first electrode 50 is formed, the resist 52 is removed. Such a lift-off process extends to the exposed portion of the first conductivity type layer 21 in the groove structure 24 and partially covers the second conductivity type layer instead of covering the entire surface on the second conductivity type layer 23. Thus, the first electrode 50 is formed in such a manner as to leave the exposed surface of 23.

  After the removal of the resist 52, subsequently, a process of performing a heat treatment on the first electrode 50 is performed so that the first electrode 50 is in ohmic contact with the exposed surface of the first conductivity type layer 21. Specifically, heat treatment is performed on the first electrode 50 in a predetermined gas atmosphere, for example, at 400 ° C. to 600 ° C. The heat treatment may be performed by a known method. After the heat treatment, since the first electrode 50 is formed of an Al-based metal material, the surface of the first electrode 50 may become rough enough to cause unevenness due to Al diffusion or the like. . However, the influence of such a heat treatment extends to the first electrode 50 but does not reach the semiconductor layer 20 where Al diffusion or the like cannot occur. Therefore, the exposed surface of the second conductivity type layer 23 protected by the resist 52 becomes a surface excellent in flatness without being roughened even after the heat treatment.

Here, if necessary, a step of forming a protective film (not shown) on the first electrode 50 may be performed. As the protective film, for example, it is conceivable to form a SiO ₂ film by a known film forming method.

Thereafter, as shown in FIG. 2D, a step of forming the first electrode pad 60 and the second electrode pad 40 is performed.
The first electrode pad 60 is formed on the exposed portion of the second conductivity type layer 23 in the non-light emitting region 26 on the portion protected by the resist 52 when the first electrode 50 is formed. On the other hand, an Au-based metal material (for example, Ti / Au / Ti or Ti / Au) that can easily ensure ohmic properties may be used by a known film formation method such as sputtering. Thereby, on the exposed surface of the second conductivity type layer 23, the first electrode 50 formed on the second conductivity type layer 23 in the non-light emitting region 26 has the joint surface 61 that is directly joined to the exposed surface. The first electrode pad 60 is also formed. The first electrode pad 60 has a connection portion 62 that is electrically connected to the contact surface 61, and further has a terminal surface 63 above the bonding surface 61. At this time, since the exposed surface of the second conductivity type layer 23 is a surface having excellent flatness, the terminal surface 63 of the first electrode pad 60 formed thereon is also excellent in flatness without being roughened. It becomes the surface.
Further, the second electrode pad 40 is formed by sputtering or vacuum deposition on the upper surface of the second electrode 30 using an Au-based metal material (for example, Ti / Au) that can easily ensure ohmic properties with respect to the second electrode 30. What is necessary is just to form by well-known film-forming methods, such as. At this time, since the upper surface of the second electrode 30 is a surface having excellent flatness, the terminal surface 41 of the second electrode pad 40 formed thereon is also free from surface roughness and has excellent flatness. It becomes.
Note that the first electrode pad 60 and the second electrode pad 40 may be formed after one is formed, or the other may be formed simultaneously. In any case, the first electrode pad 60 and the second electrode pad 40 are formed so that the heights of the terminal surfaces 41 and 63 are aligned.

  Thereafter, as shown in FIG. 2E, a step of forming bumps 70 on the terminal surface 63 of the first electrode pad 60 and the terminal surface 41 of the second electrode pad 40 is performed. The bump 70 may be formed by a known film forming method such as electroless plating or displacement plating while using each metal material so that the surface of the Ni layer to which P is added is covered with the Au layer, for example. The formation of the bump 70 may be performed separately for each of the terminal surfaces 41 and 63, but it is more efficient and preferable to perform the bump 70 at the same time.

After the formation of the bumps 70, the sapphire substrate 10 is polished and ground, or sized by scribing, as necessary.
Through the series of procedures as described above, the light emitting element having the configuration described with reference to FIG. 1 is manufactured.

<3. Effects of this embodiment>
According to the light emitting device and the manufacturing method thereof described in the present embodiment, the following effects can be obtained.

In the present embodiment, the bonding surface 61 of the first electrode pad 60 is directly bonded to the exposed surface of the second conductivity type layer 23 instead of the upper surface of the first electrode 50. The exposed surface of the second conductivity type layer 23 is a surface excellent in flatness. Therefore, unlike the case where the first electrode pad 60 is bonded to the surface having a rough surface state, the first electrode pad 60 is not adversely affected by voids or the like that may be generated due to the roughness of the surface. In joining to the exposed surface of the mold layer 23, a sufficient mechanical joint strength with the second conductivity type layer 23 can be ensured. Furthermore, since the exposed surface of the second conductivity type layer 23 is excellent in flatness, the terminal surface 63 located on the upper side is flat as well as the exposed surface of the second conductivity type layer 23. Even when the bump 70 is formed on the terminal surface 63 by plating, the mechanical bonding strength with the bump 70 can be sufficiently ensured.
Therefore, since sufficient bonding strength can be secured at each of the interface between the first electrode pad 60 and the second conductivity type layer 23 and the interface between the first electrode pad 60 and the bump 70, the first electrode can be provided with ohmic characteristics. Even when the surface of 50 is rough, the adverse effect does not reach the bonded state, and it is possible to suppress the peeling at the bonded portion after the assembly of the light emitting element on the printed wiring board by flip chip mounting. can do.
Moreover, even in that case, the first electrode pad 60 is electrically connected to the first electrode 50, and the first electrode 50 is in ohmic contact with the exposed surface of the first conductivity type layer 21. In addition, the conductive characteristics at the time of voltage application are not disturbed.
That is, according to the present embodiment, for the electrode structure of the light emitting element to be mounted on the flip chip, both the ensuring of the mechanical joint strength for suppressing the peeling and the ensuring of the good conductivity when the voltage is applied are achieved. be able to.

  As described in the present embodiment, when the semiconductor layer 20 is a group III nitride semiconductor layer, the first electrode 50 is formed of a metal material containing Al to ensure good conductivity during voltage application. However, by forming the first electrode pad 60 with a metal material having a lower Al content than that of the first electrode 50, and preferably with a metal material that does not contain Al, it is possible to ensure mechanical bonding strength for suppressing peeling. it can.

  The configuration and manufacturing procedure described in the present embodiment includes a light emitting element that is an example of a semiconductor element, that is, a semiconductor layer 20 in which a first conductive type layer 21, a light emitting layer 22, and a second conductive type layer 23 are sequentially stacked. It can be said that it is very effective when applied to. This is because such a light-emitting element is easy to dissipate heat through the bump 70 when flip-chip mounting is performed via the bump 70, and is therefore often used by being flip-chip mounted. This is because it is very important to ensure both the bonding strength and the good conductivity during voltage application.

  As described in the present embodiment, if the semiconductor layer 20 has the groove structure 24, it is easy to make the heights of the terminal surfaces 41 and 63 uniform. The occurrence of inconvenience such as tilting can be suppressed. In other words, as described above, while ensuring both the mechanical joint strength and the good electrical conductivity at the time of voltage application, it is also possible to suppress the occurrence of poor connection during flip chip mounting. The reliability of chip mounting can be improved.

  As described in this embodiment, if bumps 70 are formed in advance on the terminal surfaces 41 and 63 and the factory shipment as a light emitting element product is performed with the bumps 70 formed, the bumps 70 are concerned. Compared to the case where no is formed, it is possible to reduce the man-hour when flip chip mounting the light emitting element at the product shipping destination. Therefore, it is excellent in convenience for users of light emitting device products. In addition, since the peeling of the joint portion after assembly is suppressed, the product reliability is very excellent.

<4. Modified example>
While embodiments of the present invention have been described above, the above disclosure is intended to illustrate exemplary embodiments of the present invention. That is, the technical scope of the present invention is not limited to the exemplary embodiments described above.
Hereinafter, modifications other than the above-described embodiment will be described.

In the above-described embodiment, the case where the first electrode 50 is formed so as to extend from the second conductive type layer 23 to the bottom of the groove structure portion 24 in the non-light emitting region 26 is described as an example. Is not limited to such a configuration.
FIG. 3 is a side sectional view showing another schematic configuration example of the light emitting device to which the present invention is applied.
In the illustrated light emitting device, the first electrode 50 is formed on the bottom of the groove structure 24. Then, the first electrode pad 60 is formed so as to extend from above the second conductivity type layer 23 to the upper surface of the first electrode 50 at the bottom of the groove structure portion 24.
Even in the light emitting device having such a configuration, the first electrode 50 is in ohmic contact with the exposed surface of the first conductivity type layer 21. The first electrode pad 60 is electrically connected to the first electrode 50, directly joined to the exposed surface of the second conductivity type layer 23, and further has a terminal surface 63 on the upper side of the joined surface. Become. Therefore, as in the case of the above-described embodiment, the electrode structure of the light-emitting element that is flip-chip mounted can achieve both of ensuring the mechanical joint strength and ensuring good conductivity when a voltage is applied.

  In the embodiment described above, when the semiconductor layer 20 is a group III nitride semiconductor layer, the first electrode 50 is formed of a metal material containing Al, and the first electrode pad 60 is a metal material having a low Al content. As an example, the semiconductor material and the metal material should be configured using other types of materials while taking into account the ohmic properties, bonding properties, heat resistance, etc. between them. Is also possible. As described in Examples below, in the case of an electrode containing a large amount of Al, the surface roughness after the heat treatment is about 30 times that before the heat treatment, and in the case of an electrode containing a large amount of Au (not containing Al), after the heat treatment. The surface roughness is about 5 times that before the heat treatment, and better surface flatness is easily obtained when Al is not included. However, the selection of a metal material for obtaining good ohmic properties with respect to the semiconductor layer is limited, and when the semiconductor layer 20 is a group III nitride semiconductor layer, a metal other than Al is used for the n-type layer. The selection has advantages and disadvantages, and in many cases, Al must be selected. Even when a metal other than Al is selected for the first electrode 50, when the surface roughness after the heat treatment exceeds Ra = 150%, it is preferable to use the above-described embodiment.

  In the above-described embodiment, in manufacturing the semiconductor element, the first electrode 50 is formed using the resist 52, and then the first electrode pad 60 is formed on the removed portion of the resist 52. The case where the influence of the heat treatment performed on one electrode 50 does not reach the first electrode pad 60 is taken as an example. Thus, by forming the first electrode pad 60 after the heat treatment of the first electrode 50, there is no influence of the heat treatment on the first electrode pad 60, and the surface flatness on the second conductivity type layer 23 is imparted to the terminal surface 63. You can take over as it is. However, for example, if material selection that can withstand the influence of the heat treatment is performed on the first electrode pad 60, the first electrode pad 60 is first formed at a desired location on the second conductivity type layer 23, and then the first electrode pad 60 is formed. It is also conceivable to form one electrode 50. In that case, the first electrode pad 60 is also subjected to heat treatment together with the first electrode 50.

In the above-described embodiment, the bump 70 is formed by electroless plating or the like so that the surface of the Ni layer to which P is added is covered with the Au layer. It may be formed.
Furthermore, in the above-described embodiment, the case where the bumps 70 are formed in advance on the terminal surfaces 41 and 63 has been described as an example. However, the bumps 70 are not formed at the time of product shipment, and after the product shipment. It is also conceivable to form the bump 70 at any point up to the flip chip mounting. That is, the bumps 70 do not necessarily have to be formed on the terminal surfaces 41 and 63. Further, even when mounting by a method other than the bump, the terminal surfaces 41 and 63 can be used for bonding with the outside.

  In the above-described embodiment, the case where the present invention is applied to a light-emitting element has been described as an example. However, the present invention is not limited thereto, and the present invention is not limited to a light-emitting element as long as it is a pn junction semiconductor element. In this case as well, it is possible to achieve both of ensuring the mechanical joint strength and ensuring good electrical conductivity during voltage application for the electrode structure.

  Next, an Example is given and this invention is demonstrated concretely. However, it is needless to say that the present invention is not limited to the following examples.

Example 1
In Example 1, a light emitting device having the configuration shown in FIG. 1 was manufactured. Specifically, a first conductive type layer 21 made of n-type AlGaN, a light emitting layer 22 made of AlInGaN, and a second conductive type layer 23 made of p-type AlGaN are sequentially stacked on the sapphire substrate 10. A semiconductor layer 20 was formed, and a groove structure 24 was formed in the semiconductor layer 20 by RIE, and the semiconductor layer 20 was divided into a light emitting region 25 and a non-light emitting region 26. The upper surface (exposed surface) of the second conductivity type layer 23 is a flat surface having a surface roughness Ra of about 10 mm as a result of measurement by a stylus type surface roughness measuring device (Alpha-Step IQ manufactured by KLA Tencor). It becomes a surface with excellent properties.

  Then, on the exposed surface of the second conductivity type layer 23 in the light emitting region 25, a Ni / Au metal material was formed as a second electrode (that is, a p-type electrode) 30 to a thickness of 100/200 mm.

On the other hand, on the exposed surface of the second conductivity type layer 23 in the non-light emitting region 26 and on the exposed surface of the first conductivity type layer 21 in the bottom of the groove structure 24, the first electrode (ie, n-type electrode) 50 is provided. Then, a Ti / Al / Ti metal material was formed to a thickness of 300/6000/50 mm so as to form a continuous film connecting them. The first electrode 50 is formed not to cover the entire surface of the second conductivity type layer 23 but to partially leave the exposed surface of the second conductivity type layer 23. Then, the first electrode 50 was subjected to a heat treatment at 550 ° C. in an N ₂ + O ₂ gas atmosphere in order to ensure ohmic properties with the first conductivity type layer 21. By this heat treatment, the surface of the first electrode 50 is uneven, and the surface roughness Ra = about 10 に before the heat treatment becomes about 300 後 に after the heat treatment. In the second electrode 30 containing no Al, the surface roughness did not increase significantly even after the heat treatment, and the surface roughness after the heat treatment was about Ra = 50 mm.

Thereafter, a Ti / Au / Ti metal material was formed on the upper surface of the second electrode 30 as a second electrode pad (that is, a p-type electrode pad) 40 with a thickness of 200/2000/100 mm, respectively. At the same time, on the exposed surface of the second conductivity type layer 23 that is not covered with the first electrode 50, a Ti / Au / Ti metal material is used as the first electrode pad (ie, n-type electrode pad) 60, respectively, at a thickness of 200 / cm. The film was formed with a thickness of 2000 mm / 100 mm. Unlike the case where the first electrode pad 60 is formed on the upper surface of the first electrode 50, the exposed surface of the second conductivity type layer 23 is excellent in flatness and has no surface roughness. 50 is not affected by the heat treatment for 50 (that is, the surface roughness of the first electrode 50), the terminal surface 63 becomes a surface having excellent flatness with a surface roughness Ra of about 10 mm. The terminal surface 41 of the second electrode pad 40 is a surface having a surface roughness Ra = 50 mm.
Here, the second electrode pad 40 and the first electrode pad 60 are formed in the same process, and the difference height of the thickness of each electrode material is different between the n side and the p side. Is about 0.5 μm at the maximum, and it is considered that there is no significant influence in view of this value. However, the film may be formed separately at different thicknesses so that the height of the terminal surface 63 in the first electrode pad 60 is equal to the height of the terminal surface 41 in the second electrode pad 40.

  Then, on the terminal surface 63 of the first electrode pad 60 and the terminal surface 41 of the second electrode pad 40, an Ni layer to which P is added by electroless nickel plating is formed, and the surface thereof is covered with displacement gold plating, Further, the bump 70 was formed to a thickness of 6 μm by covering the surface of the displacement gold plating with electroless gold plating.

  In such a light emitting device of Example 1, the terminal surface 63 of the first electrode pad 60 is a surface having excellent flatness with a surface roughness Ra of about 10 mm. Therefore, the terminal surface 63 can sufficiently secure the bonding strength with the bump 70 formed thereon, and after the bump is soldered to the Si substrate (Au / Sn solder is heated at 300 ° C.), the die shear measurement is performed. As a result of measuring the shear strength by applying a horizontal stress to the light emitting element with a universal bond tester 4000-PXY (condition: ball shear test) manufactured by Arctech Co., Ltd., the shear strength serving as an index representing the strength of bonding is 240 g. It was about.

(Comparative Example 1)
Next, the comparative example 1 with respect to Example 1 mentioned above is demonstrated. In Comparative Example 1, a conventional light emitting device shown in FIG. 4 was manufactured. Specifically, the first electrode (that is, n) extends from the exposed surface of the second conductivity type layer 23 in the non-light emitting region 26 to the exposed portion of the first conductivity type layer 21 at the bottom of the groove structure portion 24. As the mold electrode 110, a Ti / Al / Ti metal material was formed to a thickness of 300/6000/50 mm, respectively. The first electrode 110 was subjected to a heat treatment at 550 ° C. in order to ensure ohmic properties with the first conductivity type layer 21. After this heat treatment, a Ti / Au / Ti metal material was formed on the first electrode 110 as a first electrode pad (that is, an n-type electrode pad) 120 to a thickness of 200 mm / 2000 mm / 100 mm, respectively. . Others are the same as those in the first embodiment.

  In such a light emitting device of Comparative Example 1, the first electrode 110 after the heat treatment has a surface roughness Ra of about 300 mm. For this reason, even if the first electrode pad 120 is formed thereon, the surface of the first electrode pad 120 inherits the surface roughness Ra of the base, so that the surface of the terminal surface of the first electrode pad 120 is also a surface. The roughness Ra is about 300 mm.

  Therefore, in the light emitting element of Comparative Example 1, it cannot be said that the bonding strength with the bump formed on the terminal surface of the first electrode pad 120 can be sufficiently ensured, and the shear strength serving as an index representing the bonding strength. Becomes about 140 g.

(Comparative Example 2)
Next, the comparative example 2 with respect to Example 1 mentioned above is demonstrated. In Comparative Example 2, a light emitting device having a conventional configuration shown in FIG. 5 was manufactured. Specifically, a part of the semiconductor layer 20 in which the first conductive type layer 21, the light emitting layer 22, and the second conductive type layer 23 are sequentially stacked is removed by etching from the second conductive type layer 23 side. An exposed surface of the one conductivity type layer 21 was formed. Then, on the exposed surface of the first conductivity type layer 21, a Ti / Al / Ti metal material having a thickness of 300/6000/50 mm is formed as the first electrode (ie, n-type electrode) 110, respectively. Then, a heat treatment at 550 ° C. was performed on the formed first electrode 110. Further, a Ti / Au / Ti metal material was formed as a first electrode pad (namely, n-type electrode pad) 120 on the first electrode 110 with a thickness of 200/2000/100 mm, respectively.

  In the light emitting device of Comparative Example 2, the upper surface of the first electrode 110 is not only uneven by heat treatment, but also the surface roughness due to etching when the exposed surface of the first conductivity type layer 21 is formed is added. Therefore, the surface roughness Ra ≧ 300 mm. Therefore, even if the first electrode pad 120 is formed on the surface, the surface of the first electrode pad 120 takes over the surface roughness Ra of the base. The surface roughness Ra ≧ 300 mm.

  Therefore, in the light emitting element of Comparative Example 2, it cannot be said that the bonding strength with the bump formed on the terminal surface of the first electrode pad 120 is necessarily sufficient, and the shear strength that serves as an index representing the bonding strength. Becomes about 120 g.

  In addition, in the light emitting device of Comparative Example 2, it is necessary to change the thickness of the bump between the p side and the n side for flip chip mounting, or the thickness of the first electrode pad 120 and the second electrode pad 40. May need to be changed. Therefore, it is not preferable in that it may increase the number of man-hours in the bump formation process.

(Summary)
Comparing Example 1 described above with Comparative Examples 1 and 2, the shear strength in Example 1 is about 240 g, whereas the shear strength in Comparative Example 1 is about 140 g, and the shear strength in Comparative Example 2 Is about 120 g, and it can be seen that the shear strength of Example 1 is superior. Moreover, when the fracture | rupture location in a shear strength measurement is observed, in Example 1, it occurred mainly between the Au / Sn solder layer and bump on the Si substrate, whereas the shear strength as in Comparative Examples 1 and 2. It was found that in the case of weak, it occurred between the bump and the electrode pad (terminal surface). Therefore, if it is the light emitting element of Example 1, it can suppress that peeling will arise in a junction part after performing flip-chip mounting compared with the case of Comparative Examples 1 and 2.

  DESCRIPTION OF SYMBOLS 10 ... Sapphire substrate, 20 ... Semiconductor layer, 21 ... 1st conductivity type layer, 22 ... Light emission layer, 23 ... 2nd conductivity type layer, 24 ... Groove structure part, 25 ... Light emission area, 26 ... Non light emission area, 30 ... 2nd electrode, 40 ... 2nd electrode pad, 41 ... Terminal surface, 50 ... 1st electrode, 60 ... 1st electrode pad, 61 ... Bonding surface, 62 ... Connection location, 63 ... Terminal surface, 70 ... Bump

Claims (8)

A semiconductor layer having at least a first conductivity type layer and a second conductivity type layer;
A first electrode formed in ohmic contact with an exposed surface of the first conductivity type layer in the semiconductor layer;
A terminal surface that is arranged to be positioned above the exposed surface of the second conductivity type layer in the semiconductor layer and is used for bonding to the outside, and a bonding surface that is directly bonded to the exposed surface of the second conductivity type layer And a first electrode pad formed having a connection portion electrically connected to the first electrode,
A semiconductor device comprising: A semiconductor layer having at least a first conductivity type layer and a second conductivity type layer;
A first electrode formed in ohmic contact with an exposed surface of the first conductivity type layer in the semiconductor layer;
A terminal surface that is arranged to be positioned above the exposed surface of the second conductivity type layer in the semiconductor layer and is used for bonding to the outside, and a bonding surface that is directly bonded to the exposed surface of the second conductivity type layer And a first electrode pad formed having a connection portion electrically connected to the first electrode,
A bump made of a metal material formed on the terminal surface of the first electrode pad;
A semiconductor device comprising: The semiconductor layer is a group III nitride semiconductor layer,
The first electrode is formed of a metal material containing aluminum,
The semiconductor element according to claim 1, wherein the first electrode pad is formed of a metal material having an aluminum content lower than that of the first electrode. The semiconductor element according to claim 1, wherein the semiconductor layer is for a light emitting element in which the first conductive type layer and the second conductive type layer are arranged with a light emitting layer interposed therebetween. The semiconductor layer has a groove structure portion dug in the stacking direction of the first conductivity type layer, the light emitting layer, and the second conductivity type layer, and the light emitting region and the non-light emitting region are divided by the groove structure portion. And the exposed surface of the first conductivity type layer is formed at the bottom of the groove structure portion,
The first electrode pad is formed so as to be directly bonded to the exposed surface of the second conductivity type layer in the non-light emitting region,
On the exposed surface of the second conductivity type layer in the light emitting region, a second electrode formed so as to be directly bonded to the exposed surface, and electrically connected to the second electrode and bonded to the outside The semiconductor element according to claim 4, wherein a second electrode pad having a terminal surface to be used is formed. The semiconductor element according to claim 5, wherein a bump made of a metal material is formed on a terminal surface of the second electrode pad. Forming a semiconductor layer having a stacked structure including a first conductivity type layer, a light emitting layer, and a second conductivity type layer on the substrate in order from the substrate side;
A groove structure is formed by etching from the second conductivity type layer side, the semiconductor layer is divided into a light emitting region and a non-light emitting region by the groove structure, and the first conductive layer is formed at the bottom of the groove structure. Exposing the mold layer;
Forming a first electrode joined to an exposed surface of the first conductivity type layer at least at the bottom of the groove structure with a metal material containing aluminum;
Performing a heat treatment on the first electrode to bring the first electrode into ohmic contact with the exposed surface of the first conductivity type layer;
A terminal surface that has a connection portion that is electrically connected to the first electrode, has a bonding surface that directly bonds to the exposed surface of the second conductivity type layer in the non-light emitting region, and is used for bonding to the outside. Forming a first electrode pad configured to be located above the bonding surface with a metal material having an aluminum content lower than that of the first electrode. Forming a second electrode on an exposed surface of the second conductivity type layer in the light emitting region;
Forming a second electrode pad having a terminal surface used for bonding to the outside on the second electrode;
Forming a bump made of a metal material on each of the terminal surface of the first electrode pad and the terminal surface of the second electrode pad.

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