CN110504934B - 一种芯片封装方法及封装结构 - Google Patents

一种芯片封装方法及封装结构 Download PDF

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Publication number
CN110504934B
CN110504934B CN201910801551.0A CN201910801551A CN110504934B CN 110504934 B CN110504934 B CN 110504934B CN 201910801551 A CN201910801551 A CN 201910801551A CN 110504934 B CN110504934 B CN 110504934B
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wafer
substrate
packaging
chip
film
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CN110504934A (zh
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李林萍
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Huzhou Jianwenlu Technology Co Ltd
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Hangzhou Jianwenlu Technology Co Ltd
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Priority to US16/925,329 priority patent/US11177141B2/en
Priority to EP20185122.7A priority patent/EP3787186A1/en
Priority to JP2020133431A priority patent/JP6950990B2/ja
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    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02Details
    • H03H2009/02165Tuning
    • H03H2009/02173Tuning of film bulk acoustic resonators [FBAR]
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02Details
    • H03H9/05Holders; Supports
    • H03H9/0504Holders; Supports for bulk acoustic wave devices
    • H03H9/0514Holders; Supports for bulk acoustic wave devices consisting of mounting pads or bumps
    • H03H9/0523Holders; Supports for bulk acoustic wave devices consisting of mounting pads or bumps for flip-chip mounting
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02Details
    • H03H9/05Holders; Supports
    • H03H9/0538Constructional combinations of supports or holders with electromechanical or other electronic elements
    • H03H9/0542Constructional combinations of supports or holders with electromechanical or other electronic elements consisting of a lateral arrangement

Abstract

本申请提供一种芯片封装方法及封装结构,所述封装方法用于封装包括滤波器的芯片,先将基板和晶圆焊接在一起,其中,晶圆的边缘为倒角设置,基板上设置有凹槽,倒角部分与基板上的凹槽齐平,然后设置掩膜板,所述掩膜板朝向晶圆的表面为倾斜表面,形成楔形开口;印刷封装胶材料,在倒角和凹槽部分填充封装胶材料,然后沿背离基板的方向撤离掩膜板,通过掩膜板的楔形开口的开口较小区域将多余的封装胶材料带离晶圆,再固化剩余的封装胶材料,最终在晶圆和基板之间形成薄膜,薄膜、晶圆和基板之间形成滤波器的空腔,然后注塑形成封装壳从而完成滤波器芯片的封装。其中,薄膜厚度较薄,而封装壳能够对封装壳内部提供更高性能的保护。

Description

一种芯片封装方法及封装结构
技术领域
本发明涉及半导体器件制作技术领域,尤其涉及一种芯片封装方法及封装结构。
背景技术
滤波器芯片利用了声表面波或体声波原理来设计得到,封装的时候必须在谐振电路单元一侧形成一个没有任何介质接触的空气腔,以保证声波不会被传导和耗散,保证声波是按照设计的模式来进行谐振,以得到所需要的频率输出,因此所有的滤波器芯片封装的时候谐振单元一侧需要一个空腔。
但现有技术中无论采用WLP(wafer level package,晶圆级封装)封装工艺,还是采用覆膜封装工艺进行封装,均存在对应的缺点,如WLP晶圆键合封装工艺成本较高,而覆膜封装工艺封装得到的芯片体积较大。
如何提供一种新的封装方法和封装结构,使得体积上接近晶圆级封装得到的芯片,但成本又远远低于晶圆级封装;或体积比覆膜封装得到的芯片体积小,而成本比较接近,成为亟待解决的问题。
发明内容
有鉴于此,本发明提供一种芯片封装方法及封装结构,所述芯片封装结构包括滤波器芯片,以解决现有技术中滤波器芯片封装体积小和成本低无法兼得的问题。
为实现上述目的,本发明提供如下技术方案:
一种芯片封装方法,所述芯片包括滤波器,所述芯片封装方法包括:
提供晶圆,所述晶圆包括相对设置的第一表面和第二表面,所述晶圆的第一表面形成有所述滤波器的谐振电路和焊垫,且所述晶圆第一表面的边缘为倒角设置;
提供基板,所述基板包括相对设置的第三表面和第四表面,所述基板的第三表面形成有凹槽和焊接部;
将所述晶圆的第一表面与所述基板的第三表面相对设置,将所述焊接部和所述焊垫焊接在一起,使得所述凹槽与所述倒角位置对齐;
提供掩膜板,所述掩膜板套嵌在所述晶圆的四周,且,所述掩膜板的侧壁为相对于所述晶圆侧壁倾斜的表面,所述掩膜板的侧壁沿所述第一表面指向所述第二表面逐渐远离所述晶圆;所述掩膜板的侧壁与所述晶圆侧壁最近的距离大于或等于0,且小于5μm;
印刷封装胶材料,所述封装胶材料通过所述掩膜板的倾斜表面落入所述凹槽中,在所述凹槽和所述倒角之间形成封装胶;
沿所述第一表面指向所述第二表面的方向撤离所述掩膜板,所述掩膜板将所述晶圆侧壁多余的封装胶带离,剩余的封装胶在所述倒角和所述凹槽之间形成薄膜,所述薄膜与所述晶圆、所述基板之间形成空腔;
固化薄膜位置的封装胶;
在所述晶圆的第二表面、侧壁以及所述薄膜背离空腔的表面注塑形成封装壳。
优选地,所述提供晶圆,具体包括:
提供衬底;
在所述衬底的表面形成多个滤波器单元,每个滤波器单元均包括谐振电路和焊垫;
在每个滤波器单元的四周刻蚀形成切割凹槽,所述切割凹槽的宽度比切割刀宽;
采用所述切割刀沿所述切割凹槽,将衬底切割为单颗晶圆,所述晶圆设置有谐振电路的表面的边缘形成倒角。
优选地,还包括:
在所述焊垫上形成钝化层;
刻蚀所述钝化层,在所述焊垫上形成封闭环形钝化区,用于容纳焊接工艺中的锡膏,使晶圆的焊垫与基板的焊接部按目标位置实现自动对准,以避免锡膏流动。
优选地,所述封装胶为UV固化类型的树脂材料,常温粘度范围为250pa.s~800pa.s,包括端点值。
优选地,所述固化薄膜位置的封装胶,具体包括:
采用UV光固化所述薄膜位置的封装胶。
优选地,所述在所述晶圆的第二表面、侧壁以及所述薄膜背离空腔的表面注塑形成封装壳,具体包括:
提供液体注塑材料;
设置注塑压力范围为15Bar~25Bar,温度范围为145℃~155℃;
在晶圆的第二表面、侧壁以及薄膜背离空腔的表面注塑形成封装壳。
本发明还提供一种芯片封装结构,所述芯片封装结构包括滤波器结构;具体包括:
相对且间隔设置的、电性连接的基板和晶圆,所述晶圆朝向所述基板的表面设置有谐振电路;
所述基板朝向所述晶圆的表面设置有凹槽,所述凹槽与所述晶圆在所述基板上的投影边缘对应;
所述晶圆的边缘为倒角设置;
所述凹槽和所述倒角之间设置有封闭所述基板和所述晶圆之间的间隔的薄膜,所述薄膜、所述晶圆和所述基板构成空腔;
覆盖所述晶圆背离所述基板的表面、所述晶圆的侧壁、所述薄膜背离所述空腔的表面以及基板的封装壳。
优选地,所述基板和所述晶圆通过焊接间隔电性连接。
优选地,所述薄膜的厚度范围为5μm-30μm,包括端点值。
优选地,所述封装壳的侧壁厚度范围为50μm-100μm,包括端点值。
优选地,所述芯片封装结构为包括滤波器的系统集成封装模块,所述系统集成封装模块还包括开关、低噪声放大器或功率放大器。
经由上述的技术方案可知,本发明提供的芯片封装方法,用于封装包括滤波器的芯片,先将基板和晶圆焊接在一起,其中,晶圆的边缘为倒角设置,基板上设置有凹槽,倒角部分与基板上的凹槽齐平,然后设置掩膜板,所述掩膜板朝向晶圆的表面为倾斜表面,形成楔形开口;印刷封装胶材料,在倒角和凹槽部分填充封装胶材料,然后沿背离基板的方向撤离掩膜板,通过掩膜板的楔形开口的开口较小区域将多余的封装胶材料带离晶圆,再固化剩余的封装胶材料,最终在晶圆和基板之间形成薄膜,薄膜、晶圆和基板之间形成滤波器的空腔,然后注塑形成封装壳从而完成滤波器芯片的封装。其中,薄膜厚度较薄,而封装壳能够对封装壳内部提供更高性能的保护。
由于采用上述封装方法形成的包含滤波器的芯片结构,通过薄膜连接基板和晶圆,形成空腔,薄膜厚度较薄,对晶圆和基板的体积没有影响,能够达到晶圆级封装的体积,同时,由于通过印刷形成薄膜,无需复杂的光刻工艺或晶圆键合外加TSV工艺,晶圆无需植球,大大降低了成本,成本上类似覆膜封装,因此,本发明中提供的封装方法得到的芯片既满足体积小的要求,又具有成本较低的特点,兼得了体积小和成本低。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据提供的附图获得其他的附图。
图1为现有技术覆膜工艺得到的芯片封装结构示意图;
图2为本发明实施例提供的一种芯片封装方法流程示意图;
图3-图16为本发明实施例提供的芯片封装方法流程对应的工艺剖面图;
图17为本发明实施例提供的一种芯片封装结构示意图。
具体实施方式
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
正如背景技术部分所述,现有技术中的滤波器芯片封装通常采用晶圆级封装工艺或覆膜工艺形成芯片封装结构,但是晶圆级封装工艺通常需要复杂的光刻工艺或晶圆键合加TSV工艺,造成晶圆级封装的成本较高。而覆膜工艺,通常先将晶圆贴装在基板上,把整片的树脂薄膜整体加热压合在基板上,膜本身很薄,但是在晶圆的边缘周边部分需要很大的距离来保证贴合后的可靠性,而且无法在紧邻晶圆侧壁的表面断开,请参见图1所示,这样造成最终封装的芯片体积较大。
基于此,本发明实施例提供一种芯片封装方法,其中,所述芯片是包括滤波器的,所述滤波器在谐振电路一侧具有空腔结构,本实施例中不限定所述滤波器是声表面波(SAW)滤波器还是体声波(BAW)滤波器,本实施例中提供的芯片封装方法均适用。
请参见图2,图2为本发明实施例提供的一种芯片封装方法流程示意图,所述芯片封装方法包括:
S101:提供晶圆,所述晶圆包括相对设置的第一表面和第二表面,所述晶圆的第一表面形成有所述滤波器的谐振电路和焊垫,且所述晶圆第一表面的边缘为倒角设置;
请参见图3,图3为晶圆的剖面结构示意图;晶圆包括相对设置的第一表面和第二表面,其中,第一表面在图3中为上表面,第二表面在图3中为下表面,本实施例中并未以标号示出。在晶圆1的第一表面形成有滤波器的谐振电路11和焊垫12,需要说明的是,在晶圆切割之前,通常在晶圆上设置阵列排布的滤波器单元10,从而实现批量生产。滤波器单元10均包括谐振电路11和焊垫12。
需要说明的是,本实施例中晶圆的第一表面的边缘为倒角设置,本实施例中不限定晶圆的具体制作工艺,具体可以包括:
提供衬底;
在所述衬底的表面形成多个滤波器单元,每个滤波器单元均包括谐振电路和焊垫,请参见图3和图4。
需要说明的是,为了后续晶圆和基板进行焊接时,焊锡膏不容易出现流动,本实施例中提供的晶圆制作工艺还包括:在所述焊垫12上形成钝化层;刻蚀所述钝化层,在所述焊垫上形成封闭环形钝化区2,用于容纳焊接工艺中的锡膏,以避免锡膏流动。
通过加工钝化层,在焊垫区域形成SMD(solder mask defined)结构,从而保证后续贴装焊接工序时,与锡膏接触完成焊接。需要说明的是,本实施例中优选地,钝化区2包围的焊垫的区域面积范围为100μm*100μm~200μm*200μm,较大的面积才能保证SMD结构的可靠性和封装后器件内部的低应力,确保后续焊点具有更好的耐疲劳性能。
本实施例中不限定环形的钝化区的结构,如图5和图6所示,为图4中A区域的俯视结构示意图,在焊垫12上设置有环形的钝化区2,其中,环形钝化区2可以是如图5所示的方形的,或者如图6所示的圆形的,本实施例中对此不作限定。
在每个滤波器单元的四周刻蚀形成切割凹槽,所述切割凹槽的宽度比切割刀宽。
采用所述切割刀沿所述切割凹槽,将衬底切割为单颗晶圆,所述晶圆设置有谐振电路的表面的边缘形成倒角。
如图7所示,在每个滤波器单元的四周均刻蚀形成切割凹槽3,其中切割凹槽的宽度比切割刀的宽度宽,所述切割凹槽为开口较大,侧壁倾斜的凹槽,从而在切割后,每个晶圆的边缘区域能够形成倒角。如图8所示,为单个晶圆的结构示意图,在晶圆的第一表面,也即形成谐振电路的表面的边缘形成倒角4。
S102:提供基板,所述基板包括相对设置的第三表面和第四表面,所述基板的第三表面形成有凹槽和焊接部;
本实施例中基板内部设置有导电结构,且在基板相对的两个表面均设置有导电结构,尤其,其中第三表面用于与晶圆相对设置,第三表面上形成有凹槽和焊接部。本实施例中不限定基板的具体材质,可选的,基板材质可以是树脂或者陶瓷,包括所有可用于封装的基板类型,如金属基板等。
需要说明的是,所述凹槽在后续与倒角位置对应设置,因此,本实施例中基板上的凹槽位置根据待焊接的晶圆的边缘来设置。而且,本实施例中不限定凹槽的宽度,其宽度和倒角的宽度可以根据实际需求设置为1:1的比例,也可以是1:1.5的比例,本实施例中对此不作限定。
S103:将所述晶圆的第一表面与所述基板的第三表面相对设置,将所述焊接部和所述焊垫焊接在一起,使得所述凹槽与所述倒角位置对齐;
需要说明的是,本实施例中不限定晶圆和基板焊接的具体工艺,可以采用植球方式,也可以不采用植球方式进行焊接。
其中,植球方式包括:在晶圆的焊垫上设置金属层和阻挡保护层,然后在晶圆上植球,在基板的焊接部上印刷锡膏,将晶圆上的植球位置与基板上的焊垫对准,如图9所示,基板5上设置有锡膏,晶圆1上设置有植球,将两者对齐,贴装,然后通过锡炉后,可以将晶圆和基板对准并完成焊接。
非植球方式包括:在基板5上的焊接部上制作钝化层,然后刻蚀,将基板5上的焊接部也制作成SMD结构的焊垫,然后在基板的焊接部上印刷锡膏,将晶圆上的植球位置与基板上的焊垫对准,如图10所示,基板5的SMD焊接部上设置有锡膏,晶圆1的SMD结构焊垫与基板5对齐,贴装,然后通过锡炉后,可以将晶圆和基板对准并完成焊接。
请参见图11,基板5的一个表面上设置有凹槽51,其中凹槽51与晶圆倒角位置对齐。通过先印刷锡膏,把单颗晶圆贴装到基板5上,因为晶圆上布线预留有SMD结构的焊垫,通过锡炉后,可以将晶圆和基板自动对准并完成焊接。
本实施例中可选的晶圆和基板之间的空隙高度范围为20μm-50μm,包括端点值,20um间隙高度时可以为焊接时提供最好的自动对准效果。
S104:提供掩膜板,所述掩膜板套嵌在所述晶圆的四周,且,所述掩膜板的侧壁为相对于所述晶圆侧壁倾斜的表面,所述掩膜板的侧壁沿所述第一表面指向所述第二表面逐渐远离所述晶圆;所述掩膜板的侧壁与所述晶圆侧壁最近的距离大于或等于0,且小于5μm;
需要说明的是,掩膜板的具体尺寸根据晶圆的尺寸进行设置,掩膜板套嵌在晶圆的四周,本实施例中掩膜板与晶圆侧壁之间具有缝隙,从而能够容纳后续封装胶材料的流动。
本实施例中掩膜板的侧壁沿第一表面指向第二表面方向逐渐远离晶圆,具体请参见图12,掩膜板7的侧壁71为相对于晶圆侧壁是倾斜的表面,掩膜板的镂空部形成楔形开口,而掩膜板的侧壁与晶圆侧壁最近的距离大于或等于0,且小于5μm,具体指,在垂直于晶圆侧壁的方向上的距离,也即在垂直于晶圆侧壁的方向上,掩膜板距离晶圆最近的位置,与晶圆侧壁之间的距离可以为0,或大于0且小于5μm,其中,当掩膜板距离晶圆最近的位置与晶圆侧壁之间的距离大于0且小于5μm时,能够保证剩下封装胶材料的厚度和掩膜板的精度,从而保证工艺量产的可行性;如图12所示,掩膜板7的最下方为在垂直于晶圆侧壁的方向上,距离晶圆最近的位置,即使其与晶圆侧壁之间的距离为0,由于掩膜板侧壁为倾斜侧壁,则掩膜板侧壁与晶圆侧壁相对的位置处同样可以留出空隙,以便于封装胶材料经过。
S105:印刷封装胶材料,所述封装胶材料通过所述掩膜板的倾斜表面落入所述凹槽中,在所述凹槽和所述倒角之间形成封装胶;
请参见图12,通过刮刀8沿图10中的箭头方向对封装胶材料9进行刮胶操作,如图13所示,通过晶圆和掩膜板7之间的缝隙,封装胶材料9落入至基板5的凹槽51中。
需要说明的是,为了使得封装胶材料在晶圆和基板之间不易扩散,污染谐振电路,对谐振电路造成性能影响,本实施例中可选的,所述封装胶材料为UV固化类型的树脂材料,常温粘度范围为250pa.s~800pa.s,包括端点值。由于树脂材料具有高粘性,因此通过控制掩膜板的形状和树脂材料的粘滞系数,能够使得封装胶材料能够经过掩膜板和晶圆之间的缝隙,落入到基板的凹槽中,且不易发生横向流动,对谐振电路造成污染。
S106:沿所述第一表面指向所述第二表面的方向撤离所述掩膜板,所述掩膜板将所述晶圆侧壁多余的封装胶带离,剩余的封装胶在所述倒角和所述凹槽之间形成薄膜,所述薄膜与所述晶圆、所述基板之间形成空腔;
如图14所示,沿第一表面指向第二表面的方向,也即图14中的箭头所示的方向,撤离掩膜板7,掩膜板7距离晶圆侧壁最近的位置能够起到类似刮刀的作用,从而将晶圆侧壁多余的封装胶材料带走,带离多余封装胶,而剩余的封装胶材料在倒角和凹槽之间形成薄膜90,薄膜90、晶圆1和基板5之间形成封闭的空腔,该空腔为滤波器的谐振腔。
需要注意的是,在刮刀印刷封装胶材料完成后,立即分离印刷用的掩膜板,液体封装胶材料会通过流延的方式形成侧壁薄膜,并最终通过凹槽和倒角的引流形成稳固的侧壁液体薄膜。
S107:固化薄膜位置的封装胶;
需要说明的是,采用高温固化封装胶材料会导致封装胶材料流动性更高,从而引起封装胶材料的侧壁形状不稳定,因此,本实施例中可选的,封装胶材料为UV固化类型的树脂材料,可以采用UV光固化所述薄膜位置剩余的封装胶。
请参见图15,固化后的封装胶形成薄膜90,薄膜90在垂直于晶圆侧壁的方向上的厚度,如图15中的h所示,经过发明人实验发现,薄膜厚度h可以控制在5μm-30μm,包括端点值。
S108:在所述晶圆的第二表面、侧壁以及所述薄膜背离空腔的表面注塑形成封装壳。
由于本实施例中通过刮刀和掩膜板的设置形成的薄膜厚度能够比较薄,通常只有5μm-30μm的范围,在实际使用过程中,薄膜的稳固性较差,因此,还需要再在晶圆的第二表面、侧壁和薄膜背离空腔的表面注塑形成封装壳。
本实施例中注塑材料使用热固化注塑材料,不限定注塑过程中的具体工艺,可以包括:
采用标准注塑工艺:注塑条件为8吨~12吨的注塑压力,注塑温度为165℃-175℃,使用标准柱状注塑材料。
采用标准的压塑成型(compression molding)注塑工艺,注塑压力为35Bar,注塑温度同样为165℃-175℃,使用标准粉末状注塑材料。
采用液体注塑材料,注塑压力为15Bar-25Bar,注塑温度为145℃-155℃。
本实施例中由于密封薄膜的厚度和强度较小,为了保证空腔密封的薄膜具有更好的稳定性和可靠性,本实施例中采用低压低温和液体注塑材料进行注塑工艺。可选的,注塑具体工艺包括:
提供液体注塑材料;
设置注塑压力范围为15Bar~25Bar,温度范围为145℃~155℃;更加优选地,注塑温度为150℃。
在晶圆的第二表面、侧壁以及薄膜背离空腔的表面注塑形成封装壳。
如图16所示,封装壳100包围除了基板5之外的所有结构,由于注塑工艺同样能够精确控制封装壳侧壁的厚度,本实施例中封装壳的厚度H可以是50μm-100μm之间。
本发明实施例提供的芯片封装方法应用于生产具有滤波器的芯片结构中,通过先将基板和晶圆焊接在一起,其中,晶圆的边缘为倒角设置,基板上设置有凹槽,倒角部分与基板上的凹槽齐平,然后设置掩膜板,所述掩膜板朝向晶圆的表面为倾斜表面,形成楔形开口;印刷封装胶材料,在倒角和凹槽部分填充封装胶材料,然后沿背离基板的方向撤离掩膜板,通过掩膜板的楔形开口的开口较小区域将多余的封装胶材料带离晶圆,再固化剩余的封装胶材料,最终在晶圆和基板之间形成薄膜,薄膜、晶圆和基板之间形成滤波器的空腔,然后注塑形成封装壳从而完成滤波器芯片的封装。其中,薄膜厚度较薄,而封装壳能够对封装壳内部提供更高性能的保护。
由于采用上述封装方法形成的包含滤波器的芯片结构,通过薄膜连接基板和晶圆,形成空腔,薄膜厚度较薄,对晶圆和基板的体积没有影响,能够达到晶圆级封装的体积,同时,由于通过印刷形成薄膜,无需复杂的工艺,成本上类似覆膜封装,因此,本发明中提供的封装方法得到的芯片既满足体积小的要求,又具有成本较低的特点,兼得了体积小和成本低。
基于相同的发明构思,本发明实施例还提供一种芯片封装结构,请继续参见图16,所述芯片封装结构包括滤波器结构;具体包括:
相对且间隔设置的、电性连接的基板5和晶圆1,晶圆1朝向基板5的表面设置有谐振电路;
基板5朝向晶圆1的表面设置有凹槽51,凹槽51与晶圆1在基板5上的投影边缘对应;
晶圆1的边缘为倒角设置;
凹槽51和倒角4之间设置有封闭基板5和晶圆1之间的间隔的薄膜90,薄膜90、晶圆1和基板5构成空腔;
覆盖晶圆5背离基板的表面、晶圆1的侧壁、薄膜90背离空腔的表面以及基板的封装壳100。
本实施例中不限定基板和晶圆之间的电性连接,可选的,基板5和晶圆1之间通过焊接间隔电性连接。
本实施例中最终形成结构中,通过控制工艺,可以使得薄膜90的厚度范围为5μm-30μm,包括端点值。封装壳100的侧壁厚度范围为50μm-100μm,包括端点值。
所述芯片封装结构为包括滤波器1的系统集成封装(SIP,system in package)模块,所述系统集成封装SIP模块还包括开关(Switch)、低噪声放大器(LNA,low noiseamplifier)或功率放大器(PA,power amplifier),如图17中的20所示,还可以包括电阻电感等无源器件30等结构,本实施例中对此不作限定。
另外,本发明实施例中提供的封装方法,还可以同时封装多个滤波器的晶圆结构,从而得到多颗滤波器封装结构,包括二合一、三合一、四合一等多合一的滤波器产品,还有双工器、四工器、六工器、八工器等多工器产品,直接实现最小的产品结构和最佳性能。
本发明实施例提供的芯片封装结构,由于采用上面实施例中所述的芯片封装方法,能够直接利用现有的工艺和设备,且具有成熟的材料,适用于所有滤波器类型(SAW和BAW的所有类型)的封装,同时,也适用于单颗和多颗的滤波器的封装,而且,还可以适合各种蜂窝终端需要的包括滤波器的射频前端模块(SIP module)的封装。其中蜂窝终端包括2G/3G/4G/5G的手机,WiFi,Pad,智能手表,IOT,汽车等终端场景中的终端设备。
本发明实施例中提供的芯片封装结构,采用上面实施例中所述的芯片封装方法封装得到,通过薄膜连接基板和晶圆,形成空腔,薄膜厚度较薄,对晶圆和基板的体积没有影响,能够达到晶圆级封装的体积,同时,由于通过印刷形成薄膜,无需复杂的工艺,成本上类似覆膜封装,因此,本发明中提供的封装方法得到的芯片既满足体积小的要求,又具有成本较低的特点,兼得了体积小和成本低。
需要说明的是,本说明书中的各个实施例均采用递进的方式描述,每个实施例重点说明的都是与其他实施例的不同之处,各个实施例之间相同相似的部分互相参见即可。
还需要说明的是,在本文中,诸如第一和第二等之类的关系术语仅仅用来将一个实体或者操作与另一个实体或操作区分开来,而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺序。而且,术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含,从而使得包括一系列要素的物品或者设备不仅包括那些要素,而且还包括没有明确列出的其他要素,或者是还包括为这种物品或者设备所固有的要素。在没有更多限制的情况下,由语句“包括一个……”限定的要素,并不排除在包括上述要素的物品或者设备中还存在另外的相同要素。
对所公开的实施例的上述说明,使本领域专业技术人员能够实现或使用本发明。对这些实施例的多种修改对本领域的专业技术人员来说将是显而易见的,本文中所定义的一般原理可以在不脱离本发明的精神或范围的情况下,在其它实施例中实现。因此,本发明将不会被限制于本文所示的这些实施例,而是要符合与本文所公开的原理和新颖特点相一致的最宽的范围。

Claims (11)

1.一种芯片封装方法,其特征在于,所述芯片包括滤波器,所述芯片封装方法包括:
提供晶圆,所述晶圆包括相对设置的第一表面和第二表面,所述晶圆的第一表面形成有所述滤波器的谐振电路和焊垫,且所述晶圆第一表面的边缘为倒角设置;
提供基板,所述基板包括相对设置的第三表面和第四表面,所述基板的第三表面形成有凹槽和焊接部;
将所述晶圆的第一表面与所述基板的第三表面相对设置,将所述焊接部和所述焊垫焊接在一起,使得所述凹槽与所述倒角位置对齐;
提供掩膜板,所述掩膜板套嵌在所述晶圆的四周,且,所述掩膜板的侧壁为相对于所述晶圆侧壁倾斜的表面,所述掩膜板的侧壁沿所述第一表面指向所述第二表面逐渐远离所述晶圆;所述掩膜板的侧壁与所述晶圆侧壁最近的距离大于或等于0,且小于5μm,所述距离是指在垂直于所述晶圆侧壁的方向上的距离;
印刷封装胶材料,所述封装胶材料通过所述掩膜板的倾斜表面落入所述凹槽中,在所述凹槽和所述倒角之间形成封装胶;
沿所述第一表面指向所述第二表面的方向撤离所述掩膜板,所述掩膜板将所述晶圆侧壁多余的封装胶带离,剩余的封装胶在所述倒角和所述凹槽之间形成薄膜,所述薄膜与所述晶圆、所述基板之间形成空腔;
固化薄膜位置的封装胶;
在所述晶圆的第二表面、侧壁以及所述薄膜背离空腔的表面注塑形成封装壳。
2.根据权利要求1所述的芯片封装方法,其特征在于,所述提供晶圆,具体包括:
提供衬底;
在所述衬底的表面形成多个滤波器单元,每个滤波器单元均包括谐振电路和焊垫;
在每个滤波器单元的四周刻蚀形成切割凹槽,所述切割凹槽的宽度比切割刀宽;
采用所述切割刀沿所述切割凹槽,将衬底切割为单颗晶圆,所述晶圆设置有谐振电路的表面的边缘形成倒角。
3.根据权利要求2所述的芯片封装方法,其特征在于,还包括:
在所述焊垫上形成钝化层;
刻蚀所述钝化层,在所述焊垫上形成封闭环形钝化区,用于容纳焊接工艺中的锡膏,使晶圆的焊垫与基板的焊接部按目标位置实现自动对准,以避免锡膏流动。
4.根据权利要求1所述的芯片封装方法,其特征在于,所述封装胶为UV固化类型的树脂材料,常温粘度范围为250pa.s~800pa.s,包括端点值。
5.根据权利要求4所述的芯片封装方法,其特征在于,所述固化薄膜位置的封装胶,具体包括:
采用UV光固化所述薄膜位置的封装胶。
6.根据权利要求1所述的芯片封装方法,其特征在于,所述在所述晶圆的第二表面、侧壁以及所述薄膜背离空腔的表面注塑形成封装壳,具体包括:
提供液体注塑材料;
设置注塑压力范围为15Bar~25Bar,温度范围为145℃~155℃;
在晶圆的第二表面、侧壁以及薄膜背离空腔的表面注塑形成封装壳。
7.一种芯片封装结构,其特征在于,所述芯片封装结构包括滤波器结构;具体包括:
相对且间隔设置的、电性连接的基板和晶圆,所述晶圆朝向所述基板的表面设置有谐振电路;
所述基板朝向所述晶圆的表面设置有凹槽,所述凹槽与所述晶圆在所述基板上的投影边缘对应;
所述晶圆的边缘为倒角设置;
所述凹槽和所述倒角之间设置有封闭所述基板和所述晶圆之间的间隔的薄膜,所述薄膜、所述晶圆和所述基板构成空腔;
覆盖所述晶圆背离所述基板的表面、所述晶圆的侧壁、所述薄膜背离所述空腔的表面以及基板的封装壳。
8.根据权利要求7所述的芯片封装结构,其特征在于,所述基板和所述晶圆通过焊接间隔电性连接。
9.根据权利要求7所述的芯片封装结构,其特征在于,所述薄膜的厚度范围为5μm-30μm,包括端点值。
10.根据权利要求7所述的芯片封装结构,其特征在于,所述封装壳的侧壁厚度范围为50μm-100μm,包括端点值。
11.根据权利要求7所述的芯片封装结构,其特征在于,所述芯片封装结构为包括滤波器的系统集成封装模块,所述系统集成封装模块还包括开关、低噪声放大器或功率放大器。
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