CN110493963A - A kind of pcb board intelligence edge sealing setting method - Google Patents
A kind of pcb board intelligence edge sealing setting method Download PDFInfo
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- CN110493963A CN110493963A CN201910799653.3A CN201910799653A CN110493963A CN 110493963 A CN110493963 A CN 110493963A CN 201910799653 A CN201910799653 A CN 201910799653A CN 110493963 A CN110493963 A CN 110493963A
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0005—Apparatus or processes for manufacturing printed circuits for designing circuits by computer
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
- Y02P90/30—Computing systems specially adapted for manufacturing
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- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Structure Of Printed Boards (AREA)
Abstract
A kind of pcb board intelligence edge sealing setting method, comprising steps of outer-layer circuit edge sealing and generation CCD film internal layer circuit edge sealing and the generation CCD film；Solder mask edge sealing and the generation CCD film；Character layer edge sealing and the generation CCD film；Drilling, adds tooling hole automatically, which includes target hole, CCD para-position hole, rivet hole, item number hole, uropore, and all kinds of via holes are changed in addition, finally optimizes drilling, adjustment drilling-machine shifter distance and time；Auxiliary layer produces all kinds of auxiliary layers, including shelves point, consent, V-CUT layers；Storage stores the data information set, directly handles according to the intelligent automatic edge sealing that step S1-S6 carries out pcb board.Automatic processing of the present invention increases substantially person works' efficiency and accuracy rate.Optimize drilling, save drilling-machine shifter distance and time, reduce cost of manufacture and improves production efficiency.
Description
Technical field
The invention belongs to pcb board processing technique field, specifically a kind of pcb board intelligence edge sealing setting method.
Background technique
In process, edge sealing processing is a wherein procedure to pcb board.Edge sealing processing is should not by the side of pcb board
Copper is spread, distance of the copper apart from edges of boards on this usual pcb board of edge sealing distance.If the edge sealing processing of pcb board is bad, it is easy to make it
Edges of boards expose, and will receive the liquid medicine corrosion of strong acid, highly basic, on the one hand there are biggish adverse effect, shadows to product quality
Product electrical characteristic is rung, the fraction defective of product is high.Existing edge sealing not smart enoughization, leads to inefficiency.
Summary of the invention
In order to solve the above technical problems, the present invention provides a kind of pcb board intelligence edge sealing setting methods.
In order to solve the above-mentioned technical problem, the present invention takes following technical scheme:
A kind of pcb board intelligence edge sealing setting method, comprising the following steps:
S1, outer-layer circuit edge sealing and the generation CCD film, generate the positive outer layer positive film according to sets requirement or negative film technique are luxuriant and rich with fragrance
Then woods is laid with copper sheet and copper billet in outer layer PANL edge sealing, add graphical symbol automatically, generates the outer-layer circuit CCD para-position film；
S2, internal layer circuit edge sealing and generates the CCD film, according to each self-generating internal layer positive form film of the other attribute of pcb board layer or
Then person's negative form film adds graphical symbol in internal layer, generate the internal layer circuit CCD para-position film；
S3, solder mask edge sealing and the generation CCD film；
S4, character layer edge sealing and the generation CCD film；
S5, drilling, adds tooling hole, which includes target hole, CCD para-position hole, rivet hole, item number hole, uropore, is added automatically
Add all kinds of via holes of change, finally optimizes drilling, adjustment drilling-machine shifter distance and time；
S6, auxiliary layer produce all kinds of auxiliary layers, including shelves point, consent, V-CUT layers；
S7, storage store the data information set, and the intelligent automatic edge sealing of pcb board is directly carried out according to step S1-S6
Processing.
S8 is uploaded, and the Panel data that edge sealing is completed are uploaded to ERP system.
The step S1 is specifically included:
It is not laid with copper sheet then when selecting outer layer negative film；
When selecting outer layer positive, it is laid with copper sheet and circle copper billet in PANEL edges of boards, is laid with away from edges of boards 16mm distance areas
Copper sheet, remaining PANEL edges of boards are laid with circle copper billet；
The graphical symbol added in outer-layer circuit includes that positioning line fault PAD, the variegated ink added in PANEL edges of boards route aligns
PAD, CCD hanging plate hole and corresponding line, variegated ink contraposition PAD are located at PANEL edges of boards route, there are two CCD hanging plate hole is set, and
And the Y axis coordinate constant distance of two CCD hanging plate holes is 255mm；
8 groups of holes PIN are added in PANEL edges of boards route, two one group, upper and lower two groups opposite differentiations are respectively used to route and welding resistance
Process；
In the other serial number of each sandwich circuit automatic discrimination number of plies adding layers of PANEL edges of boards；
CCD para-position PAD is added in PANEL edges of boards top line and wiring underlayer, CCD pairs of the CCD para-position PAD of top layer and bottom
Position PAD is inconsistent；
Film service life, record figure and the data information for adding route are added outside PANEL edges of boards, figure dynamic adds
Add, to adapt to different PANEL height, data information includes producer's information, the other information of layer, Time of Day, each layer residual copper ratio letter
Breath；
Welding resistance CCD para-position PAD is added in PANEL edges of boards, windowing keeps smaller than PAD；
Slice hole PAD, interlayer alignment PAD are added in PANEL edges of boards, slice hole PAD corresponds to the drilling layer of PANEL plate, interlayer
PAD addition a pair and position are aligned in the corner of PANEL edges of boards, and a pair of interlayer alignment PAD is not on same edges of boards.
The step S2 further include:
Positive or negative film operation are carried out according to the other attribute names judgement of the layer of internal layer；
Film service life label graphic is added on the side Panel of internal layer, film service condition is recorded convenient for operator, carries out the film
Service life statistics；
The Panel totality residual copper ratio area and ratio of each internal layer are calculated, record information on the side Panel and is stored in item number, just
In checking.
The step S3 further include:
The windowing of diameter 1.00mm, slice hole PAD para postion addition resistance are added on the corresponding position welding resistance CCD para-position PAD
Weldering windowing；
Windowing is added at the other serial number of line layer.
There are VCUT the side Panel addition VCUT lead windowing, facilitate in producers' production process into
Row alignment operation；
Solder mask colors marker graphic is added on the side Panel, facilitates the proper use of Printing ink producing of generation personnel.
The step S4 character layer edge sealing specifically includes:, according to the information of pcb board, automatic addition contraposition PAD, sequence position
It sets, character essential information, then generates the character layer CCD para-position film；
When recognizing character layer, judge that current character layer for single or double layer, and carries out corresponding single or double mark.
The step S5 is specifically included:
The location hole that size is 3.175mm is set, which fixes at a distance from PANEL edges of boards, and addition size is
The CCD para-position hole of 3.175 or 3.20mm；
The hole VCUT and the hole site VCUT, size 3.20mm is added as needed；
Item number hole is generated, is defined according to item number；
The different size of hole PIN is added, the position in the hole PIN is consistent with outer-layer circuit；
When the pcb board number of plies >=6 or when manually selecting rivet hole, rivet hole will be added automatically, the position of the rivet hole and interior layer line
Road PAD is consistent；
Automatic to add harmomegathus instrument connection when the pcb board number of plies >=4 layer, position is consistent with internal layer circuit；
Automatic addition pressing gong boundary layer, automatically generates pressing gong band according to Panel data, adds alignment target hole in gong band, most
Output gong tape file file name formats are " item number name .rout " automatically afterwards；
When adding uropore, the point of addition of uropore is not fixed, and spatially judges to add in vacant position；
When pcb board is multi-layer board, target drilling layer " BK " is generated, adds target hole in this layer, position is consistent with internal layer circuit.
The graphical symbol added on the internal layer circuit includes target, rivet, harmomegathus test PAD and butterfly PAD.
The step S8 is specifically included:
By the plating area of the top/bottom in Panel in outer-layer circuit, plating ratio is uploaded to ERP system.When for multi-layer board
When will press target data, the information such as internal layer residual copper ratio are uploaded to ERP system.
Automatic processing of the present invention increases substantially person works' efficiency and accuracy rate.Optimize drilling, saves drilling-machine shifter
Distance and time reduce cost of manufacture and improve production efficiency.
Specific embodiment
To further understand the features of the present invention, technological means and specific purposes achieved, function, below with reference to
Present invention is further described in detail for specific embodiment.
Present invention discloses a kind of pcb board intelligence edge sealing setting methods, comprising the following steps:
S1, outer-layer circuit edge sealing and the generation CCD film, generate the positive outer layer positive film according to sets requirement or negative film technique are luxuriant and rich with fragrance
Then woods is laid with copper sheet and copper billet in outer layer PANL edge sealing, add graphical symbol automatically, generates the outer-layer circuit CCD para-position film,
The graphical symbol includes that graphical symbols, the intelligences such as registration holes PAD, CCD para-position PAD, variegated ink contraposition PAD adjust all kinds of figures
Shape character position, it is ensured that its location consistency and accuracy.
S2, internal layer circuit edge sealing and the generation CCD film, it is luxuriant and rich with fragrance according to each self-generating internal layer positive form of the other attribute of pcb board layer
Woods or the negative form film, then add graphical symbol in internal layer, and addition target, rivet, harmomegathus test PAD and butterfly PAD
Equal graphical symbols, intelligence adjust all kinds of graphical symbol positions, it is ensured that its location consistency and accuracy quickly generate interior layer line
The road CCD para-position film.
S3, solder mask edge sealing and the generation CCD film, it is automatic to add welding resistance contraposition PAD, resistance according to wiring board essential information
Weld PIN, welding resistance essential information and the windowing of all kinds of tooling holes etc..Then the CCD para-position film is generated.
S4, character layer edge sealing and the generation CCD film, according to wiring board essential information, automatic addition contraposition PAD, sequence position
It sets, character essential information etc..Then the CCD para-position film is generated.
S5, drilling, adds tooling hole, which includes target hole, CCD para-position hole, rivet hole, item number hole, tail automatically
Hole, according to the actual requirement of client factory, all kinds of via holes are changed in addition, finally optimize drilling, save drilling-machine shifter distance and
Time.According to the technological requirements, plum blossom pilot hole is added for the hole of >=4.0mm, i.e., 4 3.175mm is added according to hole center
Hole.According to the technological requirements, the short slot of 2 times of groove widths is less than or equal to for flute length, adds short slot pilot hole, pilot hole size is slot
Long -0.5mm skews short slot, and elongation length is 0.075mm, and skewing gradient is 3 °
S6, auxiliary layer produce all kinds of auxiliary layers, including shelves point, consent, V-CUT layers, according to the position set, carry out automatic
Metaplasia produces, and does not need to be manually operated, improve efficiency.
S7, storage store the data information set, directly carry out the intelligent automatic of pcb board according to step S1-S6
Edge sealing processing, data information cannot rechange, once storing to be conducive to manage and check.
S8 uploads, the data information of demand is uploaded to ERP data system.
The step S1 is specifically included:
It is not laid with copper sheet then when selecting outer layer negative film；
When selecting outer layer positive, it is laid with copper sheet and circle copper billet in PANEL edges of boards, is laid with away from edges of boards 16mm distance areas
Copper sheet, remaining PANEL edges of boards are laid with circle copper billet, guarantee the accuracy of edge sealing processing, will not be damaged to edges of boards.
PANEL edges of boards route add positioning line fault PAD, coordinate position by with drilling layer aperture 3.175mm location hole
Unanimously.Pcb board has multilayered structure, corresponding to have drilling layer, and drilling layer is equipped with the location hole that aperture is 3.175mm.
Variegated ink, which is added, in PANEL edges of boards route aligns PAD, line layer and welding resistance where the variegated ink contraposition PAD
Layer corresponding position graphical symbol is consistent.
CCD hanging plate hole and corresponding line, the line layer and drilling layer coordinate position one at place are added in PANEL edges of boards route
It causes, and the Y axis coordinate constant distance of two CCD hanging plate holes is 255mm, cannot be changed.
Add 8 groups of holes PIN in PANEL edges of boards route, two one group, upper and lower two groups opposite to distinguish, be respectively used to route and
Welding resistance process.
In the other serial number of each sandwich circuit automatic discrimination number of plies adding layers of PANEL edges of boards.
CCD para-position PAD is added in PANEL edges of boards top line and wiring underlayer, the CCD para-position PAD of top layer and bottom
CCD para-position PAD is inconsistent.
Film service life, record figure and the data information for adding route are added outside PANEL edges of boards, the figure is dynamic
State addition, to adapt to different PANEL height, data information includes producer's information, the other information of layer, Time of Day, each residual copper of layer
Rate information etc..
Welding resistance CCD para-position PAD is added in PANEL edges of boards, windowing keeps smaller than PAD.
Slice hole PAD is added in PANEL edges of boards, coordinate position is consistent with drilling layer.
In PANEL edges of boards interlayer alignment PAD, interlayer alignment PAD addition is a pair of and position is in the corner of PANEL edges of boards, and
And a pair of interlayer alignment PAD is arranged in corner location not on same edges of boards.
The step S2 further include:
Positive or negative film operation are carried out according to the other attribute names judgement of the layer of internal layer；
Film service life label graphic is added on the side Panel of internal layer, film service condition is recorded convenient for operator, carries out the film
Service life statistics；
The Panel totality residual copper ratio area and ratio of each internal layer are calculated, record information on the side Panel and is stored in item number, just
In checking.
Solder mask processing in the step S3, further includes:
The windowing of diameter 1.00mm, slice hole PAD para postion addition resistance are added on the corresponding position welding resistance CCD para-position PAD
Weldering windowing.
Windowing is added at the other serial number of line layer.
The step S4 character layer edge sealing specifically includes:, according to the information of pcb board, automatic addition contraposition PAD, sequence position
It sets, character essential information, then generates the character layer CCD para-position film.
When recognizing character layer, judge that current character layer for single or double layer, and carries out corresponding single or double mark,
To facilitate differentiation.
Character color marker graphic is added on the side Panel, facilitates the proper use of Printing ink producing of generation personnel.
In the step S5 drilling setting, specifically include:
The location hole that size is 3.175mm is set, which fixes at a distance from PANEL edges of boards, and addition size is
The CCD para-position hole of 3.175 or 3.20mm.
The hole VCUT and the hole site VCUT, size 3.20mm is added as needed.
According to item number, item number hole is generated, without change after generation.
The different size of hole PIN is added, the position in the hole PIN is consistent with outer-layer circuit.
In addition, when the pcb board number of plies >=6 or when manually selecting rivet hole rivet hole will be added automatically, the position of the rivet hole
It is consistent with internal layer circuit PAD, the right and left coordinate relative distance 10mm.
Automatic to add harmomegathus instrument connection when the pcb board number of plies >=4 layer, position is consistent with internal layer circuit.
When adding uropore, the point of addition of uropore is not fixed, and spatially judges to add in vacant position.
When pcb board is multi-layer board, target drilling layer " BK " is generated, adds target hole, position and internal layer circuit one in this layer
It causes.
The graphical symbol added on the internal layer circuit includes target, rivet, harmomegathus test PAD and butterfly PAD.For interior
Sandwich circuit has corresponding addition manner.
The following graphical symbol of non-HDI plate and rule are applicable in all internal layers: L2 L3 L4 L5 L6 L7 L8 L9 L10
L11, L: representing layer, and number represents the number of plies.
For program by automatic addition butterfly PAD, butterfly PAD and the corresponding graphical symbol of adjacent inner layer are inconsistent, in setting on the contrary
It sets.
When adding rivet, three groups of rivet PAD of automatic addition, one group 8, one group is normal rivet PAD, one group of rivet hot
PAD, one group is spare rivet.
When target is set, three groups of target holes are added automatically, one group 3, one is normally applicable target hole, and one group is spare
Target, one group is long side target, and long side target is random target, has the probability Chong Die with other objects, is verified, is mentioned
High accuracy.
Solid copper sheet is added by the side PNL, and adds spew groove.
For auxiliary layer, catch point layer DH, with the layer that drills for according to production DH, the hole set of aperture≤0.60mm and not consent
Except the catch point of unilateral 2mil bigger than hole；The hole set of aperture > 0.60mm and not consent removes the shelves point of unilateral 0.10mm smaller than hole.
Consent layer is made according to design requirement, adds the essential informations such as item number for consent layer.
The present invention, by the setting above to each layer information of pcb board, so that the damage process of edge sealing processing set
At after preservation, input slab information will recall corresponding setup parameter, to be done directly edge sealing processing.
It should be noted that these are only the preferred embodiment of the present invention, it is not intended to restrict the invention, although ginseng
According to embodiment, invention is explained in detail, for those skilled in the art, still can be to aforementioned reality
Technical solution documented by example is applied to modify or equivalent replacement of some of the technical features, but it is all in this hair
Within bright spirit and principle, any modification, equivalent replacement, improvement and so on should be included in protection scope of the present invention.
Claims (6)
1. a kind of pcb board intelligence edge sealing setting method, comprising the following steps:
S1, outer-layer circuit edge sealing and the generation CCD film, generate the positive outer layer positive film according to sets requirement or negative film technique are luxuriant and rich with fragrance
Then woods is laid with copper sheet and copper billet in outer layer PANL edge sealing, add graphical symbol automatically, generates the outer-layer circuit CCD para-position film；
S2, internal layer circuit edge sealing and generates the CCD film, according to each self-generating internal layer positive form film of the other attribute of pcb board layer or
Then person's negative form film adds graphical symbol in internal layer, generate the internal layer circuit CCD para-position film；
S3, solder mask edge sealing and the generation CCD film；
S4, character layer edge sealing and the generation CCD film；
S5, drilling, adds tooling hole, which includes target hole, CCD para-position hole, rivet hole, item number hole, uropore, is added automatically
Add all kinds of via holes of change, finally optimizes drilling, adjustment drilling-machine shifter distance and time；
S6, auxiliary layer produce all kinds of auxiliary layers, including shelves point, consent, V-CUT layers；
S7, storage store the data information set, and the intelligent automatic edge sealing of pcb board is directly carried out according to step S1-S6
Processing；S8 uploads, the data information of demand is uploaded to ERP data system.
2. pcb board intelligence edge sealing setting method according to claim 1, which is characterized in that the step S1 is specifically included:
It is not laid with copper sheet then when selecting outer layer negative film；
When selecting outer layer positive, it is laid with copper sheet and circle copper billet in PANEL edges of boards, is laid with away from edges of boards 16mm distance areas
Copper sheet, remaining PANEL edges of boards are laid with circle copper billet；
The graphical symbol added in outer-layer circuit includes that positioning line fault PAD, the variegated ink added in PANEL edges of boards route aligns
PAD, CCD hanging plate hole and corresponding line, variegated ink contraposition PAD are located at PANEL edges of boards route, there are two CCD hanging plate hole is set, and
And the Y axis coordinate constant distance of two CCD hanging plate holes is 255mm；
8 groups of holes PIN are added in PANEL edges of boards route, two one group, upper and lower two groups opposite differentiations are respectively used to route and welding resistance
Process；
In the other serial number of each sandwich circuit automatic discrimination number of plies adding layers of PANEL edges of boards；
CCD para-position PAD is added in PANEL edges of boards top line and wiring underlayer, CCD pairs of the CCD para-position PAD of top layer and bottom
Position PAD is inconsistent；
Film service life, record figure and the data information for adding route are added outside PANEL edges of boards, figure dynamic adds
Add, to adapt to different PANEL height, data information includes producer's information, the other information of layer, Time of Day, each layer residual copper ratio letter
Breath；
Welding resistance CCD para-position PAD is added in PANEL edges of boards, windowing keeps smaller than PAD；
Slice hole PAD, interlayer alignment PAD are added in PANEL edges of boards, slice hole PAD corresponds to the drilling layer of PANEL plate, interlayer
PAD addition a pair and position are aligned in the corner of PANEL edges of boards, and a pair of interlayer alignment PAD is not on same edges of boards.
3. pcb board intelligence edge sealing setting method according to claim 1, which is characterized in that the step S3 further include:
The windowing of diameter 1.00mm, slice hole PAD para postion addition resistance are added on the corresponding position welding resistance CCD para-position PAD
Weldering windowing；
Windowing is added at the other serial number of line layer.
4. pcb board intelligence edge sealing setting method according to claim 1, which is characterized in that the step S4 character layer envelope
While specifically including:, according to the information of pcb board, then automatic addition contraposition PAD, sequence position, character essential information generate word
Accord with the layer CCD para-position film；
When recognizing character layer, judge that current character layer for single or double layer, and carries out corresponding single or double mark.
5. pcb board intelligence edge sealing setting method according to claim 1, which is characterized in that the step S5 is specifically included:
The location hole that size is 3.175mm is set, which fixes at a distance from PANEL edges of boards, and addition size is
The CCD para-position hole of 3.175 or 3.20mm；
The hole VCUT and the hole site VCUT, size 3.20mm is added as needed；
Item number hole is generated, is defined according to item number；
The different size of hole PIN is added, the position in the hole PIN is consistent with outer-layer circuit；
When the pcb board number of plies >=6 or when manually selecting rivet hole, rivet hole will be added automatically, the position of the rivet hole and interior layer line
Road PAD is consistent；
Automatic to add harmomegathus instrument connection when the pcb board number of plies >=4 layer, position is consistent with internal layer circuit；
When adding uropore, the point of addition of uropore is not fixed, and spatially judges to add in vacant position；
When pcb board is multi-layer board, target drilling layer " BK " is generated, adds target hole in this layer, position is consistent with internal layer circuit.
6. pcb board intelligence edge sealing setting method according to claim 1, which is characterized in that added on the internal layer circuit
Graphical symbol include target, rivet, harmomegathus test PAD and butterfly PAD.
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| CN117764045A (en) * | 2024-02-21 | 2024-03-26 | 深圳捷多邦科技有限公司 | Method and device for generating PCB whole board data and corresponding storage medium |
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| CN117764045B (en) * | 2024-02-21 | 2024-04-26 | 深圳捷多邦科技有限公司 | Method and device for generating PCB whole board data and corresponding storage medium |
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| CN110493963B (en) | 2022-06-03 |
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