CN110459555A - Manufacturing process method of the back side illumination image sensor crystal round fringes without silicon fiml defect - Google Patents

Manufacturing process method of the back side illumination image sensor crystal round fringes without silicon fiml defect Download PDF

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Publication number
CN110459555A
CN110459555A CN201910809140.6A CN201910809140A CN110459555A CN 110459555 A CN110459555 A CN 110459555A CN 201910809140 A CN201910809140 A CN 201910809140A CN 110459555 A CN110459555 A CN 110459555A
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China
Prior art keywords
wafer
back side
image sensor
illumination image
side illumination
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CN201910809140.6A
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Chinese (zh)
Inventor
李彦庆
陈艳明
马志超
方小磊
张凯
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Changchun Long Round Chen Microelectronic Technology Co Ltd
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Changchun Long Round Chen Microelectronic Technology Co Ltd
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Priority to CN201910809140.6A priority Critical patent/CN110459555A/en
Publication of CN110459555A publication Critical patent/CN110459555A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers
    • H01L21/02005Preparing bulk and homogeneous wafers
    • H01L21/02008Multistep processes
    • H01L21/0201Specific process step
    • H01L21/02013Grinding, lapping
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers
    • H01L21/02005Preparing bulk and homogeneous wafers
    • H01L21/02008Multistep processes
    • H01L21/0201Specific process step
    • H01L21/02016Backside treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers
    • H01L21/02005Preparing bulk and homogeneous wafers
    • H01L21/02008Multistep processes
    • H01L21/0201Specific process step
    • H01L21/02021Edge treatment, chamfering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/1464Back illuminated imager structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14683Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/14687Wafer level processing

Abstract

A kind of manufacturing process method the invention discloses back side illumination image sensor crystal round fringes without silicon fiml defect belongs to field of semiconductor manufacture, and this method is by the way that a piece of wafer A with imaging sensor and another carrying wafer B to be bonded at normal temperatures and pressures;After bonding, the weak silicon fiml of mechanical edging technique removal two panels crystal round fringes bonding force is used;To 15 μm -40 μm of specific thickness, microscope macro -graph, back side illumination image sensor edge occurs wafer A mechanical reduction without silicon fiml damaging problem after bonding.The present invention realizes that a possibility that damaging to silicon fiml zero is thinned in mechanical lapping in back side illumination image sensor wafer while not increasing technique manufacturing cost.

Description

Manufacturing process method of the back side illumination image sensor crystal round fringes without silicon fiml defect
Technical field
The invention belongs to field of semiconductor manufacture, and in particular to a kind of back side illumination image sensor crystal round fringes are scarce without silicon fiml Sunken manufacturing process method.
Background technique
The technique manufacturing process of existing back side illumination image sensor is: 1, the wafer A growth with image sensor devices The oxide layer is carried out planarization processing, wafer A table by chemically-mechanicapolish polishing (CMP) technique by the oxide layer of 3000A-5000A Face oxide layer removal amount 1000A-3000A, measurement wafer A inner flat degree difference guarantees less than 0.5 μm after removing edge 5mm; 2, back side illumination image sensor wafer bonding technique is by wafer A and band with image sensor devices and bonding photo-etching mark Have bonding photo-etching mark wafer B bonding, two panels wafer bonding face be all front (wafer A front edge bonding before need into Row edging technique, general width 2mm-3mm, 50 μm -100 μm of depth);3, the crystalline substance of back side illumination image sensor will be finally made as Circle A, by mechanical thinning process by its thinning back side to 15 μm -40 μm of range.
Wherein, lead to wafer since chemical-mechanical polishing mathing platform is not high to crystal round fringes planarization working ability in step 1 The edge A flatness is poor, and the bonding force at edge is caused to be less than inside wafer bonding force, and step 2 carries out mechanical reduction in wafer A When, since the active force of mechanical emery wheel is larger, the wafer of edge can directly generate the situation of dark line or the breakage of edge silicon, this When the defect of kind of silicon fiml breakage will lead to subsequent encapsulation, when wafer is cut, there is dark line or at edge by diamond tool sector-meeting Damaged silicon fiml causes bigger damage, and when cutting directly results in silicon fiml residue and splashes crystal column surface, causes Particulate Pollution, When encapsulating cutting crystal wafer, blade, which encounters particulate matter, can damage device inside wafer A, directly contribute waste product.
Summary of the invention
The purpose of the present invention is to propose to a kind of manufacturing process of the back side illumination image sensor crystal round fringes without silicon fiml defect Method, this method is by the way that a piece of wafer A with imaging sensor and another carrying wafer B to be bonded at normal temperatures and pressures; After bonding, the weak silicon fiml of mechanical edging technique removal crystal round fringes bonding force is used;Wafer A mechanical reduction is shown to specific thickness Micro mirror macro -graph, back side illumination image sensor edge occur without silicon fiml damaging problem.
The present invention be above-mentioned purpose the technical solution adopted is that: back side illumination image sensor crystal round fringes are without silicon fiml defect Manufacturing process method, which is characterized in that include the following steps, and following steps carry out in order:
Step 1: providing, to be bonded wafer A and wafer B: wafer A is identical with wafer B size, and wafer A is as device crystalline substance Circle, inside have back side illumination image sensor, and surface is attached with silicon dioxide film, and the front of wafer A is as bonding face, Yu Jingyuan The first photo-etching mark is provided on the bonding face of A;Wafer B is attached with oxide layer as carrying wafer, surface, and wafer B is just Face is provided with the second photo-etching mark on the bonding face of Yu Jingyuan B as bonding face;
Step 2: wafer A is cleaned by twice RCA cleaning process, surface particles are removed, so that wafer A surface particles Degree is greater than 0.2 μm less than 20;
Wherein, first of RCA cleaning process, temperature is 80 DEG C when cleaning, and cleaning solution uses hydrogen peroxide H2O2, water H2O With the mixed liquor of ammonium hydroxide NH4OH, match as hydrogen peroxide H2O2: water H2O: ammonium hydroxide NH4OH=1:4:50;Second RCA cleaning Technique, temperature is 35 DEG C when cleaning, and cleaning solution matches chlorine using the mixed liquor of hydrogen chloride HCL, hydrogen peroxide H2O2 and water H2O Change hydrogen HCL: hydrogen peroxide H2O2: water H2O=1:2:6;
Step 3: the first photo-etching mark is aligned with the second photo-etching mark, under normal temperature and pressure conditions by wafer A and wafer B Bonding, the first photo-etching mark and the second photo-etching mark drift rate are less than 50 μm after bonding, and the wafer after bonding is filled with nitrogen It anneals in baking oven, 300 DEG C -400 DEG C of annealing temperature, annealing time 1h-2h;
Step 4: the wafer A after para-linkage carries out edging processing, it is 2.5mm-3mm, depth 725 that wafer A, which grinds off at edge width, μm -745 μm of silicon guarantees that particle of the surface wafer A greater than 0.2 μm is less than 20;
Step 5: the back side wafer A carries out mechanical reduction after para-linkage after edging, it is ground to a thickness of 15 μm -50 μm, shows Micro mirror inspection, wafer A edge-smoothing is without breakage after bonding.
Preferably, it is 200 ㎜ that the wafer A and wafer B, which choose diameter, and silicon substrate is with a thickness of 725 μm, the p-type of crystal orientation<100> Wafer.
Preferably, it is 300 ㎜ that the wafer A and wafer B, which choose diameter, and silicon substrate is with a thickness of 775 μm, the p-type of crystal orientation<100> Wafer.
Further, wafer A by reinforcing plasma deposition mode growth thickness is 3000A-5000A in the step 1 Silicon dioxide film, growth temperature are chemically-mechanicapolish polished less than 500 DEG C, by wafer A by CMP machine platform, removal with a thickness of The silicon dioxide film of 1000A-3000A, removal edge 5mm place's measurement, diameter is 200 ㎜, silicon substrate is with a thickness of 725 μm of wafer A Flatness is less than 0.5 μm.
Further, wafer A by reinforcing plasma deposition mode growth thickness is 3000A-5000A in the step 1 Silicon dioxide film, growth temperature are chemically-mechanicapolish polished less than 500 DEG C, by wafer A by CMP machine platform, removal with a thickness of The silicon dioxide film of 1000A-3000A, removal edge 5mm place's measurement, diameter is 300 ㎜, silicon substrate is with a thickness of 775 μm of wafer A Flatness is less than 0.2 μm.
Further, the oxidated layer thickness of the wafer B surface is 100A-300A.
Manufacturing process method of the back side illumination image sensor crystal round fringes without silicon fiml defect, it is characterised in that: institute Step 4 is stated, the wafer A after para-linkage carries out edging treatment process, and edger unit uses diamond blade #400, rotating speed of flail It is 20000 revs/min.
Through the above design, the present invention can be brought the following benefits: existing back side illumination image sensor adds Work technique is often adjusted CMP process using many experiments or bought advanced to make wafer A's to have good flatness CMP machine platform.Current technological level, CMP machine platform have no idea to realize that the flatness at crystal round fringes is consistent with inside wafer. So while doing many experiments or purchasing new CMP machine platform, board capability is not achieved, and flatness is still at crystal round fringes It cannot effectively solve.Silicon fiml at the out-of-flatness of edge by the way of edging, is used diamond after being first bonded by the present invention Knife is ground off, and the situation of dark line or silicon fiml breakage is generated at the silicon fiml for avoiding bonding force weak in mechanical reduction.The present invention is not Increase technique manufacturing cost while, realize back side illumination image sensor wafer mechanical lapping be thinned to silicon fiml zero damage can It can property.
Specific embodiment
The present invention relates to a kind of back side illumination image sensor wafers to use the process optimization of edging technique removal silicon fiml defect Method.In order to illustrate more clearly of the present invention, below with reference to preferred embodiment, the present invention is described further.This field skill Art personnel should understand that.Specifically described content is illustrative and be not restrictive below, in not departing from claim In the case where the invention mechanism and range that are illustrated, user can carry out various changes to following parameters.In order to avoid obscuring Essence of the invention, well known method and process are not described in detail.
Manufacturing process method of the back side illumination image sensor crystal round fringes without silicon fiml defect, includes the following steps:
Step 1: preparing the wafer of the identical size of two panels, respectively wafer A and wafer B, two wafers can be diameter and are 200 ㎜, silicon substrate is with a thickness of 725 μm, the p-type wafer of crystal orientation<100>, and being also possible to two panels diameter is 300 ㎜, silicon substrate with a thickness of 775 μm, the p-type wafer of crystal orientation<100>, but the silicon substrate thickness and diameter of two wafers are all the same;
For wafer A as device wafers, inside has back side illumination image sensor, and the surface wafer A grows layer of silicon dioxide Film, the front of wafer A are provided with the first photo-etching mark on the bonding face of Yu Jingyuan A as bonding face;Wafer B is brilliant as carrying Circle, the oxide layer that surface is attached with a thickness of 100A-300A, the front of wafer B is as bonding face, the bonding face of Yu Jingyuan B On be provided with the second photo-etching mark;
The silicon dioxide film that the specific surface wafer A is 3000A-5000A by reinforcement plasma deposition mode growth thickness, Growth temperature is chemically-mechanicapolish polished less than 500 DEG C, by wafer A by CMP machine platform, is removed with a thickness of 1000A-3000A's Silicon dioxide film is removed and is measured at edge 5mm, guarantees that, as selected 200 ㎜ of diameter, silicon substrate is put down with a thickness of 725 μm of wafer A Smooth degree is less than 0.5 μm, or selection 300 ㎜ of diameter, and silicon substrate is with a thickness of 775 μm of wafer A, and flatness is less than 0.2 μm;
First photo-etching mark and the second photo-etching mark are used to do alignment mark when two panels wafer bonding;
Step 2: wafer A is cleaned by twice RCA cleaning process, surface particles are removed, so that wafer A surface particles Degree is greater than 0.2 μm less than 20;
Wherein, first of RCA cleaning process, temperature is 80 DEG C when cleaning, and cleaning solution uses hydrogen peroxide H2O2, water H2O With the mixed liquor of ammonium hydroxide NH4OH, match as hydrogen peroxide H2O2: water H2O: ammonium hydroxide NH4OH=1:4:50;Second RCA cleaning Technique, temperature is 35 DEG C when cleaning, and cleaning solution matches chlorine using the mixed liquor of hydrogen chloride HCL, hydrogen peroxide H2O2 and water H2O Change hydrogen HCL: hydrogen peroxide H2O2: water H2O=1:2:6;
Step 3: wafer A and wafer B is carried out Direct Bonding using normal temperature and pressure bonding apparatus, photo-etching mark pair is utilized Drift rate less than 50 μm, anneal in an oven by the wafer after bonding after quasi- bonding, and 300 DEG C -400 DEG C of annealing process temperature, Filled with nitrogen in baking oven, annealing process time 1h-2h, interface forms covalent bond, bonding force 1.5J/ after realizing two panels wafer bonding m2-2J/m2;
Step 4: being got rid of the weak edge of two panels wafer bonding power using edging technique, the wafer A after bonding is ground Side technique, edger unit carry out technique processing using diamond blade #400, and revolving speed is 20000 turns of revolving speed per minute.After bonding Wafer A technological standards be that it is 2.5mm-3mm that edge, which grinds off width, the silicon that 725 μm -745 μm of depth, granularity is greater than 0.2 μm of Grain is less than 20;
Step 5: carrying out mechanical thinning process after edging technique.The back side wafer A passes through mechanical emery wheel after bonding, is ground to 15 μm -40 μm of thickness, microscope macro -graph, wafer A edge-smoothing is without breakage after bonding.

Claims (7)

1. manufacturing process method of the back side illumination image sensor crystal round fringes without silicon fiml defect, which is characterized in that including walking as follows Suddenly, and following steps carry out in order:
Step 1: providing, to be bonded wafer A and wafer B: wafer A is identical with wafer B size, and wafer A is interior as device wafers Portion has back side illumination image sensor, and surface is attached with silicon dioxide film, and the front of wafer A is as bonding face, the key of Yu Jingyuan A The first photo-etching mark is provided on conjunction face;For wafer B as carrying wafer, surface is attached with oxide layer, the positive conduct of wafer B Bonding face is provided with the second photo-etching mark on the bonding face of Yu Jingyuan B;
Step 2: wafer A is cleaned by twice RCA cleaning process, surface particles are removed, so that wafer A surface particles degree is big In 0.2 μm less than 20;
Wherein, first of RCA cleaning process, temperature is 80 DEG C when cleaning, and cleaning solution uses hydrogen peroxide H2O2, water H2O and ammonia The mixed liquor of water NH4OH matches as hydrogen peroxide H2O2: water H2O: ammonium hydroxide NH4OH=1:4:50;Second RCA cleaning process, Temperature is 35 DEG C when cleaning, and cleaning solution matches hydrogen chloride using the mixed liquor of hydrogen chloride HCL, hydrogen peroxide H2O2 and water H2O HCL: hydrogen peroxide H2O2: water H2O=1:2:6;
Step 3: the first photo-etching mark is aligned with the second photo-etching mark, wafer A and wafer B are bonded under normal temperature and pressure conditions, The first photo-etching mark and the second photo-etching mark drift rate are less than 50 μm after bonding, and the wafer after bonding is in the baking oven filled with nitrogen It anneals, 300 DEG C -400 DEG C of annealing temperature, annealing time 1h-2h;
Step 4: the wafer A after para-linkage carries out edging processing, it is 2.5mm-3mm, 725 μm of depth-that wafer A, which grinds off at edge width, 745 μm of silicon guarantees that particle of the surface wafer A greater than 0.2 μm is less than 20;
Step 5: after edging, the back side wafer A carries out mechanical reduction after para-linkage, is ground to a thickness of 15 μm -50 μm, microscope It checks, wafer A edge-smoothing is without breakage after bonding.
2. manufacturing process method of the back side illumination image sensor crystal round fringes according to claim 1 without silicon fiml defect, Be characterized in that: it is 200 ㎜ that the wafer A and wafer B, which choose diameter, and silicon substrate is with a thickness of 725 μm, the p-type wafer of crystal orientation<100>.
3. manufacturing process method of the back side illumination image sensor crystal round fringes according to claim 1 without silicon fiml defect, Be characterized in that: it is 300 ㎜ that the wafer A and wafer B, which choose diameter, and silicon substrate is with a thickness of 775 μm, the p-type wafer of crystal orientation<100>.
4. manufacturing process method of the back side illumination image sensor crystal round fringes according to claim 1 or 2 without silicon fiml defect, It is characterized by: wafer A is by reinforcing the dioxy that plasma deposition mode growth thickness is 3000A-5000A in the step 1 SiClx film, growth temperature are chemically-mechanicapolish polished less than 500 DEG C, by wafer A by CMP machine platform, are removed with a thickness of 1000A- The silicon dioxide film of 3000A, removal edge 5mm place's measurement, diameter is 200 ㎜, silicon substrate is with a thickness of 725 μm of wafer A flatness Less than 0.5 μm.
5. manufacturing process method of the back side illumination image sensor crystal round fringes according to claim 1 or 3 without silicon fiml defect, It is characterized by: wafer A is by reinforcing the dioxy that plasma deposition mode growth thickness is 3000A-5000A in the step 1 SiClx film, growth temperature are chemically-mechanicapolish polished less than 500 DEG C, by wafer A by CMP machine platform, are removed with a thickness of 1000A- The silicon dioxide film of 3000A, removal edge 5mm place's measurement, diameter is 300 ㎜, silicon substrate is with a thickness of 775 μm of wafer A flatness It is less than 0.2 μm.
6. manufacturing process side of the back side illumination image sensor crystal round fringes according to claim 1,2 or 3 without silicon fiml defect Method, it is characterised in that: the oxidated layer thickness of the wafer B surface is 100A-300A.
7. manufacturing process method of the back side illumination image sensor crystal round fringes according to claim 1 without silicon fiml defect, Be characterized in that: the step 4, the wafer A after para-linkage carry out edging treatment process, and edger unit uses diamond blade # 400, rotating speed of flail is 20000 revs/min.
CN201910809140.6A 2019-08-29 2019-08-29 Manufacturing process method of the back side illumination image sensor crystal round fringes without silicon fiml defect Pending CN110459555A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110993490A (en) * 2019-12-30 2020-04-10 长春长光圆辰微电子技术有限公司 Method for realizing heterogeneous bonding of chips with different sizes
WO2022057013A1 (en) * 2020-09-16 2022-03-24 武汉新芯集成电路制造有限公司 Wafer bonding method

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JPH1126337A (en) * 1997-07-02 1999-01-29 Shin Etsu Handotai Co Ltd Manufacture of laminated substrate
CN101088154A (en) * 2004-12-24 2007-12-12 S.O.I.Tec绝缘体上硅技术公司 Method for treating the surface of a wafer
CN101217107A (en) * 2007-12-28 2008-07-09 上海新傲科技有限公司 SOI preparation method of bonding and wafer thinning
CN102017092A (en) * 2008-09-02 2011-04-13 S.O.I.Tec绝缘体上硅技术公司 A progressive trimming method
CN103871870A (en) * 2014-02-28 2014-06-18 武汉新芯集成电路制造有限公司 Method for removing wafer bonding edge defect
CN104733300A (en) * 2013-12-23 2015-06-24 中芯国际集成电路制造(上海)有限公司 Bonded wafer thinning method

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1126337A (en) * 1997-07-02 1999-01-29 Shin Etsu Handotai Co Ltd Manufacture of laminated substrate
CN101088154A (en) * 2004-12-24 2007-12-12 S.O.I.Tec绝缘体上硅技术公司 Method for treating the surface of a wafer
CN101217107A (en) * 2007-12-28 2008-07-09 上海新傲科技有限公司 SOI preparation method of bonding and wafer thinning
CN102017092A (en) * 2008-09-02 2011-04-13 S.O.I.Tec绝缘体上硅技术公司 A progressive trimming method
CN104733300A (en) * 2013-12-23 2015-06-24 中芯国际集成电路制造(上海)有限公司 Bonded wafer thinning method
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110993490A (en) * 2019-12-30 2020-04-10 长春长光圆辰微电子技术有限公司 Method for realizing heterogeneous bonding of chips with different sizes
WO2022057013A1 (en) * 2020-09-16 2022-03-24 武汉新芯集成电路制造有限公司 Wafer bonding method

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