JP7153578B2 - Silicon wafer manufacturing method - Google Patents

Description

The present invention relates to a method for manufacturing a silicon wafer having a notch and the silicon wafer.

Silicon wafer manufacturing methods include a slicing process for cutting out a thin disk-shaped wafer from a single crystal ingot, a chamfering process for preventing chipping and cracking of the outer periphery of the wafer, a lapping process for flattening the wafer or a double-sided grinding process, Generally, the etching process to remove distortion and contaminants of the wafer caused by lapping and double-side grinding, the mirror polishing process to mirror-polish the main surface of the wafer, and the mirror-beveling process to mirror-finish the chamfered portion of the wafer are performed in sequence. is.

In the etching process described above, etching conditions with a relatively low etching rate and high wafer shape retention are used in order to meet recent strict flatness requirements. For example, alkaline aqueous solutions such as sodium hydroxide and potassium hydroxide are widely used in the manufacture of silicon wafers.

It is known that in etching at a relatively slow rate, the etching rate depends on the crystal orientation, and the etching rate differs depending on the crystal plane (see Patent Document 1, for example).

In order to indicate the crystal orientation of the wafer, a V-shaped notch called a notch is often provided on the outer periphery of the wafer. For example, in the case of a silicon wafer whose main crystal plane is the (100) plane, notches are formed to indicate the <100> orientation, the <110> orientation, or the like.

In general, mirror chamfering of a notch is performed by rotating a disk-shaped or ring-shaped polishing member made of urethane foam or non-woven fabric and having a peripheral portion matching the shape of the notch and pressing the polishing member against the notch. On the other hand, the mirror surface chamfering of the outer periphery of the wafer, excluding notches, is performed by rotating a cylindrical drum on which a polishing cloth is attached while rotating the wafer at a constant speed, thereby pressing the polishing cloth against the outer periphery of the wafer.

Mirror chamfering is performed until the outer peripheral portion of the wafer is completely mirror-finished in order to prevent chipping and dust generation in the integrated circuit manufacturing process. Silicon wafers in which the peripheral portion of the wafer has not been sufficiently mirror-finished in the mirror chamfering process are judged as defective products in the subsequent inspection process, and cannot be shipped as products.

JP-A-2001-87996

However, when a product wafer is produced through an etching process, the slanted portion of the chamfered portion of the notch connected to the main surface of the wafer (hereinafter simply referred to as the slanted portion of the notch) is left unpolished, resulting in a defective product in the inspection process. There were times when it became When the present inventor investigated the cause of this, it was found that the above-mentioned polishing residue was caused by etching, which caused projections on the slopes of the notches, which were not sufficiently mirror-finished by mirror chamfering and remained.

The present inventor investigated the reason for the formation of protrusions on the sloped portion of the notch due to etching, and found that crystal planes with different etching rates are mixed and easily exposed in the sloped portion of the notch. It was found that the low crystal planes were not sufficiently etched and became protrusions.

In order to prevent the above-mentioned protrusions generated by etching from remaining after polishing, tape chamfering, which processes the outer peripheral portion of the wafer using a tape on which abrasive grains are carried on the surface after the etching process, is added, or mirror chamfering is performed. However, these methods are not desirable because they cause problems such as an increase in cost and a decrease in productivity.

The present invention has been made in consideration of the above-mentioned problems, and suppresses the formation of protrusions, which are the cause of polishing residue, on the slope of the notch due to etching. It is an object of the present invention to provide a method for manufacturing a silicon wafer and a silicon wafer that can prevent the generation of residue.

The present invention has been made to achieve the above objects, and includes a chamfering process for chamfering by grinding the peripheral edge of a silicon wafer having a notch;
After the chamfering step, a lapping or double-sided grinding step of performing lapping or double-sided grinding processing on the main surface of the silicon wafer;
an etching step of etching the silicon wafer after the lapping or double-side grinding step;
A method for manufacturing a silicon wafer, which includes, after the etching step, a step of performing a mirror-like chamfering process on the chamfered portion of the silicon wafer,
In the cross-sectional shape of the chamfered portion of the notch of the silicon wafer, the inclination angle of the inclined portion connected to the first main surface of the silicon wafer with respect to the first main surface is θ1, and the second surface of the silicon wafer is When the inclination angle with respect to the second main surface of the inclined portion connected to the main surface is defined as θ2,
In the chamfering step, the chamfering process is performed so that the inclination angles θ1 and θ2 of the inclined portions of the notches are 12° or less.

With such a method for manufacturing a silicon wafer, it is possible to prevent crystal planes having different etching rates from being mixed and exposed at the inclined portion of the notch by the chamfering process. As a result, it is possible to prevent the formation of protrusions on the inclined portions of the notch due to etching, and it is possible to prevent the occurrence of polishing residues due to the protrusions in the notch of the product wafer after mirror chamfering.

Further, at this time, in the chamfering step, the chamfering is preferably performed so that the inclination angles θ1 and θ2 of the inclined portions of the notches are 10° or more.

By doing so, it is possible to prevent the rinsing liquid containing particles from easily adhering to the main surface in the etching process of the device forming process.

Further, at this time, the chamfering process in the chamfering step can be performed by contacting the peripheral edge portion of the silicon wafer with a groove formed in a grindstone and shaping the peripheral edge portion of the silicon wafer into the shape of the groove of the grindstone. can.

As a result, the periphery of the silicon wafer can be easily formed into a desired chamfered shape.

Further, at this time, the silicon wafer may have a (100) crystal plane orientation of the main surface and a <100> crystal orientation of the notch.

The present invention can be suitably used for such a silicon wafer, and thereby, the notch inclined portion of the silicon wafer having the crystal plane orientation of the main surface of (100) and the crystal orientation of the notch of <100>. , it is possible to prevent the occurrence of protrusions due to etching, and to prevent the occurrence of polishing residue in the notch of the product wafer.

The present invention also provides a silicon wafer having a notch,
In the cross-sectional shape of the chamfered portion of the notch of the silicon wafer, the inclination angle of the inclined portion connected to the first main surface of the silicon wafer with respect to the first main surface is θ1, and the second main surface of the silicon wafer is When the inclination angle with respect to the second main surface of the inclined portion connecting to the surface is defined as θ2,
A silicon wafer is provided, wherein the inclination angles θ1 and θ2 of the inclined portions of the notches are 12° or less.

With such a silicon wafer, it is possible to prevent crystal planes having different etching rates from being mixed and exposed at the inclined portion of the notch. Therefore, the silicon wafer can be prevented from producing projections on the slope of the notch when it is subjected to an etching process, and it is possible to prevent the occurrence of polishing residues due to projections when it is subjected to a mirror chamfering process.

At this time, it is preferable that the inclination angles θ1 and θ2 of the inclined portion of the notch are 10° or more.

With such a device, it is possible to prevent the rinse liquid containing particles from easily adhering to the main surface in the etching process of the device forming process.

In the silicon wafer, the crystal plane orientation of the main surface may be (100), and the crystal orientation of the notch may be <100>.

With such a material, even if it is subjected to an etching process or a mirror chamfering process, there is no occurrence of protrusions on the slope of the notch and no polishing residue, and the crystal plane orientation of the main surface is (100) and the crystal orientation of the notch is < 100> silicon wafer.

As described above, according to the method for manufacturing a silicon wafer and the silicon wafer of the present invention, it is possible to prevent the occurrence of projections on the inclined portions of the notches due to etching, and the notches of the product wafer after the mirror chamfering process have projections originating from the projections. It is possible to prevent the occurrence of polishing residue.

It is an overall view showing an example of a silicon wafer of the present invention. It is explanatory drawing explaining the cross-sectional shape of a chamfer. FIG. 4 is an explanatory view of the chamfered portion of the notch seen from a direction perpendicular to the main surface; BRIEF DESCRIPTION OF THE DRAWINGS It is a flowchart which shows an example of the manufacturing method of the silicon wafer of this invention. It is explanatory drawing which shows an example of the chamfering grindstone used at a chamfering process. FIG. 10 is an explanatory diagram for explaining mirror chamfering of a notch;

The present invention will be described in detail below, but the present invention is not limited to these.

As described above, when etching is performed, protrusions are generated on the slopes of the notches, and the protrusions are not sufficiently mirror-finished by the mirror-beveling process.

The present inventor investigated the reason why the protrusion is generated in the sloped portion of the notch by etching. It was found that the surface was not sufficiently etched and became protruding.

As a result of intensive studies on the above problems, the present inventors found that chamfering is performed so that the inclination angles θ1 and θ2 of the cross-sectional shape dimensions of the chamfered portion of the notch are 12° or less, so that the inclined portion of the notch can be It was discovered that it is possible to prevent the exposure of mixed crystal planes with different etching rates. As a result, the inventors have found that it is possible to suppress the formation of protrusions on the sloped portion of the notch during etching, and to prevent the occurrence of polishing residue due to the protrusions on the sloped portion of the notch of the product wafer after mirror chamfering. completed.

Hereinafter, the silicon wafer of the present invention will be described in more detail with reference to the drawings.
1-3 show silicon wafers of the present invention. FIG. 1 is an overall view. 2 is a cross-sectional view of the chamfered portion of the notch, and FIG. 3 is an explanatory view of the chamfered portion of the notch viewed from a direction perpendicular to the main surface.
As shown in FIG. 1, the silicon wafer 20 of the present invention has a notch N. As shown in FIG. It has main surfaces M (first main surface and second main surface) on its front and rear surfaces, and has a chamfered portion C on its periphery.
Here, a silicon wafer in which the main surface M has a crystal plane orientation of (100) and the notch N has a crystal orientation of <100> is exemplified, but the present invention is not limited to this. In a conventional silicon wafer having such a relationship between crystal plane orientations, etc., when etching is performed, projections are likely to occur at the chamfered portion of the notch due to the dependence of the etching rate on the crystal orientation. Wafers can be prevented from producing such protrusions.

As shown in FIG. 2, the cross-sectional shape of the chamfered portion 5 of the notch N (the notch portion of the chamfered portion C) is the same as the inclined portion (first inclined portion 3 ) and has an inclined portion (second inclined portion 4 ) connected to the second main surface 2 .
Here, if the inclination angle of the first inclined portion 3 with respect to the first main surface 1 is defined as θ1, and the inclination angle of the second inclined portion 4 with respect to the second main surface 2 is defined as θ2, the inclination at this notch N is The inclination angles θ1 and θ2 of the portions 3 and 4 are both 12° or less.

Here, as shown in FIG. 3, the chamfered portion 5 of the notch N is composed of a notch slope 7 and a notch bottom 8 when viewed from a direction perpendicular to the main surface 6 (near the notch on the main surface M). In the case of a wafer having a notch crystal orientation of <100>, the protrusions that are usually a problem in conventional silicon wafers are notched by alkaline etching. It is generated in the projection generating region 9 of the slope 7 . When viewed in cross-section, the protrusion generation region 9 coincides with the positions of the first inclined portion 3 and the second inclined portion 4 in FIG.

However, in the present invention, since the inclination angles θ1 and θ2 are 12° or less as described above, it is possible to prevent projections that may occur during etching. Furthermore, it is possible to prevent the occurrence of polishing residue after mirror chamfering due to the protrusions. Therefore, when inspecting product wafers in the wafer inspection process, it is possible to prevent defective products due to unpolished products.

The lower limits of the inclination angles θ1 and θ2 should be greater than 0°, preferably 5° or more, and more preferably 10° or more. By setting the inclination angles θ1 and θ2 to 5° or more, it is possible to prevent the rinsing liquid containing particles from easily adhering to the main surface in the etching process of the device forming process. Further, by setting the angle to 10° or more, the adhesion of the rinse liquid can be prevented more effectively.

Hereinafter, the method for manufacturing a silicon wafer according to the present invention will be described in more detail with reference to the drawings.
FIG. 4 shows an example of the flow of the silicon wafer manufacturing method of the present invention.
(Wafer preparation process)
First, a silicon wafer having a notch is prepared by slicing a silicon single crystal ingot. For example, a notched silicon wafer can be obtained by growing a silicon single crystal ingot by the Czochralski method or the like, forming a notch in the ingot, and then slicing the ingot using a wire saw or the like.
Here, as an example, a thin disk-shaped silicon wafer having a (100) crystal plane as a main surface and a <100> crystal orientation of a notch is used.

(Chamfering process)
Next, a chamfering process is performed.
A chamfering whetstone that can be used in this chamfering step will be described with reference to FIG. As shown in FIG. 5, the chamfering whetstone 10 has a groove 11 formed therein. The shape of this groove 11 is formed in the shape of the desired chamfered portion of the silicon wafer finally obtained by the chamfering process. That is, when used for chamfering a notch, the inclination angle of the two slopes 12 of the groove 11 with respect to the horizontal plane is 12° or less, which are the same inclination angles as θ1 and θ2 in FIG.
When chamfering is performed using such a chamfering grindstone 10, the peripheral edge of the silicon wafer W is brought into contact with the groove 11 formed in the chamfering grindstone 10, and the peripheral edge of the silicon wafer W is pressed against the groove 11 of the chamfering grindstone 10. It can be done by molding into a shape. That is, by using the chamfering grindstone 10 having the groove shape designed as described above so that the inclination angles θ1 and θ2 at the chamfered portion 5 of the notch N are 12° or less, the notch N can be formed into a desired chamfered shape (inclination The angle θ1 and θ2 are 12° or less).

Moreover, it is preferable to set the inclination angles θ1 and θ2 to 5° or more, more preferably 10° or more. With such an inclination angle, it is possible to effectively prevent the rinsing liquid containing particles from easily adhering to the main surface in the etching process of the device forming process.

Also, the inclination angle of the chamfered portion of the wafer peripheral portion excluding the notch may be the same as or different from the inclination angles .theta.1 and .theta.2 of the notch. Chamfering can be performed using a different chamfering grindstone having a groove shape designed to form the desired angle of inclination.
In addition, although the example using the chamfering grindstone 10 as shown in FIG. 5 was mentioned here as a chamfering process, it is not limited to this. The chamfering device to be used can be determined as appropriate, as long as the chamfering can be performed so that the inclination angles θ1 and θ2 of the inclined portions of the chamfered portion of the notch are 12° or less.

(Lapping or double-sided grinding process)
After the chamfering process is performed as described above, the main surface of the wafer is subjected to lapping or double-sided grinding. For example, it can be performed using a conventional lapping machine, double-headed grinding machine, or the like.

(Etching process)
An etching step is then performed to remove processing distortions and contaminants introduced into the wafer by the lapping or double-side grinding process. The etching process is preferably performed using an alkaline aqueous solution such as sodium hydroxide or potassium hydroxide, which has a relatively slow etching rate. As a result, the shape change of the main surface of the wafer due to etching can be relatively suppressed, and etching can be performed without deteriorating the flatness of the wafer, which has been improved by lapping or double-sided grinding.

As described above, in the conventional silicon wafer manufacturing method, protrusions are generated after etching in the protrusion generation region 9 of FIG. However, in the case of the manufacturing method of the present invention, the inclination angles θ1 and θ2 are 12° or less due to the chamfering in the previous chamfering process, so that the region (which coincides with the inclined portions 3 and 4 of the notch N) is It is possible to prevent crystal planes having different etching rates from being exposed together, thereby preventing the formation of protrusions after etching.

(Mirror polishing process)
A mirror polishing step is performed on the etched wafer. For example, both sides or one side of the main surface can be mirror-polished using a conventional polishing apparatus or the like.

(Mirror chamfering process)
After the main surface is mirror-polished, the mirror chamfering step is carried out.
FIG. 6 is an explanatory diagram for explaining the notch mirror chamfering process. For mirror chamfering of the notch N, for example, a disc-shaped or ring-shaped polishing member 13 made of urethane foam or non-woven fabric having a peripheral portion matching the shape of the notch N can be used.
Mirror chamfering can be performed by pressing the polishing member 13 against the notch N while rotating. At this time, the wafer W is tilted at a predetermined tilt angle with respect to the polishing member 13 .
The mirror surface chamfering of the outer periphery of the wafer excluding the notch N can be performed, for example, by rotating the cylindrical drum on which the polishing cloth is adhered while rotating the wafer at a constant speed, thereby pressing the polishing cloth against the outer periphery of the wafer.

Through the steps described above, a notched silicon wafer as a product is manufactured. As described above, the inclination angles θ1 and θ2 of the inclined portions 3 and 4 of the chamfered portion 5 of the notch N are set to 12° or less in the chamfering process. It is possible to prevent the occurrence of polishing residues due to protrusions on the inclined portions of the notch N of the product wafer obtained through the mirror chamfering process.

In addition, by appropriately changing the mirror chamfering conditions, for example, the tilt angle of the wafer with respect to the polishing member 13, according to the values of the tilt angles θ1 and θ2, it is possible to more reliably prevent the occurrence of polishing residue due to protrusions. be able to.

It should be noted that the present invention may include other steps generally used in the production of silicon wafers. For example, a laser mark process of irradiating the silicon wafer surface with a laser for marking, a cleaning process, a heat treatment process, etc. may be included before and after each of the above processes.

EXAMPLES The present invention will be described in more detail below with reference to Examples and Comparative Examples, but the present invention is not limited to these.

(Examples 1-3)
A thin disk-shaped silicon wafer having a (100) crystal plane on the main surface of the wafer and a <100> notch orientation was prepared, and chamfering was performed on the silicon wafer. At this time, the chamfering of the notch is performed by a chamfering whetstone as shown in FIG. It was carried out using a diamond grindstone with
Through this chamfering step, silicon wafers having notches with inclination angles θ1 and θ2 of 10° in Example 1, 12° in Example 2, and 5° in Example 3 were obtained.

A lapping process was performed on the silicon wafers chamfered as described above. The lapping process was carried out by preparing a lapping device, sandwiching the wafer held by carriers between upper and lower surface plates, and rotating the surface plates and the carrier while supplying free abrasive grains such as alumina.

After the lapping process was completed, an etching process was performed to remove processing distortions and contaminants introduced into the wafer. Etching was performed by immersing the silicon wafer in an aqueous sodium hydroxide solution heated to a liquid temperature of 84° C. for about 10 minutes.

After the etching process, the sloped portion of the notch slope of the silicon wafer was observed with a microscope to investigate the presence or absence of protrusions. Further, a 100 μm square image of the inclined portion of the notch slope was obtained by microscopic observation, and the area value of the protrusions occupying the image was calculated to quantify the degree of protrusion generation. An image of 100 μm square was acquired from each inclined portion on both the front side and the back side of the wafer, and the area value was the average of the values on the front side and the back side. The term “protrusion” as used here means that the crystal plane with a relatively low etching rate exposed at the inclined part of the notch is not sufficiently etched compared to the surrounding crystal plane with a relatively high etching rate, and thus, after etching, the crystal plane has a relatively low etching rate. It refers to a portion having a height of several micrometers to several tens of micrometers from the surroundings.
The results are shown in Table 1 below. As shown in Table 1, in Examples 1 to 3, the area value of the projection was 0 μm ² , and no projection was found on the inclined portion of the chamfered portion of the notch after the etching process.

After that, the main surface of the silicon wafer was mirror-polished using a polishing apparatus, and then mirror-beveled. The mirror chamfering of the notch was performed by preparing a ring-shaped urethane foam polishing member having a peripheral portion matching the shape of the notch, as shown in FIG. 6, and pressing it against the notch while rotating it. Mirror chamfering of the outer periphery of the wafer, excluding notches, was performed by rotating the cylindrical drum on which the polishing cloth was adhered while rotating the wafer at a constant speed, thereby pressing the polishing cloth against the outer periphery of the wafer.

For the product wafers produced through the above steps, the presence or absence of polishing residues derived from notch protrusions was determined by microscopic observation. Table 1 shows the presence or absence of polishing residues originating from projections. As a result, in Examples 1 to 3, no polishing residue due to projections was found in the notches.

As described above, in Examples 1 to 3, no protrusions were generated in the inclined portions of the chamfered portions of the notches due to etching, and no polishing residues due to protrusions were generated in the notches of the product wafers.

(Comparative Examples 1 to 6)
A thin disk-shaped silicon wafer similar to that in Example 1, in which the crystal plane of the wafer main surface is the (100) plane and the notch orientation is <100>, is prepared, and the chamfered cross-sectional shape dimension of the notch is obtained for the silicon wafer. Chamfering was performed using a diamond grindstone having a groove shape designed so that the inclination angles θ1 and θ2 of the inclined portions were larger than 12°.
By this chamfering process, the inclination angles θ1 and θ2 of the notches are 14° (Comparative Example 1), 16° (Comparative Example 2), 18° (Comparative Example 3), 22° (Comparative Example 4), and 24° (Comparative Example 4). Example 5) and 26° (Comparative Example 6) silicon wafers were obtained.

After the chamfering process, under the same conditions as in Example 1, a lapping process and an etching process were successively performed. After the etching step, the inclined portion of the notch slope of the silicon wafer was observed with a microscope, and the presence or absence of protrusions was examined in the same manner as in Example 1. Table 1 lists the results.
In Comparative Examples 1 to 6, projections were observed on the inclined portion of the chamfered portion of the notch. Also, the area value of the protrusion increased as the inclination angles θ1 and θ2 increased.

After that, under the same conditions as in Example 1, a mirror polishing step and a mirror chamfering step were performed.

In the same manner as in Example 1, the presence or absence of polishing residue due to notch projections was determined for the silicon wafers produced through the above steps.
The results are shown in Table 1. In Comparative Examples 1 to 6, polishing residues originating from protrusions were generated in the notches in all cases.

(Comparative Example 7)
A thin disk-shaped silicon wafer similar to that in Example 1, in which the crystal plane of the wafer main surface is the (100) plane and the notch orientation is <100>, is prepared, and the chamfered cross-sectional shape dimension of the notch is obtained for the silicon wafer. Chamfering was performed using a diamond grindstone having a groove shape designed so that the inclination angle θ1 of the inclined portion was 12° and θ2 was 14°.
Through this chamfering step, a silicon wafer having a notch with an inclination angle θ1 of 12° on the front side and an inclination angle θ2 of 14° on the back side was obtained.

After the chamfering process, under the same conditions as in Example 1, a lapping process and an etching process were successively performed. After the etching step, the inclined portion of the notch slope of the silicon wafer was observed with a microscope, and the presence or absence of protrusions was examined in the same manner as in Example 1. Table 1 lists the results.
In Comparative Example 7, projections were observed in the inclined portion of the chamfered portion of the notch on the back side. The area value (378 μm ² ) in Table 1 is the average of the surface side value (0 μm ² ) and the back side value (756 μm ² ).

After that, under the same conditions as in Example 1, a mirror polishing step and a mirror chamfering step were performed.

In the same manner as in Example 1, the presence or absence of polishing residue due to notch projections was determined for the silicon wafers produced through the above steps.
The results are shown in Table 1. In Comparative Example 7, there was no polishing residue due to projections on the notch on the front side, but there was on the back side.

From the above results, in the chamfering process, by performing the chamfering process so that the angles of inclination θ1 and θ2 of the cross-sectional dimensions of the chamfered portion of the notch are 12° or less, a protrusion is formed on the inclined portion of the chamfered portion of the notch by etching. It is possible to prevent the occurrence of this, and it is possible to prevent the occurrence of polishing residue due to protrusions in the notch of the product wafer.

It should be noted that the present invention is not limited to the above embodiments. The above embodiment is an example, and any device that has substantially the same configuration as the technical idea described in the claims of the present invention and produces similar effects is the present invention. It is included in the technical scope of the invention.

DESCRIPTION OF SYMBOLS 1... 1st main surface, 2... 2nd main surface, 3... 1st inclination part, 4... 2nd inclination part,
5... Chamfered portion of notch, 6... Near notch on main surface of wafer, 7... Slope of notch,
8... Notch bottom, 9... Projection generation area, 10... Chamfering grindstone, 11... Groove,
DESCRIPTION OF SYMBOLS 12... Slope of groove 13... Polishing member 20... Silicon wafer of the present invention,
N... Notch, M... Main surface of wafer, C... Chamfered portion, W... Wafer.

Claims (3)

A chamfering step of chamfering by grinding the peripheral edge of a silicon wafer having a notch;
After the chamfering step, a lapping or double-sided grinding step of performing lapping or double-sided grinding processing on the main surface of the silicon wafer;
an etching step of etching the silicon wafer after the lapping or double-side grinding step;
A method for manufacturing a silicon wafer, which includes, after the etching step, a step of performing a mirror-like chamfering process on the chamfered portion of the silicon wafer,
In the cross-sectional shape of the chamfered portion of the notch of the silicon wafer, the inclination angle of the inclined portion connected to the first main surface of the silicon wafer with respect to the first main surface is θ1, and the second surface of the silicon wafer is When the inclination angle of the inclined portion connected to the main surface with respect to the second main surface is defined as θ2,
In the chamfering step, the groove formed in the desired chamfered shape in the grindstone is formed so that the inclination angles θ1 and θ2 of the inclined portions of the notches are 12° or less (excluding 11°) . A method for producing a silicon wafer, wherein the notch of the silicon wafer is brought into contact with the notch, and the notch of the silicon wafer is chamfered by shaping the notch of the silicon wafer into the shape of the groove of the grindstone . 2. The method of manufacturing a silicon wafer according to claim 1, wherein in the chamfering step, the chamfering is performed so that the inclination angles .theta.1 and .theta.2 of the inclined portions of the notches are 10 degrees or more. 3. The silicon wafer according to claim 1, wherein the crystal plane orientation of the main surface of the silicon wafer is (100) and the crystal orientation of the notch is <100>. Production method.

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