CN110444517A - 集成电路封装 - Google Patents

集成电路封装 Download PDF

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Publication number
CN110444517A
CN110444517A CN201910763574.7A CN201910763574A CN110444517A CN 110444517 A CN110444517 A CN 110444517A CN 201910763574 A CN201910763574 A CN 201910763574A CN 110444517 A CN110444517 A CN 110444517A
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CN
China
Prior art keywords
package substrate
layer
chip
centreless
substrate
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CN201910763574.7A
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English (en)
Inventor
陈伦光
谢苑林
陈斌杰
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Taihao Research Co.,Ltd.
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Individual
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Publication of CN110444517A publication Critical patent/CN110444517A/zh
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Abstract

本发明涉及集成电路封装。封装集成电路的技术包括在导电层的相对表面上形成电介质层之前，将芯片附接到导电层。在将芯片布置在导电层上之前，可首先在载体基板上形成导电层。芯片可经由导线或焊锡凸块电气耦合到导电层。在形成电介质层之前将载体基板移除。电介质层可以共同形成用于集成电路封装件的无芯封装基板。

Description

集成电路封装
本申请是申请日为2015年2月6日的名称为“封装集成电路的方法”的中国专利申请201510064086.9的分案申请。
本申请要求于2014年2月7日提交的美国专利申请No.14/175,651的优先权，其全部内容在此通过引用并入本申请。
技术领域
本发明涉及集成电路封装技术。
背景技术
通常，集成电路(IC)芯片被封装以保护芯片免遭外部污染或物理性损坏。除其它以外，IC封装件通常包括基板、设置在基板上的芯片和设置在芯片上方以将热量从IC封装件驱散的散热器。芯片可以以倒装晶片配置或导线键合配置组装在基板上。
在倒装晶片配置中，芯片安装在基板上。当芯片安装在基板上时，它是“倒装的”，以使芯片上的焊锡凸块安置在基板上的相应接触焊盘上。在导线键合配置中，芯片经由键合线电气耦合到基板。然后，来自集成电路芯片的信号可以行进通过导线或焊锡凸块到基板。
由于芯片安装在基板上，所以在完全形成的基板上组装芯片之前，首先形成基板。通常，基板由多个电介质层和夹在电介质层之间的芯层形成。当芯片安装在基板上时，芯层可以为封装结构提供机械支撑。
然而，随着对高速度应用的需求的增长，芯层厚度减小以实现更好的性能。在一些实例中，芯层被完全移除以获得无芯基板。无芯基板通常更薄，并且可提供更好的电气性能。然而，因为无芯基板更薄并且不包括硬芯层，所以与具有芯层的基板相比，其更容易受热变形。
发明内容
提供封装集成电路(IC)的技术。本发明的实施例包括形成具有无芯封装基板的IC封装件的技术。
应该清楚，本发明能够以各种方式实施，诸如工艺、设备、系统和装置。以下描述本发明的若干发明性实施例。
一种封装IC的方法可以包括形成导电层并将IC芯片附接到导电层的表面。在将IC芯片附接到导电层之后，可以在导电层的相对表面上形成多个电介质层。在一个实例中，在导电层上组装IC芯片之前，可以在载体基板上形成导电层。在形成电介质层之前，将载体基板从组装好的IC芯片中移除。
封装IC的另一种方法包括，在载体基板上形成导电层，并将IC安装在导电层上。IC可经由导线或焊锡凸块连接到导电层。在将载体基板剥离之前，将IC包封在模塑料内。在已经剥离载体基板之后，可以在导电层的相对表面上形成封装基板。在一个实施例中，封装基板可以为无芯封装基板。
在另一个实施例中，形成无芯封装基板的一种方法包括将导电层附接到载体基板。然后，将载体基板从导电层中移除。在已经将载体基板从导电层中移除之后，在导电层的表面上形成多个电介质层。多个电介质层可以共同形成无芯封装基板。
附图说明
图1示出根据本发明实施例的示例性导线键合IC封装件。
图2示出根据本发明实施例的示例性倒装晶片IC封装件。
图3A、图3B和图4A-4N示出根据本发明实施例的封装导线键合IC封装件的步骤。
图5A-5P示出根据本发明实施例的封装倒装晶片IC的步骤。
图6示出根据本发明实施例的封装导线键合IC的步骤。
图7示出根据本发明实施例的封装倒装晶片IC的步骤。
具体实施方式
在此提供的实施例包括封装具有无芯基板的集成电路(IC)的技术。
然而，对本领域的技术人员明显的是，本示例性实施例可在没有这些具体细节中的一些或全部的情况下实行。在其它实例中，未详细描述已知操作，以便不必要地模糊本实施例。
图1示出根据本发明实施例的示例性导线键合IC封装件。如图1所示，IC封装件100包括IC 110和基板120。布置在基板120的表面上的IC 110使用粘合剂112附接到基板120。应该注意，粘合剂112可以为导电粘合剂或膏状形式的焊锡。可将IC 110电气连接到基板120的键合线103附接到IC 110表面上的接触焊盘104和基板120上的对应接触焊盘115。通常使用的导线由金(Au)、铝(Al)或铜(Cu)中的任何一种制成。模塑料105将IC 110和导线103包封，以保护IC 110和其他组件(未在图1中示出)以免受潮湿和外部因素影响。作为一个示例，模塑料105可以由环氧树脂制成。
如通常所知的，基板120可通过多个电介质层(图1中未明确示出)形成。基板120中的路由路径122可通过基板120中的多个电介质层路由信号到IC 110或从IC 110路由信号。可以在基板120的底表面上形成焊接掩模125。基板120的底表面上的焊锡球135允许IC封装件100中的IC 110连接到外部电路元件，因此，来自IC 110的信号通过焊锡球135传送至IC封装件100的外部。
图2示出根据本发明实施例的一种示例性倒装晶片IC封装件。在图2的实施例中，IC封装件200包括倒装晶片IC 210、基板120、模塑料105和散热器220。应该清楚，IC封装件200与图1的IC封装100共有类似之处，因此，为简便起见，不再重复以上已经描述过的元件(例如，模塑料105、基板120、路由路径122和焊锡球135)。散热器220设置在IC 210的上方，以将热量从IC封装件200中驱散。散热器220可通过非导电粘合剂222附接到IC 210。
应该注意，图2中示出的IC 210为倒装晶片芯片，其中微凸块206在其表面中的其中一个表面上。微凸块206将IC 210连接到基板120。应该清楚，基板120上的微凸块206之间的腔室可以用底层填充材料212或密封树脂填充，以填充间隙并保护微凸块206与基板120之间的焊锡节点。如上所述，基板120底表面上的焊锡球135可将IC封装件200中的IC 210连接其他电路(例如，印刷电路板(PCB))。因此，来自IC 210的信号可以在通过焊锡球135传送至IC封装件200外部之前，通过基板120中的路由路径122传送。
通常，可通过在现成基板上布置IC形成IC封装件，诸如图1的IC封装件100和图2所示的IC封装件200。例如，在基板上组装IC 210(或图1的IC 110)之前，可以形成基板120、路由路径122和焊锡球135。在一些实例中，在现成基板上组装IC可导致热变形。应该注意，在组装过程期间，相对薄的基板(例如，无芯基板)会更易于热变形。因此，在一些实施例中，在形成基板之前可首先组装IC。作为一个示例，在建立基板之前、形成IC并移除载体之后，可以首先在载体上组装IC，而不是将IC附接到完全形成的基板上。图3A、图3B和图4A-4N示出根据本发明实施例的封装导线键合IC封装件的步骤。
图3A示出具有导电层314的载体基板310。例如，载体基板310可以为FR-4玻璃环氧树脂基板或双马来酰亚胺三嗪(BT)基板或任何其它合适的环氧树脂膏。导电层314可以为铜(Cu)箔，其经由粘合剂312附接到载体基板310。如图3B所示，在已经将导电层314设置在载体基板310上之后，利用干膜316层压导电层314的底表面。在该阶段，掩模(未示出)可用于图像转印工艺(image transfer process)，在该工艺中，一部分干膜316被刻蚀掉。
图4A示出在图像转印工艺之后的导电层314上的干膜316。应该注意，一部分干膜316已经被刻蚀掉，以形成接触焊盘，其用于在稍后阶段中的导线键合IC。图4B示出导电层314上的镍-金(NiAu)电镀层318(或者可选地，钯(Pd)电镀层)，其在干膜316已经被刻蚀掉的区域中。在电镀工艺之后，可将干膜316剥离。图4C示出已经将干膜316(如图4B所示)剥离之后所得到的结构，留下导电层314的表面上的接触焊盘318。图4D示出芯片组装过程之后所得到的结构。导线键合IC 320设置在导电层314的表面上。粘合剂322可用于将导线键合IC 320附接到导电层314。导线323经由接触焊盘318将导线键合IC 320电气连接到导电层314。然后，导线键合IC 320和导线323可以被包封在模塑料305内。
在该阶段中，可以完成芯片组装过程。可以将通过粘合剂312附接到导电层314的载体基板310剥离。应该注意，载体基板310可用作基底，其用于导线键合IC 320的组装以减少热变形，并且一旦已经附接导线键合IC 320，可以将载体基板310移除。图4E示出将载体基板310和粘合剂312从组装的导线键合IC 320中剥离之后所得到的结构。
图4F-4N中的后续步骤示出组装的导线键合IC 320的底部上的基板形成过程。图4F示出层压到导电层314底表面的干膜330的层。在层压过程之后，实施图像转印工艺。图4G示出图像转印工艺之后，所得到的具有刻蚀部分的干膜330。接下来，可将导电层314的一部分刻蚀掉。图4H示出刻蚀过程之后所得到的结构。然后，在图4I中，将干膜330从导电层314中剥离。随后，如图4J所示，在组装的导线键合IC 320的底部，将电介质层410(例如，BT或膜式电介质)层压在剩余的导电层上。应该注意，图4J示出已经执行激光钻孔过程之后的电介质层410。图4K示出在电介质层410中形成导电路径420的金属电镀(例如，铜电镀)过程之后的结构。图4L示出已经形成随后的增层式(build-up)电介质层410和路由路径420之后的结构。应该注意，增层式过程中涉及的具体步骤或具体材料未在此详细描述，以便不必要地模糊本发明。
图4M示出增层式电介质层410的底层上印刷的焊接掩模450。在一个实施例中，在该阶段，增层式电介质层410、路由路径420和焊接掩模450共同形成组装的导线键合IC 320的无芯基板460。在一些实例中，在将焊锡球安装在基板460的底部上之前，可将焊接掩模450移除。图4N示出焊锡球455已经安装在基板460上之后得到的导线键合IC封装件。如关于图1的上述解释，来自导线键合IC 320的信号可行进通过基板460中的路由路径420到达焊锡球455。
图5A-5P示出根据本发明实施例的封装倒装晶片IC的步骤。图5A示出通过粘合剂512附接到载体基板510的导电层514。在随后的阶段中，干膜516经刻蚀以用于凸块焊盘形成。应该注意，载体基板510、粘合剂512、导电层514和干膜516可类似于图3A-3B所示的载体基板310、粘合剂312、导电层314和干膜316。在图像转印之后，可执行金属电镀(例如，Cu电镀)。图5B示出金属电镀之后的结构，在金属电镀中，在干膜516已经刻蚀掉的区域中的导电层514上形成金属(例如，Cu)。
接下来，将干膜516剥离以显露导电层514上电镀的金属(所电镀的金属可以为Cu，并且在图5B和图5C中，导电层514可以为Cu层)。图5C示出已经将图5B的干膜516剥离之后得到的结构。电镀的金属在导电层514上形成多个凸块焊盘513。接下来，在各个凸块焊盘513上执行焊锡印刷。图5D示出各个凸块焊盘514上的焊锡凸块516。在形成焊锡凸块516之后，可将IC芯片设置在焊锡凸块上。在图5E中，倒装晶片IC芯片520设置在焊锡凸块516上。倒装晶片IC芯片520底表面处的接触焊盘可以直接邻近对应的焊锡凸块516设置。焊锡凸块516将倒装晶片IC芯片520连接到导电层514。然后，可将倒装晶片IC芯片520包封在模塑料505中。应该注意，倒装晶片IC芯片520的顶表面可暴露并且不被模塑料505覆盖。
在已经在载体基板510上组装倒装晶片IC芯片520之后，可将载体基板510从组装的芯片中移除。图5F示出图5E中的载体基板510和粘合剂512已经剥离之后得到的结构，留下倒装晶片IC芯片520、模塑料505和导电层514。接下来，将防护层535设置在倒装晶片IC芯片520和模塑料505上。可选地，在将图5E中的载体基板510和粘合剂512剥离之前，可首先将防护层535设置在倒装晶片IC芯片520和模塑料505上。由于倒装晶片IC芯片520的顶表面暴露(即，未被模塑料505覆盖)，所以当在随后的过程步骤(例如，图像转印、铜刻蚀等)中将结构没入液体中时，可需要防护层535保护倒装晶片IC芯片520。防护层535可以为BT层，其通过粘合剂533附接到组装的芯片。在该阶段，可使用干膜530层压导电层514的底表面。接下来，执行图像转印，并且图5H示出图像转印之后得到的干膜530。随后，可执行铜刻蚀，并且将一部分导电层514刻蚀掉。图5I示出在已经执行铜刻蚀之后得到的具有干膜530的结构。
接下来，如图5J所示，将干膜530移除或剥离，留下组装的倒装晶片芯片底部上的刻蚀的导电层514。接下来，执行电介质层压和激光钻孔，以在组装的倒装晶片芯片的底部上形成电介质层。图5K示出在已经形成至少一个电介质层540之后得到的封装结构。如图5L所示，接着执行金属电镀，以在电介质层540中形成导电路径542。通常，封装基板具有多个电介质层，因此，可以在增层式过程中形成具有多个导电路径的多个电介质层540，其中导电路径(例如，通孔和金属迹线)将一个电介质层连接到另一个电介质层。图5M示出在形成随后的增层式电介质层540和导电路径542之后得到的封装结构。在已经形成所有电介质层之后，可执行焊接掩模印刷。图5N示出焊接掩模印刷之后得到的封装结构。在一个实施例中，多个电介质层540连同导电路径542和焊接掩模544共同形成无芯封装基板550。
接下来，执行光刻，并且将焊接掩模544暴露以形成将要被布置在IC封装件底部的焊锡球的开口。图5O示出在封装基板550中得到的焊接掩模544(具有开口)。在该阶段，可将防护层535连同倒装晶片IC芯片520顶部上的粘合剂533移除。图5P示出移除图5G-5O中示出的防护层535和粘合剂533之后的IC封装件。在防护层535已经移除之后，可通过非导电粘合剂562将封盖(lid)560附接到倒装晶片IC芯片520。焊锡球555可相应地安装到IC封装件。如图5P所示，焊锡球555安装或形成在焊接掩模544中的相应开口中。如关于图2的上述解释，来自倒装晶片IC芯片520的信号可行进通过基板550中的路由路径520到达焊锡球555。
图6示出根据本发明实施例的封装导线键合IC的步骤。在步骤610，获得载体基板。在步骤620，将IC芯片组装在载体基板上。在步骤630，形成导线键合连接件，以将IC芯片连接到载体基板上的导电层。如关于图4D的上述解释，布置在载体基板310上的导线键合IC320经由导线323连接到导电层314。在步骤640，将载体基板从组装的晶片中移除。在步骤650，在组装的IC芯片下方形成增层式互连层。在步骤660，在增层式互连层的底层上形成焊锡球。在该阶段，得到的IC封装件可与图4N所示的导线键合IC封装件类似。
图7示出根据本发明实施例的封装倒装晶片IC芯片的步骤。在步骤710，获得载体基板。在步骤720，将倒装晶片IC芯片组装在载体基板上。在步骤730，将载体基板从组装的倒装晶片芯片中移除。在该阶段，组装的倒装晶片芯片可以与如图5E所示的载体基板510上的倒装晶片IC芯片520类似。接下来，在步骤740，在组装的倒装晶片芯片上形成防护层。然后，在步骤750，在组装的倒装晶片芯片下方形成增层式互连层。接下来，在步骤760，将防护层移除并且将封盖附接到组装的倒装晶片IC芯片。在步骤770，在增层式互连层的底层上形成焊锡球(如以上关于图5P所解释)。应该注意，在图6和图7的实施例中，在组装的晶片底部上形成电介质层之前，将晶片或IC芯片组装在载体基板上。在一个实施例中，电介质层形成IC封装件的无芯封装基板，并且在组装的晶片上形成电介质层可以减少封装基板中的热变形。
应该清楚，即使图4A-4N和图5A-5P的实施例中示出了具体配置，但在本文中仍可使用不同的配置。倒装晶片或导线键合球栅阵列IC封装件的使用并非旨在为限制性的，因为在此描述的技术可应用到其它封装配置(例如，散热器球栅阵列(HSBGA)、低轮廓球栅阵列(LBGA)、薄间距球栅阵列(TFBGA)、倒装晶片芯片级封装(FCCSP)等)。
迄今为止，针对可编程逻辑电路描述了本发明实施例。在此描述的方法和装置可并入任何合适的电路中。例如，该方法和装置也可并入各类装置中，诸如微处理器或其它集成电路。仅举几例，示例性集成电路包括可编程阵列逻辑(PAL)、可编程逻辑阵列(PLA)、现场可编程逻辑阵列(FPLA)、电可编程逻辑器件(EPLD)、电可擦除可编程逻辑器件(EEPLD)、逻辑单元阵列(LCA)、现场可编程门阵列(FPGA)、专用标准产品(ASSP)、专用集成电路(ASIC)。
在此描述的可编程逻辑器件可以为数据处理系统的部分，该数据处理系统包括以下组件中的一个或更多个：处理器；存储器；I/O电路和外围器件。数据处理系统能够用于各种应用中，诸如计算机网络、数据网络、仪表、视频处理、数字信号处理或期望使用可编程或可再编程逻辑的优点的任何其它合适的应用。可编程逻辑器件能够用来执行各种逻辑功能。例如，可编程逻辑器件能够配置为与系统处理器协同工作的处理器或控制器。可编程逻辑器件也可用作仲裁器，用于仲裁对数据处理系统中的共享资源的访问。在另一个示例中，可编程逻辑器件能够配置为处理器与系统中的其它组件中的其中一个之间的接口。在一个实施例中，可编程逻辑器件可以为受让人拥有的一系列装置中的一个。
尽管在此以具体顺序描述了方法操作，但应该理解，只要以期望的方式执行重叠操作，其它操作均可在所描述的操作中间执行，所描述的操作可经调整使得它们以在稍微不同的时间发生，或所描述的操作可分布在允许处理操作在与处理相关的各种间隔处发生的系统中。
附加实施例：
附加实施例1.一种封装集成电路的方法，其包括：形成具有第一表面和第二表面的导电层；将集成电路芯片附接到导电层的第一表面；以及在将集成电路芯片附接到导电层的第一表面之后，在导电层的第二表面上形成多个电介质层。
附加实施例2.根据附加实施例1所述的方法，其进一步包括：在将集成电路芯片附接到导电层的第一表面之前，在载体上形成导电层。
附加实施例3.根据附加实施例2所述的方法，其进一步包括：在导电层的第二表面上形成多个电介质层之前，将载体从导电层中移除。
附加实施例4.根据附加实施例3所述的方法，其中，在载体上形成导电层包括：在载体上应用粘合剂层；以及将导电层附接到粘合剂层。
附加实施例5.根据附加实施例1所述的方法，其中，将集成电路芯片附接到导电层的第一表面包括：在集成电路芯片到导电层的第一表面之间形成多条导线；以及在导电层的第二表面上形成多个电介质层之前，将集成电路芯片包封在模塑料内。
附加实施例6.根据附加实施例1所述的方法，其中，将集成电路芯片附接到导电层的第一表面包括：在导电层的第一表面上以倒装晶片配置组装集成电路芯片。
附加实施例7.根据附加实施例6所述的方法，其进一步包括：在集成电路芯片上施加粘合剂层。
附加实施例8.根据附加实施例7所述的方法，其进一步包括：在形成多个电介质层之前，将防护电介质层附接到集成电路芯片上的粘合剂层。
附加实施例9.一种形成集成电路封装件的方法，其包括：在载体基板上形成导电层；将集成电路安装在导电层上；将集成电路包封在模塑料内；以及在将集成电路包封在模塑料内之后，将载体基板从导电层中移除。
附加实施例10.根据附加实施例9所述的方法，其中，将集成电路安装在导电层上包括：将集成电路经由多条键合线耦合到导电层。
附加实施例11.根据附加实施例9所述的方法，其进一步包括：在移除载体基板之后，在导电层上形成多个电介质层。
附加实施例12.根据附加实施例11所述的方法，其进一步包括：在多个电介质层上方形成多个焊锡球。
附加实施例13.根据附加实施例11所述的方法，其中，集成电路包括倒装晶片芯片，该方法进一步包括：在形成多个电介质层之前，在集成电路和模塑料上方形成防护电介质层。
附加实施例14.根据附加实施例13所述的方法，其进一步包括：在形成多个电介质层之后，将防护电介质层移除。
附加实施例15.一种方法，其包括：将导电层附接到载体基板；将载体基板从导电层中移除；以及在将载体基板从导电层移除之后，在导电层上形成多个电介质层，以形成无芯封装基板。
附加实施例16.根据附加实施例15所述的方法，其进一步包括：在移除载体基板之前，在导电层上组装半导体芯片。
附加实施例17.根据附加实施例16所述的方法，其进一步包括：在半导体芯片上形成第一组键合焊盘；以及在导电层上形成第二组键合焊盘，其中在导电层上组装半导体芯片包括，在第一组键合焊盘与第二组键合焊盘之间形成多条导线。
附加实施例18.根据附加实施例17所述的方法，其进一步包括：在形成多个电介质层之前，将半导体芯片和多条导线包封在模塑料内。
附加实施例19.根据附加实施例16所述的方法，其中，在导电层上组装半导体芯片包括：以倒装晶片配置在导电层上组装集成电路；将半导体芯片包封在模塑料内；以及将防护电介质层附接到半导体芯片。
附加实施例20.根据附加实施例16所述的方法，其进一步包括：在无芯封装基板上形成多个焊锡球。
为清楚理解，尽管已经相当详细地描述了前述实施例，但明显的是，在所要求保护的本发明的范围内，可实行具体的变化和修改。因此，本实施例被认为是示例性且非限制性的，并且该发明并非限于在此给出的细节，而是可在所要求保护的范围和等同物内修改。
前述内容仅是对该发明原理的说明，并且在未背离本发明范围和精神的情况下，本领域的技术人员可做出各种修改。前述实施例可单独实施或以任何组合实施。

Claims (20)

1.一种集成电路封装件，其包括：
无芯封装基板，其具有最顶表面；
集成电路芯片，其经由粘合剂层直接附接到所述无芯封装基板的所述最顶表面；以及
模塑料，其形成在所述集成电路芯片和所述无芯封装基板的所述最顶表面的上方。
2.根据权利要求1所述的集成电路封装件，其中，所述无芯封装基板仅包括增层式层和焊接掩模层。
3.根据权利要求2所述的集成电路封装件，其中，所述无芯封装基板具有最底表面，并且所述焊接掩模层形成在所述最底表面处。
4.根据权利要求2所述的集成电路封装件，其中，所述增层式层包括电介质层和路由路径。
5.根据权利要求4所述的集成电路封装件，其中，所述无芯封装基板的所述最顶表面包括导电层的顶表面，所述导电层形成所述路由路径的一部分并且包括用形成所述电介质层的一部分的电介质材料填充的间隙。
6.根据权利要求5所述的集成电路封装件，其进一步包括：
接触焊盘，其形成在所述无芯封装基板的所述最顶表面上，其中，所述接触焊盘从所述无芯封装基板的所述最顶表面突出；和
键合线，其将所述集成电路芯片连接到所述接触焊盘。
7.根据权利要求5所述的集成电路封装件，其进一步包括：
导电微凸块，其从所述无芯封装基板的所述最顶表面突出，并且将所述集成电路芯片电气连接到无芯封装基板。
8.一种系统，其包括：
无芯封装基板，其具有第一表面和第二相对表面，并且仅包括电介质层、互连层和焊接掩模；
集成电路芯片，其安装在所述无芯封装基板的所述第一表面上；
微凸块，其从所述无芯封装基板的所述第一表面突出并且直接形成在所述集成电路芯片下方；以及
模塑料，其封装所述集成电路芯片。
9.根据权利要求8所述的系统，其中限定所述无芯封装基板的所述第一表面的所述无芯封装基板的第一层包括所述电介质层的一部分和所述互连层的一部分。
10.根据权利要求9所述的系统，其中限定所述无芯封装基板的所述第二表面的所述无芯封装基板的第二层包括焊接掩模。
11.根据权利要求10所述的系统，其中插入在所述第一层和所述第二层之间的附加层仅包括所述电介质层的剩余部分和所述互连层的剩余部分。
12.根据权利要求10所述的系统，其进一步包括：
焊球，其形成在所述无芯封装基板的所述第二表面处。
13.根据权利要求12所述的系统，其中，所述互连层将所述微凸块直接连接到所述焊球。
14.根据权利要求9所述的系统，其中，所述模塑料形成为与所述无芯封装基板的所述第一层接触。
15.一种系统，其包括：
无芯封装基板，其具有第一表面和第二相对表面，并且仅包括电介质层、路由路径和焊接掩模；
集成电路芯片，其安装在所述无芯封装基板的所述第一表面上；
接触焊盘，其从所述无芯封装基板的所述第一表面突出；
导线键合，其将所述接触焊盘耦合到所述集成电路芯片；以及
模塑料，其封装所述集成电路芯片。
16.根据权利要求15所述的系统，其中限定所述无芯封装基板的所述第一表面的所述无芯封装基板的第一层包括所述电介质层的一部分和所述路由路径的一部分。
17.根据权利要求16所述的系统，其中限定所述无芯封装基板的所述第二表面的所述无芯封装基板的第二层包括焊接掩模。
18.根据权利要求17所述的系统，其中插入在所述第一层和所述第二层之间的附加层仅包括所述电介质层的剩余部分和所述路由路径的剩余部分。
19.根据权利要求17所述的系统，其进一步包括：
焊球，其形成在所述无芯封装基板的所述第二表面处，其中所述路由路径将所述接触焊盘直接连接到所述焊球。
20.根据权利要求16所述的系统，其中，所述模塑料形成为与所述无芯封装基板的所述第一层接触。
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