CN110313065A - 用于电子应用的石墨烯异质层 - Google Patents
用于电子应用的石墨烯异质层 Download PDFInfo
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- CN110313065A CN110313065A CN201880012859.0A CN201880012859A CN110313065A CN 110313065 A CN110313065 A CN 110313065A CN 201880012859 A CN201880012859 A CN 201880012859A CN 110313065 A CN110313065 A CN 110313065A
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- graphene
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- microelectronic component
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- electric conductor
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Classifications
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
- H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
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- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
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- H—ELECTRICITY
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- H01L29/66037—Multistep manufacturing processes of devices having a semiconductor body comprising semiconducting carbon, e.g. diamond, diamond-like carbon, graphene the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
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- H—ELECTRICITY
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- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
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Abstract
在所描述的示例中,微电子器件(100)包括电导体(106),其包括石墨烯异质层(108)。石墨烯异质层(108)包括交替的石墨烯层(110)和阻挡材料层(112)。每个石墨烯层(110)具有一至两个石墨烯原子层。每个阻挡材料层(112)具有一至三层的六方氮化硼、立方氮化硼和/或氮化铝。石墨烯层(110)和阻挡材料层(112)可以是连续的,或者可以设置在纳米颗粒膜的纳米颗粒中。
Description
技术领域
本发明一般涉及微电子器件,更具体地涉及微电子器件中的石墨烯异质层。
背景技术
随着微电子器件变得更致密并且以更高的速度运行,金属互连(例如镶嵌铜)难以提供低电阻同时获得期望的窄线宽。减小的线宽和电阻要求需要较厚的金属互连,这会不期望地增加相邻互连之间的电容。
发明内容
在所描述的示例中,微电子器件包括电导体,其包括石墨烯异质层。石墨烯异质层包括交替的石墨烯层和阻挡材料层。每个石墨烯层具有一至两个石墨烯原子层。每个阻挡材料层具有一至三层的六方氮化硼、立方氮化硼和/或氮化铝。
附图说明
图1是包含包括石墨烯异质层的电导体的示例微电子器件的横截面。
图2A至图2C是微电子器件的横截面,描绘了形成包含石墨烯异质层的电导体的示例方法的连续阶段。
图3A和图3B是包含包括石墨烯异质层的电导体的另一示例微电子器件的横截面。
图4A和图4B是微电子器件的横截面,描绘了形成包含石墨烯异质层的电导体的另一示例方法的连续阶段。
图5是伯纳尔(Bernal)双层石墨烯的透视图。
图6是包含电导体的示例微电子器件的横截面,所述电导体包括薄膜晶体管中的石墨烯异质层。
图7是包含电导体的示例微电子器件的横截面,所述电导体包括石墨烯异质层作为带隙转换器的天线。
图8A和图8B是包含多个电导体的示例微电子器件的横截面,每个电导体包括石墨烯异质层,提供电容器。
图9A和图9B是包含多个电导体的示例微电子器件的横截面,每个电导体包括石墨烯异质层,以提供超材料结构。
具体实施方式
附图未按比例绘制。示例实施例不受所示出的动作或事件的顺序的限制,因为一些动作或事件可以以不同的顺序发生和/或与其他动作或事件同时发生。此外,并非所有示出的动作或事件都是实现示例实施例的方法所必需的。
微电子器件包括电导体,该电导体包括石墨烯异质层。石墨烯异质层包括多个交替的石墨烯层和阻挡材料层。每个石墨烯层具有一至两个石墨烯原子层。每层阻挡材料具有一至三层的六方氮化硼、立方氮化硼和/或氮化铝。石墨烯异质层可以在电导体上连续,或者可以设置在纳米颗粒膜中。
阻挡材料层可以与石墨烯的晶体结构匹配,使得石墨烯具有高电子迁移率。交替的石墨烯层和阻挡材料层可以使得能够形成具有高石墨烯迁移率的电导体,接触微电子器件的材料,否则如果这些材料直接接触石墨烯的平面表面则会降低石墨烯的迁移率。此外,交替的石墨烯层和阻挡材料层可以使石墨烯异质层中的每个石墨烯层具有接近石墨烯的单个原子层的迁移率的电子迁移率。当多个石墨烯原子层堆叠在一起时,电子迁移率趋于降低。
可以掺杂石墨烯以获得期望的导电类型和薄层电阻。例如,石墨烯可以掺杂有硼、镓、铟、硅、锗、氮、磷、砷、锑和/或氧。石墨烯可以被功能化以提供期望的物理或化学敏感性。例如,石墨烯可以用化学反应物,例如卤素、贵金属、羟基和/或有机分子功能化。除了石墨烯异质层之外,电导体可以包括其他导电材料。
出于本说明书的目的,微电子器件的术语“瞬时顶表面”是指微电子器件的顶表面,其存在于所描述的特定步骤中。在微电子器件的形成中,瞬时顶表面可以从一个步骤到另一个步骤改变。
出于本说明书的目的,术语“横向”是指平行于微电子器件的瞬时顶表面的平面的方向,术语“垂直”是指垂直于微电子器件的瞬时顶表面的平面的方向。
在本说明书中可以使用诸如顶部、底部、前部、后部、上方、上、下方和下的术语。这些术语不限制结构或元件的定位或取向,但它们提供结构或元件之间的空间关系。
图1是包含包括石墨烯异质层的电导体的示例微电子器件的横截面。微电子器件100包括衬底102,衬底102可以包括互连区的介电材料。介电材料可包括基于二氧化硅的介电材料,例如由原硅酸四乙酯(TEOS)形成的二氧化硅、由甲基倍半硅氧烷(MSQ)或氢倍半硅氧烷(HSQ)形成的低k介电材料、有机硅酸盐玻璃(OSG)、磷硅酸盐玻璃(PSG)、硼磷硅酸盐玻璃(BPSG)等的一个或更多个子层。介电材料还可以包括氮化硅、氮氧化硅、碳化硅、碳化硅氮化物等的一个或更多个子层,作为覆盖层和/或蚀刻停止层。介电材料可包括一个或更多个有机介电材料子层,例如聚酰亚胺、苯并环丁烯(BCB)等。
下互连104可以可选地设置在衬底102中。下互连104可以是例如铝互连、镶嵌铜互连或镀铜互连。铝下互连104可以包括具有百分之几的硅、钛和/或铜的铝层,可能在包括钛的粘附层上,并且可能具有铝层上的氮化钛的抗反射层。镶嵌铜下互连104可以包括在钽和/或氮化钽的阻挡层上的铜,其设置在介电材料中的沟槽中。镀铜下互连104可以包括在下互连104的底部的粘附层,并且可以具有设置在下互连104的侧面上的阻挡层。用于下互连104的其他结构和金属在此示例的范围内。
包括石墨烯异质层108的电导体106设置在衬底102上方。石墨烯异质层108包括交替的石墨烯层110和阻挡材料层112。每个石墨烯层110具有一至两个石墨烯原子层。每个阻挡材料层112具有一至三层的六方氮化硼、立方氮化硼和/或氮化铝。在图1中扩大了石墨烯异质层108的厚度,以示出交替的石墨烯层110和阻挡材料层112。石墨烯层110和阻挡材料层112可以在电导体106上连续,如图1所描述的。电导体106可以位于下互连104上方,如图1所描述的。
下通孔114可以穿过石墨烯异质层108设置并延伸到下互连104,从而在电导体106和下互连104之间提供电连接。通过延伸穿过石墨烯异质层108,下通孔114与石墨烯层110电接触。下通孔114可包括钛和氮化钛衬垫,以及填充金属钨。或者,下通孔114可包括钽或氮化钽衬垫和填充金属铜。用于下通孔114的其他结构和金属在此示例的范围内。
上介电层116可以设置在电导体106和衬底102上方。上介电层116可以包括针对衬底102所描述的类似的子层。上互连118可以设置在上介电层116中,在电导体106上方。上互连118可以具有与下互连104类似的结构和组成。上通孔120可以从上互连118穿过石墨烯异质层108来设置,从而在上通孔120和电导体106之间提供电连接。通过延伸穿过石墨烯异质层108,上通孔120与石墨烯层110电接触。上通孔120可具有与下通孔114类似的结构和组成。
可以掺杂石墨烯层110中的一个或更多个以获得期望的导电类型和薄层电阻。石墨烯层110中的一个或更多个可以被功能化以提供期望的物理或化学敏感性。
由于石墨烯层110的高迁移率,石墨烯异质层108可以为电导体106提供比下互连104和/或上互连118中使用的金属低的电阻。电导体106可以提供微电子器件100、诸如电感器、天线、电磁屏蔽的组件的互连或其他功能。
图2A至图2C是微电子器件的横截面,描绘形成包含石墨烯异质层的电导体的示例方法的连续阶段。参照图2A,微电子器件200包括衬底202。衬底202可以包括在衬底202的顶部表面222处的微电子器件200的互连区的介电材料。在图2A中表示为硼反应气体(BORONREAGENT GAS)的硼反应气体流过顶部表面222上方。硼反应气体可包括例如三氯化硼气体。硼反应气在衬底202的顶部表面222上方形成含硼层224。含硼层224可以是,例如,基本上含硼分子的单层。在形成含硼层224之后停止硼反应气体的流动。
参见图2B,在图2B中表示为氮反应气体(NITROGEN REAGENT GAS)的氮反应气体在图2A的含硼层224上方流过。氮反应气体可包括例如氨气。氮反应气体中的氮原子与含硼层224中的硼原子反应,以在衬底202的顶部表面222上方形成氮化硼层212。氮化硼层212可包括六方氮化硼和/或立方氮化硼。氮化硼层212可以是,例如,基本上一个分子厚。在形成氮化硼层212之后,停止氮反应气体的流动。
可以可选地重复参考图2A和图2B描述的步骤,以将氮化硼层212增加到基本上两个分子厚,或者可能三个分子厚。或者,可以利用基本上是一个分子厚的氮化硼层212继续形成微电子器件200。
参考图2C,可以将衬底202加热,例如加热到200℃至400℃的温度。将图2C中表示为碳反应气体(“CARBON REAGENT GAS”)的含碳反应气体流过氮化硼层212上方,并将射频(RF)能量(在图2C中表示为“RF POWER”)施加到含碳反应气体,以生成氮化硼层212上方的碳自由基。含碳反应气体可包括甲烷、直链烷烃如乙烷、丙烷和/或丁烷、醇如乙醇和/或环烃如环丁烷或苯。诸如氢气、氩气和/或氧气的附加气体也可以流过氮化硼212层上方。含碳反应气体中的一些碳分子被RF能量游离,产生碳自由基。一部分碳自由基在氮化硼212层上形成石墨烯层210。石墨烯层210可以是一个原子层厚,或者可以是两个原子层厚。在形成石墨烯层210之后,停止RF能量和含碳反应气体的流动。
或者,石墨烯层210可以通过转移工艺形成,其中石墨烯在合适的衬底上形成并随后转移到微电子器件200。转移工艺允许石墨烯的更高的形成温度,这可以提供减少的缺陷。
氮化硼层212和石墨烯层210是石墨烯异质层208的一部分,石墨烯异质层208是微电子器件200的电导体206的部分。依次重复参考图2A至图2C描述的步骤,以形成附加的交替的氮化硼层212和石墨烯层210以完成石墨烯异质层208。通过本实施例的方法形成的石墨烯层210和氮化硼层212可以在包含石墨烯异质层208的电导体上连续。
氮化硼层212在石墨烯层210之间提供阻挡材料。在该示例的替代形式中,阻挡材料可以由另一种合适的材料提供,即,基本上不导电的材料或者具有大于4电子伏特的带隙能量并且晶格间距接近石墨烯的晶格间距的材料。例如,阻挡材料可以由氮化铝提供。参考图2A和图2B描述的方法可以被认为是原子层沉积(ALD)方法。形成阻挡材料层的其他方法也在该示例的范围内。
随后可以,例如,通过掩模和蚀刻工艺或通过其他方法对石墨烯异质层208进行图案化。石墨烯异质层208可以提供基本上电导体206的全部。
图3A和图3B是包含包括石墨烯异质层的电导体的另一示例微电子器件的横截面。参照图3A,微电子器件300包括衬底302,例如参考图1所描述的。电导体306设置在衬底302上。上介电层316可以设置在电导体306和衬底202上方。电导体306可以是被屏蔽导体,具有屏蔽线326,其横向设置在电导体306附近。
参考图3B,在该示例中,电导体306包括纳米颗粒328,其包括石墨烯异质层。石墨烯异质层包括交替的石墨烯层和阻挡材料层。每个石墨烯层具有一至两个石墨烯原子层。每个阻挡材料层具有一至三层的六方氮化硼、立方氮化硼和/或氮化铝。石墨烯异质层的结构类似于图1中所示的结构。纳米颗粒328的尺寸可小于1微米。电导体306在纳米颗粒328之间基本上不包括有机粘合剂材料。石墨烯异质层可以为电导体306提供比具有类似厚度的金属互连的低的电阻率。
屏蔽线326可以具有类似于电导体306的结构的结构。具有与电导体306类似的结构的附加导电线可以实现期望的电路元件,例如图3A中所描绘的屏蔽线,而不在微电子器件300中引入显著的形貌。
图4A和图4B是微电子器件的横截面,描绘了形成包含石墨烯异质层的电导体的另一示例方法的连续阶段。参照图4A,微电子器件400包括衬底402。衬底402可以包括在衬底402的顶部表面422处的微电子器件400的互连区的介电材料。通过添加工艺434分配纳米颗粒墨432,在顶部表面422上方形成纳米粒子墨膜430。出于此描述的目的,添加工艺将纳米颗粒设置于期望区域中,并且不将纳米颗粒设置在期望区域之外,因此不需要去除一部分分配的纳米颗粒就可以产生纳米颗粒的最终期望形状。添加工艺可以使得能够在期望区域中形成膜而无需光刻工艺和随后的蚀刻工艺,因此有利地降低了制造成本和复杂性。纳米颗粒墨432包括纳米颗粒和载液。纳米颗粒包括石墨烯异质层,如参考图3B所述的。纳米粒子墨432可以是例如墨、浆料或溶胶凝胶。纳米粒子墨432分配到微电子器件400上的用于随后形成的电导体的区域中,并且不分配在衬底402的整个瞬时顶表面上。
添加工艺434可以包括,例如,使用连续分配装置436的连续挤出工艺。连续分配装置436可以配置成使得微电子器件400和连续分配装置436可以相对彼此横向移动以为纳米粒子墨膜430提供期望的分配图案。分离的连续分配装置436可具有多个分配端口,这些分配端口可以独立地并行激活,以为添加工艺434提供期望的吞吐量。在该示例的替代版本中,添加工艺434可以包括分立液滴工艺(有时称为喷墨工艺)、直接激光转移工艺、静电沉积工艺或电化学沉积工艺。
参考图4B,通过加热工艺438加热图4A的纳米颗粒墨膜430,以从纳米颗粒墨膜430中去除至少一部分挥发性材料,以形成导电的纳米颗粒膜440。加热工艺438可以包括,例如,使用白炽光源的毯式辐射加热步骤、使用红外发光二极管(IR LED)的选择性辐射加热步骤(其可以被编程为将红外辐射施加到纳米粒子墨膜430并且不施加到微电子器件400的其他区域)、热板加热步骤和/或强制对流加热步骤。加热工艺438可以从低功率斜升到高功率,以便去除更多的挥发性材料而不降低纳米颗粒膜440的结构完整性。纳米颗粒膜440可以通过闪热步骤或尖峰加热步骤进一步加热,这可以进一步改善纳米颗粒膜440的导电性。纳米颗粒膜440可以提供整个电导体406,如图4B所示。或者,可以在纳米颗粒膜440上形成其他导电层以提供电导体406。
图5是伯纳尔(Bernal)双层石墨烯的透视图。伯纳尔双层石墨烯具有两个石墨烯原子层。本文描述的实施例中的石墨烯层可包括伯纳尔双层石墨烯。在图5中表示为第一原子层(FIRST ATOMIC LAYER)的第一石墨烯原子层包括在图5中表示为碳原子(CARBONATOM)的碳原子,其呈六方结构。在图5中表示为第二原子层(SECOND ATOMIC LAYER)的第二石墨烯原子层也包含六方结构的碳原子。第一原子层中的一半碳原子直接位于第二原子层中的碳原子上方。与具有其他构造的双层石墨烯相比,在石墨烯异质层的石墨烯层中包括伯纳尔双层石墨烯可以有利地改善石墨烯异质层的电导率。
图6是包含电导体的示例微电子器件的横截面,所述电导体包括薄膜晶体管中的石墨烯异质层。微电子器件600包括衬底602,例如参考图1所描述的。半导体层642形成在衬底602上方。半导体层642可以包括,例如,多晶硅。半导体层642包括体区644、与体区644横向相邻的第一源/漏区646,以及与体区644横向相邻且与第一源/漏区646相对的第二源/漏区648。在半导体层642的体区644上方形成包括石墨烯异质层608的电导体606。石墨烯异质层608包括交替的石墨烯层610和阻挡材料层612,如参考图1所述的。石墨烯异质层608在体区644上方延伸,但不在第一源/漏区646或第二源/漏区648上方延伸。体区644、第一源/漏区646、第二源/漏区648以及在体区644上方的石墨烯异质层608提供薄膜晶体管650。体区644上方的石墨烯异质层608提供薄膜晶体管650的栅极。形成如在该示例中描述的薄膜晶体管650可以在微电子器件600的互连区中实现晶体管功能,而不会显著增加制造成本和复杂性。
图7是包含电导体的示例微电子器件的横截面,所述电导体包括石墨烯异质层作为带隙转换器的天线。微电子器件700包括衬底702,衬底702包括具有顶部表面754的半导体层752。半导体层752包括具有期望带隙的一种或多种半导体材料。例如,半导体材料可以包括IV型半导体,例如硅、锗、硅锗和/或碳化硅。半导体材料可以包括III-V族半导体,例如氮化镓和/或氮化镓铝。其他半导体材料属于该示例的范围。半导体层752包括下半导体区756,其可以是p型,如图7所示。阴极阱758形成在半导体层752中;在该示例中,阴极阱758可以是n型,其平均掺杂密度为1×1015cm-3至1×1018cm-3。阴极阱758可以在半导体层752的顶部表面754下方延伸500纳米至5微米。可选的n型阱接触区760可以具有是阴极阱758的10至1000倍的平均掺杂密度,其可以形成在半导体层752中,与阴极阱758接触并延伸到半导体层752的顶部表面754。p型阳极762在半导体层752中形成,与阴极阱758接触并延伸到半导体层752的顶部表面754。阳极762的平均掺杂密度可以是1×1015cm-3至1×1020cm-3。阳极762可以通过形成在顶部表面754处的诸如场氧化物的隔离氧化物764与阱接触区760横向隔离。隔离氧化物764可以,例如,通过浅沟槽隔离(STI)工艺形成,或通过局部氧化硅(LOCOS)工艺形成。阳极762和阴极阱758提供微电子器件700的带隙转换器766。
在半导体层752上方形成互连区768。互连区768包括介电层堆叠770,其可包括基于二氧化硅的介电材料的一个或更多个子层,以提供层间介电(ILD)子层和内部介电(IMD)子层。介电层堆叠770还可以包括其他介电材料的一个或更多个子层作为覆盖层和/或蚀刻停止层。
在介电层堆叠770中形成多个触点,以提供到设置在半导体层752中的微电子器件700的组件的电连接。触点包括阳极触点772,阳极触点772与带隙转换器766的阳极762形成电连接。触点还包括阴极触点774,其通过阱接触区域760与带隙转换器766的阴极阱758形成电连接。
在介电层堆叠770中形成多个互连,其形成与触点的电连接。互连包括阳极触点772上的阳极互连776和阴极触点774上的阴极互连778。
在介电层堆叠770上形成电导体706,以为带隙转换器766提供天线780。电导体706包括石墨烯异质层708,石墨烯异质层708具有交替的石墨烯层710和阻挡材料层712。石墨烯异质层708可根据本文所述的任何示例形成。穿过石墨烯异质层708并穿过介电层堆叠770的一部分形成通孔782以形成与阳极互连776的电连接,使得天线780电耦合到阳极762。在微电子器件700的操作期间,电磁波可以通过天线780转换为振荡电信号,通过通孔782、阳极互连776和阳极触点772耦合到带隙转换器766;带隙转换器随后将振荡电信号转换为整流电信号,其可以由微电子器件700的其他电路处理。
图8A和图8B是包含多个电导体的示例微电子器件的横截面,每个电导体包括石墨烯异质层,提供电容器。参照图8A,微电子器件800包括衬底802。衬底802可以包括具有有源组件的半导体层。衬底802包括延伸到衬底802的顶部表面822的介电材料884。介电材料884可以包括诸如场氧化物的隔离氧化物,或者可以包括微电子器件800的互连区的介电层堆叠的一个或更多个介电子层。在衬底802上方形成多个电导体806,以提供电容器886。
在图8B中更详细地示出了电导体806的结构。每个电导体806包括石墨烯异质层808。每个石墨烯异质层808包括多个交替的石墨烯层810和阻挡材料层812。每个石墨烯层810具有一至两个石墨烯原子层。每个阻挡材料层812具有一至三层的六方氮化硼、立方氮化硼和/或氮化铝。石墨烯异质层808可以是连续的,如图8B所示,或者可以设置在纳米颗粒膜中。可以根据本文描述的任何示例形成石墨烯异质层808。石墨烯异质层808的第一子集888提供电容器886的第一组板,并且石墨烯异质层808的第二子集890提供电容器的第二组板。
返回参考图8A,在电容器886上方形成上介电层堆叠816。可以通过通孔提供到电容器886的电连接。例如,可以穿过石墨烯异质层808的第一子集888形成第一通孔892,并且第一通孔892向下延伸到形成在衬底802中的第一互连894,并且可以穿过石墨烯异质层808的第二子集890形成第二通孔896,并且第二通孔896向上延伸到形成在上介电层堆叠816中的第二互连898。形成第一通孔892以延伸穿过第一子集888中的石墨烯异质层808可以有利地提供到每个石墨烯层810的电连接,并且对于第二通孔896是类似地,可以因此为电容器886提供期望的总电容。用于与电容器886进行电连接的其他结构也在该示例的范围内。
图9A和图9B是包含多个电导体的示例微电子器件的横截面,每个电导体包括石墨烯异质层,以提供超材料结构。参照图9A,微电子器件900包括衬底902,衬底902可以包括延伸到衬底902的顶部表面922的介电材料。超材料结构1000形成在顶部表面922上方。第一级开口环形谐振器1002形成在顶部表面922上方。每个开口环形谐振器1002是具有石墨烯异质层的电导体906。每个石墨烯异质层包括交替的石墨烯层和阻挡材料层。每个石墨烯层具有一至两个石墨烯原子层。每个阻挡材料层具有一至三层的六方氮化硼、立方氮化硼和/或氮化铝。开口环形谐振器1002可以被称为超原子。
在第一级开口环形谐振器1002和衬底902上方形成第一介电隔离层1004。第一介电隔离层1004可以包括诸如基于二氧化硅的材料的无机材料,和/或可以包括诸如聚酰亚胺或BCB的有机材料。可以使用旋涂工艺来形成第一介电隔离层1004以产生基本上平坦的层,或者可以使用保形沉积工艺来形成第一介电隔离层1004并且随后将其平坦化(例如使用化学机械抛光(CMP)工艺)。
在第一介电隔离层1004上方和第一级开口环形谐振器1002上方形成第二级开口环形谐振器1006。每个开口环形谐振器1006是具有石墨烯异质层的电导体906。每个石墨烯异质层包括交替的石墨烯层和阻挡材料层。石墨烯层和阻挡材料层具有参考第一级开口环形谐振器1002描述的特性。
在第二级开口环形谐振器1006和第一介电隔离层1004上方形成第二介电隔离层1008。第二介电隔离层1008可以通过与第一介电隔离层1004类似的工艺形成,并且可以具有类似的组成和类似的结构。
在第二介电隔离层1008上方和第二级开口环形谐振器1006上方形成第三级开口环形谐振器1010。每个开口环形谐振器1010是具有石墨烯异质层的电导体906。每个石墨烯异质层包括交替的石墨烯层和阻挡材料层。石墨烯层和阻挡材料层具有参考第一级开口环形谐振器1002描述的特性。
可以在第三级开口环形谐振器1010上方形成附加的介电隔离层和附加级的开口谐振器。多级开口谐振器提供超材料结构1000。超材料结构1000可以吸收期望波长带中的电磁辐射,或者可以表现出对电磁辐射的期望响应,例如负折射。除了开口环形谐振器1002、1006和1010之外,其他类型的超原子可以用在超材料结构1000中,以实现超材料结构1000的期望特性。
参考图9B,其是第三级开口环形谐振器1006之一的横截面,电导体906包括纳米颗粒928,其包括石墨烯异质层。石墨烯异质层包括交替的石墨烯层和阻挡材料层。每个石墨烯层具有一至两个石墨烯原子层。每个阻挡材料层具有一至三层的六方氮化硼、立方氮化硼和/或氮化铝。石墨烯异质层的结构类似于图1中所示的结构。纳米颗粒928的尺寸可小于1微米。电导体906在纳米颗粒928之间基本上不包括机粘合剂材料。
第一级的开口环形谐振器1002、第二级的开口环形谐振器1006,第三级的开口环形谐振器1010以及后续级中的开口环形谐振器可以由添加工艺形成,如参考图4A和图4B所描述的。与对每级使用光刻工艺和蚀刻工艺相比,使用添加工艺来形成多级开口环形谐振器可以显著降低微电子器件900的制造成本和复杂性。
在所描述的实施例中,修改是可能的,并且在权利要求的范围内,其他实施例也是可能的。
Claims (19)
1.一种微电子器件,包括:
衬底;和
设置在所述衬底上方的电导体,所述电导体包括石墨烯异质层,所述石墨烯异质层由多个交替的石墨烯层和阻挡材料层组成,其中每个石墨烯层具有一至两个石墨烯原子层,并且每个所述阻挡材料层具有从六方氮化硼、立方氮化硼和氮化铝所组成的组中选择的一至三个层。
2.根据权利要求1所述的微电子器件,其中所述石墨烯层包括伯纳尔双层石墨烯。
3.根据权利要求1所述的微电子器件,其中所述石墨烯层和所述阻挡材料层在所述电导体上是连续的。
4.根据权利要求1所述的微电子器件,其中所述石墨烯层和所述阻挡材料层设置在纳米颗粒中。
5.根据权利要求1所述的微电子器件,其中所述石墨烯层掺杂有从硼、镓、铟、硅、锗、氮、磷、砷、锑和氧所组成的组中选择的元素。
6.根据权利要求1所述的微电子器件,其中所述石墨烯层使用从卤素、贵金属、羟基和有机分子所组成的组中选择的化学反应剂来功能化。
7.根据权利要求1所述的微电子器件,其中所述电导体提供所述微电子器件的互连。
8.根据权利要求1所述的微电子器件,其中所述电导体提供所述微电子器件的薄膜晶体管的栅极。
9.根据权利要求1所述的微电子器件,其中所述电导体提供连接到所述微电子器件的带隙转换器的天线。
10.根据权利要求1所述的微电子器件,其中所述电导体提供所述微电子器件的电容器的板。
11.根据权利要求1所述的微电子器件,其中所述电导体提供所述微电子器件的超材料结构的超原子。
12.一种形成微电子器件的方法,包括:
提供衬底;
形成阻挡材料层,所述阻挡材料层在所述微电子器件的电导体的区域上是连续的,所述阻挡材料层包括从六方氮化硼、立方氮化硼和氮化铝所组成的组中选择的一至三个层;
形成在所述阻挡材料层上连续的石墨烯层,其中所述石墨烯层延伸穿过所述电导体的区域,其中所述石墨烯层包括一至两个石墨烯原子层;和
重复形成连续的所述阻挡材料层并重复形成连续的石墨烯层,以形成所述电导体的石墨烯异质层,其中所述石墨烯异质层由多个交替的所述石墨烯层和所述阻挡材料层组成。
13.根据权利要求12所述的方法,其中形成所述石墨烯层包括等离子体增强化学气相沉积工艺即PECVD工艺,包括:
将所述衬底加热至200℃至400℃的温度;
在所述衬底处于200℃至400℃的同时使含碳反应气体流过所述衬底上方;并且
将射频能量即RF能量施加到所述含碳反应气体。
14.权利要求13的方法,其中所述含碳反应气体包括从甲烷、乙烷、丙烷、丁烷、乙醇、环丁烷和苯所组成的组中选择的气体。
15.根据权利要求12所述的方法,其中形成所述石墨烯层包括转移工艺,其包括:
在辅助衬底上形成所述石墨烯层,所述辅助衬底与所述微电子器件的所述衬底分离;
从所述辅助衬底去除所述石墨烯层;和
将所述石墨烯层施加到所述微电子器件的所述衬底。
16.根据权利要求12所述的方法,其中形成所述阻挡材料层包括原子层沉积工艺即ALD工艺,其包括:
使三氯化硼气体在所述衬底上方流动;
随后停止在所述衬底上的所述三氯化硼气体的流动;
使氨气在所述衬底上方流动;和
随后停止在所述衬底上方的所述氨气的流动。
17.一种形成微电子器件的方法,包括:
提供衬底;和
形成所述微电子器件的电导体的导电纳米颗粒膜,所述导电纳米颗粒膜包括纳米颗粒,其中所述纳米颗粒包含石墨烯异质层,所述石墨烯异质层由多个交替的石墨烯层和阻挡材料层组成,其中每个石墨烯层具有一至两个石墨烯原子层,并且每个所述阻挡材料层具有从六方氮化硼、立方氮化硼和氮化铝所组成的组中选择的一至三个层,并且其中所述导电纳米颗粒膜基本上不包括机粘合剂材料。
18.根据权利要求17所述的方法,其中形成所述导电纳米颗粒膜包括添加工艺,其包括:
通过添加工艺将包含所述纳米颗粒和载液的纳米颗粒墨分配到所述衬底上,以在所述电导体的区域中形成纳米颗粒墨膜;和
加热所述纳米颗粒墨膜以从所述纳米颗粒墨膜中除去至少一部分挥发性材料。
19.根据权利要求18所述的方法,其中所述添加工艺是从分立液滴分配工艺、连续挤出工艺、直接激光转移工艺、静电沉积工艺和电化学沉积工艺所组成的组中选择的。
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