CN110231847A - Rapid response type low pressure difference linear voltage regulator - Google Patents
Rapid response type low pressure difference linear voltage regulator Download PDFInfo
- Publication number
- CN110231847A CN110231847A CN201910644040.2A CN201910644040A CN110231847A CN 110231847 A CN110231847 A CN 110231847A CN 201910644040 A CN201910644040 A CN 201910644040A CN 110231847 A CN110231847 A CN 110231847A
- Authority
- CN
- China
- Prior art keywords
- nmos tube
- operational amplifier
- amplifier amp
- pressure difference
- low pressure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000004044 response Effects 0.000 title claims abstract description 50
- 230000001052 transient effect Effects 0.000 claims abstract description 35
- 230000002708 enhancing effect Effects 0.000 claims abstract description 17
- 230000035772 mutation Effects 0.000 claims abstract description 10
- 230000008859 change Effects 0.000 claims abstract description 5
- 239000003990 capacitor Substances 0.000 claims description 10
- 230000005611 electricity Effects 0.000 claims description 7
- 241001125929 Trisopterus luscus Species 0.000 claims description 3
- 230000001965 increasing effect Effects 0.000 description 8
- 238000010586 diagram Methods 0.000 description 7
- 230000000087 stabilizing effect Effects 0.000 description 5
- 230000007423 decrease Effects 0.000 description 4
- 238000000034 method Methods 0.000 description 3
- 230000003071 parasitic effect Effects 0.000 description 3
- 230000007812 deficiency Effects 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Continuous-Control Power Sources That Use Transistors (AREA)
Abstract
The present invention relates to a kind of rapid response type low pressure difference linear voltage regulators comprising low pressure difference linear voltage regulator ontology；Low pressure difference linear voltage regulator ontology includes operational amplifier AMP, and the output end of operational amplifier AMP is connect with the gate terminal of power tube MP1；It further include the transient response enhancing module that connection is adapted to the operational amplifier AMP, heavy duty is jumped to from underloading in the load current of low pressure difference linear voltage regulator ontology or is jumped at light load from heavy duty, enhance module by transient response and operational amplifier AMP cooperates the driving current Isr that can increase operational amplifier AMP and be loaded into power tube MP1 gate terminal, to reduce the mutation as caused by load sudden change of low pressure difference linear voltage regulator Bulk output voltage.The present invention can enhance the transient response of LDO, when load jumps within a very short time, so that the output of LDO can be more stable, greatly alleviate output with mutation up and down caused by load variation, improve the stability of low pressure difference linear voltage regulator.
Description
Technical field
The present invention relates to a kind of voltage-stablizer, especially a kind of rapid response type low pressure difference linear voltage regulator belongs to low voltage difference
The technical field of linear voltage regulator.
Background technique
As shown in Figure 1, the circuit diagram for existing low pressure difference linear voltage regulator (LDO) is (as low in following the description
The circuit diagram of pressure difference linear voltage regulator ontology), wherein it is mentioned including reference power supply and operational amplifier AMP, reference voltage
It is PMOS power tube for reference voltage Vref needed for operational amplifier AMP, MP1, resistance R1, resistance R2 are divider resistance, electricity
Hindering R3 is compensation resistance, and capacitor C1 is compensating electric capacity, and capacitor CAP is load capacitance, and Vout is the output of entire LDO.
As shown in Fig. 2, the transient response performance of LDO includes response time (Δ t1+Δt2/Δt3+Δt4), on rush voltage
(ΔV3) and undershoot voltage (Δ Vtr-max)；Specific corresponding expression formula are as follows:
ΔVtr-max≈Iload-max*Δt1/(CL+Cb)+ΔVesr (1)
ΔV3≈Iload-max*Δt3/(CL+Cb)+ΔVesr
≈Iload-max/(CL+Cb)*BWcl+ΔVesr (2)
Δt1≈ 1/BWcl+tsr=1/BWcl+Cpar* Δ Vpar/Isr (3)
Δt2≈(ΔVtr-max-ΔV2)*(CL+Cb)/Iload-max (4)
Δt3≈1/BWcl (5)
Δt4≈(CL+Cb)*(ΔV3-ΔVesr)/Ipull-down (6)
Wherein, Iload-maxIt is maximum load current, CL is output capacitance (i.e. above-mentioned load capacitance CAP), and Cb is output
The shunt capacitance at end, BWcl are the closed-loop bandwidths of loop, and Cpar is the parasitic capacitance of power tube MP1 grid, and Δ Vpar is parasitic
Voltage variety on capacitor Cpar, Δ Vesr are the voltage varieties on output capacitance series equivalent resistance, and Isr is power tube
The driving current (loop bandwidth can be increased when increasing driving current Isr) of MP1 gate front end.Ipull-downIt is on feedback resistance
Pull-down current, tsr is the Slew Rate time of parasitic capacitance Cpar, Δ V2It is lightly loaded accordingly for LDO and output voltage when overloaded
Pressure difference.Due to capacitance structure outside no piece, therefore Δ Vesr takes zero.
In conjunction with formula it is found that for reducing △t1With Δ t3, the drive of loop bandwidth and power tube PM1 grid can be increased
Streaming current Isr.And Δ t2Phase of the size as power tube MP1 full of time and open-loop frequency response needed for load capacitance CAP
Position nargin decision, Δ t4Size determined by the electric current on feedback resistance.On rush voltage Δ V3With undershoot voltage Δ Vtr-maxIt is big
It is small mainly by Δ t1, Δ t3It is determined with Isr.
The load current of LDO within a very short time from underloading jump to when overloaded, due to power tube MP1 grid voltage without
Method makes an immediate response reduction, the electric current that load end needs is provided by load capacitance CAP at this time, to will lead to the output voltage of LDO
Decline；After the grid voltage response of power tube MP1, which reduces, is enough to provide load current, the output voltage of LDO is increased to normally
Value.
LDO is jumped at light load from heavy duty, because the grid voltage of power tube MP1 can not make an immediate response raising, leads to LDO's
Output voltage is first increased and is reduced again.The output voltage decline of LDO is too low, will lead to power supply and interval power-off is presented, output voltage becomes
Overvoltage condition can be presented in height.
Summary of the invention
The purpose of the present invention is overcoming the deficiencies in the prior art, it is steady to provide a kind of rapid response type low pressure difference linearity
Depressor can enhance the transient response of LDO, when load jumps within a very short time, so that making the output of LDO can be more steady
It is fixed, greatly alleviate output with mutation up and down caused by load variation, improves the stability of low pressure difference linear voltage regulator.
According to technical solution provided by the invention, the rapid response type low pressure difference linear voltage regulator, including low voltage difference line
Property voltage-stablizer ontology；The low pressure difference linear voltage regulator ontology includes operational amplifier AMP, and the operational amplifier AMP's is defeated
Outlet is connect with the gate terminal of power tube MP1；
It further include the transient response enhancing module that connection is adapted to the operational amplifier AMP, in low pressure difference linearity pressure stabilizing
The load current of device ontology jumps to heavy duty from underloading or jumps at light load from heavy duty, enhances module and fortune by transient response
The driving current Isr that operational amplifier AMP is loaded into power tube MP1 gate terminal can be increased by calculating amplifier AMP cooperation, low to reduce
The mutation as caused by load sudden change of pressure difference linear voltage regulator Bulk output voltage.
The low pressure difference linear voltage regulator ontology further includes reference power supply, the reference voltage of the reference power supply output end
Vref is connect with the reverse side of operational amplifier AMP, the source terminal of power tube MP1, the positive power source terminal of operational amplifier AMP and electricity
VDD connection is pressed, the drain electrode end of power tube MP1 and one end, one end of resistance R3 and one end of load capacitance CAP of resistance R1 connect
Connect, the other end of load capacitance CAP ground connection, the other end of resistance R3 is connect with one end of capacitor C1, the other end of capacitor C1 and
One end of the in-phase end of operational amplifier AMP, the other end of resistance R1 and resistance R2 connects, the other end ground connection of resistance R2；
Transient response enhancing module receives the reference voltage Vref for being loaded into operational amplifier AMP reverse side simultaneously and adds
It is downloaded to the feedback voltage Vfb of operational amplifier AMP in-phase end, transient response enhances the output end and operational amplifier AMP of module
Connection.
The operational amplifier AMP includes PMOS tube MP2 and PMOS tube MP3, source terminal, the PMOS tube of PMOS tube MP2
The source terminal of MP3 is connect with voltage VDD, the drain electrode of the source terminal, NMOS tube MN1 of the gate terminal and PMOS tube MP2 of PMOS tube MP2
The connection of the gate terminal of end and PMOS tube MP3, the gate terminal of NMOS tube MN1 receive feedback voltage Vfb, the drain electrode of PMOS tube MP3
End is connect with the drain electrode end of NMOS tube MN2, and the gate terminal of NMOS tube MN2 receives reference voltage Vref；
The source terminal of NMOS tube MN1, the source terminal source terminal of NMOS tube MN2 are connect with the drain electrode end of NMOS tube MN3, NMOS
The gate terminal of pipe MN3 receives the voltage Vb of reference power supply output, and source terminal and the transient response of NMOS tube MN3 enhances the defeated of module
The connection of the drain electrode end of outlet and NMOS tube MN4, the gate terminal of NMOS tube MN4 and the gate terminal and NMOS tube of NMOS tube MN5
The drain electrode end of MN5 connects, and the source terminal of NMOS tube MN5 and the source terminal of NMOS tube MN4 are grounded, the drain electrode of NMOS tube MN5
End also receives the reference current Ibias that reference power supply generates, the drain electrode end of PMOS tube MP3 and the drain electrode end phase of NMOS tube MN2
The output end vo pout of the operational amplifier AMP can be formed after connecting.
The transient response enhancing module includes hysteresis comparator COMP1 and hysteresis comparator COMP2, hysteresis comparator
The reverse side of COMP1 receives reference voltage Vref, and the in-phase end of hysteresis comparator COMP1 receives feedback voltage Vfb；Sluggishness is relatively
The reverse side of device CMOP2 receives feedback voltage Vfb, and the in-phase end of hysteresis comparator COMP2 receives reference voltage Vref, sluggish ratio
The positive power source terminal of positive power source terminal, hysteresis comparator COMP2 compared with device COMP1 is connect with voltage VDD, hysteresis comparator COMP1
Negative power end, hysteresis comparator COMP2 negative power end be grounded；
The output end of hysteresis comparator COMP1 is connect with the gate terminal of NMOS tube MN6, the output of hysteresis comparator COMP2
End is connect with the gate terminal of NMOS tube MN7, and the source terminal of NMOS tube MN6 and the source base of NMOS tube MN7 are grounded, NMOS tube
The drain electrode end of MN6 is connect with one end of resistance R5, and the drain electrode end of NMOS tube MN7 is connect with one end of resistance R4, and resistance R4's is another
One end is connect with the other end of resistance R5, and the other end of resistance R4 also with the source terminal of NMOS tube MN3 and NMOS tube MN4
Drain electrode end connection.
Advantages of the present invention:, low pressure difference linear voltage regulator ontology load current from underloading jump to heavy duty or from weight
Load jumps at light load, and operational amplifier AMP load can be increased by enhancing module and operational amplifier AMP cooperation by transient response
To the driving current Isr of power tube MP1 gate terminal, drawn with reducing low pressure difference linear voltage regulator Bulk output voltage by load sudden change
The mutation risen, so as to enhance the transient response of LDO, when load jumps within a very short time, so that the output of LDO can more
Stablize, greatly alleviates output with mutation up and down caused by load variation, improve the stability of low pressure difference linear voltage regulator.
Detailed description of the invention
Fig. 1 is the circuit diagram of existing low pressure difference linear voltage regulator ontology.
Fig. 2 is the variation schematic diagram of existing low pressure difference linear voltage regulator ontology output voltage when load current jumps.
Fig. 3 is circuit diagram of the invention.
Fig. 4 is the circuit diagram of operational amplifier AMP of the present invention.
Fig. 5 is the circuit diagram that transient response of the present invention enhances module.
Specific embodiment
Below with reference to specific drawings and examples, the invention will be further described.
It is as shown in Figure 3: the transient response in order to enhance LDO, when load jumps within a very short time, so that making LDO
Output can it is more stable, greatly alleviate output with load variation caused by up and down mutation, improve low pressure difference linearity pressure stabilizing
The stability of device, the present invention include low pressure difference linear voltage regulator ontology；The low pressure difference linear voltage regulator ontology includes that operation is put
Big device AMP, the output end of the operational amplifier AMP are connect with the gate terminal of power tube MP1；
It further include the transient response enhancing module that connection is adapted to the operational amplifier AMP, in low pressure difference linearity pressure stabilizing
The load current of device ontology jumps to heavy duty from underloading or jumps at light load from heavy duty, enhances module and fortune by transient response
The driving current Isr that operational amplifier AMP is loaded into power tube MP1 gate terminal can be increased by calculating amplifier AMP cooperation, low to reduce
The mutation as caused by load sudden change of pressure difference linear voltage regulator Bulk output voltage.
Specifically, low pressure difference linear voltage regulator ontology can use existing common circuit form, low pressure difference linearity pressure stabilizing
The concrete operating principle and process of device ontology are known to those skilled in the art, and details are not described herein again.Low pressure difference linearity
It include operational amplifier AMP and power tube MP1 in voltage-stablizer ontology, the output end of operational amplifier AMP is with power tube MP1's
Gate terminal connection, power tube MP1 are PMOS tube.
In the embodiment of the present invention, operational amplifier AMP is also connect with transient response enhancing module, is enhanced by transient response
Module can enhance the transient response of low pressure difference linear voltage regulator ontology, i.e., the load current of low pressure difference linear voltage regulator ontology from
Underloading jumps to heavy duty or jumps at light load from heavy duty, enhances module by transient response and operational amplifier AMP cooperates energy
Increase the driving current Isr that operational amplifier AMP is loaded into power tube MP1 gate terminal, it can be seen from background technology that increase power tube
After the driving current Isr of the gate terminal of MP1, loop bandwidth can increase, so as to reduce the output of low pressure difference linear voltage regulator ontology
The mutation of voltage, so as to improve the stability of low pressure difference linear voltage regulator.
As shown in figures 1 and 3, the low pressure difference linear voltage regulator ontology further includes reference power supply, and the reference power supply is defeated
The reference voltage Vref of outlet is connect with the reverse side of operational amplifier AMP, the source terminal of power tube MP1, operational amplifier AMP
Positive power source terminal connect with voltage VDD, one end of the drain electrode end of power tube MP1 and resistance R1, one end of resistance R3 and load
One end of capacitor CAP connects, and the other end ground connection of load capacitance CAP, the other end of resistance R3 is connect with one end of capacitor C1, electricity
The other end for holding C1 is connect with one end of the in-phase end of operational amplifier AMP, the other end of resistance R1 and resistance R2, resistance R2
The other end ground connection；
Transient response enhancing module receives the reference voltage Vref for being loaded into operational amplifier AMP reverse side simultaneously and adds
It is downloaded to the feedback voltage Vfb of operational amplifier AMP in-phase end, transient response enhances the output end and operational amplifier AMP of module
Connection.
In the embodiment of the present invention, reference power supply can use existing common circuit form, and reference power supply can generate benchmark
The reverse side of voltage Vref, operational amplifier AMP and an output end of reference power supply connect, and generate so as to receive reference power supply
Reference voltage Vref, power vd D can provide operational amplifier AMP work needed for voltage.Reference voltage Vref's is specific big
Small to be generated as needed by reference power supply, specially known to those skilled in the art, details are not described herein again.Transient response enhancing
The input terminal of module needs while receiving reference voltage Vref and being loaded into the feedback voltage of operational amplifier AMP in-phase end
The output end of Vfb, transient response enhancing module are connect with operational amplifier AMP.Specifically, the drain electrode end of power tube MP1 and electricity
Resistance R3, resistance R1 and load capacitance CAP can form the output end of entire low pressure difference linear voltage regulator ontology after being connected with each other
Vout；After being connect by resistance R1, resistance R2, resistance R3 and capacitor C1 cooperation with the in-phase end of operational amplifier AMP, it can obtain
To the feedback voltage Vfb for being loaded into operational amplifier amplifier AMP in-phase end.
As shown in figure 4, the operational amplifier AMP includes PMOS tube MP2 and PMOS tube MP3, the source electrode of PMOS tube MP2
It holds, the source terminal of PMOS tube MP3 is connect with voltage VDD, the gate terminal of PMOS tube MP2 and source terminal, the NMOS tube of PMOS tube MP2
The gate terminal connection of the drain electrode end and PMOS tube MP3 of MN1, the gate terminal of NMOS tube MN1 receive feedback voltage Vfb, PMOS tube
The drain electrode end of MP3 is connect with the drain electrode end of NMOS tube MN2, and the gate terminal of NMOS tube MN2 receives reference voltage Vref；
The source terminal of NMOS tube MN1, the source terminal source terminal of NMOS tube MN2 are connect with the drain electrode end of NMOS tube MN3, NMOS
The gate terminal of pipe MN3 receives the voltage Vb of reference power supply output, and source terminal and the transient response of NMOS tube MN3 enhances the defeated of module
The connection of the drain electrode end of outlet and NMOS tube MN4, the gate terminal of NMOS tube MN4 and the gate terminal and NMOS tube of NMOS tube MN5
The drain electrode end of MN5 connects, and the source terminal of NMOS tube MN5 and the source terminal of NMOS tube MN4 are grounded, the drain electrode of NMOS tube MN5
End also receives the reference current Ibias that reference power supply generates, the drain electrode end of PMOS tube MP3 and the drain electrode end phase of NMOS tube MN2
The output end vo pout of the operational amplifier AMP can be formed after connecting.
In the embodiment of the present invention, NMOS tube MN3 works in saturation region, and voltage Vb and reference current Ibias are by benchmark
Power supply generates, and NMOS tube MN4 and NMOS tube MN5 constitute mirror current source, the drain electrode of the source terminal, NMOS tube MN4 of NMOS tube MN3
End is connect with the output end of transient response enhancing module, and a pull-down current can be generated by enhancing module by transient response
Ipdown is able to achieve by pull-down current Ipdown and increases the driving current Isr for being loaded into power tube MP1 gate terminal.
As shown in figure 5, the transient response enhancing module includes hysteresis comparator COMP1 and hysteresis comparator COMP2,
The reverse side of hysteresis comparator COMP1 receives reference voltage Vref, and the in-phase end of hysteresis comparator COMP1 receives feedback voltage
Vfb；The reverse side of hysteresis comparator CMOP2 receives feedback voltage Vfb, and the in-phase end of hysteresis comparator COMP2 receives benchmark electricity
Vref is pressed, the positive power source terminal of hysteresis comparator COMP1, the positive power source terminal of hysteresis comparator COMP2 are connect with voltage VDD, late
The negative power end of stagnant comparator COMP1, the negative power end of hysteresis comparator COMP2 are grounded；
The output end of hysteresis comparator COMP1 is connect with the gate terminal of NMOS tube MN6, the output of hysteresis comparator COMP2
End is connect with the gate terminal of NMOS tube MN7, and the source terminal of NMOS tube MN6 and the source base of NMOS tube MN7 are grounded, NMOS tube
The drain electrode end of MN6 is connect with one end of resistance R5, and the drain electrode end of NMOS tube MN7 is connect with one end of resistance R4, and resistance R4's is another
One end is connect with the other end of resistance R5, and the other end of resistance R4 also with the source terminal of NMOS tube MN3 and NMOS tube MN4
Drain electrode end connection.
In the embodiment of the present invention, existing common circuit is can be used in hysteresis comparator COMP1, hysteresis comparator COMP2
Form, sluggish size is ± Δ V accordingly by hysteresis comparator COMP1, hysteresis comparator COMP2, and the size of hysteresis voltage can
To be selected according to actual needs, specially known to those skilled in the art, details are not described herein again.Under normal condition: late
Stagnant comparator COMP1 output end VOUTA, hysteresis comparator COMP2 VOUTB export low level, at this point, NMOS tube MN6 and
NMOS tube MN7 is in off state.The resistance R4 and resistance R5 resistance value having the same.In load current held stationary
When, generally, Vfb is equal with Vref.
When the load current of low pressure difference linear voltage regulator ontology jumps to when overloaded from underloading in a short time, low voltage difference line
Property voltage-stablizer ontology output voltage decline and when making Vfb < Vref- Δ V, the output end VOUTA of hysteresis comparator COMP1 is defeated
Voltage out changes (the output end VOUTB output voltage of hysteresis comparator COMP2 remains unchanged), hysteresis comparator
The level of the output end VOUTA output of COMP1 becomes high from low, and NMOS tube NM6 conducting generates pull-down current Ipdown；At this point,
For operational amplifier AMP, the driving current Isr for being loaded into power tube MP1 gate terminal just will increase Ipdown/2, thus
Reduce the decline of low pressure difference linear voltage regulator Bulk output voltage.
When the load current of low pressure difference linear voltage regulator ontology, which jumps to underloading from heavy duty in a short time, to be carried, low voltage difference
When the output voltage of linear voltage regulator ontology rises and makes Vfb > Vref+ Δ V, the output end VOUTB of hysteresis comparator COMP2
Output voltage changes (the output end VOUTA output voltage of hysteresis comparator COMP1 remains unchanged), i.e. hysteresis comparator
The level of the output end VOUTB output of COMP2 becomes high from low, is exported by the output end VOUTB of hysteresis comparator COMP2
High level can drive NMOS tube MN7 to be connected, so as to generate pull-down current Ipdown, at this point, coming for operational amplifier AMP
It says, the driving current Isr for being loaded into power tube MP1 gate terminal just will increase Ipdown/2, to reduce low pressure difference linearity pressure stabilizing
The rising of device Bulk output voltage.
Claims (4)
1. a kind of rapid response type low pressure difference linear voltage regulator, including low pressure difference linear voltage regulator ontology；The low pressure difference linearity
Voltage-stablizer ontology includes operational amplifier AMP, and the output end of the operational amplifier AMP is connect with the gate terminal of power tube MP1；
It is characterized in that:
It further include the transient response enhancing module that connection is adapted to the operational amplifier AMP, in low pressure difference linear voltage regulator sheet
The load current of body jumps to heavy duty from underloading or jumps at light load from heavy duty, enhances module by transient response and puts with operation
Big device AMP cooperation can increase the driving current Isr that operational amplifier AMP is loaded into power tube MP1 gate terminal, to reduce low voltage difference
The mutation as caused by load sudden change of linear voltage regulator Bulk output voltage.
2. rapid response type low pressure difference linear voltage regulator according to claim 1, it is characterized in that: the low pressure difference linearity is steady
Depressor ontology further includes reference power supply, the reverse phase of the reference voltage Vref and operational amplifier AMP of the reference power supply output end
End connection, the source terminal of power tube MP1, the positive power source terminal of operational amplifier AMP are connect with voltage VDD, the drain electrode of power tube MP1
End is connect with one end of one end of resistance R1, one end of resistance R3 and load capacitance CAP, another termination of load capacitance CAP
The other end on ground, resistance R3 is connect with one end of capacitor C1, the other end of capacitor C1 and in-phase end, the electricity of operational amplifier AMP
Hinder one end connection of the other end and resistance R2 of R1, the other end ground connection of resistance R2；
Transient response enhancing module receives simultaneously to be loaded into the reference voltage Vref of operational amplifier AMP reverse side and is loaded into
The output end of the feedback voltage Vfb of operational amplifier AMP in-phase end, transient response enhancing module is connect with operational amplifier AMP.
3. rapid response type low pressure difference linear voltage regulator according to claim 2, it is characterized in that: the operational amplifier
AMP includes PMOS tube MP2 and PMOS tube MP3, and the source terminal of PMOS tube MP2, the source terminal of PMOS tube MP3 and voltage VDD connect
It connects, the gate terminal of PMOS tube MP2 and source terminal, the drain electrode end of NMOS tube MN1 and the grid of PMOS tube MP3 of PMOS tube MP2
End connection, the gate terminal of NMOS tube MN1 receive feedback voltage Vfb, the drain electrode end of PMOS tube MP3 and the drain electrode end of NMOS tube MN2
The gate terminal of connection, NMOS tube MN2 receives reference voltage Vref；
The source terminal of NMOS tube MN1, the source terminal source terminal of NMOS tube MN2 are connect with the drain electrode end of NMOS tube MN3, NMOS tube
The gate terminal of MN3 receives the voltage Vb of reference power supply output, the output of source terminal and transient response the enhancing module of NMOS tube MN3
The connection of the drain electrode end of end and NMOS tube MN4, the gate terminal of NMOS tube MN4 and the gate terminal of NMOS tube MN5 and NMOS tube MN5
Drain electrode end connection, the source terminal of NMOS tube MN5 and the source terminal of NMOS tube MN4 be grounded, and the drain electrode end of NMOS tube MN5 is also
The reference current Ibias that reference power supply generates is received, the drain electrode end of PMOS tube MP3 and the drain electrode end of NMOS tube MN2 mutually interconnect
The output end vo pout of the operational amplifier AMP can be formed after connecing.
4. rapid response type low pressure difference linear voltage regulator according to claim 3, it is characterized in that: the transient response enhances
Module includes hysteresis comparator COMP1 and hysteresis comparator COMP2, and the reverse side of hysteresis comparator COMP1 receives benchmark electricity
Vref is pressed, the in-phase end of hysteresis comparator COMP1 receives feedback voltage Vfb；The reverse side of hysteresis comparator CMOP2 receives feedback
The in-phase end of voltage Vfb, hysteresis comparator COMP2 receives reference voltage Vref, the positive power source terminal of hysteresis comparator COMP1, late
The positive power source terminal of stagnant comparator COMP2 is connect with voltage VDD, negative power end, the hysteresis comparator of hysteresis comparator COMP1
The negative power end of COMP2 is grounded；
The output end of hysteresis comparator COMP1 is connect with the gate terminal of NMOS tube MN6, the output end of hysteresis comparator COMP2 with
The gate terminal of NMOS tube MN7 connects, and the source terminal of NMOS tube MN6 and the source base of NMOS tube MN7 are grounded, NMOS tube MN6
Drain electrode end connect with one end of resistance R5, the drain electrode end of NMOS tube MN7 is connect with one end of resistance R4, the other end of resistance R4
It is connect with the other end of resistance R5, and drain electrode of the other end of resistance R4 also with the source terminal of NMOS tube MN3 and NMOS tube MN4
End connection.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910644040.2A CN110231847A (en) | 2019-07-17 | 2019-07-17 | Rapid response type low pressure difference linear voltage regulator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910644040.2A CN110231847A (en) | 2019-07-17 | 2019-07-17 | Rapid response type low pressure difference linear voltage regulator |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN110231847A true CN110231847A (en) | 2019-09-13 |
Family
ID=67855671
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910644040.2A Pending CN110231847A (en) | 2019-07-17 | 2019-07-17 | Rapid response type low pressure difference linear voltage regulator |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110231847A (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110928350A (en) * | 2019-12-11 | 2020-03-27 | 国网山东省电力公司济南供电公司 | Power supply with wide input voltage |
| CN111474974A (en) * | 2020-04-30 | 2020-07-31 | 上海维安半导体有限公司 | Method for improving L DO transient response when sudden change from heavy load to light load or no load |
| CN113703507A (en) * | 2020-05-23 | 2021-11-26 | 圣邦微电子（北京）股份有限公司 | Circuit for improving response speed of LDO (low dropout regulator) |
| CN114281143A (en) * | 2021-12-30 | 2022-04-05 | 江苏润石科技有限公司 | Reference source circuit and method with stable band gap reference voltage |
| CN114510109A (en) * | 2022-01-13 | 2022-05-17 | 电子科技大学 | high-PSR (power supply rejection) fast transient response dual-mode LDO (low dropout regulator) without off-chip capacitor |
| CN115469242A (en) * | 2022-09-13 | 2022-12-13 | 江苏万邦微电子有限公司 | Negative power supply monitoring system and method |
| WO2023155579A1 (en) * | 2022-02-15 | 2023-08-24 | Oppo广东移动通信有限公司 | Power supply apparatus, power supply control method, electronic device, and readable storage medium |
Citations (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6157176A (en) * | 1997-07-14 | 2000-12-05 | Stmicroelectronics S.R.L. | Low power consumption linear voltage regulator having a fast response with respect to the load transients |
| US20020130646A1 (en) * | 2001-01-26 | 2002-09-19 | Zadeh Ali Enayat | Linear voltage regulator using adaptive biasing |
| US20110121802A1 (en) * | 2009-11-26 | 2011-05-26 | Ipgoal Microelectronics (Sichuan) Co., Ltd. | Low dropout regulator circuit without external capacitors rapidly responding to load change |
| US20120161734A1 (en) * | 2010-12-23 | 2012-06-28 | Winbond Electronics Corp. | Low drop out voltage regulato |
| CN102609025A (en) * | 2012-03-16 | 2012-07-25 | 电子科技大学 | Dynamic current doubling circuit and linear voltage regulator integrated with the circuit |
| US8289009B1 (en) * | 2009-11-09 | 2012-10-16 | Texas Instruments Incorporated | Low dropout (LDO) regulator with ultra-low quiescent current |
| CN102945059A (en) * | 2012-11-21 | 2013-02-27 | 上海宏力半导体制造有限公司 | Low dropout linear regulator and pole adjustment method thereof |
| CN202995523U (en) * | 2012-10-30 | 2013-06-12 | 珠海中慧微电子有限公司 | Linear dropout regulator (LDO) with ultra-low power consumption and without output filtering capacitor |
| US20140070778A1 (en) * | 2012-09-07 | 2014-03-13 | Seiko Instruments Inc. | Voltage regulator |
| CN204740520U (en) * | 2015-03-27 | 2015-11-04 | 西安华芯半导体有限公司 | Stabiliser according to load frequency and output voltage dynamic adjustment bias current |
| CN107066014A (en) * | 2017-06-29 | 2017-08-18 | 英麦科（厦门）微电子科技有限公司 | A kind of low pressure difference linear voltage regulator of super low-power consumption |
| CN107967019A (en) * | 2017-12-26 | 2018-04-27 | 上海新进半导体制造有限公司 | A kind of CMOS LDO and the system for improving its load response characteristic |
| CN109116905A (en) * | 2018-11-06 | 2019-01-01 | 西安拓尔微电子有限责任公司 | A kind of fast transient response circuit applied to LDO |
| CN209946729U (en) * | 2019-07-17 | 2020-01-14 | 江苏润石科技有限公司 | Quick response type low dropout regulator |
-
2019
- 2019-07-17 CN CN201910644040.2A patent/CN110231847A/en active Pending
Patent Citations (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6157176A (en) * | 1997-07-14 | 2000-12-05 | Stmicroelectronics S.R.L. | Low power consumption linear voltage regulator having a fast response with respect to the load transients |
| US20020130646A1 (en) * | 2001-01-26 | 2002-09-19 | Zadeh Ali Enayat | Linear voltage regulator using adaptive biasing |
| US8289009B1 (en) * | 2009-11-09 | 2012-10-16 | Texas Instruments Incorporated | Low dropout (LDO) regulator with ultra-low quiescent current |
| US20110121802A1 (en) * | 2009-11-26 | 2011-05-26 | Ipgoal Microelectronics (Sichuan) Co., Ltd. | Low dropout regulator circuit without external capacitors rapidly responding to load change |
| US20120161734A1 (en) * | 2010-12-23 | 2012-06-28 | Winbond Electronics Corp. | Low drop out voltage regulato |
| CN102609025A (en) * | 2012-03-16 | 2012-07-25 | 电子科技大学 | Dynamic current doubling circuit and linear voltage regulator integrated with the circuit |
| US20140070778A1 (en) * | 2012-09-07 | 2014-03-13 | Seiko Instruments Inc. | Voltage regulator |
| CN202995523U (en) * | 2012-10-30 | 2013-06-12 | 珠海中慧微电子有限公司 | Linear dropout regulator (LDO) with ultra-low power consumption and without output filtering capacitor |
| CN102945059A (en) * | 2012-11-21 | 2013-02-27 | 上海宏力半导体制造有限公司 | Low dropout linear regulator and pole adjustment method thereof |
| CN204740520U (en) * | 2015-03-27 | 2015-11-04 | 西安华芯半导体有限公司 | Stabiliser according to load frequency and output voltage dynamic adjustment bias current |
| CN107066014A (en) * | 2017-06-29 | 2017-08-18 | 英麦科（厦门）微电子科技有限公司 | A kind of low pressure difference linear voltage regulator of super low-power consumption |
| CN107967019A (en) * | 2017-12-26 | 2018-04-27 | 上海新进半导体制造有限公司 | A kind of CMOS LDO and the system for improving its load response characteristic |
| CN109116905A (en) * | 2018-11-06 | 2019-01-01 | 西安拓尔微电子有限责任公司 | A kind of fast transient response circuit applied to LDO |
| CN209946729U (en) * | 2019-07-17 | 2020-01-14 | 江苏润石科技有限公司 | Quick response type low dropout regulator |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110928350A (en) * | 2019-12-11 | 2020-03-27 | 国网山东省电力公司济南供电公司 | Power supply with wide input voltage |
| CN111474974A (en) * | 2020-04-30 | 2020-07-31 | 上海维安半导体有限公司 | Method for improving L DO transient response when sudden change from heavy load to light load or no load |
| CN113703507A (en) * | 2020-05-23 | 2021-11-26 | 圣邦微电子（北京）股份有限公司 | Circuit for improving response speed of LDO (low dropout regulator) |
| CN114281143A (en) * | 2021-12-30 | 2022-04-05 | 江苏润石科技有限公司 | Reference source circuit and method with stable band gap reference voltage |
| CN114281143B (en) * | 2021-12-30 | 2024-05-10 | 江苏润石科技有限公司 | Reference source circuit and method for stabilizing band-gap reference voltage |
| CN114510109A (en) * | 2022-01-13 | 2022-05-17 | 电子科技大学 | high-PSR (power supply rejection) fast transient response dual-mode LDO (low dropout regulator) without off-chip capacitor |
| WO2023155579A1 (en) * | 2022-02-15 | 2023-08-24 | Oppo广东移动通信有限公司 | Power supply apparatus, power supply control method, electronic device, and readable storage medium |
| CN115469242A (en) * | 2022-09-13 | 2022-12-13 | 江苏万邦微电子有限公司 | Negative power supply monitoring system and method |
| CN115469242B (en) * | 2022-09-13 | 2024-01-12 | 江苏万邦微电子有限公司 | Negative power supply monitoring system and method |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN110231847A (en) | Rapid response type low pressure difference linear voltage regulator | |
| US7218083B2 (en) | Low drop-out voltage regulator with enhanced frequency compensation | |
| US8981747B2 (en) | Regulator | |
| CN109164861A (en) | A kind of low pressure difference linear voltage regulator of fast transient response | |
| CN103838286A (en) | Low dropout linear regulator with quick transient response and high stability | |
| CN102411394B (en) | Linear voltage stabilizer with low pressure differential and Sink and Source current capabilities | |
| CN101893908A (en) | Filling in/pulling out current rapid response linear voltage regulator and regulating method | |
| CN109656300B (en) | Rapid load response L DO based on dual power rail power supply | |
| CN102880218B (en) | Wide-input range linear voltage regulator | |
| TWI441007B (en) | Capacitor-free low drop-out voltage regulator and voltage regulating method thereof | |
| CN215599582U (en) | Buffer circuit for improving transient response capability of LDO (low dropout regulator) | |
| CN105549672A (en) | Low-dropout linear regulator | |
| CN102495656A (en) | Low dropout linear regulator | |
| CN102981543A (en) | Drive circuit of ultralow-power-consumption linear voltage stabilizer | |
| CN106292824A (en) | low-dropout regulator circuit | |
| CN104682727A (en) | Primary-side constant-voltage feedback AC/DC (alternating current/direct current) converter provided with current compensation circuit | |
| CN112860002A (en) | Instantaneous response linear voltage regulator | |
| CN109921641A (en) | A kind of control circuit and its control method of adaptive difference current mould | |
| CN202362691U (en) | Low dropout linear regulator | |
| CN109634337B (en) | A kind of adjustable low-temperature coefficient booster circuit of amplitude | |
| CN104635823A (en) | Low drop-out linear voltage stabilization circuit | |
| CN104331112A (en) | Low dropout linear regulator and soft starting circuit thereof | |
| CN117389371B (en) | Dual-loop frequency compensation circuit suitable for LDO and compensation method thereof | |
| CN213934662U (en) | Linear voltage stabilizing circuit without off-chip capacitor | |
| CN110377094A (en) | A kind of Low Drift Temperature extremely low power dissipation linear voltage regulator |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |