CN110064605B

CN110064605B - Sorting machine for testing semiconductor elements

Info

Publication number: CN110064605B
Application number: CN201910142020.5A
Authority: CN
Inventors: 李镇福; 成耆烛; 李建雨
Original assignee: Techwing Co Ltd
Current assignee: Techwing Co Ltd
Priority date: 2015-12-29
Filing date: 2016-12-29
Publication date: 2021-03-09
Anticipated expiration: 2036-12-29
Also published as: TWI617820B; KR20170078209A; KR20240026168A; CN106955855B; TW201734479A; CN106955855A; CN110064605A; KR20240026169A

Abstract

The present invention relates to a handler for testing semiconductor elements capable of supporting a test of semiconductor elements. The handler for testing semiconductor elements according to the present invention comprises: a contact guide combined with a socket board of a tester and guiding so that a semiconductor element can be accurately electrically connected with a test socket provided on the socket board; and a component supplier for supplying a semiconductor component to the contact guide, wherein the contact guide includes: a combination board combined with the socket board; an insert movably provided to the bonding board in a one-to-one correspondence with the test sockets and having a placing groove for placing the semiconductor element supplied by the element supplier; and an elastic member elastically supporting the insert upward so that the insert can be lowered with respect to the test socket when the component supplier presses the semiconductor component placed in the insert downward.

Description

Sorting machine for testing semiconductor elements

This application is a divisional application of a patent application entitled "sorter for testing semiconductor devices" filed 2016, 12, 29, and having an application number of 201611241234.0.

Technical Field

The present invention relates to a handler (handler) for testing semiconductor devices, which is used when testing semiconductor devices.

Background

A handler for testing semiconductor elements (hereinafter, referred to as a 'handler') is an apparatus that sorts semiconductor elements manufactured through a predetermined manufacturing process according to a test result after electrically connecting the semiconductor elements to a tester.

The technologies disclosed about the sorting machine are: korean laid-open patent No. 10-2002-.

According to the patent document disclosed, a grasping head (named as 'inductance head' in prior art 1 and named as 'pressing device' in prior art 2) is lowered in a state of grasping a semiconductor element to electrically connect the semiconductor element to a test socket (named as 'inspection socket' in prior art 2) located on a socket board (named as 'tester' in prior art 2). For this purpose, the gripper head is configured to be movable horizontally and vertically. In this case, the horizontal movement of the gripping head is performed between a position above a shuttle (named "slide table" in prior art 2) for carrying a semiconductor element and a position above the socket board. The holding head is vertically moved when the semiconductor element is held or released from the reciprocating part and when the semiconductor element is electrically connected or released from the test socket. It will be apparent that the location between the shuttle and the gripper head or other related structure may have a variety of configurations.

The work of electrically connecting the semiconductor element to the test socket by the lowering of the gripping head needs to be performed in a state in which an accurate position setting between the semiconductor element gripped by the gripping head and the test socket is achieved.

However, it is difficult to achieve accurate position setting between the semiconductor element held by the holding head and the test socket because of control tolerance for horizontal movement or other various design aspects. To solve the above-described problems, as described in the prior art 2, a position setting pin (named as 'guide pin' in the prior art 2) is generally provided at the socket board setting position and a hole (named as 'guide hole' in the prior art 2) is provided at the grip head setting position. Therefore, when the grip head is lowered, the position setting pins of the socket board are inserted into the position setting holes of the grip head first, and thus the semiconductor element can be electrically connected to the test socket in a state where accurate position setting between the grip head and the test socket is achieved first.

In addition, the number of terminals of the semiconductor element is gradually increasing due to the development of integration technology and the like. Semiconductor device manufacturers attempt to reduce the size of the terminals and the pitch between the terminals in order to accommodate a large number of terminals in a limited area. Therefore, a product in which the pitch between terminals is reduced from 0.50mm to 0.40mm to 0.35mm to 0.30mm is currently developed, and is expected to be further reduced in the future. Obviously, the size of the terminals should naturally be smaller as the pitch between the terminals decreases. For example, in the BGA type, the diameter of the terminals is 0.33mm in the case where the pitch between the terminals (balls) is 0.50mm, but is reduced to 0.23mm in the case where the pitch between the terminals is 0.35 mm. In particular, a recent trend is that as the pitch between terminals is reduced to 0.30mm, the terminal diameter is also being reduced to 0.20mm or less. In this case, if the semiconductor element is slightly out of position or held in a skewed posture by the holding head, an electrical connection failure between the semiconductor element and the test socket may occur. Further, there is a risk that a terminal is damaged or Short-circuited (Short) occurs.

Therefore, it is required to more accurately realize the electrical connection between the semiconductor element and the test socket.

However, in view of the above-described tendency for the diameter of the terminals or the pitch between the terminals to decrease, a method of achieving accurate position setting between the semiconductor element and the test socket using only the position setting pins and the position setting holes may become very difficult in the near future for the following reasons.

First, when the position setting pin is repeatedly inserted into and removed from the position setting hole, it may cause the wall surface forming the position setting hole to be worn. In the above case, the position setting pin and the position setting hole lose their own functions. In order to overcome the above problems, complicated work such as replacement of parts is required, which results in waste of human resources and a decrease in operating efficiency.

Second, the gripping of the semiconductor element by the gripping head may become poor. That is, the grip head needs to have a structure that lowers in a state of gripping the semiconductor element to electrically connect the semiconductor element to the test socket, and therefore, the gripping state of the semiconductor element is very important. However, the movement control tolerance of the shuttle or the gripping head or the placement tolerance of the semiconductor element may affect the accurate gripping of the semiconductor element gripped by the gripping head. Therefore, as exaggeratedly shown in (a) and (b) of fig. 1, the semiconductor element D may be gripped in a state of not being accurately gripped or slightly rotated by the pickup P. However, attempts to minimize design tolerances necessarily suffer from mechanical limitations.

Accordingly, the applicant of the present invention proposed a technology having a liftable pocket plate such as korean laid-open patent No. 10-2014-0121909 (hereinafter referred to as 'prior art').

According to the related art, the semiconductor element is mounted to the pocket plate to achieve the positional correction, and therefore, even if the semiconductor element is poorly gripped by the gripping head to a predetermined degree, the semiconductor element can be electrically connected to the test socket appropriately.

However, the pitch between the terminals is gradually miniaturized and many mechanical tolerances remain. Also, it is also necessary to take into account that the individual semiconductor elements placed on the pocket plate may have different positional deviations from each other due to thermal expansion or contraction. For the above reasons, it is expected that more accurate and independent position control of each semiconductor element is required sooner or later.

Disclosure of Invention

The object of the present invention is as follows.

First, a technique capable of accurately correcting the position of a semiconductor element through at least 2 steps regardless of the element supplier is provided.

Second, a technique is provided that enables a plurality of semiconductor elements supplied by an element supplier to be independently position-controlled.

A handler for testing semiconductor elements according to the present invention for achieving the above object includes: a contact guide combined with a socket board of a tester and guiding so that a semiconductor element can be accurately electrically connected with a test socket provided on the socket board; and a component supplier for supplying a semiconductor component to the contact guide, wherein the contact guide includes: a combination board combined with the socket board; an insert which is provided so as to correspond one-to-one to the test sockets, is provided on the bonding board so as to be movable in a horizontal direction, and has a placement groove for placing the semiconductor element supplied from the element supplier; and an elastic member elastically supporting the insert upward so that the insert can be lowered with respect to the test socket when the component supplier presses the semiconductor component placed in the insert downward.

The insert has a first correcting hole and a second correcting hole for correcting a position of the test socket, a first correcting pin provided in the test socket is inserted into the first correcting hole to primarily correct the position of the insert, and a second correcting pin provided in the test socket is inserted into the second correcting hole to secondarily correct the position of the insert when the semiconductor device placed in the insert is pressed downward by the device supplier.

The semiconductor element supplied to the insert by means of the element supplier is subjected to primary position correction by means of the placement groove, and is subjected to secondary position correction by means of the second correction hole and the second correction pin.

The diameter of the second corrective hole is smaller than the diameter of the first corrective hole.

When the first leveling pin is inserted into the first leveling hole, the center of the second leveling pin is leveled to a position where it can be inserted into a second leveling hole.

The second leveling pin has a height lower than that of the first leveling pin, and at least an upper end of the first leveling pin is inserted into the first leveling hole while the insert is in the raised state, but the second leveling pin is disengaged from the second leveling hole.

The bonding board includes: a coupling frame coupled to the socket board; and a detachable frame detachably coupled to the coupling frame and provided with the insert movably.

The present invention has the following effects.

First, the position of the semiconductor element can be accurately corrected through at least 2 steps regardless of the element supplier, and thus the reliability of the electrical connection between the semiconductor element and the test socket can be improved.

Second, the plurality of semiconductor elements supplied by the element supplier are independently position-controlled, and thus even if the plurality of semiconductor elements have positional deviations different from each other due to mechanical tolerances, thermal expansion or contraction, or the like, electrical connection between the semiconductor elements and the test socket can be accurately achieved.

Drawings

Fig. 1 is a reference for explaining a problem of the related art.

Fig. 2 is a schematic plan view of a sorter according to the present invention.

Fig. 3 is an exploded perspective view partially cut away of a main part of the sorting machine of fig. 2.

Fig. 4 is an exploded perspective view of a contact guide applied to the sorter of fig. 2.

Fig. 5 is a cut-away perspective view of an insert applied to the contact guide of fig. 4.

Fig. 6 is a bottom perspective view of an insert applied to the contact guide of fig. 4.

FIG. 7 is a schematic side view of a component supply for use with the sorter of FIG. 2

Fig. 8 is an extracted plan view of a socket board equipped to a tester.

Fig. 9 is a sectional view of a state in which a coupling plate and a socket plate applied to the sorter of fig. 2 are fixed to each other.

Fig. 10 is a view for explaining a positional relationship between the first leveling pin and the first leveling hole and the second leveling pin and the second leveling hole in the state of fig. 9.

Fig. 11 is a sectional view showing another example of a state in which a coupling plate and a socket plate, which can be applied to the sorter of fig. 2, are fixed to each other.

Description of the symbols

200: sorting machine for testing semiconductor elements

240: contact guide 241: combination board

241 a: coupling frame 241 b: loading and unloading frame

242: the insert RS: placing groove

PH₁: first correction hole PH₂: second correction hole

243: the elastic member 250: component supplier

SP: socket board TS: test socket

PP₁: first correction pin PP₂: second correcting pin

Detailed Description

Hereinafter, preferred embodiments according to the present invention will be described, and well-known or repeated descriptions will be omitted or compressed as much as possible for the sake of simplicity of description.

< description of the apparatus >

Fig. 2 is a schematic plan structural view of a handler (200, hereinafter, referred to simply as 'handler') for testing semiconductor elements according to the present invention. Fig. 3 is an exploded perspective view partially cut away of a main part IP of the sorting machine of fig. 2.

Referring to fig. 2 and 3, the sorter 200 according to the present invention includes: a shuttle (shuttle)210, a loading section 220, an unloading section 230, a contact guide 240, and a component supplier 250.

The shuttle 210 has a pocket table 211 reciprocating on a straight line connecting the loading position LP, the gripping position DP, and the unloading position UP in the left-right direction.

Pocket stage 211 has 16 loading pockets 211a and 16 unloading pockets 211b on which semiconductor devices can be mounted. Wherein loading pocket 211a is reciprocated between loading position LP and gripping position DP by reciprocation of pocket table 211, and unloading pocket 211b is reciprocated between gripping position DP and unloading position UP by reciprocation of pocket table 211. The loading unit 220 loads (loads) a semiconductor device to be tested into the loading pocket 211a of the reciprocating unit 210.

The unloading section 230 is used to unload (unload) the tested semiconductor element from the unloading pockets 211b of the shuttle section 210.

For reference, techniques for loading/unloading semiconductor elements by the loading/

unloading sections

220 and 230 have been disclosed in various forms and are well known, and thus detailed description thereof is omitted.

The contact guide 240 is coupled to and guides the socket board SP of the tester to electrically connect the semiconductor device with the test socket TS provided on the socket board SP. To this end, as shown in fig. 4, the contact guide 240 includes a coupling plate 241, 16 inserts 242, and a plurality of elastic members 243.

The coupling plate 241 is coupled to the socket plate SP and includes a coupling frame 241a and a loading and unloading frame 241 b.

The coupling frame 241a is formed in a quadrangular frame shape and is fixedly coupled to the socket board SP in close contact therewith.

The detachable frame 241b is detachably coupled to the coupling frame 241a, and the upper 16 inserts 242 are provided in a 2 × 8 matrix so as to be slightly movable in the vertical direction or the horizontal direction. Therefore, when the insert 242 needs to be replaced, the worker only needs to separate the detachable frame 241b from the coupling frame 241a and then perform the replacement operation. Obviously, the coupling frame 241a and the detachable frame 241b of the coupling plate 241 may be integrally provided according to the embodiment without distinction.

The 16 inserts 242 all have the same construction. The inserts 242 are provided on the detachable frame 241b so as to be movable in the horizontal direction and the vertical direction, and correspond to the test sockets TS one-to-one. The insert 242 receives the semiconductor device supplied by the device supplier 250. Fig. 5 is a cut-away perspective view of the insert 242. As shown in fig. 5, the insert 242 has a placement groove RS for housing the semiconductor element. Further, the distance between the inner wall surfaces IF forming the placement grooves RS becomes narrower as it approaches downward. Therefore, the semiconductor is driven at the device supplier 250When the element is dropped onto the placement groove RS, the posture and position of the semiconductor element are corrected by the inclination of the inner wall surface IF and placed. Obviously, the semiconductor element placed in the placement groove RS is supported by the thin supporting film 242a, and the terminal of the semiconductor element is exposed downward through the exposure hole EH of the supporting film 242 a. As shown in fig. 6, which is a perspective view of the bottom surface of the

insert

242, 2 first correction holes PH are formed in the insert 242₁4 second straightening holes PH₂And 2 fixed slots FS.

First correction hole PH₁And a second correction hole PH₁Provided for accurately setting the position between the semiconductor element and the test socket TS

Be equipped with in first correction round pin PP of test socket TS₁(refer to FIG. 8) is inserted into the first correction hole PH₁While a correction is made to the position of the insert 242. Therefore, the semiconductor devices supplied by the device supplier 250 are also placed in the placing grooves RS of the insert 242 and placed in the corrected positions, wherein the degree of correction and the positions of the insert 242 are corrected by means of the first correcting holes PH₁And a second leveling pin PP₁And the degree of correction is comparable.

Second correction pin PP equipped in test socket TS₂(refer to FIG. 8) is inserted into the second correction hole PH₂While a secondary correction is made to the position of the insert 242. The second correcting hole PH₂Diameter ratio of (A) to the first straightening hole PH₁And the second correction hole PH is small₂Is provided for fine-tuning the position of the semiconductor element.

After that, the PH value of the first straightening hole is corrected₁And a second correction hole PH₂The function of (a) will be explained in more detail.

The upper end of the elastic member 243 is inserted into the fixing groove FS, and the elastic member 243 is fixed in a state that the upper end thereof is inserted into the fixing groove FS.

The elastic member 243 elastically supports the insert 242 upward to maintain a distance between the insert 242 and the test socket TS, so that the insert 242 can be lowered with respect to the test socket TS when the component supplier 250 downwardly presses the semiconductor component placed on the insert 242. Such an elastic member 243 may be provided by a coil spring, and its lower end is supported by the test socket TS.

The component supplier 250 supplies to the bonding board 241 after gripping 16 semiconductor components from the loading pockets 211a located at the gripping position DP, and supplies to the unloading pockets 211b located at the gripping position DP after gripping 16 tested semiconductor components from the bonding board 241. To this end, as shown in the schematic side view of fig. 7, the component supplier 250 includes a holding head 251, a horizontal mover 252, and a vertical mover 253.

The gripping head 251 can grip or release 16 semiconductor elements, and has 16 pickers P capable of gripping or releasing one semiconductor element, respectively, by vacuum pressure.

The horizontal mover 252 is for moving the gripping head 251 in the front-rear horizontal direction, and may be provided by an air cylinder. The gripping head 251 may be positioned above the socket board SP or above the gripping position DP by means of such a horizontal mover 252.

The vertical mover 253 serves to move the gripping head 251 in the up-down direction, and may be provided by a motor. The holding head 251 can appropriately suction-hold or put down the semiconductor element from the holding position DP or the bonding board 241 by means of such a vertical mover 253, and further, can press the semiconductor element placed on the socket board SP toward the test socket TS side.

For reference, as shown in the extracted plan view of fig. 8, the socket board SP has 16 test sockets TS. The 16 semiconductor elements placed in the insert 242 of the contact guide 240 are pressed toward the 16 test sockets TS by the lowering of the gripping head 251 and electrically connected to the tester. And the test sockets TS are respectively provided with 2 first correction pins PP₁And 4 second correcting pins PP₂. First correction pin PP₁Is inserted into the first correction hole PH₁While the position of the insert 242 is corrected once, and when the semiconductor element and the insert 242 are pressed downward by the element supplier 250 and moved, the second correcting pin PP₂Inserted into the second correction hole PH₂While the position of the embedded part 242 and the semiconductor element is precisely twiceAnd (6) correcting. For this purpose, a first correcting pin PP₁And a second leveling pin PP₂Prepared into a cone shape with a smooth curved upper end and a first correction hole PH₁And a second correction hole PH₂Corresponding to the diameter of the second leveling pin PP₂Is smaller than the first correction pin PP₁Diameter H of (d). Obviously, the first correcting pin PP can be inserted₁And a second leveling pin PP₂The portions are separated from the electrical connection portions SA of the test socket TS and are individually named socket guides.

When the coupling plate 241 is closely fixed to the socket plate SP, as shown in fig. 9, the first correcting pin PP₁Is inserted into the first correction hole PH₁The state of (1). At this time, the first correcting pin PP₁Inserted into the first correction hole PH₁The position of the insert 242 is corrected once. Obviously, since the inserts 242 individually play, the inserts 242 are aligned with the corresponding test sockets TS and are individually corrected in position. In the state of fig. 8, the second leveling pin PP is shown₂From the second correction hole PH₂Disengaged, however, due to the first correcting pin PP₁And the first correction hole PH₁The function of which is to promote the position correction of the insert 242, as shown in the bottom view of fig. 10, the second correction pin PP₂Is located at the second straightening hole PH₂In such a way that the second correcting pin PP can be made₂And then inserted into a second correction hole PH₂. For this purpose, as shown in fig. 9, the second leveling pin PP₂Is preferably smaller than the first leveling pin PP₁Of (c) is measured.

In addition, in a state where the component supplier 250 lowers the holding head 251 located above the coupling plate 241 by a predetermined height, if the semiconductor component is dropped, the semiconductor component is inserted into the placement groove RS of the insert 242 while its position and posture are corrected at a time.

Subsequently, if the component supplier 250 further lowers the holding head 251 by a desired height, the holding head 251 presses the semiconductor component and the insert downward during the lowering242 so that the second leveling pin PP₂Inserted into the second correction hole PH₂. Accordingly, the semiconductor element and the test socket TS are electrically connected in a state where the positions of the insert 242 and the semiconductor element are secondarily corrected accurately. Obviously, the positions of the inlays 242 and the semiconductor elements are also controlled independently at this time.

Further, even if the coupling plate 241 is closely fixed to the socket plate SP, as shown in fig. 11, it can be realized to have only the first leveling pin PP₁Is inserted into the first correction hole PH₁The state of (1). In this case, the semiconductor element is placed in the placement groove RS of the insert 242 and the position and posture thereof are primarily corrected, and the semiconductor element placed in the insert 242 is pressed downward by the first correcting pin PP₁And the first correction hole PH₁While its position is corrected a second time, then by means of the second correction pin PP₂And a second correction hole PH₂While its position is corrected three times exactly. That is, the present invention may include various examples in which the position of the semiconductor element is precisely corrected by performing 2 or more steps using the insert 242 capable of moving independently.

In addition, although the present embodiment has been described with an example in which 16 semiconductor elements are tested at a time, the present invention can be applied well to a case in which 1 or more semiconductor elements are tested at a time. Obviously, the number of pickers, the number of inserts, and the number of test sockets may be provided as many as the number of semiconductor elements to be tested at once.

Also, the present embodiment exemplifies the case where only one shuttle is configured, but as disclosed in 10-2012-0110424 (korea) previously filed by the present applicant, it can be applied to the case where a plurality of shuttles and a plurality of grasping heads are configured.

As described above, the present invention has been specifically described with reference to the drawings and the embodiments, but the above embodiments are only preferred embodiments of the present invention, so it should be understood that the present invention should not be limited to the above embodiments, and the scope of the present invention should include the scope of the claims and the equivalents thereof.

Claims

1. A handler for testing semiconductor components, comprising:

a contact guide combined with a socket board of a tester and guiding so that a semiconductor element can be accurately electrically connected with a test socket provided on the socket board; and

a component supplier for supplying a semiconductor component to the contact guide,

wherein the contact guide includes:

a combination board combined with the socket board;

an insert provided on the bonding board so as to correspond one-to-one to the test sockets and to be capable of floating in a horizontal direction, and having a placement groove for placing the semiconductor device supplied from the device supplier,

wherein the insert has a first leveling hole and a second leveling hole for leveling a position of the test socket,

a first correcting pin provided to the test socket is inserted into the first correcting hole to correct the position of the insert once,

when the semiconductor device placed on the insert is pressed downward by the device supplier, a second correcting pin provided in the test socket is inserted into the second correcting hole, thereby performing a secondary correction of the position of the insert.

2. The handler for testing semiconductor elements according to claim 1, wherein the second leveling hole has a diameter smaller than that of the first leveling hole.

3. The handler for testing semiconductor elements according to claim 1, wherein the first and second leveling holes are arranged to: when the first leveling pin is inserted into the first leveling hole, the center of the second leveling pin is leveled to a position where it can be inserted into a second leveling hole.

4. The handler for testing semiconductor elements according to claim 3, wherein the semiconductor elements supplied to the contact guide by the element supplier are once corrected while being placed in the placing groove of the insert,

when the semiconductor device placed in the placement groove is pressed downward by the device feeder, the position of the semiconductor device is corrected a second time by the first correcting pin and the first correcting hole, and thereafter, the position of the semiconductor device is corrected a third time by the second correcting pin and the second correcting hole.

5. The handler for testing semiconductor elements according to claim 3, wherein the second leveling holes are disposed closer to the semiconductor elements placed in the placement groove than the first leveling holes.

6. The handler for testing semiconductor elements according to claim 1, wherein the insert includes a support film for supporting the semiconductor elements placed on the placing groove,

an exposure hole for exposing the terminal of the semiconductor element downward is formed in the support film.