CN109817588A - 具有隔离结构的封装 - Google Patents

具有隔离结构的封装 Download PDF

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Publication number
CN109817588A
CN109817588A CN201811389012.2A CN201811389012A CN109817588A CN 109817588 A CN109817588 A CN 109817588A CN 201811389012 A CN201811389012 A CN 201811389012A CN 109817588 A CN109817588 A CN 109817588A
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CN
China
Prior art keywords
isolation structure
encapsulation
rdl
external connection
height
Prior art date
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Pending
Application number
CN201811389012.2A
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English (en)
Inventor
尼尚特·拉赫拉
安德鲁·杰佛森·莫尔
阿希莱什·库马尔·辛格
纳瓦斯·坎·奥拉提卡兰达尔
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NXP USA Inc
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NXP USA Inc
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Publication of CN109817588A publication Critical patent/CN109817588A/zh
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Abstract

本文提供了一种封装的半导体装置的实施例，所述封装的半导体装置包括半导体管芯；在所述半导体管芯的有源侧上的再分布层(RDL)结构，所述RDL结构包括在所述RDL结构的外表面上的多个接触焊盘；附接到所述多个接触焊盘的多个外部连接；和在所述RDL结构的所述外表面上、在所述多个接触焊盘中的一个或多个接触焊盘周围的隔离结构，其中所述隔离结构的高度是所述外部连接的高度的至少三分之二。

Description

具有隔离结构的封装
技术领域
本公开总体上涉及半导体封装，更具体地说，涉及具有隔离结构以保护连接的半导体封装。
背景技术
半导体封装可以通过多个焊接接头附接到印刷电路板(PCB)，所述焊接接头例如布置在球栅阵列(BGA)中的焊球。通常，封装的热膨胀系数(CTE)不同于PCB的CTE，其中这种差异在将封装附接到PCB的焊接接头上产生机械应力。为了解决这个问题，底部填充材料通常放置在封装和PCB之间的焊接接头周围，以加强封装与PCB的附接。底部填充材料通过从焊接接头分离各种机械应力(例如，由热膨胀引起的机械应力以及由机械冲击或振动引起的机械应力)来保护焊接接头。底部填充材料通常可最大限度地减少焊接接头的断裂，从而提高焊接接头的坚固性。
发明内容
根据本发明的第一方面，提供一种封装的半导体装置，包括：
半导体管芯；
在所述半导体管芯的有源侧上的再分布层(RDL)结构，所述RDL结构包括在所述RDL结构的外表面上的多个接触焊盘；
附接到所述多个接触焊盘的多个外部连接；和
在所述RDL结构的所述外表面上、在所述多个接触焊盘中的一个或多个接触焊盘周围的隔离结构，其中所述隔离结构的高度是所述外部连接的高度的至少三分之二。
在一个或多个实施例中，所述一个或多个接触焊盘连接到所述半导体管芯的射频(RF)信号线。
在一个或多个实施例中，所述多个外部连接被配置成附接到印刷电路板(PCB)的多个着陆焊盘，并且
所述隔离结构的边缘被配置成与所述PCB相隔间隙高度。
在一个或多个实施例中，所述隔离结构被配置成作为在附接到所述一个或多个接触焊盘的一组外部连接与所述封装的半导体装置和所述PCB之间的粘合材料之间的屏障。
在一个或多个实施例中，所述隔离结构包括介电材料。
在一个或多个实施例中，所述隔离结构在所述一个或多个接触焊盘周围沿着闭环路径形成。
在一个或多个实施例中，所述封装的半导体装置进一步包括：
在所述多个接触焊盘中的另一组一个或多个接触焊盘周围的所述RDL结构的所述外表面上的另一个隔离结构。
在一个或多个实施例中，所述隔离结构的高度与从所述RDL结构的所述外表面测量的所述外部连接的高度之间的差值在5微米至50微米的范围内。
在一个或多个实施例中，所述隔离结构的横向厚度在5微米至100微米的范围内。
在一个或多个实施例中，所述隔离结构的高度是所述隔离结构的横向厚度的N倍，其中N是等于或大于1的整数。
在一个或多个实施例中，所述隔离结构的侧壁和外部连接的侧壁之间的最小横向距离是至少5微米。
根据本发明的第二方面，提供一种制造封装的半导体装置的方法，所述方法包括：
在半导体管芯的有源侧上形成再分布层(RDL)结构，所述RDL结构包括在所述RDL结构的外表面上的多个接触焊盘；
在所述RDL结构的所述外表面上、在所述多个接触焊盘中的一个或多个接触焊盘周围形成隔离结构；以及
将多个外部连接附接到所述多个接触焊盘，其中所述隔离结构的高度是所述外部连接的高度的至少三分之二。
在一个或多个实施例中，所述一个或多个接触焊盘连接到所述半导体管芯的射频(RF)信号线。
在一个或多个实施例中，所述方法进一步包括：
从半导体管芯的晶圆切割所述半导体管芯，其中从所述晶圆切割的每个半导体管芯包括所述隔离结构。
在一个或多个实施例中，所述形成所述隔离结构包括：
在所述一个或多个接触焊盘周围沿着目标路径在所述RDL结构的所述外表面上沉积一层或多层钝化材料并使其图案化。
在一个或多个实施例中，所述形成所述隔离结构包括：
在所述一个或多个接触焊盘周围在所述RDL结构的所述外表面上附接预先形成的介电结构。
在一个或多个实施例中，所述隔离结构内的所述一个或多个接触焊盘中的每个接触焊盘连接到所述半导体管芯的射频(RF)信号线或非RF信号线。
在一个或多个实施例中，所述多个外部连接被配置成附接到印刷电路板(PCB)的多个着陆焊盘，并且
所述隔离结构的边缘被配置成与所述PCB相隔间隙高度。
在一个或多个实施例中，所述隔离结构被配置成作为在附接到所述一个或多个接触焊盘的一组外部连接与沿着所述封装的半导体装置的周长的边缘接合材料之间的屏障。
在一个或多个实施例中，所述隔离结构被配置成作为在附接到所述一个或多个接触焊盘的一组外部连接与所述半导体管芯和所述PCB之间的底部填充材料之间的屏障。
本发明的这些和其它方面将根据下文中所描述的实施例显而易见，且参考这些实施例予以阐明。
附图说明
通过参考附图，可以更好地理解本发明，并且本发明的众多目的、特征和优点对于本领域技术人员而言是显而易见的。
图1A、图1B、图2A、图2B、图3A、图3B、图4A、图4B、图5A、图5B和图6是描绘了根据本公开的一些实施例的具有一个或多个隔离结构的示例性半导体封装的框图。
图7A到图7F是描绘了根据本公开的一些实施例的具有一个或多个隔离结构的半导体封装的晶圆级芯片尺寸封装(WLCSP)制造工艺的示例性步骤的框图。
图8A到图8D是描绘了根据本公开的一些实施例的具有一个或多个隔离结构的半导体封装的切割和附接工艺的示例性步骤的框图。
通过实例说明了本发明，并且本发明不受附图的限制，其中除非另有说明，否则相同的附图标记表示类似的元件。图中的元件是为了简单和清楚起见而示出的，并且不一定按比例绘制。
具体实施方式
以下阐述了各个实施例的详细描述，其旨在说明本发明而不应视为是限制性的。
概要
虽然底部填充材料通常用于改善封装和印刷电路板(PCB)之间的焊接接头的坚固性，但是这种底部填充材料是介电材料或绝缘材料，其可能导致射频(RF)应用(例如，雷达或无线通信)中封装的严重性能退化。例如，当焊接接头被介电材料包围时，在封装和PCB之间传送RF信号的焊接接头(例如，焊球或焊接凸点)可能经历信号退化。一种解决RF信号退化的方法是完全避免使用底部填充，而是在封装边缘周围使用边缘接合材料来加强封装与PCB的附接。然而，边缘接合材料可以类似地接触或包围(或至少部分地包围)位于封装边缘附近的焊接接头。由于RF连接通常位于封装的边缘周围，因此边缘接合材料的使用仍可能导致RF信号退化。
本公开提供了一种用于封装上的外部连接的保护或隔离结构，其可以包括焊接接头(例如，焊球或焊接凸点)或其它导电金属接头(例如，铜柱或铜栓)。隔离结构由具有接头的封装的同一侧上的介电材料或钝化材料形成。隔离结构与接头横向分离(例如，隔离结构的侧壁不接触接头)，并且充当接头与任何底部填充材料、边缘接合材料、模塑复合材料或其它可用于将封装附接到PCB或用于保护封装的介电材料或绝缘材料之间的屏障。因此，隔离结构最大限度地减少了RF信号退化。
示例性实施例
图1A示出了根据本公开的具有隔离结构122的示例性半导体封装100(也称为封装的半导体装置100或简称为封装100)的横截面视图，图1B示出了其仰视图。在所示的实施例中，封装100是附接到印刷电路板(PCB)102的芯片尺寸封装(CSP)封装。在其它实施例中，封装100可以附接到另一种类型的合适表面，例如基板、转接板或其它封装。CSP封装的封装占用面积通常等于或小于管芯占用面积的1.2倍，并且其间距可以等于或小于0.8mm。虽然本文描述的以下附图示出了晶圆级CSP封装，但是本公开的教导也可以适用于其它封装类型，例如扇出型晶圆级封装(FOWLP)封装、球栅阵列(BGA)封装或其它被配置成通过接头(例如，焊球、焊接凸点(例如，C4凸点)、铜柱、铜栓或其它导电金属接头)附接到合适表面(例如，PCB、基板、转接板或其它封装)的封装类型。下面从图7A开始讨论包括隔离结构形成的封装的示例性晶圆级芯片尺寸封装(WLCSP)制造工艺。
封装100包括半导体管芯104，其具有硅(例如，体硅)背面106和相对的正面或有源侧108，所述正面或有源侧108包括有源电路和多个接合焊盘110。在所示的实施例中，管芯104的背面106还形成封装100的背面，但是在其它实施例(例如，在管芯104的背面106周围具有模塑化合物的实施例)中，封装100的背面可以延伸超过管芯104的背面。有源电路可以包括被配置成发送或接收射频(RF)信号的电路(例如，RF发送器、RF接收器或RF收发器中的两者)。RF信号的频率通常在20kHz至300GHz的范围内。非RF信号的频率通常低于20kHz，并且非RF信号还可以包括电源信号。每个接合焊盘110连接到有源电路的信号线，所述信号线可以承载RF信号或者可以承载非RF信号。
在一些实施例中，半导体管芯104可以是倒装芯片管芯，其具有可以以正面朝下取向(例如，有源侧朝向合适表面)附接到合适表面的接合焊盘。在其它实施例中，半导体管芯104可以是可焊线接合的管芯，其具有接合焊盘，所述接合焊盘能够在焊线接合期间承受超声波热力，并且通常以正面朝上取向(例如，背面朝向合适表面)附接到合适表面。封装100还在封装100的侧边缘处具有外周长或占用面积134，其中封装100的侧边缘垂直于管芯104的有源侧108(以及背面106)。在所示的实施例中，管芯104的侧边缘形成封装100的侧边缘，但是在其它实施例(例如，在管芯104的侧边缘周围具有模塑化合物的FOWLP)中，封装100的侧边缘可以延伸超过管芯104的侧边缘)。
半导体管芯104可以从半导体晶圆(图8A中示出)中切割出来，半导体晶圆可以是任何半导体材料或材料的组合，例如砷化镓、硅锗、绝缘体上硅(SOI)、硅、单晶硅等以及以上的组合。这种半导体管芯包括有源电路，其可以包括在管芯被供电时起作用的集成电路组件。使用应用于半导体晶圆的一系列工艺步骤在半导体晶圆上形成有源电路，包括但不限于沉积半导体材料(包括介电材料和金属)，例如生长、氧化、溅射和保形沉积；蚀刻半导体材料，例如使用湿蚀刻剂或干蚀刻剂；平坦化半导体材料，例如进行化学机械抛光或平坦化，进行光刻以形成图案，包括沉积和去除光刻掩模或其它光刻胶材料、注入离子、退火等。在一些实施例中，有源电路可以是集成电路组件的组合，或者可以是另一种类型的微电子装置。集成电路组件的实例包括但不限于处理器、存储器、逻辑、振荡器、模拟电路、传感器、MEMS(微机电系统)装置、独立分立装置(例如，电阻器、电感器、电容器、二极管、功率晶体管)等。
在管芯104的有源侧108上形成再分布层(RDL)结构112。RDL结构112包括多个图案化的介电层和金属层，其形成穿过RDL结构112的路由或连接路径。连接路径提供管芯104上的多个接合焊盘110与RDL结构112的最外表面114处的多个外部接触焊盘116之间的电连接。每个连接路径可以包括与相应的接合焊盘110电接触的金属填充通孔120，以及一端与金属填充通孔120电接触并且另一端与相应的接触焊盘116电接触的金属迹线118。虽然附图示出了简单的金属迹线(例如，由单个金属层形成的迹线)，但是可以重复图案化的介电层和金属层以产生穿过RDL结构112的复杂路由或连接路径。
可以使用应用于管芯104的有源侧108的一系列工艺步骤来形成RDL结构112，包括但不限于沉积半导体材料(包括介电材料和金属)，例如生长、氧化、溅射和保形沉积；蚀刻半导体材料，例如使用湿蚀刻剂或干蚀刻剂；进行光刻以形成图案，包括沉积和去除光刻掩模或其它光刻胶材料、层压、滴涂、打印、喷射、喷涂等。下面结合7A讨论制造RDL结构的示例性工艺步骤。
多个外部连接分别附接到外部接触焊盘116。在所示的实施例中，外部连接是焊球130和132，其中焊球130电连接到承载RF信号的信号线，并且焊球132电连接到承载非RF信号的信号线。每个外部连接通过接触焊盘116、金属迹线118、金属填充通孔120和接合焊盘110电连接到相应的信号线。在其它实施例中，外部连接可以实施为铜柱或铜栓，或其它合适的导电金属接头。多个外部连接还附接到PCB 102上的着陆(landing)焊盘644，如下面讨论的图6所示。外部连接都电连接到PCB并提供封装100到PCB 102的机械附接。PCB 102包括非导电基板上的导电特征。PCB 102可以是使用聚酰亚胺的柔性型PCB或使用FR4或BT树脂的刚性型PCB。
还可以使用粘合材料来加强封装100到PCB102的机械附接，所述粘合材料是介电材料或绝缘材料，例如边缘接合材料、底部填充材料、模塑复合材料等。在所示的实施例中，边缘接合材料124放置在封装100和PCB 102之间的周长134周围，如图1B中的虚线轮廓所示。边缘接合材料124可以接触RDL结构112的最外表面114的部分，并且还可以接触封装100的侧边缘(其也可以是管芯104的侧边缘和RDL结构112的侧边缘)的部分。边缘接合材料124的实例可以包括但不限于液体聚合物中的环氧树脂、树脂或低CTE膨胀填充材料(例如，二氧化硅、氧化铝、氮化硼等)，其可固化(例如，通过加热、紫外线等)成粘附在封装100和PCB102上的固体复合材料。
如图2A的左侧所示，边缘接合材料124在封装100的左边缘下流动并与焊球132的侧面物理接触。取决于粘合材料的粘度，粘合材料可以部分地包围或完全包围焊球132，如图1B中的边缘接合材料124的不规则形状所示。为简单起见，粘合材料(例如边缘接合或底部填充)在本文中可以示出为具有直边的矩形，但粘合材料的边缘在实际应用中更典型地为不规则形状。如本文所使用，当粘合材料物理接触外部连接的侧面时，粘合材料“部分地包围”外部连接，其中侧面从接触焊盘116向下延伸到外部连接的一部分的PCB 102(例如，粘合材料不完全围住外部连接的周长)，并且当粘合材料物理接触外部连接的所有侧面时，粘合材料“完全包围”外部连接(例如，粘合材料完全或基本上完全围住外部连接的周长)。这种接触(部分地或完全包围外部连接)可能极大地降低承载RF信号的外部连接的RF性能。
为了防止粘合材料与承载RF信号的外部连接进行这种接触，在承载RF信号的外部连接周围形成隔离结构。在所示的实施例中，焊球130承载RF信号，如图1B所示，沿着封装100的右边缘和底边缘定位，并且隔离结构122形成在焊球130周围。如图6所示，隔离结构具有横向厚度640和高度646。在一些实施例中，隔离结构的高度646是横向厚度640的N倍，其中N是等于或大于1的整数。这提供了具有高纵横比的隔离结构，其可以适于封装100上的外部连接之间的间隔距离，同时还充当外部连接和任何横向展开的粘合材料(如果粘合材料(部分地或完全)包围外部连接，这种材料将降低RF性能)之间的屏障。在底部填充或边缘接合过程中，隔离结构应该能够承受粘合材料的毛细力。
优选地，隔离结构的高度646小于外部连接的均一高度648，其中高度646和648是从RDL结构112的外表面114测量的。在一些实施例中，隔离结构的高度646是(焊球)高度648的至少三分之二，以便从粘合材料提供足够的横向屏障围绕焊球的大部分。由于隔离结构的高度646小于外部连接的(均一)高度648，因此在隔离结构的底表面和PCB102的顶表面之间提供间隙高度636。所述间隙高度636允许封装在回流到PCB102期间自对准而没有来自隔离结构的任何干扰(例如，避免封装的倾斜或可能由于隔离结构接触PCB 102而发生的外部连接与PCB102上的着陆焊盘644的其它未对准)。取决于粘合材料的粘度，所述间隙高度636还可以允许一些粘合材料在隔离结构下流动，如渗出物(bleed)638所示。
还如图6所示，隔离结构的侧壁与承载RF信号的每个外部连接分开最小横向间隙距离642，以在外部连接周围提供气隙。横向间隙距离642取决于外部连接之间的(均一)间隔距离和隔离结构的横向厚度640。在一些实施例中，横向厚度640可以是外部连接之间的间隔距离的至少一半。
在一些实施例中，对于CSP或倒装芯片封装，外部连接之间的间隔距离可以在30微米至250微米的范围内，这取决于所使用的外部连接的尺寸。在一些实施例中，横向间隙距离642可以是至少5微米。在一些实施例中，隔离结构的横向厚度640可以在5微米至100微米的范围内。在一些实施例中，隔离结构的高度646可以在150微米至200微米的范围内。在一些实施例中，间隙高度636可以在5微米至50微米的范围内。
作为一个说明性示例，实现(焊球)高度648为250微米且间隔距离为200微米至250微米的示例性封装可具有100微米的结构厚度640，200微米的结构高度646，50微米的间隙高度，以及在隔离结构122的任一侧上50微米至75微米的横向间隙642。
在所示的实施例中，在一组焊球130周围沿着闭环路径形成隔离结构122(例如，所述路径的端点和起点位置相同)。在其它实施例中，可以在位于封装的不同区域中的多组焊球周围形成多个隔离结构，如图2A和2B所示。隔离结构可以由介电材料或绝缘材料形成，例如一个或多个钝化(或再钝化)层。在其它实施例中，隔离结构可以是附接到封装100的表面114的预先形成的介电结构，例如B阶段环氧膜(例如，处于部分固化状态)或附接到封装100的表面114(例如，通过固化B阶段环氧树脂)的其它介电材料。隔离结构在承载RF信号的每个外部连接周围保持气隙，这有利于改善RF性能因素，例如噪声系数、输出功率和相位噪声。隔离结构的其它实例在以下附图中示出。具有类似附图标记的组件对应于前面讨论的组件。
图2A示出了具有在多组外部连接周围形成的两个隔离结构222的示例性封装200的横截面视图，图2B示出了其仰视图。在所示的实施例中，在两组外部连接(封装200的左边缘附近的焊球130和右边缘附近的焊球130)周围形成隔离结构222。在相应组的焊球130周围沿着闭环路径形成每个隔离结构222。边缘接合材料124放置在封装200的边缘周围，如图2B中的虚线轮廓所示。每个隔离结构222用作隔档(dam)，以阻挡边缘接合材料124在每个隔离结构222内接触外部连接。
图3A示出了具有隔离结构322的示例性封装300的横截面视图，图3B示出了其仰视图。在所示的实施例中，在封装300的所有外部连接(示出为焊球130)周围形成隔离结构322。在一些实施例中，一些焊球130可以承载RF信号，而其它焊球130可以承载非RF信号。在封装300的边缘周围沿着闭环路径形成隔离结构322。隔离结构322阻挡边缘接合材料124部分地或横向地围绕外部连接。
图4A示出了具有隔离结构422的示例性封装400的横截面视图，图4B示出了其仰视图。在所示的实施例中，在位于封装400的中心附近的一组外部连接(而不是位于封装400的边缘附近的那些外部连接)周围形成隔离结构422。在一组外部连接或焊球130周围沿着闭环路径形成隔离结构422。
不使用边缘接合材料，而是将底部填充材料126放置在封装400和PCB 102之间的外部连接或焊球132周围的空间(128)中，所述外部连接或焊球132可以承载非RF信号。底部填充材料126是具有低CTE的介电材料或绝缘材料，其粘附到封装100和PCB 102。底部填充材料可以包括但不限于液体聚合物中的环氧树脂、树脂或低CTE膨胀填充材料(例如，二氧化硅、氧化铝、氮化硼等)，其可固化(例如，通过加热、紫外线等)成固体复合材料。在一些实施例中，底部填充材料126可以是模塑复合材料，其可以基于联苯型或多芳型环氧树脂。底部填充材料中使用的填充材料的颗粒通常比边缘接合材料中使用的颗粒更小，以确保底部填充材料具有足够的粘度以在封装100下和金属接头之间成功流动而不形成空隙(例如，气泡)。隔离结构422防止底部填充材料126在隔离结构422内接触外部连接。
图5A和图5B示出了隔离结构的其它实例，例如沿圆形闭环路径的结构622，以及沿不规则多边形闭环路径的隔离结构722。在一些实施例中，隔离结构可以沿圆形、多边形、三角形、长方形、不规则形状或其它合适闭环形状的闭环路径。在一些实施例中，闭环形状可以包括曲线、斜线、不规则线等。在一些实施例中，隔离结构可以在一个或多个外部连接周围形成，所述外部连接可以少至一个外部连接或者多至所有外部连接。虽然本文示出的实施例包括完全填充的封装，但是在其它实施例中，隔离结构可以在具有去填充区域的封装中实现。在一些实施例中，隔离结构可以形成为与一个或多个外部连接相邻，例如在封装的边缘附近或在封装的去填充区域附近，或者可以位于一个或多个外部连接之间，例如在封装的填充区域内。
图7A到图7F示出了具有一个或多个隔离结构的半导体封装的晶圆级芯片尺寸封装(WLCSP)制造工艺的各个步骤。图7A到图7F中所示的单个管芯104可以表示形成为单个晶圆的一部分的多个管芯(例如，如图8A所示)，其中本文所讨论的各个步骤在晶圆的所有管芯上实施。然后可以将晶圆切割成多个封装，这些封装可以附接到PCB或其它合适表面，如下面结合图8A到图8D进一步讨论。
图7A示出了示例性封装的横截面视图，所述示例性封装是在第一再钝化层702已经沉积在(例如，直接沉积在)管芯104的有源侧108上并且被图案化以具有与接合焊盘110对准的若干开口或通孔704(例如，接合焊盘110分别暴露在通孔704内)之后制造的。第一再钝化层702是介电材料或绝缘材料，其实例包括但不限于聚酰亚胺、苯并环丁烯(BCB)、聚苯并恶唑(PBO)或其它合适的聚合物或介电材料。在一些实施例中，第一再钝化层702可以共形地沉积在有源侧108上，在其它实施例中，第一再钝化层702可以旋涂在有源侧108上，或者在其它实施例中，第一再钝化层702可以生长在有源侧108上。可以使用光刻来图案化第一再钝化层702，以暴露相应通孔704中的接合焊盘110。
图7B示出了在再分布层706已经沉积在(例如，直接沉积在)第一再钝化层702的顶表面上(包括在每个通孔704内)并且被图案化以形成若干金属迹线118之后的横截面视图。在本文所示的实施例中，再分布层706填充每个通孔704以形成金属填充通孔120。在其它实施例中，再分布层706不需要填充每个通孔704，而是可以仅涂覆每个通孔704的侧壁和通孔704内的接合焊盘110的表面。与接合焊盘电接触的每个金属填充通孔120也连接到相应的金属迹线118。再分布层706是导电金属，其实例包括镍、金、铜、铝或其它合适的导电金属或由一种或多种合适的导电金属组成的合金。
图7C示出了在第二再钝化层708已经沉积在(例如，直接沉积在)金属迹线118和第一再钝化层702的顶表面的任何暴露部分上并且被图案化以具有若干开口或通孔710之后的横截面视图。第二再钝化层708也是介电材料或绝缘材料，在一些实施例中，第二再钝化层708可以是与第一再钝化层702相同的材料。在一些实施例中，第二再钝化层708可以共形地沉积，在其它实施例中，第二再钝化层708可以旋涂，或者在其它实施例中，第二再钝化层708可以生长。可以使用光刻来图案化第二再钝化层708，以暴露每个开口或通孔710内的金属迹线118的顶表面。所示的实施例中的金属迹线118可以被称为单层金属迹线118(例如，形成有单个再分布层)。
应注意，可以重复图7B和图7C中所示的步骤以形成多个水平迹线。例如，另一个再分布层可以沉积在第二再钝化层708上(包括在每个通孔710内)并且被图案化以形成延长的金属迹线118。然后可以在延长的金属迹线118上沉积另一个再钝化层，其可以使用光刻来图案化以在所得的RDL结构112的最外表面114中形成开口710。
图7D示出了在所得的RDL结构112的最外表面114中的开口710中形成接触焊盘116之后的横截面视图。接触焊盘116可以使用凸点下金属化(UBM)形成，其为一种或多种导电金属的多层薄膜，导电金属的实例包括但不限于镍、金、铜、铝、钛、钨、铬、钯或其它合适的导电金属或由一种或多种合适的导电金属组成的合金。UBM确保了接触焊盘116的润湿性以及外部连接(例如焊料)与接触焊盘116的适当粘附。
图7E示出了在形成隔离结构122之后的横截面视图。在一些实施例中，沉积多个钝化层714并使其图案化以沿着目标路径形成隔离结构122。在一些实施例中，每个钝化层可以是光敏旋涂材料，或者在其它实施例中，每个钝化层可以是干膜材料。在一些实施例中，每个钝化层可以是与用于形成RDL结构112的再钝化层相同的材料。在其它实施例中，隔离结构122是附接到RDL结构112的表面114的预先形成的介电结构。例如，隔离结构122可以由B阶段环氧树脂形成，所述B阶段环氧树脂放置在表面114上并固化以将隔离结构122附接到封装。
图7F示出了球滴(ball drop)或其它外部连接形成过程之后的横截面视图。外部连接以均一高度形成在每个接触焊盘116上。例如，可以用焊接材料使接触焊盘116凸起，焊接材料被加热以回流到焊球中。横向间隙距离也应足够大以确保球滴成功(例如，隔离结构应以一定距离远离接触焊盘116，以确保成功形成外部连接)。
图8A示出了已经在晶圆800上的每个管芯上完成了图7A到图7F的制造工艺之后的示例性半导体晶圆800的俯视图。晶圆800沿锯线804和806切割以产生多个封装802。图8B示出了在切割后的示例性封装802的横截面视图。应注意，隔离结构的高度806小于外部连接的高度804(例如，从最外表面114到外部连接的最高点测量)，这将导致高度差808。
图8C示出了在封装802已经附接到PCB 102之后的横截面视图。每个外部连接接触PCB 102上的相应的着陆焊盘644。在回流之后，外部连接的高度减小。然而，高度差808考虑了回流后的高度减小并且保持隔离结构的底表面和PCB的顶表面之间的间隙高度636。图8D示出了放置粘合材料以加强封装到PCB 102的附接之后的横截面视图。防止底部填充材料126接触待保护的外部连接。
到目前为止，应该理解，已经提供了一种隔离结构来保护封装上的外部连接。隔离结构由介电材料或钝化材料形成，所述介电材料或钝化材料用作外部连接和可用于加强封装到PCB的附接的任何粘合材料之间的屏障。
在本公开的一个实施例中，提供了一种封装的半导体装置，其包括：半导体管芯；在半导体管芯的有源侧上的再分布层(RDL)结构，所述RDL结构包括在RDL结构的外表面上的多个接触焊盘；多个外部连接，所述多个外部连接附接到多个接触焊盘；以及在多个接触焊盘中的一个或多个接触焊盘周围的RDL结构的外表面上的隔离结构，其中隔离结构的高度是外部连接的高度的至少三分之二。
上述实施例的一个方面提供了一个或多个接触焊盘连接到半导体管芯的射频(RF)信号线。
上述实施例的另一方面提供了多个外部连接被配置成附接到印刷电路板(PCB)的多个着陆焊盘，并且隔离结构的边缘被配置成与PCB相隔间隙高度。
上述实施例的又一方面提供了隔离结构被配置成作为在附接到一个或多个接触焊盘的一组外部连接与封装的半导体装置和PCB之间的粘合材料之间的屏障。
上述实施例的另一方面提供了隔离结构包括介电材料。
上述实施例的另一方面提供了隔离结构在一个或多个接触焊盘周围沿着闭环路径形成。
上述实施例的另一方面提供了封装的半导体装置进一步包括：在多个接触焊盘中的另一组一个或多个接触焊盘周围的RDL结构的外表面上的另一个隔离结构。
上述实施例的另一方面提供了隔离结构的高度与从RDL结构的外表面测量的外部连接的高度之间的差值在5微米至50微米的范围内。
上述实施例的另一方面提供了隔离结构的横向厚度在5微米至100微米的范围内。
上述实施例的另一方面提供了隔离结构的高度是隔离结构的横向厚度的N倍，其中N是等于或大于1的整数。
上述实施例的另一方面提供了隔离结构的侧壁与外部连接的侧壁之间的最小横向距离是至少5微米。
在本公开的另一个实施例中，提供了一种制造封装的半导体装置的方法，所述方法包括：在半导体管芯的有源侧上形成再分布层(RDL)结构，所述RDL结构包括RDL结构外表面上的多个接触焊盘；在多个接触焊盘中的一个或多个接触焊盘周围的RDL结构的外表面上形成隔离结构；并且将多个外部连接附接到多个接触焊盘，其中，隔离结构的高度是外部连接的高度的至少三分之二。
上述实施例的一个方面提供了一个或多个接触焊盘连接到半导体管芯的射频(RF)信号线。
上述实施例的另一方面提供了所述方法进一步包括：从半导体管芯的晶圆切割半导体管芯，其中从晶圆切割的每个半导体管芯包括隔离结构。
上述实施例的另一方面提供了形成隔离结构包括：在一个或多个接触焊盘周围沿着目标路径在RDL结构的外表面上沉积一层或多层钝化材料并使其图案化。
上述实施例的另一方面提供了形成隔离结构包括：在一个或多个接触焊盘周围在RDL结构的外表面上附接预先形成的介电结构。
上述实施例的另一方面提供了隔离结构内的一个或多个接触焊盘中的每个接触焊盘连接到半导体管芯的射频(RF)信号线或非RF信号线。
上述实施例的另一方面提供了多个外部连接被配置成附接到印刷电路板(PCB)的多个着陆焊盘，并且隔离结构的边缘被配置成与PCB相隔间隙高度。
上述实施例的另一方面提供了隔离结构被配置成作为在附接到一个或多个接触焊盘的一组外部连接与沿着封装的半导体装置的周长的边缘接合材料之间的屏障。
上述实施例的另一方面提供了隔离结构被配置成作为在附接到一个或多个接触焊盘的一组外部连接与半导体管芯和PCB之间的底部填充材料之间的屏障。
因为实现本发明的设备在很大程度上由本领域技术人员已知的电子组件和电路组成，所以出于理解和了解本发明的基本概念的目的并且为了避免混淆或分散本发明的教导，电路细节将不会以超出如上所述认为必要的程度解释。
此外，说明书和权利要求书中的术语“前”、“后”、“顶”、“底”、“在......上”、“在......下”等(如果有的话)用于描述目的并且不一定用于描述永久相对位置。应当理解，如此使用的术语在适当的情况下是可互换的，使得本文描述的本发明的实施例例如能够以不同于本文所示或以其它方式描述的取向的其它取向操作。
如本文所用，术语“实质的”和“基本上”意指足以以实际方式实现所述目的或所述值，同时考虑可能在晶圆或封装制造期间发生的由通常和预期的过程异常引起的任何微小缺陷或偏差(如果有的话)，所述缺陷或偏差对于所述目的或所述值而言并不重要。如本文所用，术语“空间”表示其中不存在材料的空隙或体积。如本文所用，术语“横向地”是指在与基板或封装的主表面平行的侧向方向或水平方向上。
尽管本文参考具体实施例描述了本发明，但是可以在不脱离如下面的权利要求所阐述的本发明的范围的情况下进行各种修改和改变。例如，可以在图1A中实施额外的或更少的钝化结构122。因此，说明书和附图应被视为是说明性的而非限制性的，并且所有这种修改旨在包括在本发明的范围内。本文关于具体实施例描述的任何益处、优点或问题的解决方案不旨在被解释为任何或所有权利要求的关键、必需或必要的特征或元素。
此外，如本文使用的术语“一个(a/an)”被定义为一个或多于一个。此外，在权利要求中使用诸如“至少一个”和“一个或多个”的介绍性短语不应被解释为暗示由不定冠词(a/an)引入另一个权利要求元素将包含这种引入本发明的权利要求元素的任何特定权利要求限制为包含仅一个这种元素，即使同一权利要求包括介绍性短语“一个或多个”或“至少一个”以及不定冠词(例如，a/an)。对于定冠词的使用，以上说明同样适用。
除非另有说明，否则诸如“第一”和“第二”的术语用于任意区分这些术语描述的元素。因此，这些术语不一定旨在表示这些元素的时间优先度或其它优先度。

Claims (10)

1.一种封装的半导体装置，其特征在于，包括：
半导体管芯；
在所述半导体管芯的有源侧上的再分布层(RDL)结构，所述RDL结构包括在所述RDL结构的外表面上的多个接触焊盘；
附接到所述多个接触焊盘的多个外部连接；和
在所述RDL结构的所述外表面上、在所述多个接触焊盘中的一个或多个接触焊盘周围的隔离结构，其中所述隔离结构的高度是所述外部连接的高度的至少三分之二。
2.根据权利要求1所述的封装的半导体装置，其特征在于，所述一个或多个接触焊盘连接到所述半导体管芯的射频(RF)信号线。
3.根据权利要求1所述的封装的半导体装置，其特征在于，
所述多个外部连接被配置成附接到印刷电路板(PCB)的多个着陆焊盘，并且
所述隔离结构的边缘被配置成与所述PCB相隔间隙高度。
4.根据权利要求1所述的封装的半导体装置，其特征在于，进一步包括：
在所述多个接触焊盘中的另一组一个或多个接触焊盘周围的所述RDL结构的所述外表面上的另一个隔离结构。
5.一种制造封装的半导体装置的方法，其特征在于，所述方法包括：
在半导体管芯的有源侧上形成再分布层(RDL)结构，所述RDL结构包括在所述RDL结构的外表面上的多个接触焊盘；
在所述RDL结构的所述外表面上、在所述多个接触焊盘中的一个或多个接触焊盘周围形成隔离结构；以及
将多个外部连接附接到所述多个接触焊盘，其中所述隔离结构的高度是所述外部连接的高度的至少三分之二。
6.根据权利要求5所述的方法，其特征在于，所述形成所述隔离结构包括：
在所述一个或多个接触焊盘周围沿着目标路径在所述RDL结构的所述外表面上沉积一层或多层钝化材料并使其图案化。
7.根据权利要求5所述的方法，其特征在于，所述形成所述隔离结构包括：
在所述一个或多个接触焊盘周围在所述RDL结构的所述外表面上附接预先形成的介电结构。
8.根据权利要求5所述的方法，其特征在于，
所述多个外部连接被配置成附接到印刷电路板(PCB)的多个着陆焊盘，并且
所述隔离结构的边缘被配置成与所述PCB相隔间隙高度。
9.根据权利要求8所述的方法，其特征在于，
所述隔离结构被配置成作为在附接到所述一个或多个接触焊盘的一组外部连接与沿着所述封装的半导体装置的周长的边缘接合材料之间的屏障。
10.根据权利要求8所述的方法，其特征在于，
所述隔离结构被配置成作为在附接到所述一个或多个接触焊盘的一组外部连接与所述半导体管芯和所述PCB之间的底部填充材料之间的屏障。
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