CN109743027A - High-linearity low-noise amplifier - Google Patents
High-linearity low-noise amplifier Download PDFInfo
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- CN109743027A CN109743027A CN201910013093.4A CN201910013093A CN109743027A CN 109743027 A CN109743027 A CN 109743027A CN 201910013093 A CN201910013093 A CN 201910013093A CN 109743027 A CN109743027 A CN 109743027A
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- amplifying circuit
- order
- circuit
- biasing resistor
- noise amplifier
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Abstract
The invention discloses a kind of High-linearity low-noise amplifier circuit, mainly solve the problems, such as that the prior art linearity is poor.Comprising: first order amplifying circuit A1, second level amplifying circuit A2, coupled between two-stage circuit using capacitor C1.The cascode structure and the first loaded impedance network Z1 and the first biasing resistor R1 that first order amplifying circuit A1 is mainly made of two NPN bipolar transistors Q1, Q2 form, and the cascode structure and the second loaded impedance network Z2 and the second biasing resistor R2 that second level amplifying circuit A2 is mainly made of two NMOS tubes M1, M2 form.The present invention is compared with traditional bipolar junction transistor cascade structure low-noise amplifier, the third-order non-linear item as caused by cascade circuit structure difference is of different sizes, it can get higher input third-order intercept point, the linearity of low-noise amplifier is effectively improved, can be used in wireless communication receiver front-end chip.
Description
Technical field
The invention belongs to technical field of radio frequency integrated circuits, in particular to a kind of High-linearity low-noise amplifier can be used
In wireless communication receiver front-end chip.
Background technique
Low-noise amplifier plays important in the entire system as first active module embedded therein in wireless communication receiver
Effect.The small-signal received from antenna needs to amplify by low-noise amplifier, be then sent through rear class radio-frequency module with
And baseband circuit is handled.In order to guarantee that post-module can correctly handle signal, low-noise amplifier be must be introduced into as far as possible
Low noise, while realizing reasonable gain and the linearity.Due to that may include that multi-frequency is different in radio frequency path
Signal, easily occurs mutually to reconcile intermodulation between these signals, this just needs low-noise amplifier that cannot only focus on noiseproof feature, more
Need that there is the sufficiently high linearity, with can while receiving larger interference signal Linear Amplifer useful signal.
Existing cascade structure low-noise amplifier, such as Fig. 1, the first order and the second level all use bipolar junction transistor,
Obtain high-gain and in terms of have great advantages, but due to cascade circuit characteristic and ambipolar crystalline substance
The limitation of body pipe itself current index characteristic, the linearity are generally difficult to meet demand.The two-stage cascade low-noise amplifier
Input third-order intercept point can indicate are as follows:
Wherein AIP3,1And AIP3,2Respectively indicate the input third-order intercept point of the first order and the second level, α1For low-noise amplifier
First order voltage gain.As can be seen that traditional cascade circuit inevitably results in the deterioration of linearity index, and in order to improve line
Property degree, it usually needs take multiple-grid technology, negative-feedback technology and improve the modes such as bias current, but these traditional means are simultaneously
It will increase circuit power consumption, deteriorate noiseproof feature.
Summary of the invention
It is an object of the invention to insufficient for the above-mentioned prior art, propose a kind of to be different from existing two-stage cascade structure
High-linearity low-noise amplifier, to improve the linearity of low-noise amplifier, reduction electricity while guaranteeing circuit high-gain
The power consumption and noise on road.
To achieve the above object, High-linearity low-noise amplifier of the invention, comprising: first order amplifying circuit A1 and
Second amplifying circuit A2 is coupled using capacitor C1 between two-stage circuit, it is characterised in that:
The first order amplifying circuit A1, comprising: two NPN bipolar transistor Q1, Q2, the first loaded impedance network
Z1, the first biasing resistor R1；First bipolar junction transistor Q1, base stage are connected to bias voltage by the first biasing resistor R1
VB1, emitter are grounded GND, and collector connects with the emitter of the second bipolar junction transistor Q2；Second bipolar transistor
Pipe Q2, base stage meet power vd D, and collector is connected to power vd D by the first loaded impedance network Z1, the two NPN are bis-
Bipolar transistor Q1, Q2 constitute cascode structure, for amplifying to the input signal from antenna；
The second level amplifying circuit A2, comprising: two NMOS tube M1, M2, the second loaded impedance network Z2, the second biasing
Resistance R2；First NMOS tube M1, source electrode are grounded GND, and grid is connected to bias voltage VB2 by the second biasing resistor R2,
Drain electrode connects with the source electrode of the second NMOS tube M2；Second NMOS tube M2, grid meet power vd D, and drain electrode passes through the second load
Impedance network Z2 is connected to power vd D, the two NMOS tubes M1, M2 constitute cascode structure, for the defeated of first order A1
Signal amplifies out.
Further, two NPN bipolar transistors Q1, Q2 work in the first order amplifying circuit A1 is amplified in forward direction
Area.
Further, two NMOS tubes M1, M2 in the second level amplifying circuit A2 work in saturation region.
Further, the real part of the second loaded impedance network Z2 is determined in 40~60 ohm of ranges by adjusting, with full
The sufficient matched requirement of output impedance.
Compared with the prior art, the invention has the following advantages:
1) NPN bipolar transistor and NMOS tube is respectively adopted in the two-stage amplifying circuit of low-noise amplifier of the present invention,
While not dramatically increasing circuit area and manufacturing cost, difference and the third-order non-linear item size of cascade circuit structure are utilized
Difference can get higher input third-order intercept point, effectively improve the linearity of low-noise amplifier.
2) present invention is due to the NMOS tube using the lesser metal-oxide-semiconductor of itself operating current as second level amplifying circuit, phase
Than reducing power consumption in traditional bipolar transistor cascade structure.
Detailed description of the invention
Fig. 1 is existing cascade structure low-noise amplifier structural schematic diagram；
Fig. 2 is High-linearity low-noise amplifier circuit diagram of the present invention；
Fig. 3 is the second order of first order amplifying circuit A1 in the present invention, third-order nonlinear optical coefficient simulation curve figure；
Fig. 4 is the second order of second level amplifying circuit A2 in the present invention, third-order nonlinear optical coefficient simulation curve figure；
Fig. 5 is the third order intermodulation point IIP3 simulation curve figure of High-linearity low-noise amplifier of the present invention.
Specific embodiment
With reference to the accompanying drawing, the embodiment of the present invention and effect are described in further detail.
Referring to Fig. 2, the present invention includes first order amplifying circuit A1, second level amplifying circuit A2, is used between two-stage circuit
Capacitor C1 coupling.Wherein:
The first order amplifying circuit A1, comprising: the work of two NPN bipolar transistors Q1, Q2 positive amplification region simultaneously
Cascode structure is constituted, for amplifying to input signal, the first loaded impedance network Z1 is for making first order amplification electricity
Road A1 possesses reasonable gain, and the first biasing resistor R1 is for guaranteeing that two NPN bipolar transistors Q1, Q2 are located at corresponding work
Point；First bipolar junction transistor Q1, base stage are connected to bias voltage VB1 by the first biasing resistor R1, and emitter connects
Ground GND, collector connect with the emitter of the second bipolar junction transistor Q2；Second bipolar junction transistor Q2, base stage connect
Power vd D, collector are connected to power vd D by the first loaded impedance network Z1.
The second level amplifying circuit A2, comprising: two NMOS tube M1, M2 work are in saturation region and constitute cascade knot
Structure is amplified for the output signal to first order A1, and the real part of the second loaded impedance network Z2 is in 40~60 ohm of ranges
It is determined by adjusting to meet the matched requirement of output impedance, the second biasing resistor R2 guarantees that two NMOS tubes M1, M2 are located at pair
Answer operating point；First NMOS tube M1, source electrode are grounded GND, and grid is connected to bias voltage by the second biasing resistor R2
VB2, drain electrode connect with the source electrode of the second NMOS tube M2；Second NMOS tube M2, grid meet power vd D, and drain electrode passes through second
Loaded impedance network Z2 is connected to power vd D.
The working principle of this example is as follows:
First order amplifying circuit A1 receives the signal of input terminal RFin, bipolar by the first biasing resistor R1 adjusting two
The operating potential of transistor npn npn Q1, Q2, the first loaded impedance network Z1 is for making first order amplifying circuit A1 possess reasonable increasing
Benefit is transferred to second level amplifying circuit A2 after amplifying by two bipolar junction transistors Q1, Q2 to signal.
The collector quiescent current of the two NPN bipolar transistors Q1, Q2With index spy
Property, wherein ISIt is collector saturation current, VBEIt is base emitter voltage, VTIt is thermal voltage.
Since the increase meeting of input signal is so that active device deviates quiescent point, this will result directly in nonlinear production
Raw, small signal output current can be indicated by Taylor expansion are as follows:Wherein VbeIt is that input is small
Signal base emitter voltage,For the single order of the small signal output current Taylor expansion of first order amplifying circuit A1
,For the second nonlinear item of the small signal output current Taylor expansion of first order amplifying circuit A1,For the third-order non-linear item of the small signal output current Taylor expansion of first order amplifying circuit A1.
Second level amplifying circuit A2 receives the signal from first order amplifying circuit A1 output, passes through the second biasing resistor
R2 adjusts the operating potential of two NMOS tubes M1, M2, carries loaded impedance network Z2 using second and carries out impedance matching, passes through two
NMOS tube M1, M2 is exported after amplifying to signal by output end RFout.
Since transistor feature size constantly reduces, the influence of short-channel effect aggravates, NMOS tube saturation region current formula
It can indicate are as follows:WhereinIt is the breadth length ratio of the first NMOS tube M1, μ0It is that electronics moves
Shifting rate, CoxIt is gate oxide unit-area capacitance, VGSIt is the gate source voltage of the first NMOS tube M1, VTNIt is threshold voltage, θ is solid
Determine zoom factor.
Small signal output current can be indicated by Taylor expansion are as follows:Wherein VgsIt is defeated
Enter small signal gate source voltage,For the single order item of the small signal output current Taylor expansion of second level amplifying circuit A2,For the second nonlinear item of the small signal output current Taylor expansion of second level amplifying circuit A2,For the third-order non-linear item of the small signal output current Taylor expansion of second level amplifying circuit A2.
For cascade circuit of the invention, first order amplifying circuit A1 is output to the small signal electricity of second level amplifying circuit A2
Pressure can indicate are as follows:
The small signal that second level amplifying circuit A2 is output to output end RFout can indicate are as follows:
<1>formula is substituted into<2>formula, can be obtained
Abbreviation can obtain:
The third-order intercept point of low-noise amplifier can indicate are as follows:
Effect of the invention can be further illustrated by following emulation:
Emulation 1, emulates first order amplifying circuit A1, obtains the nonlinear factor and base of NPN bipolar transistor
Pole-emitter voltage VBECorresponding relationship, as a result as shown in figure 3, it can be seen from figure 3 that two NPNs of the work in positive amplification region are bis-
The nonlinear factor α of bipolar transistor2> 0, α3> 0.
Emulation 2, second level amplifying circuit A2 is emulated, and obtains the nonlinear factor and the first NMOS tube M1 of NMOS tube
Gate source voltage VGSCorresponding relationship, as a result as shown in figure 4, as seen from Figure 4, work saturation region two NMOS tubes it is non-linear
Factor beta2> 0, β3< 0.
Emulation 3, emulates low-noise amplifier of the present invention, obtains the output power and input power of circuit of the present invention
Corresponding relationship, as a result as shown in figure 5, from figure 5 it can be seen that input third order intermodulation point be about 0dBm, compared to tradition cascade low noise
The acoustic amplifier linearity has a distinct increment.
The third-order non-linear item being directed in formula<5>In traditional bipolar crystal
Pipe cascades in low-noise amplifier, there is α3> 0, β3> 0 can be obtained by the simulation result of emulation 1 and emulation 2, and low noise of the present invention is put
Big device has α3> 0, β3< 0, so third-order non-linear itemIt is available through the invention
Smaller value, to improve the input third-order intercept point of circuit, i.e., low-noise amplifier of the invention can obtain higher line
Property degree.
Above description is only example of the present invention, does not constitute any limitation of the invention, it is clear that for
It, all may be without departing substantially from the principle of the invention, structure after understand the content of present invention and principle for one of skill in the art
In the case of, various modifications and change in form and details are carried out, but these modifications and variations based on inventive concept are still
Within the scope of the claims of the present invention.
Claims (6)
1. a kind of High-linearity low-noise amplifier, including first order amplifying circuit A1, second level amplifying circuit A2, two-stage circuit
Between using capacitor C1 couple, it is characterised in that:
The first order amplifying circuit A1, comprising: two NPN bipolar transistor Q1, Q2, the first loaded impedance network Z1,
One biasing resistor R1；First bipolar junction transistor Q1, base stage are connected to bias voltage VB1 by the first biasing resistor R1,
Its emitter is grounded GND, and collector connects with the emitter of the second bipolar junction transistor Q2；Second bipolar junction transistor
Q2, base stage meet power vd D, and collector is connected to power vd D by the first loaded impedance network Z1, the two NPN are bipolar
Transistor npn npn Q1, Q2 constitute cascode structure, for amplifying to the input signal from antenna；
The second level amplifying circuit A2, comprising: two NMOS tube M1, M2, the second loaded impedance network Z2, the second biasing resistor
R2；First NMOS tube M1, source electrode are grounded GND, and grid is connected to bias voltage VB2 by the second biasing resistor R2, drain
Connect with the source electrode of the second NMOS tube M2；Second NMOS tube M2, grid meet power vd D, and drain electrode passes through the second load impedance
Network Z2 is connected to power vd D, the two NMOS tubes M1, M2 constitute cascode structure, for the output letter to first order A1
It number amplifies.
2. circuit according to claim 1, which is characterized in that two ambipolar crystalline substances of NPN in first order amplifying circuit A1
Body pipe Q1, Q2 work in positive amplification region.
3. circuit according to claim 1, which is characterized in that two NMOS tubes M1, M2 in the amplifying circuit A2 of the second level
Work is in saturation region.
4. circuit according to claim 1, which is characterized in that the real part of the second loaded impedance network Z2 is at 40~60 ohm
Range is determined by adjusting, to meet the matched requirement of output impedance.
5. circuit according to claim 1, which is characterized in that two bipolar junction transistors in first order amplifying circuit A1
The operating potential of Q1, Q2, the size by adjusting the first biasing resistor R1 determine.
6. circuit according to claim 1, which is characterized in that two NMOS tubes M1, M2 in the amplifying circuit A2 of the second level
Operating potential, the size by adjusting the second biasing resistor R2 determine.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201910013093.4A CN109743027A (en) | 2019-01-07 | 2019-01-07 | High-linearity low-noise amplifier |
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| CN201910013093.4A CN109743027A (en) | 2019-01-07 | 2019-01-07 | High-linearity low-noise amplifier |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111277227A (en) * | 2020-03-18 | 2020-06-12 | 锐石创芯（深圳）科技有限公司 | Co-emitting and co-based amplifying circuit for improving phase characteristics and signal processing system |
| CN111682859A (en) * | 2020-07-09 | 2020-09-18 | 西安电子科技大学 | Power amplifier of low-power consumption AB class CMOS |
| CN113381728A (en) * | 2021-06-29 | 2021-09-10 | 上海料聚微电子有限公司 | Pseudo resistance circuit and cascade circuit thereof |
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| CN103326672A (en) * | 2013-03-20 | 2013-09-25 | 苏州朗宽电子技术有限公司 | Broadband low noise amplifier employing Chebyshev band-pass filter |
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| CN104158500A (en) * | 2013-05-14 | 2014-11-19 | 上海华虹宏力半导体制造有限公司 | Radio frequency power amplifier |
| CN105720928A (en) * | 2016-01-22 | 2016-06-29 | 西安电子科技大学 | Two-stage differential and low-noise amplifier |
| CN106788288A (en) * | 2017-01-10 | 2017-05-31 | 成都旋极星源信息技术有限公司 | A kind of low-noise amplifier for 77GHz car radars |
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Patent Citations (6)
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| CN1972118A (en) * | 2005-11-24 | 2007-05-30 | 苏州中科半导体集成技术研发中心有限公司 | High-linear high-gain broadband radio frequency low-noise amplifier |
| CN103326672A (en) * | 2013-03-20 | 2013-09-25 | 苏州朗宽电子技术有限公司 | Broadband low noise amplifier employing Chebyshev band-pass filter |
| CN104158497A (en) * | 2013-05-14 | 2014-11-19 | 上海华虹宏力半导体制造有限公司 | Low noise amplifier |
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| CN106788288A (en) * | 2017-01-10 | 2017-05-31 | 成都旋极星源信息技术有限公司 | A kind of low-noise amplifier for 77GHz car radars |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111277227A (en) * | 2020-03-18 | 2020-06-12 | 锐石创芯（深圳）科技有限公司 | Co-emitting and co-based amplifying circuit for improving phase characteristics and signal processing system |
| CN111682859A (en) * | 2020-07-09 | 2020-09-18 | 西安电子科技大学 | Power amplifier of low-power consumption AB class CMOS |
| CN113381728A (en) * | 2021-06-29 | 2021-09-10 | 上海料聚微电子有限公司 | Pseudo resistance circuit and cascade circuit thereof |
| CN113381728B (en) * | 2021-06-29 | 2023-08-29 | 上海料聚微电子有限公司 | Pseudo-resistance circuit and cascade circuit thereof |
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Application publication date: 20190510 |