CN216390924U - Low-noise amplifier and radio frequency chip of ultra-wideband communication standard - Google Patents
Low-noise amplifier and radio frequency chip of ultra-wideband communication standard Download PDFInfo
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- CN216390924U CN216390924U CN202122749618.6U CN202122749618U CN216390924U CN 216390924 U CN216390924 U CN 216390924U CN 202122749618 U CN202122749618 U CN 202122749618U CN 216390924 U CN216390924 U CN 216390924U
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- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
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Abstract
The utility model provides an ultra-wideband communication low-noise amplifier, which comprises a first amplification stage circuit, a second amplification stage circuit and an output following stage circuit which are sequentially connected; the first amplification stage circuit is used for receiving an externally input radio frequency signal to realize broadband input matching of common-grid input impedance and source impedance; the second amplification stage circuit is used for signal amplification; the output following stage circuit is used for realizing broadband output matching; the first amplification stage circuit comprises a first capacitor, a second capacitor, a first transistor, a first inductor and a first resistor; the second amplification stage circuit comprises a second resistor, a third resistor, a second inductor, a third capacitor, a second transistor and a third transistor. The utility model also provides another ultra-wideband communication low-noise amplifier and a radio frequency chip. The ultra-wideband communication low-noise amplifier and the radio frequency chip have wide working frequency band and high performance index.
Description
Technical Field
The utility model relates to the field of amplifier circuits, in particular to an ultra-wideband communication low-noise amplifier and a radio frequency chip.
Background
At present, in the development of communication technology, a Low Noise Amplifier (LNA) plays an increasingly important role in a communication system, and the LNA is a very important module in a radio frequency front end of the communication system, and is used for processing signals received by an antenna and weakening Noise of a communication module. The performance of the low noise amplifier directly determines the sensitivity of a receiver in the communication system, and then a signal spectrum template, and the like, thereby influencing and determining various performance indexes of the whole communication system. With the application of Ultra Wide Band (UWB) standard, the working bandwidth of UWB low noise amplifiers is further expanded, and it is necessary to cover a wideband frequency Band of 3.1GHz to 10.6 GHz. Due to the ultra-wide working frequency band, the UWB low-noise amplifier solves the problem of high-speed connection for short-distance video data transmission and the like, and provides higher transmission rate and is very suitable for high-performance application.
However, the performance of UWB low noise amplifiers over a wider operating bandwidth is limited by the circuitry. The UWB low noise amplifier needs to satisfy the following requirements: first, broadband matching to meet the minimum return loss in the whole frequency band. And a second point, a gain large enough to amplify the received weak rf signal. And thirdly, the sensitivity of the whole system can be improved due to low noise. Fourthly, the power consumption is low, and the service life of the battery of the whole machine is prolonged. And the area of the circuit layout is as small as possible so as to save the production cost of the corresponding chip.
Therefore, it is necessary to provide a new low noise amplifier and a new chip to solve the above problems.
SUMMERY OF THE UTILITY MODEL
Aiming at the defects of the prior art, the utility model provides an ultra-wideband communication low-noise amplifier and a radio frequency chip with wide working frequency band and high performance index.
In order to solve the above technical problem, in one aspect, an embodiment of the present invention provides an ultra-wideband communication low-noise amplifier, where the low-noise amplifier includes a first amplifier stage circuit, a second amplifier stage circuit, and an output follower stage circuit, which are connected in sequence;
the first amplification stage circuit is used for receiving an externally input radio frequency signal to realize broadband input matching of common-grid input impedance and source impedance;
the second amplification stage circuit is used for signal amplification;
the output following stage circuit is used for realizing broadband output matching;
the first amplification stage circuit comprises a first capacitor, a second capacitor, a first transistor, a first inductor and a first resistor;
a first end of the first capacitor is used as an input end of the ultra-wideband communication low-noise amplifier;
a second end of the first capacitor is respectively connected to a first end of the first inductor and a source electrode of the first transistor, and a second end of the first inductor is connected to the ground;
the grid electrode of the first transistor is connected to a first bias voltage, the drain electrode of the first transistor is respectively connected to the second end of the first resistor and the first end of the second capacitor, and the first end of the first resistor is connected to a power supply voltage;
the second end of the second capacitor is connected to the input end of the second amplification stage circuit;
the second amplification stage circuit comprises a second resistor, a third resistor, a second inductor, a third capacitor, a second transistor and a third transistor;
a gate of the second transistor is used as an input terminal of the second amplifier stage circuit, the gates of the second transistor are respectively connected to the second end of the second capacitor and the second end of the third resistor, and the first end of the third resistor is connected to a third bias voltage;
the source electrode of the second transistor is connected to the ground, and the drain electrode of the second transistor is connected to the source electrode of the third transistor;
a gate of the third transistor is connected to a second bias voltage, and a drain of the third transistor is respectively connected to the input terminal of the output follower stage circuit, the second terminal of the second inductor, the second terminal of the second resistor, and the second terminal of the third capacitor;
the first end of the second inductor, the first end of the second resistor and the first end of the third capacitor are connected to a power supply voltage;
wherein the first transistor, the second transistor, and the third transistor are all MOS transistors.
Preferably, the output follower stage circuit includes a fourth transistor, a first current source, and a fourth capacitor;
the grid electrode of the fourth transistor is used as the input end of the output following stage circuit, and the drain electrode of the fourth transistor is connected to a power supply voltage;
a source electrode of the fourth transistor is respectively connected to a positive electrode end of the first current source and a first end of the fourth capacitor, and a negative electrode end of the first current source is connected to the ground;
a second end of the fourth capacitor is used as an output end of the output following stage circuit;
wherein the fourth transistor is a MOS transistor.
Preferably, the first capacitor and the second capacitor are both parameter-adjustable capacitors, the first inductor is a parameter-adjustable inductor, and the first resistor is a parameter-adjustable resistor, so as to adjust the working frequency point of the first amplification stage circuit to 3.1 GHz.
Preferably, the second resistor and the third resistor are both parameter-adjustable resistors, the second inductor is a parameter-adjustable inductor, and the third capacitor is a parameter-adjustable capacitor, so as to adjust the working frequency point of the second amplifier stage circuit to 10.6 GHz.
In a second aspect, an embodiment of the present invention further provides a radio frequency chip, including the ultra-wideband communication low noise amplifier as described in any one of the above.
In a third aspect, an embodiment of the present invention further provides an ultra-wideband communication low-noise amplifier, where the low-noise amplifier includes a first amplifier stage circuit, a second amplifier stage circuit, and an output follower stage circuit, which are connected in sequence;
the first amplification stage circuit is used for receiving an externally input radio frequency signal to realize broadband input matching of common base input impedance and emitter impedance;
the second amplification stage circuit is used for signal amplification;
the output following stage circuit is used for realizing broadband output matching;
the first amplification stage circuit comprises a fifth capacitor, a sixth capacitor, a fifth transistor, a third inductor and a fourth resistor;
a first end of the fifth capacitor is used as an input end of the ultra-wideband communication low-noise amplifier;
a second end of the fifth capacitor is respectively connected to a first end of the third inductor and an emitter of the fifth transistor, and a second end of the third inductor is connected to ground;
a base electrode of the fifth transistor is connected to a fourth bias voltage, a collector electrode of the fifth transistor is respectively connected to a second end of the fourth resistor and a first end of the sixth capacitor, and the first end of the fourth resistor is connected to a power supply voltage;
a second end of the sixth capacitor is connected to the input end of the second amplification stage circuit;
the second amplification stage circuit comprises a fifth resistor, a sixth resistor, a fourth inductor, a seventh capacitor and a sixth transistor;
a base electrode of the sixth transistor is used as an input end of the second amplifier stage circuit, the base electrodes of the sixth transistor are respectively connected to the second end of the sixth capacitor and the second end of the sixth resistor, and the first end of the sixth resistor is connected to a fifth bias voltage;
an emitter of the sixth transistor is connected to ground, and a collector of the sixth transistor is connected to the input end of the output follower stage circuit, the second end of the fourth inductor, the second end of the fifth resistor, and the second end of the seventh capacitor, respectively;
the first end of the fourth inductor, the first end of the fifth resistor and the first end of the seventh capacitor are all connected to a power supply voltage;
wherein the fifth transistor and the sixth transistor are both BJT transistors.
Preferably, the output follower stage circuit includes a seventh transistor, a second current source, and an eighth capacitor;
the base electrode of the seventh transistor is used as the input end of the output following stage circuit, and the collector electrode of the seventh transistor is connected to a power supply voltage;
an emitter of the seventh transistor is connected to a positive terminal of the second current source and a first terminal of the eighth capacitor, respectively, and a negative terminal of the second current source is connected to ground;
a second end of the eighth capacitor is used as an output end of the output following stage circuit;
and the seventh transistor is a BJT transistor.
Preferably, the fifth capacitor and the sixth capacitor are both parameter-adjustable capacitors, the third inductor is a parameter-adjustable inductor, and the fourth resistor is a parameter-adjustable resistor, so as to adjust the working frequency point of the first amplification stage circuit to 3.1 GHz.
Preferably, the fifth resistor and the sixth resistor are both parameter-adjustable resistors, the fourth inductor is a parameter-adjustable inductor, and the seventh capacitor is a parameter-adjustable capacitor, so as to adjust the working frequency point of the second amplifier stage circuit to 10.6 GHz.
In a fourth aspect, an embodiment of the present invention further provides a radio frequency chip, where the chip includes the ultra-wideband communication low-noise amplifier as described in any one of the above third aspects.
Compared with the prior art, the ultra-wideband communication low-noise amplifier and the radio frequency chip are provided with the first amplification stage circuit, the second amplification stage circuit and the output following stage circuit which are sequentially connected. The first amplification stage circuit forms a common-gate amplification stage circuit through a first capacitor, a second capacitor, a first transistor, a first inductor and a first resistor, and the working frequency point of the common-gate amplification stage circuit is adjusted to be low frequency (near 3.1 GHz). The second amplification stage circuit forms a cascode amplification stage circuit through a second resistor, a third resistor, a second inductor, a third capacitor, a second transistor and a third transistor, and the working frequency point of the cascode amplification stage circuit is adjusted to be high frequency (10.6 GHz). The circuit structure that the first-stage amplifying circuit resonates at a low frequency band and the second-stage amplifying circuit resonates at a high frequency point enables the gain of the first-stage amplifying circuit at the high frequency to be reduced to obtain the gain compensation of the second-stage amplifying circuit at the high frequency, two-stage balanced amplification is achieved, bandwidth extension is achieved, and the performance index requirements of the ultra-wideband communication standard are met, so that the working frequency band of the ultra-wideband communication low-noise amplifier and the working frequency band of the chip are wide, and the performance index is high.
Drawings
The present invention will be described in detail below with reference to the accompanying drawings. The foregoing and other aspects of the utility model will become more apparent and more readily appreciated from the following detailed description, taken in conjunction with the accompanying drawings. In the drawings, there is shown in the drawings,
fig. 1 is a circuit diagram of an ultra-wideband communication low noise amplifier according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a gain frequency curve of a first amplifier stage circuit of an ultra-wideband communication low noise amplifier according to an embodiment of the present invention;
fig. 3 is a schematic diagram of a gain frequency curve of a second amplifier stage of an ultra-wideband communication low noise amplifier according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a gain frequency curve of an UWB communication LNA according to an embodiment of the utility model;
fig. 5 is a circuit structure diagram of a second ultra-wideband communication low noise amplifier according to an embodiment of the present invention.
Detailed Description
The following detailed description of embodiments of the utility model refers to the accompanying drawings.
The embodiments/examples described herein are specific embodiments of the present invention, are intended to be illustrative of the concepts of the present invention, are intended to be illustrative and exemplary, and should not be construed as limiting the embodiments and scope of the utility model. In addition to the embodiments described herein, those skilled in the art will be able to employ other technical solutions which are obvious based on the disclosure of the claims and the specification of the present application, and these technical solutions include those which make any obvious replacement or modification of the embodiments described herein, and all of which are within the scope of the present invention.
(embodiment one)
The embodiment of the utility model provides an ultra-wideband communication low-noise amplifier 100, which is used for a communication system of an ultra-wideband communication standard.
Referring to fig. 1-4, fig. 1 is a circuit diagram of an ultra-wideband communication low noise amplifier 100 according to an embodiment of the utility model.
The ultra-wideband communication low-noise amplifier 100 is applied to communication products with 3.1GHz-10.6GHz working frequency bands.
The ultra-wideband communication low-noise amplifier 100 of the first embodiment is implemented by using a MOS transistor process.
The ultra-wideband communication low-noise amplifier 100 comprises a first amplification stage circuit 1, a second amplification stage circuit 2 and an output following stage circuit 3 which are connected in sequence.
The first amplifier stage circuit 1 is used for receiving an externally input radio frequency signal to realize broadband input matching of common gate input impedance and source impedance.
Specifically, the first amplifier stage circuit 1 includes a first capacitor C1, a second capacitor C2, a first transistor M1, a first inductor L1, and a first resistor R1.
The circuit structure of the first amplifier stage circuit 1 is as follows:
a first end of the first capacitor C1 is used as an input terminal RFIN of the ultra-wideband communication low noise amplifier 100.
A second terminal of the first capacitor C1 is respectively connected to the first terminal of the first inductor L1 and the source of the first transistor M1, and a second terminal of the first inductor L1 is connected to ground GND.
The gate of the first transistor M1 is connected to a first bias voltage VG1, the drain of the first transistor M1 is connected to the second end of the first resistor R1 and the first end of the second capacitor C2, respectively, and the first end of the first resistor R1 is connected to a power supply voltage VDD.
A second terminal of the second capacitor C2 is connected to the input terminal of the second amplifier stage circuit 2.
Wherein the first transistor M1 is a MOS transistor.
The operating principle of the first amplifier stage circuit 1 is as follows:
the first amplifier stage circuit 1 forms a common-gate amplifier stage circuit by the first capacitor C1, the second capacitor C2, the first transistor M1, the first inductor L1 and the first resistor R1. Specifically, the first transistor M1 is a first-stage amplifier transistor, the first capacitor C1 is an input blocking capacitor, the first resistor R1 is a load resistor of the first amplifier stage circuit 1, the second capacitor C2 is a blocking capacitor of the first amplifier stage circuit 1 and the second amplifier stage circuit 2, parasitic capacitors of the first inductor L1 and the first transistor M1 resonate in an operating frequency band, and input impedance is source intrinsic input impedance of the first transistor M1.
An input radio frequency signal of an input end RFIN of the ultra-wideband communication low noise amplifier 100 is loaded to a source of a first transistor M1 through a first capacitor C1 as a dc blocking capacitor, and a generated small signal current is converted into a small signal voltage through a first resistor R1 as a load and is coupled to an input end of the second amplification stage circuit 2 through a second capacitor C2 as an inter-stage dc blocking capacitor.
Referring to fig. 2, fig. 2 is a schematic diagram of a gain frequency curve of a first amplifier stage of an ultra-wideband communication low noise amplifier according to an embodiment of the present invention. In this embodiment, the first capacitor C1 and the second capacitor C2 are both parameter-adjustable capacitors, the first inductor L1 is a parameter-adjustable inductor, the first resistor R1 is a parameter-adjustable resistor, and all the components are parameter-adjustable, so as to adjust the working frequency of the first amplifier stage circuit 1 to 3.1 GHz. The first amplifier stage circuit 1 sets the working frequency point to be adjusted at a low frequency (around 3.1 GHz).
The second amplifier stage circuit 2 is used for signal amplification.
Specifically, the second amplifier stage circuit 2 includes a second resistor R2, a third resistor R3, a second inductor L2, a third capacitor C3, a second transistor M2, and a third transistor M3.
The circuit structure of the second amplifier stage circuit 2 is as follows:
the gate of the second transistor M2 is used as the input terminal of the second amplifier stage circuit 2, the gate of the second transistor M2 is connected to the second terminal of the second capacitor C2 and the second terminal of the third resistor R3, respectively, and the first terminal of the third resistor R3 is connected to the third bias voltage VGS 2.
The source of the second transistor M2 is connected to ground GND, and the drain of the second transistor M2 is connected to the source of the third transistor M3.
The gate of the third transistor M3 is connected to a second bias voltage VG2, and the drain of the third transistor M3 is connected to the input terminal of the output follower stage circuit 3, the second terminal of the second inductor L2, the second terminal of the second resistor R2, and the second terminal of the third capacitor C3, respectively.
The first terminal of the second inductor L2, the first terminal of the second resistor R2, and the first terminal of the third capacitor C3 are all connected to a power supply voltage VDD.
The second transistor M2 and the third transistor M3 are MOS transistors.
The working principle of the second amplifier stage circuit 2 is as follows:
the second amplifier stage circuit 2 forms a cascode amplifier stage circuit by the second resistor R2, the third resistor R3, the second inductor L2, the third capacitor C3, the second transistor M2 and the third transistor M3. Specifically, the second transistor M2 is a common source amplifier, the third transistor M3 is a common gate amplifier, the second inductor L2 is a load inductor, the third capacitor C3 is a load capacitor, the second resistor R2 is a load resistor, and the third resistor R3 is a bias resistor.
The third bias voltage VGS2 provides a bias voltage for the second transistor M2 through the third resistor R3. The third transistor M3 can play a role in increasing isolation and withstanding voltage, and the second inductor L2 is a choke inductor and resonates with the third capacitor C3, and together with the second resistor R2, it acts as a load of the second amplifier stage circuit 2.
Referring to fig. 3, fig. 3 is a schematic diagram of a gain frequency curve of a second amplifier stage of an ultra-wideband communication low noise amplifier according to an embodiment of the present invention. In this embodiment, the second resistor R2 and the third resistor R3 are both parameter-adjustable resistors, the second inductor is a parameter-adjustable inductor, and the third capacitor C3 is a parameter-adjustable capacitor, and all of the above components are parameter-adjustable, so as to adjust the working frequency point of the second amplifier stage circuit 2 to 10.6 GHz. The working frequency point of the second amplification stage circuit 2 is adjusted to be high frequency (10.6 GHz). The second amplifier stage circuit 2 achieves further amplification of the radio frequency signal.
The output follower stage circuit 3 is used for realizing broadband output matching.
Specifically, the output follower stage circuit 3 includes a fourth transistor M4, a first current source Idc1, and a fourth capacitor C4.
The circuit structure of the output follower stage circuit 3 is as follows:
the gate of the fourth transistor M4 is used as the input terminal of the output follower stage circuit 3, and the drain of the fourth transistor M4 is connected to the power supply voltage VDD.
The source of the fourth transistor M4 is connected to the positive terminal of the first current source Idc1 and the first terminal of the fourth capacitor C4, respectively, and the negative terminal of the first current source Idc1 is connected to the ground GND.
The second end of the fourth capacitor C4 is used as the output end of the output follower stage circuit 3. That is, the second terminal of the fourth capacitor C4 is also used as the output terminal RFOUT of the ultra-wideband communication low noise amplifier 100.
Wherein the fourth transistor M4 is a MOS transistor.
The working principle of the output follower stage circuit 3 is as follows:
the output follower stage circuit 3 adopts a source follower configuration transistor, and realizes broadband matching of output impedance and load impedance by appropriately selecting the size of the fourth transistor M4 and the bias current of the first current source Idc 1.
The fourth transistor M4 is biased by the first current source Idc1 to achieve matching of the external 50 ohm load impedance connected to the output terminal RFOUT of the ultra-wideband communication low noise amplifier 100.
Referring to fig. 4, fig. 4 is a schematic diagram illustrating a gain frequency curve of an ultra-wideband communication low noise amplifier according to an embodiment of the present invention. As shown in the figure, the ultra-wideband communication low-noise amplifier 100 covers a wideband frequency band of 3.1GHz-10.6 GHz. The gain drop of the first-stage amplification circuit 1 at high frequencies is compensated by the gain at high frequencies of the second-stage amplification circuit 2.
Through the circuit structure, the first-stage amplification circuit 1 of the ultra-wideband communication low-noise amplifier 100 resonates at a low frequency band, and the second-stage amplification circuit 2 resonates at a high frequency point, so that the gain reduction of the first-stage amplification circuit 1 at the high frequency position is compensated by the gain compensation of the second-stage amplification circuit 2 at the high frequency position, the two-stage equalization amplification is performed, the bandwidth prolongation is realized, and the working frequency band of the ultra-wideband communication low-noise amplifier is wide and the performance index is high. The ultra-wideband communication low-noise amplifier 100 meets the performance index requirements of the ultra-wideband communication standard: first, broadband matching to meet the minimum return loss in the whole frequency band. And a second point, a gain large enough to amplify the received weak rf signal. And thirdly, the sensitivity of the whole system can be improved due to low noise. Fourthly, the power consumption is low, and the service life of the battery of the whole machine is prolonged. And the area of the circuit layout is as small as possible so as to save the production cost of the corresponding chip.
(second embodiment)
The ultra-wideband communication low-noise amplifier 200 of the second embodiment is another specific circuit structure of the ultra-wideband communication low-noise amplifier 100 of the first embodiment in a different process.
Referring to fig. 5, fig. 5 is a circuit diagram of a second ultra-wideband communication low noise amplifier 200 according to an embodiment of the utility model.
The second embodiment is substantially the same as the first embodiment, and the difference between the second embodiment and the first embodiment is that the ultra-wideband communication low-noise amplifier 200 is implemented by using a BJT transistor process.
The ultra-wideband communication low-noise amplifier 100 comprises a first amplification stage circuit 4, a second amplification stage circuit 5 and an output following stage circuit 6 which are connected in sequence.
The first amplifying stage circuit 4 is used for receiving an externally input radio frequency signal to realize broadband input matching of common base input impedance and emitter impedance.
Specifically, the first amplifier stage circuit 4 includes a fifth capacitor C5, a sixth capacitor C6, a fifth transistor Q1, a third inductor L3, and a fourth resistor R4.
The circuit structure of the first amplifier stage circuit 4 is as follows:
a first end of the fifth capacitor C5 is used as an input end RFIN of the ultra-wideband communication low noise amplifier 200.
A second terminal of the fifth capacitor C5 is respectively connected to the first terminal of the third inductor L3 and the emitter of the fifth transistor Q1, and a second terminal of the third inductor L3 is connected to ground GND.
The base of the fifth transistor Q1 is connected to a fourth bias voltage VBE1, the collector of the fifth transistor Q1 is connected to the second end of the fourth resistor R4 and the first end of the sixth capacitor C6, respectively, and the first end of the fourth resistor R4 is connected to a power supply voltage VCC.
A second terminal of the sixth capacitor C6 is connected to the input terminal of the second amplifier stage circuit 5.
The working principle of the first amplification stage circuit 4 is as follows:
the first amplifier stage circuit 4 passes through a fifth capacitor C5, a sixth capacitor C6, a fifth transistor Q1, a third inductor L3 and a fourth resistor R4. Together forming a cascode stage circuit. Specifically, the fifth transistor Q1 is a first-stage amplifier transistor, the fifth capacitor C5 is an input blocking capacitor, the fourth resistor R4 is a load resistor of the first amplifier stage circuit 1, the sixth capacitor C6 is a blocking capacitor of the first amplifier stage circuit 4 and the second amplifier stage circuit 5, parasitic capacitors of the transistors of the third inductor L3 and the fifth transistor Q1 resonate in an operating frequency band, and the input impedance is intrinsic input impedance of an emitter of the fifth transistor Q1.
An input radio frequency signal of an input terminal RFIN of the ultra-wideband communication low noise amplifier 200 is applied to a base of a fifth transistor Q1 through a fifth capacitor C5 as a dc blocking capacitor, and a generated small signal current is converted into a small signal voltage through a fourth resistor R4 as a load and is coupled to an input terminal of the second amplification stage circuit 5 through a sixth capacitor C6 as an inter-stage dc blocking capacitor.
In the second embodiment, the fifth capacitor C5 and the sixth capacitor C6 are both parameter-adjustable capacitors, the third inductor L3 is a parameter-adjustable inductor, the fourth resistor R4 is a parameter-adjustable resistor, and all the above components are parameter-adjustable so as to adjust the working frequency point of the first amplification stage circuit 4 to 3.1 GHz. The first amplification stage circuit 4 sets the working frequency point to be adjusted at a low frequency (around 3.1 GHz).
The second amplifier stage circuit 5 is used for signal amplification.
Specifically, the second amplifier stage circuit 5 includes a fifth resistor R5, a sixth resistor R6, a fourth inductor L4, a seventh capacitor C7, and a sixth transistor Q2.
The circuit structure of the second amplifier stage circuit 5 is as follows:
the base of the sixth transistor Q2 is used as the input terminal of the second amplifier stage circuit 5, the base of the sixth transistor Q2 is connected to the second terminal of the sixth capacitor C6 and the second terminal of the sixth resistor R6, respectively, and the first terminal of the sixth resistor R6 is connected to the fifth bias voltage VBE 2.
An emitter of the sixth transistor Q2 is connected to the ground GND, and a collector of the sixth transistor Q2 is connected to the input terminal of the output follower stage circuit 6, the second terminal of the fourth inductor L4, the second terminal of the fifth resistor R5, and the second terminal of the seventh capacitor C7, respectively.
A first end of the fourth inductor L4, a first end of the fifth resistor R5, and a first end of the seventh capacitor C7 are all connected to a power supply voltage VCC.
Wherein the fifth transistor Q1 and the sixth transistor Q2 are both BJT transistors.
The working principle of the second amplifier stage circuit 5 is as follows:
the second amplifier stage circuit 2 forms a cascode amplifier stage circuit by the fifth resistor R5, the sixth resistor R6, the fourth inductor L4, the seventh capacitor C7 and the sixth transistor Q2. Specifically, the sixth transistor Q2 is a common source amplifier transistor, the fourth inductor L4 is a load inductor, the seventh capacitor C7 is a load capacitor, the fifth resistor R5 is a load resistor, and the sixth resistor R6 is a bias resistor.
The fifth bias voltage VBE2 provides a bias voltage to the sixth transistor Q2 through the sixth resistor R6. The fourth inductor L4 is a choke inductor and resonates with the seventh capacitor C7, and together with the fifth resistor R5, acts as a load for the second amplifier stage circuit 5.
In the second embodiment, the fifth resistor R5 and the sixth resistor R6 are both parameter-adjustable resistors, the fourth inductor L4 is a parameter-adjustable inductor, the seventh capacitor C7 is a parameter-adjustable capacitor, and all the above components are parameter-adjustable so as to adjust the working frequency point of the second amplifier stage circuit 5 to 10.6 GHz. The working frequency point of the second amplification stage circuit 5 is adjusted to be high frequency (10.6 GHz). The second amplifier stage circuit 5 enables further amplification of the radio frequency signal.
The output follower stage circuit 6 is used for realizing broadband output matching.
Specifically, the output follower stage circuit 6 includes a seventh transistor Q3, a second current source Idc2, and an eighth capacitor C8.
The circuit structure of the output follower stage circuit 6 is as follows:
the base of the seventh transistor Q3 is used as the input terminal of the output follower stage circuit 6, and the collector of the seventh transistor Q3 is connected to the power supply voltage VCC.
The emitter of the seventh transistor Q3 is connected to the positive terminal of the second current source Idc2 and the first terminal of the eighth capacitor C8, respectively, and the negative terminal of the second current source Idc2 is connected to the ground GND.
A second terminal of the eighth capacitor C8 is used as an output terminal of the output follower stage circuit 6. That is, the second terminal of the eighth capacitor C8 is simultaneously used as the output terminal RFOUT of the ultra-wideband communication low noise amplifier 200.
Wherein, the seventh transistor Q3 are all BJT transistors.
The working principle of the output follower stage circuit 6 is as follows:
the output follower stage circuit 6 adopts an emitter electrode follower configuration transistor, and realizes the broadband matching of the output impedance and the load impedance by the proper selection of the size of the seventh transistor Q3 and the bias current of the second current source Idc 2.
The seventh transistor Q3 is biased by a second current source Idc2 to achieve matching of the external 50 ohm load impedance connected to the output terminal RFOUT of the ultra-wideband communication low noise amplifier 200.
Through the circuit structure, the first-stage amplifying circuit 4 of the ultra-wideband communication low-noise amplifier 200 resonates at a low frequency band, and the second-stage amplifying circuit 5 resonates at a high frequency point, so that the gain reduction of the first-stage amplifying circuit 4 at the high frequency position is compensated by the gain compensation of the second-stage amplifying circuit 5 at the high frequency position, the two-stage equalization amplification is performed, the bandwidth prolongation is realized, and the working frequency band of the ultra-wideband communication low-noise amplifier is wide and the performance index is high. The ultra-wideband communication low-noise amplifier 200 meets the performance index requirements of the ultra-wideband communication standard: first, broadband matching to meet the minimum return loss in the whole frequency band. And a second point, a gain large enough to amplify the received weak rf signal. And thirdly, the sensitivity of the whole system can be improved due to low noise. Fourthly, the power consumption is low, and the service life of the battery of the whole machine is prolonged. And the area of the circuit layout is as small as possible so as to save the production cost of the corresponding chip.
It should be noted that the related resistors, capacitors, inductors, current sources, and transistors used in the present invention are all common components in the art, and have indexes and parameters adjusted according to practical applications, and are not described in detail herein.
The utility model also provides a radio frequency chip, which comprises the ultra-wideband communication low-noise amplifier 100. The radio frequency chip is adopted, the ultra-wideband communication low noise amplifier 100 can work in a wide frequency band and has high performance index.
The utility model also provides another radio frequency chip. The radio frequency chip includes the ultra-wideband communication low noise amplifier 200. The radio frequency chip is adopted the ultra wide band communication low noise amplifier 200 can work with wide frequency band and high performance index.
Compared with the prior art, the ultra-wideband communication low-noise amplifier and the radio frequency chip are provided with the first amplification stage circuit, the second amplification stage circuit and the output following stage circuit which are sequentially connected. The first amplification stage circuit forms a common-gate amplification stage circuit through a first capacitor, a second capacitor, a first transistor, a first inductor and a first resistor, and the working frequency point of the common-gate amplification stage circuit is adjusted to be low frequency (near 3.1 GHz). The second amplification stage circuit forms a cascode amplification stage circuit through a second resistor, a third resistor, a second inductor, a third capacitor, a second transistor and a third transistor, and the working frequency point of the cascode amplification stage circuit is adjusted to be high frequency (10.6 GHz). The circuit structure that the first-stage amplifying circuit resonates at a low frequency band and the second-stage amplifying circuit resonates at a high frequency point enables the gain of the first-stage amplifying circuit at the high frequency to be reduced to obtain the gain compensation of the second-stage amplifying circuit at the high frequency, two-stage balanced amplification is achieved, bandwidth extension is achieved, and the performance index requirements of the ultra-wideband communication standard are met, so that the working frequency band of the ultra-wideband communication low-noise amplifier and the working frequency band of the chip are wide, and the performance index is high.
It should be noted that the above-mentioned embodiments described with reference to the drawings are only intended to illustrate the present invention and not to limit the scope of the present invention, and it should be understood by those skilled in the art that modifications and equivalent substitutions can be made without departing from the spirit and scope of the present invention. Furthermore, unless the context indicates otherwise, words that appear in the singular include the plural and vice versa. Additionally, all or a portion of any embodiment may be utilized with all or a portion of any other embodiment, unless stated otherwise.
Claims (10)
1. The ultra-wideband communication low-noise amplifier is characterized by comprising a first amplification stage circuit, a second amplification stage circuit and an output following stage circuit which are sequentially connected;
the first amplification stage circuit is used for receiving an externally input radio frequency signal to realize broadband input matching of common-grid input impedance and source impedance;
the second amplification stage circuit is used for signal amplification;
the output following stage circuit is used for realizing broadband output matching;
the first amplification stage circuit comprises a first capacitor, a second capacitor, a first transistor, a first inductor and a first resistor;
a first end of the first capacitor is used as an input end of the ultra-wideband communication low-noise amplifier;
a second end of the first capacitor is respectively connected to a first end of the first inductor and a source electrode of the first transistor, and a second end of the first inductor is connected to the ground;
the grid electrode of the first transistor is connected to a first bias voltage, the drain electrode of the first transistor is respectively connected to the second end of the first resistor and the first end of the second capacitor, and the first end of the first resistor is connected to a power supply voltage;
the second end of the second capacitor is connected to the input end of the second amplification stage circuit;
the second amplification stage circuit comprises a second resistor, a third resistor, a second inductor, a third capacitor, a second transistor and a third transistor;
a gate of the second transistor is used as an input terminal of the second amplifier stage circuit, the gates of the second transistor are respectively connected to the second end of the second capacitor and the second end of the third resistor, and the first end of the third resistor is connected to a third bias voltage;
the source electrode of the second transistor is connected to the ground, and the drain electrode of the second transistor is connected to the source electrode of the third transistor;
a gate of the third transistor is connected to a second bias voltage, and a drain of the third transistor is respectively connected to the input terminal of the output follower stage circuit, the second terminal of the second inductor, the second terminal of the second resistor, and the second terminal of the third capacitor;
the first end of the second inductor, the first end of the second resistor and the first end of the third capacitor are connected to a power supply voltage;
wherein the first transistor, the second transistor, and the third transistor are all MOS transistors.
2. The ultra-wideband communication low noise amplifier of claim 1, wherein the output follower stage circuit comprises a fourth transistor, a first current source, and a fourth capacitor;
the grid electrode of the fourth transistor is used as the input end of the output following stage circuit, and the drain electrode of the fourth transistor is connected to a power supply voltage;
a source electrode of the fourth transistor is respectively connected to a positive electrode end of the first current source and a first end of the fourth capacitor, and a negative electrode end of the first current source is connected to the ground;
a second end of the fourth capacitor is used as an output end of the output following stage circuit;
wherein the fourth transistor is a MOS transistor.
3. The amplifier of claim 1, wherein the first capacitor and the second capacitor are both parameter-adjustable capacitors, the first inductor is a parameter-adjustable inductor, and the first resistor is a parameter-adjustable resistor, so as to adjust the operating frequency of the first amplifier stage circuit to 3.1 GHz.
4. The amplifier of claim 1, wherein the second resistor and the third resistor are both parameter-adjustable resistors, the second inductor is a parameter-adjustable inductor, and the third capacitor is a parameter-adjustable capacitor, so as to adjust the operating frequency of the second amplifier stage circuit to 10.6 GHz.
5. The ultra-wideband communication low-noise amplifier is characterized by comprising a first amplification stage circuit, a second amplification stage circuit and an output following stage circuit which are sequentially connected;
the first amplification stage circuit is used for receiving an externally input radio frequency signal to realize broadband input matching of common base input impedance and emitter impedance;
the second amplification stage circuit is used for signal amplification;
the output following stage circuit is used for realizing broadband output matching;
the first amplification stage circuit comprises a fifth capacitor, a sixth capacitor, a fifth transistor, a third inductor and a fourth resistor;
a first end of the fifth capacitor is used as an input end of the ultra-wideband communication low-noise amplifier;
a second end of the fifth capacitor is respectively connected to a first end of the third inductor and an emitter of the fifth transistor, and a second end of the third inductor is connected to ground;
a base electrode of the fifth transistor is connected to a fourth bias voltage, a collector electrode of the fifth transistor is respectively connected to a second end of the fourth resistor and a first end of the sixth capacitor, and the first end of the fourth resistor is connected to a power supply voltage;
a second end of the sixth capacitor is connected to the input end of the second amplification stage circuit;
the second amplification stage circuit comprises a fifth resistor, a sixth resistor, a fourth inductor, a seventh capacitor and a sixth transistor;
a base electrode of the sixth transistor is used as an input end of the second amplifier stage circuit, the base electrodes of the sixth transistor are respectively connected to the second end of the sixth capacitor and the second end of the sixth resistor, and the first end of the sixth resistor is connected to a fifth bias voltage;
an emitter of the sixth transistor is connected to ground, and a collector of the sixth transistor is connected to the input end of the output follower stage circuit, the second end of the fourth inductor, the second end of the fifth resistor, and the second end of the seventh capacitor, respectively;
the first end of the fourth inductor, the first end of the fifth resistor and the first end of the seventh capacitor are all connected to a power supply voltage;
wherein the fifth transistor and the sixth transistor are both BJT transistors.
6. The ultra-wideband communication low noise amplifier of claim 1, wherein the output follower stage circuit comprises a seventh transistor, a second current source, and an eighth capacitor;
the base electrode of the seventh transistor is used as the input end of the output following stage circuit, and the collector electrode of the seventh transistor is connected to a power supply voltage;
an emitter of the seventh transistor is connected to a positive terminal of the second current source and a first terminal of the eighth capacitor, respectively, and a negative terminal of the second current source is connected to ground;
a second end of the eighth capacitor is used as an output end of the output following stage circuit;
and the seventh transistor is a BJT transistor.
7. The amplifier of claim 1, wherein the fifth capacitor and the sixth capacitor are both parameter-adjustable capacitors, the third inductor is a parameter-adjustable inductor, and the fourth resistor is a parameter-adjustable resistor, so as to adjust the operating frequency of the first amplifier stage circuit to 3.1 GHz.
8. The amplifier of claim 1, wherein the fifth resistor and the sixth resistor are both parameter-adjustable resistors, the fourth inductor is a parameter-adjustable inductor, and the seventh capacitor is a parameter-adjustable capacitor, so as to adjust the operating frequency of the second amplifier stage circuit to 10.6 GHz.
9. A radio frequency chip, characterized in that the chip comprises an ultra-wideband communication low noise amplifier according to any of claims 1-4.
10. A radio frequency chip, characterized in that the chip comprises an ultra-wideband communication low noise amplifier according to any of claims 5-8.
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| Application Number | Priority Date | Filing Date | Title |
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| PCT/CN2022/125454 WO2023082939A1 (en) | 2021-11-01 | 2022-10-14 | Low-noise amplifier of ultra-wideband communication standard, and radio frequency chip |
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| CN2021226511776 | 2021-11-01 | ||
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2023082939A1 (en) * | 2021-11-01 | 2023-05-19 | 深圳飞骧科技股份有限公司 | Low-noise amplifier of ultra-wideband communication standard, and radio frequency chip |
| US20240039570A1 (en) * | 2019-01-08 | 2024-02-01 | Psemi Corporation | Configurable Wideband Split LNA |
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| CN117713705B (en) * | 2024-02-05 | 2024-05-07 | 深圳飞骧科技股份有限公司 | Low noise amplifier |
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| CN101282110B (en) * | 2008-04-25 | 2010-07-28 | 北京大学 | Low-power consumption single-ended input difference output low-noise amplifier |
| CN110729974A (en) * | 2019-09-30 | 2020-01-24 | 西安电子科技大学 | Ultra-wideband high-gain low-noise amplifier |
| CN111525893B (en) * | 2020-04-30 | 2023-08-15 | 杭州中科微电子有限公司 | Broadband low-noise amplifier applied to GNSS dual-frequency receiver |
| CN216390924U (en) * | 2021-11-01 | 2022-04-26 | 深圳飞骧科技股份有限公司 | Low-noise amplifier and radio frequency chip of ultra-wideband communication standard |
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2021
- 2021-11-10 CN CN202122749618.6U patent/CN216390924U/en active Active
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20240039570A1 (en) * | 2019-01-08 | 2024-02-01 | Psemi Corporation | Configurable Wideband Split LNA |
| WO2023082939A1 (en) * | 2021-11-01 | 2023-05-19 | 深圳飞骧科技股份有限公司 | Low-noise amplifier of ultra-wideband communication standard, and radio frequency chip |
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