CN110113013B - High octave ultra-wideband input matching circuit for low noise amplifier - Google Patents
High octave ultra-wideband input matching circuit for low noise amplifier Download PDFInfo
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- CN110113013B CN110113013B CN201910564675.1A CN201910564675A CN110113013B CN 110113013 B CN110113013 B CN 110113013B CN 201910564675 A CN201910564675 A CN 201910564675A CN 110113013 B CN110113013 B CN 110113013B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/26—Modifications of amplifiers to reduce influence of noise generated by amplifying elements
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/42—Modifications of amplifiers to extend the bandwidth
- H03F1/48—Modifications of amplifiers to extend the bandwidth of aperiodic amplifiers
- H03F1/483—Modifications of amplifiers to extend the bandwidth of aperiodic amplifiers with field-effect transistors
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/56—Modifications of input or output impedances, not otherwise provided for
- H03F1/565—Modifications of input or output impedances, not otherwise provided for using inductive elements
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
- H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
- H03F3/193—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only with field-effect devices
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/294—Indexing scheme relating to amplifiers the amplifier being a low noise amplifier [LNA]
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/372—Noise reduction and elimination in amplifier
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/451—Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
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Abstract
The invention relates to a high octave ultra-wideband input matching circuit for a low noise amplifier, belonging to the technical field of radio frequency integrated circuits. The input matching circuit comprises a current multiplexing amplifying unit, a first inductor, a second inductor and a resistor, wherein the current multiplexing amplifying unit comprises an NMOS transistor and a PMOS transistor, the grid electrode and the drain electrode of the NMOS transistor are connected, the input end of the matching circuit is connected to the grid electrode of the NMOS (PMOS) transistor through the first inductor, the drain electrode of the NMOS (PMOS) transistor is used as the output end of the matching circuit, the source electrode of the NMOS transistor is connected to the ground through the second inductor, the source electrode of the PMOS transistor in the current multiplexing amplifying unit is connected to a power supply, and the feedback resistor is connected between the input end and the output end of the matching circuit in a bridging mode. The invention can be applied to the design of the high-octave ultra-wideband low-noise amplifier chip to realize the high-octave ultra-wideband input matching.
Description
Technical Field
The invention belongs to the technical field of low noise amplifiers (Low Noise Amplifier, LNA for short) in radio frequency integrated circuits, and particularly relates to a high octave ultra-wideband input matching circuit for a low noise amplifier.
Background
A series of technological achievements which are promoted by the continuous progress of the modern wireless communication technology are widely penetrated into the fields of socioeconomic, military, culture and the like. At present, a frequency spectrum range below a Ka band covers civil wireless communication and wireless internet access frequency bands such as 2G/3G mobile communication, 4G-LTE mobile communication, 5 th generation mobile communication, navigation, satellite communication, IEEE 802.11a/b/G, high Data Rate (HDR) ultra wideband and the like, and further comprises military communication frequency bands such as communication countermeasure, radar investigation and the like. With the continuous upgrading of civil mobile communication service, 2G/3G/4G-LET has been integrated in hardware, and besides, other applications still exist independently of each other. However, with further development of wireless communication technology, the concept of multi-band multi-standard has attracted considerable attention, and particularly, the concept of multi-functional integration of wireless communication subsystems is gradually becoming more and more interesting under the push of strong demands of software radio design for reusable hardware platforms. In order for a single device to support multiple communication standards and various applications, operating band expansion is a requisite for transceiver design. Because the high octave ultra-wideband receiver front-end adopting the single-channel design is comprehensively superior to the design scheme of multi-channel parallelism in the aspects of manufacturing cost, chip size and power consumption.
As a first stage active circuit as a front-end of a wireless receiver, an LNA plays a very important role in a wireless receiving system: by which the input signal can be sufficiently amplified and a desired signal-to-noise ratio can be achieved at the output. For the LNA facing multimode and multi-standard application, the ultra wideband input matching with high octave is one of the most critical design techniques, because the ultra wideband input matching circuit with high octave not only determines the port standing wave performance of the LNA, but also has a great influence on noise figure. S is commonly used in the design process 11 To measure the input match of the LNA, the noise figure is generally indicated by NF (Noise Figure).
In the field of ultra-wideband LNA design, engineering technicians at home and abroad propose some effective technical schemes.
Jonathan Borremans Piet Wambacq, charlotte Soens et al, in IEEE JSSC 2008, pages 2422-2433, "Low-Area Active-feed Back Low-Noise Amplifer Design in Scaled Digital CMOS" propose an Active Feedback LNA. Because the LNA only adopts one Casode unit and is matched with an active feedback technology, the LNA has the broadband input matching performance of 0-6.5 GHz under lower power consumption. But the active feedback circuit limits the high frequency matching and noise of the LNA, making it difficult to implement a high octave LNA design to the millimeter wave band.
Yo-shaping Lin, chang-Zhi Chen, hong-Yu Yang et al in IEEE TMTT 2010, pages 287-296, "Analysis and Design of a CMOS UWB LNA With Dual-RLC-Branch Wideband Input Matching Network" propose a dual RLC branch input matching network for LNA designs with input matching bandwidths up to 2.6-11.9 GHz, but such designs cannot achieve 1GHz input matching and deteriorate high frequency noise figure.
In IEEE TMTT 2010, pages 2092-2104, "Analysis and Design of a 1.6.6-28GHz Compact Wideband LNA in 90-nm CMOS Using a pi-Match Input Network", hsien-Kuchen, yo-shaping Lin, shey-Shi Lu, a pi-type input matching network for LNA design is proposed, the input matching bandwidth of which can reach 1.6-28GHz, but this design is implemented by means of a capacitor connected in parallel with the input, the introduction of which can deteriorate the noise figure of the LNA.
Yo-shaping Lin, chien-chip Wang, guan-Lin Lee et al in IEEE MWCL 2014, pages 200-202, "High-Performance Wideband Low-Noise Amplifer Using Enhanced pi-Match Input Network" propose an improved pi-type input matching network for LNA design, the input matching bandwidth of the LNA can reach 0-12 GHz, the problem of low frequency mismatch is overcome, and the parasitic resistance of the input stage inductance still worsens the noise figure of the LNA.
The invention patent of Poplar Bright, xu Shilong and Duckmine et al discloses an input matching circuit based on active devices as load and resistance negative feedback in a self-biased ultra-wideband low-power-consumption low-noise amplifier (ZL 201510220400.8), an input stage inductor is replaced by a bonding wire, so that ultra-wideband matching can be realized, noise coefficient deterioration is avoided, but inductance values of the bonding wire inductor are not easy to control, and large differences can be generated in input matching performance of different circuits.
Disclosure of Invention
In view of the above, the present invention provides a high octave ultra wideband input matching circuit for a low noise amplifier, which can solve the problem of high octave ultra wideband matching of an LNA single chip without having a large influence on noise figure.
In order to achieve the above purpose, the technical scheme adopted by the invention is as follows:
a high octave ultra-wideband input matching circuit for a low noise amplifier comprises a current multiplexing amplifying unit, a first inductor, a second inductor, a resistor, a power supply end, a grounding end, an input end and an output end;
the current multiplexing amplifying unit comprises an NMOS transistor and a PMOS transistor, wherein the grid electrode of the NMOS transistor is connected with the grid electrode of the PMOS transistor, the drain electrode of the NMOS transistor is connected with the drain electrode of the PMOS transistor and is commonly connected to the output end, and the source electrode of the PMOS transistor is connected with the power supply end;
the grid electrode of the NMOS transistor and/or the PMOS transistor is connected to one end of a first inductor, the other end of the first inductor is connected with the input end, the source electrode of the NMOS transistor is connected to one end of a second inductor, the other end of the second inductor is connected with the grounding end, and the resistor is connected between the input end and the output end in a bridging mode.
Compared with the prior art, the invention has the following beneficial effects:
1) The invention can realize the high octave ultra-wideband input matching from DC to millimeter wave frequency band when being used for LNA design.
2) The structure provided by the invention has the advantages that the feedback point in the matching network is arranged in front, and the influence of parasitic resistance in the grid series inductance on the LNA noise coefficient is weakened.
Drawings
Fig. 1 is a schematic diagram of a high octave ultra-wideband input matching circuit for a low noise amplifier in accordance with an embodiment of the present invention.
Fig. 2 (a) and 2 (b) are small-signal equivalent circuits and their exploded circuits of fig. 1, respectively.
FIG. 3 shows an input matching parameter S of a high octave ultra wideband input matching circuit for a low noise amplifier in accordance with an embodiment of the present invention 11 Is a simulation curve of (a).
FIG. 4 is a NF simulation curve of a high octave ultra wideband input matching circuit for a low noise amplifier for LNA design in accordance with an embodiment of the present invention.
Detailed Description
The invention will be described in detail below with reference to the drawings and the detailed description.
A high octave ultra-wideband input matching circuit for a low noise amplifier includes a current multiplexing amplifying unit, a first inductor, a second inductor, and a feedback resistor. The current multiplexing amplifying unit consists of NMOS transistors and PMOS transistors which are connected in a stacked mode, and the specific connection relation is as follows: the grid of the NMOS transistor is connected with the grid of the PMOS transistor, the drain electrode of the NMOS transistor is connected with the drain electrode of the PMOS transistor and then connected to the output end of the input matching circuit, one end of the grid first inductor is used as the input end of the input matching circuit, and the other end of the first inductor is connected to the grid of the NMOS (PMOS) transistor. The source of the NMOS transistor is connected with one end of a second inductor, the other end of the second inductor is grounded, and the source of the PMOS transistor is connected to a power supply. One end of the feedback resistor is connected with the input end of the matching circuit, and the other end of the feedback resistor is connected with the output end of the matching circuit.
Specifically, as shown in fig. 1, a high octave ultra-wideband input matching circuit for a low noise amplifier, comprising: NMOS transistor M 1 A PMOS transistor M 2 A resistor R f And two inductances L 1 、L 2 ,M 1 And M 2 The pin meaning of (2) is shown in the pin schematic diagram in the figure.
Wherein, NMOS transistor M 1 And PMOS transistor M 2 Is connected together with the gate of NMOS transistor M 1 And PMOS transistor M 2 The drains of (2) are also connected together and serve as the output of the input matching circuit. Input end of matching circuit and inductance L 1 One of (2)End to end, inductance L 1 Is connected to the NMOS transistor M 1 And PMOS transistor M 2 Is formed on the substrate. NMOS transistor M 1 Is connected to the inductor L 2 Is one end of the inductance L 2 The other end of which is grounded. PMOS transistor M 2 Is connected to a power supply V DC . Resistor R f Across the input and output terminals.
Inductance L needs to be considered in the design of the matching circuit 1 Is not ideal, it contains parasitic resistance R 1 . In addition, the input parasitic C of the subsequent stage circuit L There is also some impact on the input matching of the LNA and consideration in the matching circuit design is also needed.
FIG. 2 (a) is the small-signal equivalent circuit of FIG. 1, in which R is contained 1 And C L FIG. 2 (b) shows a further decomposition of FIG. 2 (a), resistor R f Decomposition into resistors R f1 And resistance R f2 . Defining ω as signal angular frequency, ω in fig. 2 (a) and (b) T1 ≈g m1 /C gs1 Is the characteristic angular frequency g of the transistor M1 m1 Is the transconductance of transistor M1, C gs1 Is the gate-source parasitic capacitance of transistor M1, and in addition, C gd1 Is the parasitic capacitance of the gate and drain of transistor M1, C gs2 、C gd2 Equivalent is treated. R in FIG. 2 (a) (b) T Is the characteristic resistance of the transistor M1.
When the operating frequency of the input matching circuit is relatively low, the input impedance Z in Satisfies the following formula
G in formula (1) v The voltage gain is the voltage gain of the point B to the point A.
When the input matching circuit works at a certain high frequency, the source degeneration inductance L 2 And capacitor C gs1 Resonance, input impedance Z in The expression of (2) is
Z in =R f1 //Z′ in (2)
In formula (2)/(is a parallel symbol in which
In the formula (3), j is an imaginary unit, and C is C gs2 、C gd And C L The equivalent capacitance together, as shown in formula (4), due to C L High frequency impedance and R of (2) f2 Is small in comparison with R f2 Is ignored in equation (3).
As can be seen from (3)
When (when)I.e. < ->Time of day
In the formula (5)/(is a parallel sign, inductance L) 1 Parasitic resistance R of (2) 1 And R is R f1 The parallel connection relation is presented, so that the matching circuit provided by the invention can realize the ultra-wideband matching of input, weaken the influence of inductance parasitic resistance at high frequency on noise coefficient and optimize the noise performance of the low-noise amplifier.
FIG. 3 shows the input matching parameters S of an LNA to which the high octave ultra wideband matching circuit of the present invention is applied 11 And (5) simulating a curve. From the simulation results, it can be seen that S of the LNA 11 Less than-13 dB within DC-30 GHz, the minimum reaches-19.6 dB, and good matching performance is presented.
Fig. 4 is a NF simulation curve of an LNA employing a high octave ultra wideband matching circuit according to the present invention. Simulation results show that NF of the LNA is smaller than 4.8dB within DC-30 GHz, and the minimum value is smaller than 2.5dB, so that the LNA has good noise performance.
The simulation results prove that the high octave ultra-wideband input matching circuit for the low-noise amplifier is effective.
While the invention has been shown and described with reference to certain preferred embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention.
Claims (1)
1. The high-octave ultra-wideband input matching circuit for the low-noise amplifier is characterized by comprising a current multiplexing amplifying unit, a first inductor, a second inductor, a resistor, a power supply end, a grounding end, an input end and an output end;
the current multiplexing amplifying unit comprises an NMOS transistor and a PMOS transistor, wherein the grid electrode of the NMOS transistor is connected with the grid electrode of the PMOS transistor, the drain electrode of the NMOS transistor is connected with the drain electrode of the PMOS transistor and is commonly connected to the output end, and the source electrode of the PMOS transistor is connected with the power supply end;
the grid electrode of the NMOS transistor and/or the PMOS transistor is connected to one end of a first inductor, the other end of the first inductor is connected with the input end, the source electrode of the NMOS transistor is connected to one end of a second inductor, the other end of the second inductor is connected with the grounding end, and the resistor is connected between the input end and the output end in a bridging mode.
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