CN206712752U - Broadband low-power consumption low-noise amplifier applied to wireless sensor network - Google Patents

Broadband low-power consumption low-noise amplifier applied to wireless sensor network Download PDF

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CN206712752U
CN206712752U CN201720608416.0U CN201720608416U CN206712752U CN 206712752 U CN206712752 U CN 206712752U CN 201720608416 U CN201720608416 U CN 201720608416U CN 206712752 U CN206712752 U CN 206712752U
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pmos
nmos tube
drain electrode
low
grid
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吴晨健
安景慧
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Suzhou University
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Suzhou University
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Abstract

The utility model discloses a kind of broadband low-power consumption low-noise amplifier applied to wireless sensor network, it includes being sequentially connected the input matching circuit connect, first order amplifying circuit and second level amplifying circuit, first order amplifying circuit uses resistance feedback common source circuit structure, and second level amplifying circuit is using active parallel feedback common gate circuit structure.

Description

Broadband low-power consumption low-noise amplifier applied to wireless sensor network
Technical field
The utility model belongs to analogue layout field, and in particular to a kind of applied to wireless sensor network Broadband low-power consumption low-noise amplifier.
Background technology
Low-noise amplifier is widely used in communication, radar, remote measuring and controlling and various high precision measuring systems.Low noise Amplifier is the key component of radio-frequency transmitter front end, and main function is from the weak radio-frequency signal received in the air by antenna It is amplified, while only introduces smaller noise.As the first order active module embedded therein of receiver, the performance of low-noise amplifier Quality plays decisive role to whole receiver system performance.Want to design that to have high-gain, low-power consumption, the linearity concurrently moderate Low-noise amplifier be extremely difficult, it usually needs weigh between these performances.Therefore, a low-power consumption, height are designed The moderate amplifier circuit in low noise of gain, the linearity has relatively broad application prospect and application value.
Current most of low-noise amplifiers are all to sacrifice a certain performance indications to optimize another performance indications.In order to obtain High-gain, people can use casacade multi-amplifier cascade by the way of, as shown in figure 1, but often increase integrated circuit power consumption And noise coefficient.In order to realize low noise, people's generally use cross-coupled differential structure, as shown in Fig. 2 Differential Input, difference Divide the chip area that output needs extra balun and coupled capacitor can all increase integrated circuit.
In order to meet high-gain, low-power consumption, the suitable linearity, low-noise factor simultaneously as far as possible, some are about low noise The technology of amplifier is suggested and extensive use.Current efficiency is improved using current multiplexing technology；Using transconductance-enhanced technology Improve gain；Very low power consumption is realized using subthreshold region technology；Positive body bias technology is used to provide condition for low voltage designs Deng.It will be following low noise to study the cross-reference of these technologies and further optimize innovation using the circuit structure of these technologies One trend of acoustic amplifier research and development.
The defects of existing in view of current low-noise amplifier, the design people is actively subject to research and innovation, to found one Kind has low-power consumption concurrently, high-gain, the moderate low-noise amplifier of the linearity, makes it with more the value in industry.
Utility model content
In order to overcome above-mentioned technical problem, the purpose of this utility model is to propose that one kind is applied to wireless sensor network The broadband low-power consumption low-noise amplifier of network, using current multiplexing, noise-cancellation circuit structure, realizes low-power consumption, low noise, height Gain and the moderate linearity.
In order to achieve the above object, the utility model provides a kind of technical scheme：One kind is applied to wireless sensor network The broadband low-power consumption low-noise amplifier of network, it includes being sequentially connected the input matching circuit connect, first order amplifying circuit and the Second amplifying circuit,
First order amplifying circuit uses resistance feedback common source circuit structure, and it includes PMOS MP, NMOS tube MN and feedback Resistance Rf, PMOS MP source electrode connection bias voltage vb, PMOS MP drain electrode and NMOS tube MN drain electrode respectively with feedback Resistance RfOne end be connected, PMOS MP grid and NMOS tube MN grid respectively with feedback resistance RfThe other end and Input matching circuit is connected, NMOS tube MN source ground；
Second level amplifying circuit using active parallel feedback common gate circuit structure, it include NMOS tube M1, PMOS M2, PMOS M5, NMOS tube M6, resistance RL1, resistance RL2And electric capacity C1, resistance RL1One end connection power vd D and the other end point It is not connected with NMOS tube M1 drain electrode and PMOS M5 grid, NMOS tube M1 grid connection bias voltage vgn, PMOS M2 grid connection bias voltage vgp, NMOS tube M1 source electrode, the drain electrode of PMOS M2 source electrode and PMOS M5, NMOS tube M6 drain electrode is connected, and drain electrode, the NMOS tube MN leakage of NMOS tube M1 source electrode, PMOS M2 source electrode and PMOS MP Pole is directly connected to or is connected by a part, PMOS M2 drain electrode, resistance RL2One end be connected with NMOS tube M6 grid Connect, RL2Other end ground connection, PMOS M5 source electrode connection power vd D, NMOS tube M6 source ground, electric capacity C1 both ends point Not Lian Jie NMOS tube M1 drain electrode, PMOS M2 drain electrode；NMOS tube M1 drain electrode is the width applied to wireless sensor network Output end with low-power consumption low-noise amplifier.
Further, input matching circuit includes electric capacity CinWith inductance Lin, electric capacity CinOne end ground connection and the other end with electricity Feel LinOne end be connected, LinThe other end and PMOS MP grid, NMOS tube MN grid and feedback resistance RfIt is another One end is connected.
Further, inductance LinOne end be broadband low-power consumption low-noise amplifier applied to wireless sensor network Input.
Further, first order amplifying circuit also includes electric capacity C, electric capacity C one end and PMOS MP drain electrode, NMOS tube MN drain electrode is connected, and the other end is connected with NMOS tube M1 source electrode, PMOS M2 source electrode.
The utility model also proposed another technical solution：A kind of broadband low-power consumption applied to wireless sensor network Low-noise amplifier, it includes being sequentially connected the input matching circuit connect, first order amplifying circuit and second level amplifying circuit,
First order amplifying circuit uses resistance feedback common source circuit structure, and it includes PMOS MP, NMOS tube MN and feedback Resistance Rf, PMOS MP source electrode connection bias voltage vb, PMOS MP drain electrode and NMOS tube MN drain electrode respectively with feedback Resistance RfOne end be connected, PMOS MP grid and NMOS tube MN grid respectively with feedback resistance RfThe other end and Input matching circuit is connected, NMOS tube MN source ground；
Second level amplifying circuit using active parallel feedback common gate circuit structure, it include PMOS M3, NMOS tube M1, PMOS M2, NMOS tube M4, PMOS M5, NMOS tube M6 and electric capacity C1, PMOS M3 grid, NMOS tube M4 grid connect Meet bias voltage vr, NMOS tube M1 grid connection bias voltage vgn, PMOS M2 grid connection bias voltage vgp, PMOS Pipe M3 source electrode connects power vd D, NMOS tube M4 and NMOS tube M6 source ground with PMOS M5 source electrode, PMOS M3's Drain electrode, NMOS tube M1 drain electrode are connected with PMOS M5 grid, PMOS M2 drain electrode, NMOS tube M4 drain electrode and NMOS Pipe M6 grid is connected, NMOS tube M1 source electrode, PMOS M2 source electrode and PMOS M5 drain electrode and NMOS tube M6 leakage Pole is connected, and electric capacity C1 both ends connect NMOS tube M1 drain electrode and PMOS M2 drain electrode respectively；NMOS tube M1 drain electrode is Output end applied to the broadband low-power consumption low-noise amplifier of wireless sensor network.
Further, input matching circuit includes electric capacity CinWith inductance Lin, electric capacity CinOne end ground connection and the other end with electricity Feel LinOne end be connected, LinThe other end and PMOS MP grid, NMOS tube MN grid and feedback resistance RfIt is another One end is connected.
Further, inductance LinOne end be broadband low-power consumption low-noise amplifier applied to wireless sensor network Input.
Further, first order amplifying circuit also includes electric capacity C, electric capacity C one end and PMOS MP drain electrode, NMOS tube MN drain electrode is connected, and the other end is connected with NMOS tube M1 source electrode, PMOS M2 source electrode.
The broadband low-power consumption low-noise amplifier applied to wireless sensor network that the utility model is proposed, input With circuit, for realizing input resistant matching；First order amplifying circuit, it is mainly used in improving gain, realizes wide-band impedance Matching；Second level amplifying circuit, it is mainly used in reducing noise, improves the linearity, reduce power consumption.
By using above-mentioned technical proposal, the wideband low noise of the present utility model applied to wireless sensor network amplifies Device at least has advantages below and remarkable result：
(1) it is simple in construction：First order amplifying circuit uses resistance feedback common source configuration, and transistor gate voltage is by feedback electricity Hinder automatic biasing to provide, it is not necessary to which extra biasing circuit, NMOS and PMOS transistor stacking increase effective mutual conductance, can provide Higher gain, and the structure can realize that wide-band impedance matches；Second level amplifying circuit is fed back using active parallel Common gate structure, load use active load, avoid the use of big inductance, bulky capacitor, save the area of integrated circuit.
(2) it is low in energy consumption：In the case where realizing 50 Ω input resistant matching requirements, the utility model uses current multiplexing technology and Asia Power consumption can be greatly lowered in threshold zone technology, and under the conditions of gain (15dB) is similar, the utility model power consumption is 2.86mW (1.8V supply voltages), and use the custom low noise amplifier of cross-coupling technique to need about 12mW power consumption (1.8V power supplys Voltage).
(3) noise is small：The utility model uses noise cancellation technique, and part is eliminated by constructing noise cancellation loop circuit Noise, and noise cancellation loop does not interfere with the performances such as gain, power consumption.
(4) chip area is minimum：Except input matching circuit needs to use inductance, low-noise amplifier of the present utility model Core amplifying circuit realize no inductance, chip area is greatly saved.
(5) high-gain：The utility model uses active load, and the direct current pressure in load can be reduced compared to ohmic load Drop, while using the equivalent transconductance of transconductance-enhanced technology raising metal-oxide-semiconductor, so as to improve voltage gain.
(6) the utility model simulation result is carried out under 2.4GHz frequency ranges, passes through adjustment element parameter, the utility model Structure can also be applied to other each frequency ranges.The utility model uses CMOS technology, has greater advantage in radio circuit, if Count simple in construction, improving noiseproof feature and gain simultaneously, power consumption is greatly lowered, there is larger input coupling bandwidth, With higher gain and with less noise coefficient in 0.09~2.7GHz frequency band ranges.
Described above is only the general introduction of technical solutions of the utility model, in order to better understand skill of the present utility model Art means, and being practiced according to the content of specification, with preferred embodiment of the present utility model and coordinate accompanying drawing detailed below Describe in detail bright as after.
Brief description of the drawings
Fig. 1 is that conventional multi-stage amplifier cascades amplifier circuit in low noise figure in background technology；
Fig. 2 is conventional cross coupled differential structure amplifier circuit in low noise figure in background technology；
Fig. 3 is the circuit diagram for the broadband low-power consumption low-noise amplifier that the utility model is applied to wireless sensor network (load is resistance)；
Fig. 4 is the circuit diagram for the broadband low-power consumption low-noise amplifier that the utility model is applied to wireless sensor network (load is metal-oxide-semiconductor)；
Fig. 5 is that the utility model is used for second level amplification in the broadband low-power consumption low-noise amplifier of wireless sensor network The active parallel feedback common gate structure Noise Mechanism figure of circuit；
Fig. 6 is gain of the present utility model, noise coefficient analogous diagram, where the dotted line signifies that gain, and solid line represents noise system Number；
Fig. 7 is input 1dB compression point analogous diagrams of the present utility model.
Embodiment
With reference to the accompanying drawings and examples, specific embodiment of the present utility model is described in further detail.Below Embodiment is used to illustrate the utility model, but is not limited to the scope of the utility model.
Referring to the drawings 3, a kind of broadband low-power consumption low noise amplification applied to wireless sensor network in the present embodiment Device, it includes being sequentially connected the input matching circuit connect, first order amplifying circuit and second level amplifying circuit.
Input matching circuit includes electric capacity CinWith inductance Lin, electric capacity CinOne end ground connection and the other end and inductance LinOne End is connected, LinThe other end and PMOS MP grid, NMOS tube MN grid and feedback resistance RfThe other end be connected. Inductance LinOne end be applied to wireless sensor network broadband low-power consumption low-noise amplifier input.
First order amplifying circuit uses resistance feedback common source circuit structure, and it includes PMOS MP, NMOS tube MN and feedback Resistance Rf, PMOS MP source electrode connection bias voltage vb, PMOS MP drain electrode and NMOS tube MN drain electrode respectively with feedback Resistance RfOne end be connected, PMOS MP grid and NMOS tube MN grid respectively with feedback resistance RfThe other end and Input matching circuit is connected, NMOS tube MN source ground.In a preferred embodiment, first order amplifying circuit is also Including electric capacity C, electric capacity C one end is connected with PMOS MP drain electrode, NMOS tube MN drain electrode, and the other end is retouched with will be detailed below The NMOS tube M1 stated source electrode, PMOS M2 source electrode is connected.
Second level amplifying circuit using active parallel feedback common gate circuit structure, it include NMOS tube M1, PMOS M2, PMOS M5, NMOS tube M6, resistance RL1, resistance RL2And electric capacity C1, resistance RL1One end connection power vd D and the other end point It is not connected with NMOS tube M1 drain electrode and PMOS M5 grid, NMOS tube M1 grid connection bias voltage vgn, PMOS M2 grid connection bias voltage vgp, NMOS tube M1 source electrode, the drain electrode of PMOS M2 source electrode and PMOS M5, NMOS tube M6 drain electrode is connected, and drain electrode, the NMOS tube MN leakage of NMOS tube M1 source electrode, PMOS M2 source electrode and PMOS MP Pole is directly connected to or is connected by a part, PMOS M2 drain electrode, resistance RL2One end be connected with NMOS tube M6 grid Connect, RL2The other end ground connection, PMOS M5 source electrode connection power vd D, NMOS tube M6 source ground.Electric capacity C1 both ends point Not Lian Jie NMOS tube M1 drain electrode, PMOS M2 drain electrode；NMOS tube M1 drain electrode is the width applied to wireless sensor network Output end with low-power consumption low-noise amplifier.
Referring to the drawings 4, the present embodiment also proposed another technical solution：A kind of width applied to wireless sensor network Band low-power consumption low-noise amplifier, it puts including being sequentially connected the input matching circuit connect, first order amplifying circuit and the second level Big circuit.
Input matching circuit includes electric capacity CinWith inductance Lin, electric capacity CinOne end ground connection and the other end and inductance LinOne End is connected, LinThe other end and PMOS MP grid, NMOS tube MN grid and feedback resistance RfThe other end be connected. Inductance LinOne end be applied to wireless sensor network broadband low-power consumption low-noise amplifier input.
First order amplifying circuit uses resistance feedback common source circuit structure, and it includes PMOS MP, NMOS tube MN and feedback Resistance Rf, PMOS MP source electrode connection bias voltage vb, PMOS MP drain electrode and NMOS tube MN drain electrode respectively with feedback Resistance RfOne end be connected, PMOS MP grid and NMOS tube MN grid respectively with feedback resistance RfThe other end and Input matching circuit is connected, NMOS tube MN source ground.First order amplifying circuit also includes electric capacity C, electric capacity C one end with PMOS MP drain electrode, NMOS tube MN drain electrode is connected, source electrode, the PMOS of the other end and NMOS tube M1 which will be described Pipe M2 source electrode is connected.
Second level amplifying circuit using active parallel feedback common gate circuit structure, it include PMOS M3, NMOS tube M1, PMOS M2, NMOS tube M4, PMOS M5, NMOS tube M6 and electric capacity C1, PMOS M3 grid, NMOS tube M4 grid connect Meet bias voltage vr, NMOS tube M1 grid connection bias voltage vgn, PMOS M2 grid connection bias voltage vgp, PMOS Pipe M3 source electrode connects power vd D, NMOS tube M4 and NMOS tube M6 source ground with PMOS M5 source electrode, PMOS M3's Drain electrode, NMOS tube M1 drain electrode are connected with PMOS M5 grid, PMOS M2 drain electrode, NMOS tube M4 drain electrode and NMOS Pipe M6 grid is connected, NMOS tube M1 source electrode, PMOS M2 source electrode and PMOS M5 drain electrode and NMOS tube M6 leakage Pole is connected, and electric capacity C1 both ends connect NMOS tube M1 drain electrode and PMOS M2 drain electrode respectively；NMOS tube M1 drain electrode is Output end applied to the broadband low-power consumption low-noise amplifier of wireless sensor network.
The resistance feedback common source circuit structure of first order amplifying circuit is the improvement done in resistance feedback formula structure, and it is One PMOS transistor and a nmos pass transistor are layered in in one current path, realize current multiplexing, meanwhile, should Structure can work under low suppling voltage, therefore can realize preferable low-power consumption.Meanwhile this arrangement enhances amplifying stage Effectively input mutual conductance GM, GM=GMP+GMN, gain can be further improved, but not increase the DC power of circuit.Feedback resistance RfAutomatic biasing DC voltage can be provided for NMOS and PMOS grid, it is not necessary to additionally add dc source, but RfDeposit Causing to input and export direct-coupling, deteriorating transistor MN and MP thermal noise.It is defeated by analyzing small-signal equivalent circuit Enter impedance ZinIt can be expressed as with noise coefficient NF
In formula (1), Z2For the input impedance of next stage common gate structure；In formula (2), ω0For working frequency, ωTFor cutoff frequency Rate.By calculating, by adjusting means parameter, debugging is optimized to circuit, makes it in input resistant matching and noise coefficient Between have a good compromise, while the improvement of these performances will not sacrifice other performances such as noise, linearity.
NMOS and PMOS inverter type structure in the active parallel feedback common gate circuit structure of second level amplifying circuit, Purpose is the electric current in input stage transistor multiplexing feedback transistor, therefore NMOS and PMOS transistor is overturn, feedback transistor Pipe M5 and M6 electric current are all re-used in M1 or M2, bring higher current efficiency and lower power consumption.M3 and M4 It is active load impedance, selects active load can be in low VdsWhen output end keep constant impedance, increase amplifier tube M1's and M2 Voltage margin.The output current of electric capacity C1 aggregate crystals pipes.Transistor M5 and M6 are commonsource amplifiers, in parallel anti-for completing Present network.In order to avoid the use and its related area and ghost effect of other decoupling capacitors, M5 and M6 are by dc-couple To M1 and M2 output and be biased in weak inversion regime.
When minimizing current drain, active parallel feeds back the input impedance and 50 Ω matching capacities in low-noise amplifier In play an important role.Impedance by considering electric capacity C1 is negligible, and its input impedance can be written as
Wherein, goiIt is transistor Mi output mutual conductance, CgsiIt is transistor Mi gate-source capacitance, RL1And RL2For transistor M3 With M4 equivalent active load impedance, A=(gm5+gm6)(RL1∣∣RL2), G1=gm1+go1, G2=gm2+go2And Cgs=Cgs1+Cgs2。 From formula (3) as can be seen that needing a high g to provide the input impedance close to 50 Ωm5And gm6.Pass through debugging Emulation is found, in gm5And gm6During less than 5mS, input resistant matching can be realized, it means that the input matching of a low-power consumption Network is feasible.In low frequency, ignore output conductance to simplify, input matching condition is reduced to
Formula (4) clearly illustrates that feedback network makes effective gm(1+A) times is enhanced, this enables circuit real under low-power consumption Now good input matching.
Assuming that node V2 and node V3 are by the way that together with C1 ideally AC coupled, all transistor M1~M6 are to low The gain of noise amplifier contributes.The gain of the low-noise amplifier proposed under this assumption can be expressed as
Wherein, G=gm1+gm2+go1+go2, ZL=ZL1+ZL2, ZL=ZL1+ZL2It is node V2 and node V3 impedance respectively. Formula (3) and (5) highlight the basic compromise between good input matching and high-gain.Increase gm3Input impedance is reduced, but It is using lower voltage gain as cost.
The Main Noise Sources of active parallel feedback common gate structure are transistor M1~M4 electric leakage flow noisesM5 and M6 induced gate noiseAnd The thermal noise of load resistanceγ is thermal noise coefficient, and α is gm/gd0.It is false in this analysis If the output impedance of transistor is infinitely great, because the grid noise (Rg) of transistor can be minimized by appropriate layout techniques, So ignore.However, the induced gate noise for being biased in the M5 and M6 of weak inversion regime is considered.Firstly, it is necessary to low noise is discussed The Noise Mechanism of acoustic amplifier.To put it more simply, only consider M1 noise contribution and only M6 parallel feedbacks when noise coefficient, and Load as RL1And RL2, active parallel feedback common gate structure Noise Mechanism it is as shown in Figure 5.
Noise current generates a noise voltage in node V2, and small amplitude, an opposite in phase are generated in node V1 Correlated noise voltage, node V1 noise voltage appears in node V3 by M2 amplifications.If the resistance between node V2 and node V3 Anti- sufficiently small, the noise voltage (opposite in phase) between V2 and V3 is superimposed on together, and part M1 noise is eliminated.Noise eliminates Mechanism is also used for noise caused by M2, and eliminating loop M5 by noise offsets.On the contrary, if node V2 and node V3 are not handed over Stream is coupled, and except all M1 noises in node V2, M2 part is also added without the noise offset.
The noise of the active parallel feedback common gate structure of this utility model eliminates mechanism and is different from traditional noise elimination Technology.Matched in traditional noise cancellation technique the noise of device by one it is extra do not have to input resistant matching it is helpful Gain stage is offset.In this case, the noise coefficient of amplifier is determined by the noise coefficient of extra gain stage, and this practicality The noise of new input matching device (M1 and M2) makes M1 and M2 noise contribution and a g by C1 partial offsetsmEqual to (gm1+ gm2) the single common gate transistor with parallel feedback it is the same.
Described above is only preferred embodiment of the present utility model, is not limited to the utility model, it is noted that For those skilled in the art, on the premise of the utility model technical principle is not departed from, can also do Go out some improvement and modification, these improvement and modification also should be regarded as the scope of protection of the utility model.

Claims (8)

  1. A kind of 1. broadband low-power consumption low-noise amplifier applied to wireless sensor network, it is characterised in that：It is included successively Input matching circuit, first order amplifying circuit and the second level amplifying circuit being connected,
    Described first order amplifying circuit uses resistance feedback common source circuit structure, and it is including PMOS MP, NMOS tube MN and instead Feed resistance Rf, source electrode connection the bias voltage vb, the PMOS MP of the PMOS MP drain electrode are with the NMOS tube MN's Drain electrode respectively with the feedback resistance RfOne end be connected, the grid of the PMOS MP and NMOS tube MN grid point Not with feedback resistance RfThe other end and the input matching circuit be connected, the source ground of the NMOS tube MN；
    Described second level amplifying circuit using active parallel feedback common gate circuit structure, it include NMOS tube M1, PMOS M2, PMOS M5, NMOS tube M6, resistance RL1, resistance RL2And electric capacity C1, the resistance RL1One end connection power vd D and another End is connected with the drain electrode of the NMOS tube M1 and the grid of the PMOS M5 respectively, and the grid connection of the NMOS tube M1 is inclined Put voltage vgn, the PMOS M2 grid connection bias voltage vgp, the source electrode of the NMOS tube M1, the PMOS M2 The draining of source electrode and the PMOS M5, the drain electrode of the NMOS tube M6 is connected, and the source electrode of the NMOS tube M1, described The draining of PMOS M2 source electrode and the PMOS MP, the drain electrode of the NMOS tube MN is directly connected to or is connected by a part Connect, the draining of the PMOS M2, the resistance RL2One end be connected with the grid of the NMOS tube M6, the RL2It is another One end is grounded, and the source electrode of the PMOS M5 connects the power vd D, the source ground of the NMOS tube M6, the electric capacity C1 Both ends connect the draining of the NMOS tube M1, the drain electrode of the PMOS M2 respectively；The drain electrode of the NMOS tube M1 is described Output end applied to the broadband low-power consumption low-noise amplifier of wireless sensor network.
  2. 2. the broadband low-power consumption low-noise amplifier according to claim 1 applied to wireless sensor network, its feature It is：Described input matching circuit includes electric capacity CinWith inductance Lin, the electric capacity CinOne end ground connection and the other end with it is described Inductance LinOne end be connected, the LinThe other end and the PMOS MP grid, the grid of the NMOS tube MN and Feedback resistance RfThe other end be connected.
  3. 3. the broadband low-power consumption low-noise amplifier according to claim 2 applied to wireless sensor network, its feature It is：Described inductance LinOne end be the defeated of the broadband low-power consumption low-noise amplifier applied to wireless sensor network Enter end.
  4. 4. the broadband low-power consumption low-noise amplifier according to claim 1 applied to wireless sensor network, its feature It is：Described first order amplifying circuit also includes electric capacity C, and one end of the electric capacity C and the PMOS MP's drains, be described NMOS tube MN drain electrode is connected, and the other end is connected with the source electrode of the NMOS tube M1, the source electrode of the PMOS M2.
  5. A kind of 5. broadband low-power consumption low-noise amplifier applied to wireless sensor network, it is characterised in that：It is included successively Input matching circuit, first order amplifying circuit and the second level amplifying circuit being connected,
    Described first order amplifying circuit uses resistance feedback common source circuit structure, and it is including PMOS MP, NMOS tube MN and instead Feed resistance Rf, source electrode connection the bias voltage vb, the PMOS MP of the PMOS MP drain electrode are with the NMOS tube MN's Drain electrode respectively with the feedback resistance RfOne end be connected, the grid of the PMOS MP and NMOS tube MN grid point Not with feedback resistance RfThe other end and the input matching circuit be connected, the source ground of the NMOS tube MN；
    Described second level amplifying circuit using active parallel feedback common gate circuit structure, it include PMOS M3, NMOS tube M1, PMOS M2, NMOS tube M4, PMOS M5, NMOS tube M6 and electric capacity C1, the grid of the PMOS M3, the NMOS tube M4 Grid connection bias voltage vr, the NMOS tube M1 grid connection bias voltage vgn, the PMOS M2 grid connection Bias voltage vgp, the source electrode of the PMOS M3 and the source electrode of the PMOS M5 connect power vd D, the NMOS tube M4 and The source ground of the NMOS tube M6, the drain electrode of the draining of the PMOS M3, the NMOS tube M1 is with the PMOS M5's Grid is connected, and the draining of the PMOS M2, the drain electrode of the NMOS tube M4 is connected with the grid of the NMOS tube M6, institute State the drain electrode and the drain electrode phase of the NMOS tube M6 of NMOS tube M1 source electrode, the source electrode of the PMOS M2 with the PMOS M5 Connection, the both ends of the electric capacity C1 connect the drain electrode of the NMOS tube M1 and the drain electrode of the PMOS M2 respectively；The NMOS Pipe M1 drain electrode is applied to the output end of the broadband low-power consumption low-noise amplifier of wireless sensor network for described in.
  6. 6. the broadband low-power consumption low-noise amplifier according to claim 5 applied to wireless sensor network, its feature It is：Described input matching circuit includes electric capacity CinWith inductance Lin, the electric capacity CinOne end ground connection and the other end with it is described Inductance LinOne end be connected, the LinThe other end and the PMOS MP grid, the grid of the NMOS tube MN and Feedback resistance RfThe other end be connected.
  7. 7. the broadband low-power consumption low-noise amplifier according to claim 6 applied to wireless sensor network, its feature It is：Described inductance LinOne end be the defeated of the broadband low-power consumption low-noise amplifier applied to wireless sensor network Enter end.
  8. 8. the broadband low-power consumption low-noise amplifier according to claim 5 applied to wireless sensor network, its feature It is：Described first order amplifying circuit also includes electric capacity C, and one end of the electric capacity C and the PMOS MP's drains, be described NMOS tube MN drain electrode is connected, and the other end is connected with the source electrode of the NMOS tube M1, the source electrode of the PMOS M2.
CN201720608416.0U 2017-05-27 2017-05-27 Broadband low-power consumption low-noise amplifier applied to wireless sensor network Expired - Fee Related CN206712752U (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107070425A (en) * 2017-05-27 2017-08-18 苏州大学 Broadband low-power consumption low-noise amplifier applied to wireless sensor network
TWI670934B (en) * 2018-07-16 2019-09-01 瑞昱半導體股份有限公司 Hybrid differential amplifier and method thereof
CN115483893A (en) * 2022-09-02 2022-12-16 电子科技大学 Low-temperature low-noise amplifier circuit without inductor, chip and radio frequency front-end circuit

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107070425A (en) * 2017-05-27 2017-08-18 苏州大学 Broadband low-power consumption low-noise amplifier applied to wireless sensor network
CN107070425B (en) * 2017-05-27 2023-06-06 苏州大学 Broadband low-power-consumption low-noise amplifier applied to wireless sensor network
TWI670934B (en) * 2018-07-16 2019-09-01 瑞昱半導體股份有限公司 Hybrid differential amplifier and method thereof
CN115483893A (en) * 2022-09-02 2022-12-16 电子科技大学 Low-temperature low-noise amplifier circuit without inductor, chip and radio frequency front-end circuit

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