CN101150296A - A low-noise amplifier for radio communication and navigation receiver and its realization method - Google Patents
A low-noise amplifier for radio communication and navigation receiver and its realization method Download PDFInfo
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Abstract
This invention discloses a low noise amplifier used in radio communication and pilot receivers and a realization method, which offsets transistors of common-source and common-grating on a middle inversion region, in which, the supply used is a low-voltage one, a capacitance parallel series array is parallel between the grating and the source of a common-source transistor, and power loss of the noise amplifier is reduced greatly, the ratio of gain-power loss is increased reaching to 20dB/mW to realize match of noise and power gain and reduce requirement to cell volumes by receivers of the radio communication system and pilot system by adjusting set values of the low voltage source and the capacitance parallel-series array and selection of parallel and serial inductors.
Description
Technical Field
The invention belongs to the field of wireless communication and navigation, relates to a low-noise amplifier and an implementation method thereof, and particularly designs a low-noise amplifier for a wireless communication and navigation receiver and an implementation method thereof.
Background
The low noise amplifier is a key module of the radio frequency front end of the receiver of the wireless communication system and the navigation system. The low-noise amplifier amplifies the radio frequency signal as much as possible on the premise of reducing the signal-to-noise ratio deterioration as much as possible so as to reduce the noise introduced by a post-stage module. Nowadays, in order to make a receiver of a wireless communication system and a navigation system smaller and more portable, a battery is usually used to supply power to a receiver circuit, which puts high demands on power consumption of the circuit. For a low noise amplifier, it is necessary to provide as high a gain as possible, so the gain-power consumption ratio becomes an important index for measuring the low noise amplifier. The higher the gain-to-power consumption ratio, the better the low noise amplifier, all other things being equal.
In MOS transistor amplifier and network noise theory, the following parameters are generally defined: the source-drain voltage, source-drain current, gate-source voltage, gate-source capacitance and working frequency of the MOS transistor are respectively V DS ，I DS ，V GS ，C gs Omega, transconductance g m And has the following relationship, 
wherein α, g d0 Are parameters. The power spectral density of the channel noise current due to channel thermal noise can be expressed asWhere k and T are the boltzmann constant and absolute temperature, respectively. The power spectral density of a noise current source connected in series with the grid electrode of the MOS tube is
Wherein
To represent
And
the degree of correlation of (c). Typical reference values for α, γ, δ and c for long channel devices are 1, respectively,
And 0.395.
Common low noise amplifiers bias the common source stage transistors in a strong inversion region, which results in a large gain, but also brings a large power consumption, resulting in a low gain-to-power consumption ratio. In addition, the common low noise amplifier has either noise matching or power gain matching at the input stage, and the two can only be matched. Therefore, the gain-power consumption ratio of the current low noise amplifier can only reach about 10dB/mW at most.
Disclosure of Invention
The invention discloses a low-noise amplifier for a wireless communication and navigation receiver and an implementation method. The low-noise amplifier has the advantages that common-source transistors and common-gate transistors are biased in a medium inversion region, a low-voltage power supply is used as the power supply, a capacitor parallel-serial network is connected between a grid electrode and a source electrode of the common-source transistors in parallel, and the power consumption of the low-noise amplifier is greatly reduced and the gain-power consumption ratio is improved under the condition of ensuring a certain gain through the adjustment of set values of the low-voltage power supply and the capacitor parallel-serial network and the selection of a source degeneration inductor and a series inductor, so that the low-noise amplifier simultaneously achieves noise matching and power gain matching at the input stage, and the requirements of a wireless communication system and a navigation system receiver on the capacity of a battery are reduced.
A low noise amplifier for a wireless communication and navigation receiver comprises a common source stage, a common gate stage, an output matching network, a low voltage bias voltage source and a power supply coupling inductor, wherein the low voltage bias voltage source biases a common source transistor and a common gate transistor in a medium inversion region.
Wherein the common source stage includes:
1. a matching circuit for providing 50 ohm input impedance for an input end of low-noise amplifier is composed of a common source transistor, an input blocking capacitor, a source degeneration inductor, an input series inductor and a capacitor series-parallel network. The grid electrode of the common source transistor is connected with the input series inductor and the A end of the capacitor series-parallel network at the same time, the source electrode of the common source transistor is connected with one end of the source degeneration inductor and the B end of the capacitor series-parallel network at the same time, and the drain electrode of the common source transistor is connected with one end of the power supply coupling inductor; the input blocking capacitor can filter the direct current level of the front stage of the low-noise amplifier; the other end of the source degeneration inductor is grounded, and a common source transistor simultaneously amplifies an input radio frequency signal;
2. the bias resistor and the input blocking capacitor are used for providing bias for the common-source transistor, one end of the bias resistor is connected with the input series inductor, the other end of the bias resistor is connected with the low-voltage bias voltage source, one end of the input blocking capacitor is connected with the bias resistor, and the other end of the input blocking capacitor is connected with the radio-frequency input end;
wherein the common gate comprises:
the circuit for providing a direct current path and an output blocking capacitor for the common-gate transistor comprises the common-gate transistor, a ground coupling inductor and an output blocking capacitor, wherein the grid electrode of the common-gate transistor is grounded, the drain electrode of the common-gate transistor is grounded and is simultaneously coupled with one end of the inductor and one end of the output blocking capacitor, the other end of the ground coupling inductor is grounded, and the other end of the output blocking capacitor is connected with an output matching network.
According to
Calculating the equivalent capacitance C of the capacitor hybrid network ex The RF capacitors in the process library are used to form a capacitor series-parallel network, so that the equivalent capacitance value is C ex Wherein each of α, δ, γ, cIs a process-related constant, C gs And omega is the working frequency of the designed amplifier, namely the gate-source capacitance value of the common-source transistor.
The voltage of the low-voltage bias voltage source is between 0.4V and 0.7V.
A low noise amplifier implementation method for a wireless communication and navigation receiver, comprising the steps of:
step 1: selecting frequency omega as working frequency of designed amplifier
Step 2: selecting a point voltage between 0.4V and 0.7V as the voltage of the low-voltage power supply;
and step 3: selecting one NMOS transistor as a common source transistor in a radio frequency MOS process library
And 4, step 4: and selecting a PMOS transistor with the same length as the common source transistor and a larger width as a common gate transistor in the radio frequency MOS process library.
And 5: the grid electrode of the common source transistor is connected with the input series inductor and the end A of the capacitor series-parallel network at the same time, the source electrode of the common source transistor is connected with one end of the source degeneration inductor and the end B of the capacitor series-parallel network at the same time, the other end of the source degeneration inductor is grounded, the drain electrode of the common source transistor is connected with one end of the power supply coupling inductor, and the input radio frequency signal is amplified; grounding the grid electrode of the common-gate transistor, wherein the drain electrode of the common-gate transistor is respectively grounded and coupled with one end of the inductor and one end of the output blocking capacitor, the other end of the ground coupling inductor is grounded, the other end of the output blocking capacitor is connected with the output matching network to output a radio-frequency signal, and the source electrode of the common-gate transistor is connected with the drain electrode of the common-source transistor; one end of a bias resistor is connected with one end of an input blocking capacitor connected with an input inductor, and the other end of the bias resistor is connected with a low-voltage bias voltage source; one end of the input blocking capacitor is connected with the input series inductor, and the other end of the input blocking capacitor is connected with the radio frequency input;
and 6: calculating and setting equivalent capacitance C of capacitor series-parallel network ex And according to the set C ex Calculating and setting inductance L of source degeneration inductor s And an inductor connected in series with the inputValue L g ；
And 7: and (4) judging whether the gain-power consumption ratio is optimal or not through simulation, if not, turning to the step (2), reselecting the voltage of the low-voltage power supply, and otherwise, ending.
In said step 6, according to
And the gate-source capacitance C of the common-source transistor gs Setting equivalent capacitance C of capacitor series-parallel network ex Wherein, α, δ, γ, c are all constants related to the process, and ω is the working frequency of the designed amplifier.
In the step 6, according to the set equivalent capacitance value C ex Selected gate-source capacitance value C gs And transconductance g m Using the formulaCalculating and setting inductance L of source degeneration inductor s 。
In the step 6, according to the set equivalent capacitance value C ex Selected gate-source capacitance value C gs And the inductance value L of the resulting source degeneration inductor s By the formula
Calculating and setting inductance L of input series inductor g 。
The invention relates to a low noise amplifier used for wireless communication and navigation receiver and the realization method, which has the advantages that:
(1) The common-source and common-gate transistors are biased in the medium inversion region, so that the power consumption of the noise amplifier is greatly reduced and the gain-power consumption ratio is improved under the condition of ensuring a certain gain. The gain-power consumption ratio of the invention reaches 20dB/mW, and is increased by nearly 10dB/mW compared with the maximum value of the existing gain-power consumption ratio.
(2) According to the low-noise amplifier, the noise matching and the power gain matching are simultaneously achieved at the input stage of the low-noise amplifier through the adjustment of the low-voltage power supply, the set value of the capacitor series-parallel network connected between the grid and the source of the common source transistor and the selection of the source degeneration inductor and the series inductor.
(3) The inductor and the capacitor in the invention can be realized by modern integrated circuit technology, so the amplifier with high gain-power consumption ratio and low noise related by the invention not only has simple design, but also has the characteristic of monolithic integration.
Drawings
FIG. 1 is a block diagram of a low noise amplifier for a wireless communication and navigation receiver in accordance with the present invention;
FIG. 2 is a flow chart of a low noise amplification implementation of a wireless communication and navigation receiver according to the present invention;
FIG. 3 is a graph of the S parameter response of a low noise amplifier for a wireless communication and navigation receiver according to the present invention;
FIG. 4 is a graph of minimum noise figure and noise figure for a low noise amplifier for a wireless communication and navigation receiver according to the present invention;
FIG. 5 is a graph of operating power gain and available power gain for a low noise amplifier for a wireless communication and navigation receiver according to the present invention;
FIG. 6 is a stability curve of a low noise amplifier for a wireless communication and navigation receiver according to the present invention;
fig. 7 is a smith chart of the input port reflection coefficient S11 and the output port reflection coefficient S22 of a low noise amplifier for a wireless communication and navigation receiver according to the present invention.
In the figure: 1. input blocking capacitor 2, bias resistor 3 and input series inductor
4. Capacitor series-parallel network 5, source degeneration inductor 6, power supply coupling inductor 7 and common source transistor
8. Common-gate transistor 9, ground coupling inductor 10, low-voltage bias voltage source
11. Output blocking capacitor 12, output matching network
Detailed Description
The present invention will be described in further detail below with reference to the accompanying drawings.
The invention discloses a low-noise amplifier for a wireless communication and navigation receiver and an implementation method thereof.A power supply used is a low-voltage power supply, a capacitor parallel-series network is connected in parallel between a grid and a source of a common-source transistor, so that the simultaneous matching of input noise and power gain is realized, and the low-noise amplifier provided by the invention simultaneously has higher power gain, lower noise coefficient and higher gain-power consumption ratio through the adjustment of set values of the low-voltage power supply and the capacitor parallel-series network and the selection of a source degeneration inductor and a series inductor, so that the requirements of a wireless communication system and the navigation system receiver on the capacity of a battery can be reduced.
A high-gain-power-consumption-ratio low-noise amplifier for a receiver of a wireless communication system and a navigation system is shown in figure 1, and a circuit diagram of the high-gain-power-consumption-ratio low-noise amplifier provided by the invention is provided, and the high-gain-power-consumption-ratio low-noise amplifier is a folded cascode amplifier and consists of a common source stage, a common gate stage, an output matching network 12, a low-voltage bias voltage source 10 and a power supply coupling inductor 6. The common source stage is composed of a common source transistor 7, a source degeneration inductor 5, an input series inductor 3 and a capacitor series-parallel network 4. The low voltage bias voltage source 10 provides bias to the common source transistor 7 through a bias resistor 2 and biases it in the middle inversion region. In this example, the low voltage bias voltage source 10 is 0.6V and biases the common source transistor 7 and the common gate transistor 8 in the medium inversion region.
Wherein the common source stage includes: a matching circuit for providing 50 omega input impedance for the input end of the low noise amplifier, a bias resistor 2 for providing bias for a common source transistor 7 and an input blocking capacitor 1. The matching circuit consists of a common source transistor 7, a source degeneration inductor 5, an input series inductor 3 and a capacitor parallel-serial network 4, wherein the grid electrode of the common source transistor 7 is simultaneously connected with the input series inductor 3 and the end A of the capacitor parallel-serial network 4, the source electrode of the common source transistor 7 is simultaneously connected with one end of the source degeneration inductor 5 and the end B of the capacitor parallel-serial network 4, the drain electrode of the common source transistor is connected with one end of a power supply coupling inductor 6, the other end of the source degeneration inductor 5 is grounded, and the common source transistor 7 simultaneously amplifies an input audio signal; one end of the bias resistor 2 is connected with the input series inductor 3, the other end is connected with the low-voltage bias voltage source 10, one end of the input blocking capacitor 1 is connected with the bias resistor 2, and the other end is connected with the radio frequency input end.
The common gate comprises: the circuit for providing a direct current path and an output blocking direct current for the common-gate transistor 8 comprises the common-gate transistor 8, a ground coupling inductor 9 and an output blocking direct current capacitor 11, wherein the grid electrode of the common-gate transistor 8 is grounded, the drain electrode of the common-gate transistor is simultaneously grounded and coupled with one end of the inductor 9 and one end of the output blocking direct current capacitor 11, the other end of the ground coupling inductor 9 is grounded, and the other end of the output blocking direct current capacitor 11 is connected with an output matching network 12.
A low noise amplification implementation method for wireless communication and navigation receivers, the design flow is shown in FIG. 2, and the method comprises the following steps:
the method comprises the following steps: selecting a frequency omega as the working frequency of the designed amplifier;
step two: selecting a point voltage between 0.4V and 0.7V as the voltage of the low-voltage power supply; this voltage will be applied directly between the gates and sources of the common-source transistor 7 and the common-gate transistor 8 and bias them in the medium inversion region, ensuring the possibility of low power consumption of the device.
The reason for selecting the voltage of the low-voltage bias voltage source 10 between 0.4V and 0.7V is that for a short-channel transistor, under the condition of considering second-order effects such as carrier velocity saturation effect, mobility degradation and the like, the drain-source current of the MOS transistor from weak inversion to strong inversion can be uniformly expressed as follows:
wherein, the first and the second end of the pipe are connected with each other,
where the parameter mu 0 ，C ox ，n，V T ，V th ，θ，v sat Respectively, carrier mobility under a low electric field, unit area gate oxide layer capacitance, sub-threshold slope factor, thermodynamic voltage, threshold voltage, mobility degradation coefficient and saturation rate. W, L, λ, V GS ，V DS Respectively representing the width, the length, the channel length modulation factor, the grid-source voltage and the drain-source voltage of the transistor.
According to transconductance g m The unified expression of transconductance from weak inversion to strong inversion can be obtained as follows:
using the above equation, and according to the definition of the cut-off frequency:
wherein, C GS 、C GB Respectively representing the gate-source capacitance and the gate-body capacitance of the transistor.
It is possible to obtain:
wherein, the first and the second end of the pipe are connected with each other,
under the condition of deep submicron process parameters, the following steps are performed:
as can be seen from the formula (6), the extreme point of the formula (5) occurs approximately at V GS Equal to between 0.4V and 0.7V. And thisThe gate-source voltage corresponds to the middle inversion region of the MOS transistor. It can be seen that by setting the power supply voltage of the device at a suitable value of 0.4V to 0.7V, the gain-to-power consumption ratio of the device will approach the optimum value.
Step three: selecting an NMOS transistor in a radio frequency MOS process library as a common source transistor 7;
step four: selecting a PMOS transistor with the same length as the common source transistor 7 and larger width as a common gate transistor 8 from a radio frequency MOS process library;
step five: the grid electrode of a common source transistor 7 is connected with the input series inductor 3 and the end A of the capacitor series-parallel network 4 at the same time, the source electrode of the common source transistor is connected with one end of a source degeneration inductor 5 and the end B of the capacitor series-parallel network 4 at the same time, the other end of the source degeneration inductor 5 is grounded, and the drain electrode of the common source transistor 7 is connected with one end of a power supply coupling inductor 6 to amplify an input radio frequency signal; grounding the grid electrode of the common-gate transistor 8, wherein the drain electrode of the common-gate transistor is respectively grounded and coupled with one end of an inductor 9 and one end of an output blocking capacitor 11, the other end of the grounded coupling inductor 9 is grounded, the other end of the output blocking capacitor 11 is connected with an output matching network 12 and outputs a radio-frequency signal, and the source electrode of the common-gate transistor 8 is connected with the drain electrode of the common-source transistor 7; one end of a bias resistor 2 is connected with one end of an input blocking capacitor 1 connected with an input series inductor 3, and the other end of the bias resistor is connected with a low-voltage bias voltage source 10; one end of the input blocking capacitor 1 is connected with the input series inductor 3, and the other end is connected with the radio frequency input;
step six: according to
And a common source
Gate-source capacitance C of transistor 7 gs Calculating the equivalent capacitance C of the capacitor series-parallel network 4 ex The radio frequency capacitors in the process library are used to form a capacitor series-parallel network 4, so that the equivalent capacitance value is C ex If the RF capacitance is C ex Twice or more, the capacitance series-parallel network 4 adopts a parallel connection mode, if the radio frequency capacitance value is C ex ToIf the capacitance is less than the multiple, the capacitance series-parallel network 4 adopts a series connection form, and if the radio frequency capacitance is C ex Between one and two times, the capacitor series-parallel network 4 adopts a series-parallel connection mode after series connection.
According to the set equivalent capacitance C of the capacitor series-parallel network 4 ex The gate-source capacitance value C of the selected common-source transistor 7 gs And transconductance g m By the formulaCalculating the inductance L of the source degeneration inductor 5 s 。
According to the set equivalent capacitance C of the capacitor series-parallel network 4 ex The gate-source capacitance value C of the selected common source transistor 7 gs And the resulting inductance value L of the source degeneration inductance 5 s By the formula
Calculating the inductance L of the input series inductor 3 g 。
The value of each parameter is based on the fact that according to the small-signal equivalent circuit of the embodiment, the optimal source impedance of the noise of the low-noise amplifier is obtained as follows:
wherein, C tot ＝C gs +C ex ，C ex Is the equivalent capacitance value of the capacitor series-parallel network 4, omega is the working frequency of the low noise amplifier of the invention, C gs Is the gate-source capacitance, L, of the common-source transistor 7 s The inductance value of the degeneration inductance 5 is derived.
According to the noise matching conditions, the method comprises the following steps:
wherein L is g The inductance value of the input series inductance 3.
According to the power matching conditions, the method comprises the following steps:
(8) Equations (11) are the matching conditions that are optimal for both gain and noise.
Due to the following under typical deep submicron process parameters:
substituting the expression (12) into the expressions (9) and (10) shows that the expressions (9) and (10) are equivalent. Then, the optimum matching conditions for power gain and noise are obtained at the same time as the equations (8), (10), and (11). Therefore, if the value L of the source degeneration inductance 5 is selected according to the method in this step s The value L of the input series inductance 3 g And the value of the capacitor series-parallel network 4, the low-noise amplifier of the invention can simultaneously achieve power gain optimization and noise matching optimization.
Step seven: judging whether the gain-power consumption ratio is optimal or not through simulation; simulating and comparing the minimum noise curve and the noise curve of the amplifier, and if the two curves are superposed at the working frequency point, indicating that the noise matching optimization is achieved; simulating an available power gain curve and a working power gain curve of the amplifier and comparing, if the two curves are superposed at a working frequency point, the power gain optimization is achieved; simulating a stability curve of the amplifier, wherein if the curves are all larger than 1 in the working frequency range in the graph, the amplifier is always stable; simulating a Smith circular diagram of an input port reflection coefficient S11 and an output port reflection coefficient S22 of the amplifier, wherein if a curve passes through the circle center at a working frequency point in the diagram, the amplifier is matched with 50 omega standard impedance at the input port and the output port; if the above conditions are all met, the gain-power consumption ratio of the low-noise amplifier is optimal, if the gain-power consumption ratio is not optimal, the step II is carried out, the voltage of the low-voltage power supply is reselected, and if the gain-power consumption ratio is not optimal, the step II is ended.
In this example, under the environment of Red Hat Advanced Server 3.0 operating system, the Cadence design software and the SMIC 0.18 μm RF CMOS process are used to perform S parameter simulation test on the design example of the present invention in the frequency band from 1GHz to 2GHz, and the test results are as follows:
as shown in fig. 3, the low noise amplifier designed in this embodiment has a forward gain of 18.4dB and a reverse gain of-28.74 dB at an operating frequency of 1.57 GHz. From the above indexes, it can be seen that the low noise amplifier designed by the present invention has proper power gain and reasonable leakage.
As shown in fig. 4, the minimum noise figure (NFmin) and the Noise Figure (NF) curves of the low noise amplifier designed in this embodiment almost coincide with 1dB at the operating frequency, which indicates that the circuit achieves good noise matching and the noise figure is very low, about 1dB.
As shown in fig. 5, the operating power Gain (GP) and the available power gain curve (GA) of the low noise amplifier designed in this embodiment almost coincide with 18dB at the operating frequency of 1.57GHz, which shows that the circuit also achieves good power matching.
As shown in fig. 6, the stability factor (Kf) curve of the low noise amplifier designed in this embodiment is always greater than 1, which shows that this example is stable in the operating frequency band.
As shown in fig. 7, for the smith circular diagram of the input port reflection coefficient S11 and the output port reflection coefficient S22 of the present embodiment, the curves S11 and S22 of the designed example almost pass through the origin on the smith circular diagram, which indicates that the input and output ports of the example are well matched to the standard impedance of 50 Ω.
From the above conclusions, the present example better satisfies all the optimal conditions, andthrough DC simulation, the example was found to draw about 1.54mA of current at a supply voltage of 0.6V, with a power consumption of only 927 μ W and a gain-to-power consumption ratio of
From the above test results, it can be seen that the high gain-to-power consumption low noise amplifier for the receiver of the wireless communication system and the navigation system according to the present invention achieves 50 Ω impedance matching at the input and output terminals, and has a very high gain-to-power consumption ratio and a very low noise figure while maintaining reasonable values of other parameters.
Claims (7)
1. A low noise amplifier for a wireless communication and navigation receiver, comprising a common gate, an output matching network, and a power coupling inductor, wherein: the low-voltage bias voltage source biases the common-source transistor and the common-gate transistor in a medium inversion region;
the common source stage includes: the matching circuit is used for providing 50-ohm input impedance for an input end of a low-noise amplifier and consists of a common source transistor, an input blocking capacitor, a source degeneration inductor, an input series inductor and a capacitor series-parallel network, wherein the grid electrode of the common source transistor is simultaneously connected with the A end of the input series inductor and the A end of the capacitor series-parallel network, the source electrode of the common source transistor is simultaneously connected with one end of the source degeneration inductor and the B end of the capacitor series-parallel network, and the drain electrode of the common source transistor is connected with one end of a power supply coupling inductor; the input blocking capacitor can filter the direct current level of the front stage of the low-noise amplifier; the other end of the source degeneration inductor is grounded, and a common source transistor simultaneously amplifies an input radio frequency signal;
the common-source stage also comprises a bias resistor and an input blocking capacitor which are used for providing bias for the common-source transistor, one end of the bias resistor is connected with the input series inductor, the other end of the bias resistor is connected with a low-voltage bias voltage source, one end of the input blocking capacitor is connected with the bias resistor, and the other end of the input blocking capacitor is connected with the radio-frequency input end;
the common grid stage consists of a common grid transistor, a ground coupling inductor and an output blocking capacitor, the grid electrode of the common grid transistor is grounded, a drain electrode of the common grid transistor is grounded and is simultaneously connected with one end of the coupling inductor and one end of the output blocking capacitor, the other end of the ground coupling inductor is grounded, and the other end of the output blocking capacitor is connected with an output matching network.
2. A low noise amplifier for a wireless communication and navigation receiver, as defined in claim 1, wherein: the equivalent capacitance value C of the capacitor series-parallel network ex According to
Calculated and formed by connecting radio frequency capacitors in a process library to make the equivalent capacitance value thereof be C ex Where α, δ, γ, C are all process-dependent constants, C gs And omega is the working frequency of the designed amplifier.
3. A low noise amplifier for a wireless communication and navigation receiver, as defined in claim 1, wherein: the voltage of the low-voltage bias voltage source is between 0.4V and 0.7V.
4. A method for implementing a low noise amplifier for a wireless communication and navigation receiver, comprising: comprises the following steps:
the method comprises the following steps: selecting a frequency omega as the working frequency of the designed amplifier;
step two: selecting a point voltage between 0.4V and 0.7V as the voltage of the low-voltage power supply;
step three: selecting an NMOS transistor as a common source transistor in a radio frequency MOS process library;
step four: selecting a PMOS transistor with the same length as a common source transistor and a larger width as a common gate transistor from a radio frequency MOS process library;
step five: the grid electrode of the common source transistor is connected with the input series inductor and the end A of the capacitor series-parallel network at the same time, the source electrode of the common source transistor is connected with one end of the source degeneration inductor and the end B of the capacitor series-parallel network at the same time, the other end of the source degeneration inductor is grounded, the drain electrode of the common source transistor is connected with one end of the power supply coupling inductor, and the input radio frequency signal is amplified; grounding the grid electrode of the common-gate transistor, wherein the drain electrode of the common-gate transistor is respectively grounded and coupled with one end of the inductor and one end of the output blocking capacitor, the other end of the ground coupling inductor is grounded, the other end of the output blocking capacitor is connected with the output matching network to output a radio-frequency signal, and the source electrode of the common-gate transistor is connected with the drain electrode of the common-source transistor; one end of a bias resistor is connected with one end of an input blocking capacitor connected with an input inductor, and the other end of the bias resistor is connected with a low-voltage bias voltage source; one end of the input blocking capacitor is connected with the input series inductor, and the other end of the input blocking capacitor is connected with the radio frequency input;
step six: calculating and setting equivalent capacitance C of capacitor series-parallel network ex And according to the set C ex Calculating and setting inductance L of source degeneration inductor s And inductance L of input series inductor g ；
Step seven: and judging whether the gain-power consumption ratio reaches the optimum through simulation, if not, turning to the step two, reselecting the voltage of the low-voltage power supply, and otherwise, ending.
5. A method for implementing a low noise amplifier for a wireless communication and navigation receiver according to claim 4, wherein: in the sixth step, according to
And the gate-source capacitance value C of the common-source transistor gs Setting equivalent capacitance C of capacitor series-parallel network ex Wherein, α, δ, γ, c are all constants related to the process, and ω is the working frequency of the designed amplifier.
6. A method for a wireless communication and navigation receiver according to claim 4The noise amplifier implementation method is characterized by comprising the following steps: in the sixth step, according to the set equivalent capacitance value C ex Selected gate-source capacitance value C gs And transconductance g m By the formula
Calculating and setting inductance L of source degeneration inductor s 。
7. A method for implementing a low noise amplifier for a wireless communication and navigation receiver according to claim 4, wherein: in the sixth step, according to the set equivalent capacitance value C ex Selected gate-source capacitance value C gs And the inductance value L of the resulting source degeneration inductor s By the formula
Calculating and setting inductance L of input series inductor g 。
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| CN102355200A (en) * | 2011-08-01 | 2012-02-15 | 北京航空航天大学 | Single-ended input and differential output parallel dual-frequency low noise amplifier and design method thereof |
| CN102386855A (en) * | 2010-08-31 | 2012-03-21 | 韩国科学技术院 | Low noise amplifier having both ultra-high linearity and low noise characteristic and radio receiver including the same |
| CN103051299A (en) * | 2011-10-17 | 2013-04-17 | 中国科学院微电子研究所 | Programmable gain amplifier applied to transmitting end of communication system |
| CN103454654A (en) * | 2013-09-11 | 2013-12-18 | 中国电子科技集团公司第五十四研究所 | Configurable matching network used at satellite navigation radio frequency front end |
| CN103563250A (en) * | 2011-05-19 | 2014-02-05 | 美国博通公司 | Amplifier |
| CN105426570A (en) * | 2015-10-28 | 2016-03-23 | 西安电子科技大学 | GaN HEMT large signal model improvement method based on active compensation sub-circuit |
| CN109855520A (en) * | 2019-01-02 | 2019-06-07 | 广州大学 | A kind of micro-nano precision measure displacement sensor, system and preparation method |
-
2007
- 2007-11-07 CN CNB2007101769529A patent/CN100542012C/en not_active Expired - Fee Related
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102386855A (en) * | 2010-08-31 | 2012-03-21 | 韩国科学技术院 | Low noise amplifier having both ultra-high linearity and low noise characteristic and radio receiver including the same |
| CN102386855B (en) * | 2010-08-31 | 2014-12-10 | 韩国科学技术院 | Low noise amplifier having both ultra-high linearity and low noise characteristic and radio receiver including the same |
| CN103563250A (en) * | 2011-05-19 | 2014-02-05 | 美国博通公司 | Amplifier |
| CN102355200A (en) * | 2011-08-01 | 2012-02-15 | 北京航空航天大学 | Single-ended input and differential output parallel dual-frequency low noise amplifier and design method thereof |
| CN102355200B (en) * | 2011-08-01 | 2014-03-26 | 北京航空航天大学 | Single-ended input and differential output parallel dual-frequency low noise amplifier and design method thereof |
| CN103051299A (en) * | 2011-10-17 | 2013-04-17 | 中国科学院微电子研究所 | Programmable gain amplifier applied to transmitting end of communication system |
| CN103051299B (en) * | 2011-10-17 | 2015-05-20 | 中国科学院微电子研究所 | Programmable gain amplifier applied to transmitting end of communication system |
| CN103454654A (en) * | 2013-09-11 | 2013-12-18 | 中国电子科技集团公司第五十四研究所 | Configurable matching network used at satellite navigation radio frequency front end |
| CN103454654B (en) * | 2013-09-11 | 2015-03-18 | 中国电子科技集团公司第五十四研究所 | Configurable matching network used at satellite navigation radio frequency front end |
| CN105426570A (en) * | 2015-10-28 | 2016-03-23 | 西安电子科技大学 | GaN HEMT large signal model improvement method based on active compensation sub-circuit |
| CN105426570B (en) * | 2015-10-28 | 2019-03-26 | 西安电子科技大学 | GaN HEMT large-signal model improved method based on active compensation sub-circuit |
| CN109855520A (en) * | 2019-01-02 | 2019-06-07 | 广州大学 | A kind of micro-nano precision measure displacement sensor, system and preparation method |
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