CN107707203A - A kind of ultra-wideband amplifier circuit using inductance cancellation technology - Google Patents
A kind of ultra-wideband amplifier circuit using inductance cancellation technology Download PDFInfo
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- CN107707203A CN107707203A CN201710827355.1A CN201710827355A CN107707203A CN 107707203 A CN107707203 A CN 107707203A CN 201710827355 A CN201710827355 A CN 201710827355A CN 107707203 A CN107707203 A CN 107707203A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/08—Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements
- H03F1/14—Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements by use of neutralising means
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/42—Modifications of amplifiers to extend the bandwidth
- H03F1/48—Modifications of amplifiers to extend the bandwidth of aperiodic amplifiers
- H03F1/483—Modifications of amplifiers to extend the bandwidth of aperiodic amplifiers with field-effect transistors
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/56—Modifications of input or output impedances, not otherwise provided for
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/222—A circuit being added at the input of an amplifier to adapt the input impedance of the amplifier
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45031—Indexing scheme relating to differential amplifiers the differential amplifier amplifying transistors are compositions of multiple transistors
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45576—Indexing scheme relating to differential amplifiers the IC comprising input impedance adapting or controlling means
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45662—Indexing scheme relating to differential amplifiers the LC comprising inductive coupled loading elements
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Abstract
The invention discloses a kind of ultra-wideband amplifier circuit using inductance cancellation technology, including active bias circuit, inductance to offset the cascode structure of element, power vd D and two transistor stacks, wherein, active bias circuit is connected with power vd D.Inductance, which offsets element, includes inductance L2 and inductance L3, and two transistors in cascode structure are respectively transistor M1 and transistor M2, and transistor M1 source electrodes are grounded by inductance L2, and grid voltage is inputted after transistor M1 grid series resistors R1.Transistor M2 source electrodes are connected with transistor M1 drain electrodes, and transistor M2 grids are grounded by electric capacity C2, and grid voltage is inputted after transistor M2 grid series resistors R3, is connected after transistor M3 drain electrode tandem electric inductances L3 with active bias circuit.GHz (GHz) is arrived in the working frequency covering megahertz (MHz) of the present invention, and bandwidth is suitable with distributed amplifier, and element circuit gain performance, power consumption and chip area etc. are better than distributed frame.
Description
Technical field
The present invention relates to twireless radio-frequency communication technical field, specifically a kind of ultra wide band using inductance cancellation technology amplifies
Device circuit.
Background technology
In recent years, with high speed data transfers, fiber optic communication, wideband electromagnetic spectrum monitoring, software radio, cognition nothing
The development of line electric system etc., radio frequency transceiver is using more and more extensive.Broad band amplifier is as most important in radio frequency transceiver
One of functional module, in transmitters as power amplifier, its performance determines the transmission power and efficiency of emitter；Connecing
Low-noise amplifier is used as in receipts machine, positioned at receiver front end, its performance directly determines sensitivity and the dynamic model of receiver
Enclose.For currently to the application demand of broad band amplifier, traditional solution is to be covered each by different frequency scope multiple
Amplifier in parallel use, with reach covering continuous bandwidth purpose.When traditional solution is applied, due to including multiple points
Not Fu Gai different frequency scope amplifier, cause equipment volume big, corresponding cost is high, and the reliability of equipment reduces；In addition,
Due to needing multiple amplifiers to work simultaneously, power consumption is often larger.
For the deficiency of traditional solution, some technologies of existing proposition are attempted to cover using single amplifier circuit
Lid broad frequency range, i.e., with all frequency ranges required for a ultra-wideband amplifier covering.Some expansions currently proposed
The method of amplifier bandwidth includes parallel feedback that distributed frame, transformer feedback, inductance and resistance are formed etc..But this
Except distributed frame in a little technologies, almost it can ensure that the working frequency of amplifier is covered from close to direct current without a kind of technology
Low frequency to the high frequency more than tens GHzs (GHz).And the amplifier of distributed frame is present that element circuit gain is low, power consumption
With chip area it is big the deficiencies of.Therefore, carry out bandwidth it is suitable with distributed amplifier, and element circuit gain performance, power consumption and
The ultra-wideband amplifier research better than distributed frame such as chip area has great importance, and currently rarely has the circuit of correlation
Structure proposes.
The content of the invention
It is an object of the invention to overcome the deficiencies of the prior art and provide a kind of ultra wide band using inductance cancellation technology
GHz (GHz) is arrived in amplifier circuit, its working frequency covering megahertz (MHz), and bandwidth is suitable with distributed amplifier, and single
First circuit gain performance, power consumption and chip area etc. are better than distributed frame.
The purpose of the present invention is achieved through the following technical solutions：A kind of ultra wide band using inductance cancellation technology amplifies
Device circuit, including active bias circuit, inductance offset the cascode structure of element, power vd D and two transistor stacks,
The active bias circuit is connected with power vd D；The inductance, which offsets element, includes inductance L2 and inductance L3, the common source-common
Two transistors in grid structure are respectively transistor M1 and transistor M2, and the transistor M1 source electrodes are grounded by inductance L2,
Grid voltage is inputted after transistor M1 grid series resistors R1；The transistor M2 source electrodes connect with transistor M1 drain electrodes, transistor M2
Grid is grounded by electric capacity C2, and grid voltage is inputted after transistor M2 grid series resistors R3, and transistor M3 drains after tandem electric inductance L3
It is connected with active bias circuit；Coupled between the inductance L2 and inductance L3 by transformer, to offset inductance L2 to height
The influence of frequency gain；The grid of the transistor M1 is connected with input port, the circuit between inductance L3 and active bias circuit
It is provided with output port.
In the design of broad band amplifier, the parasitism of grid to source electrode, grid to drain electrode, the drain-to-source of transistor is electric
Appearance is the principal element for the characteristic frequency and limiting circuit bandwidth broadning for determining transistor.The expansion major limitation of low frequency bandwidth in
For grid to the electric capacity of source electrode, being embodied in causes the quality factor of the input matching network frequency in low frequency very high, it is difficult to real
The covering of existing broad frequency range；And the expansion of front end bandwidth is mainly by grid to the electric capacity (i.e. miller capacitance) of drain electrode and drain electrode
To the electric capacity of source electrode, being embodied in the presence of this two electric capacity causes the high-frequency gain of transistor to be roll-offed rapidly with frequency.
The transistor M1 source electrodes of the present invention are grounded by inductance L2 and form common source transistors, and transistor M2 grids pass through electric capacity
C2 ground connection forms gate transistor altogether., can using the transistor M1 and transistor M2 cascode structures formed during present invention application
High-frequency gain caused by significantly to weaken miller capacitance roll-offs, and then realizes the expansion of high frequency bandwidth.
Being connected on the inductance L2 of common source transistors source electrode can be such that the input of high frequency matches more preferably, and its principle is inductance L2
Partial offset electric capacity of the grid to source electrode, so as to reducing the quality factor of input matching network.But because inductance sheet
Negative-feedback is introduced in matter, because the frequency response characteristic of inductance determines the high-frequency gain of its meeting severe exacerbation amplifier；And
The electric capacity of drain-to-source can be compensated by being connected on the inductance L3 of common gate transistor drain electrode, improve the high-frequency gain of amplifier.This
Invention is being connected on introducing coupling between common source transistors source electrode and the altogether inductance of gate transistor drain electrode, can maintain and be connected on altogether
Effect of the inductance of source transistor source electrode to input matching, and eliminate evil of the source inductance to high-frequency gain of common source transistors
Change, realize the broadening of high frequency bandwidth.
During present invention application, signal is inputted by input port, and the cascode structure by two transistor stacks is amplified
Afterwards, exported by output port.
Further, a kind of ultra-wideband amplifier circuit using inductance cancellation technology, in addition to feedback circuit, it is described anti-
Current feed circuit one end is connected with transistor M1 grids, and its other end is connected on the circuit between inductance L3 and output port.This hair
During bright application, electric capacity C1 is used to obstruct direct current signal, and the effect of feedback circuit is the quality factor for reducing input matching network
(weakening the grid of transistor to influence of the parasitic capacitance to bandwidth broadning of source electrode), realize by the bandwidth of operation of amplifier to
Low frequency end is expanded.
Further, a kind of ultra-wideband amplifier circuit using inductance cancellation technology, in addition to input matching circuit, institute
Input matching circuit is stated to be serially connected with the circuit between transistor M1 grids and input port including inductance L1, the inductance L1.
During present invention application, the matching of circuit is that inductance L1 is completed jointly with the inductance L2 for being connected on common source transistors source electrode, inductance
L2 can make the high band of circuit realize preferably matching.
Further, the active bias circuit includes transistor M3, inductance L4, resistance R4 and electric capacity C3, the crystal
Pipe M3 source electrodes are connected with inductance L3, are connected after transistor M3 drain electrode tandem electric inductances L4 with power vd D, transistor M3 drain electrodes pass through electricity
Hold C3 ground connection, resistance R4 both ends connect with transistor M3 grid and drain electrode respectively.
The biasing circuit of traditional single-chip integration amplifier circuit either resistance or is collectively formed by the two by inductance
Real-time performance, inductance or resistance bias circuit construction when the working frequency of circuit needs to be extended to relatively low (such as below 1GHz),
The inductance value needed is larger, and the chip area taken when being realized on piece is larger, and cost is higher.In addition, it can increase extra straight
Flow power consumption.Traditional bandwidth of operation is extended to close in the amplifier monolithic integrated optical circuit of direct current, and also some puts biasing circuit
Realized outside piece, in this method in practice due to being related to gold wire bonding etc., it appears it is very inconvenient, while add into
This.
The impedance value when active bias circuit of the present invention is as load can be adjusted by changing resistance R4, and active inclined
Electric capacity C3 and inductance L4 in circuits are the supplements of the biasing circuit to transistor 3 and resistance R4 compositions, are mainly used to compensate
The biasing circuit that transistor 3 and resistance R4 are formed during high frequency poor deficiency of chokes characteristic in high frequency.The present invention passes through introducing
Follow-on active bias circuit can ensure that the frequency from low frequency close to direct current reaches the frequency model of tens GHzs to high frequency
There is preferable chokes characteristic in enclosing, and then can effectively avoid the deficiency of conventional bias circuit.
Further, the transistor in the cascode structure is N-channel transistor, p channel transistor, high electronics
Any one in mobility transistor and counterfeit HEMT.
In summary, it is of the invention to have following advantage compared with existing wideband circuit topology：The frequency coverage model of the present invention
Enclose can from the low frequency close to direct current to the high frequency of more than half of technology characteristics frequency, octave bandwidth can reach 200 with
On, its bandwidth can be comparable with the distributed frame for the most wide bandwidth for being currently able to realize, and chip area and gain etc. are remote
Better than distributed frame.Alternatively, fiber optic communication and software radio etc. can be widely used in substitutional theorem formula amplifier
In system diagram.
Brief description of the drawings
Accompanying drawing described herein is used for providing further understanding the embodiment of the present invention, forms one of the application
Point, do not form the restriction to the embodiment of the present invention.In the accompanying drawings：
Fig. 1 is the circuit theory diagrams of embodiment 1；
Fig. 2 is the circuit structure block diagram of the amplifier circuit shown in cascade three-level Fig. 1；
Fig. 3 is Fig. 2 circuit theory diagrams；
Fig. 4 is the parameters simulation result of three-stage cascade amplifier shown in Fig. 2.
Embodiment
For the object, technical solutions and advantages of the present invention are more clearly understood, with reference to embodiment and accompanying drawing, to this
Invention is described in further detail, and exemplary embodiment of the invention and its explanation are only used for explaining the present invention, do not make
For limitation of the invention.
Embodiment 1：
As shown in figure 1, a kind of ultra-wideband amplifier circuit using inductance cancellation technology, including active bias circuit, electricity
The cascode structure of element, input matching circuit, feedback circuit, power vd D and two transistor stacks is offset in sense, wherein,
The inductance of the present embodiment, which offsets element, includes inductance L2 and inductance L3, and the transistor in cascode structure is N-channel crystal
Any one in pipe, p channel transistor, HEMT and counterfeit HEMT, shown in Fig. 1
For N-channel transistor.Two transistors in the cascode structure of the present embodiment are respectively transistor M1 and transistor M2,
Transistor M1 source grounds, inductance L2 are serially connected with the circuit between transistor M1 source electrodes and ground.The transistor M2 of the present embodiment
Source electrode and transistor M1 drain electrode are connected, and transistor M2 grids are grounded by electric capacity C2, after transistor M3 drain electrode tandem electric inductances L3 with
Active bias circuit connects.The transistor M1 grids of the present embodiment are serially connected with resistance R1, and transistor M2 grids are serially connected with resistance R3,
Directly by resistance R1, resistance R3 respectively to transistor M1 grids, transistor M2 grid biasings when the present embodiment is applied.This reality
Apply and coupled between the inductance L2 of example and inductance L3 by transformer, coefficient of coup k, coupled to offset inductance L2 to high frequency
The influence of gain.The transistor M1 of the present embodiment grid is connected with input port, between inductance L3 and active bias circuit
Circuit is provided with output port.
The feedback circuit of the present embodiment includes electric capacity C1 and the resistance R2 with electric capacity C1 series windings, feedback circuit one end and crystal
Pipe M1 grids are connected, and its other end is connected on the circuit between inductance L3 and output port.Wherein, electric capacity C1 effect is resistance
Stopping direct current signal, transistor M1 drain bias is avoided to influence transistor M1 grid bias.
The input matching circuit of the present embodiment includes inductance L1, wherein, inductance L1 is serially connected with transistor M1 grids and input
On circuit between port.
The active bias circuit of the present embodiment includes transistor M3, inductance L4, resistance R4 and electric capacity C3, wherein, inductance L4
Drain and connect with transistor M3, transistor M3 drain electrodes are grounded by electric capacity C3, the resistance R4 both ends grid with transistor M3 respectively
Connected with drain electrode.The active bias circuit of the present embodiment is connected especially by its transistor M3 source electrodes with inductance L3, and passes through electricity
The other end of the relative connection transistor M3 drain electrode ends of sense L4 is connected with power vd D.The present embodiment is in implementation process in order to reduce
Power consumption, transistor M3 size typically select less size.Resistance R4 resistance then selects according to the drain current of circuit.This
The introducing of the modified active bias circuit of embodiment can have when the working frequency of circuit is extended to close to the low frequency of direct current
Effect avoids being introduced into the inductance (larger size is corresponded in monolithic integrated optical circuit) of larger inductance value, and then reduces chip area,
Reduce cost；Meanwhile the additional parasitic parameter for also avoiding larger inductance from bringing, improve circuit performance.
When the present embodiment is applied, cascode structure transistor, which is used to reduce, influences the Miller effect that high frequency bandwidth is expanded,
Realize the expansion of high frequency bandwidth；Inductance offsets element and is used to reduce degeneration of the transistor source inductance to high-frequency gain, opens up
Open the high frequency bandwidth of amplifier；Feedback circuit is used for reducing the quality factor of input matching network, expands low frequency bandwidth；Input
The series inductance L1 of distribution route input is completed, and circuit is had preferable return loss；Active bias circuit is by transistor
M3 and passive element inductance L4, resistance R4 and electric capacity C3 are collectively formed, to overcome traditional inductance or resistance biasing circuit to exist
Frequency coverage size or the big deficiency of power consumption when close to direct current.The basic thought of the present embodiment is to use multiple technologies
The negative influence of above-mentioned parasitic capacitance is offset, realizes the expansion of amplifier bandwidth.
When the circuit structure that the present embodiment proposes is used for the IC design in the techniques such as CMOS or GaAs, amplifier
Bandwidth can exceed transistors characteristics frequency more than half, can be widely used in fiber optic communication, software radio and
In the systems such as wideband electromagnetic spectrum monitoring.
Embodiment 2：
The present embodiment is made that on the basis of embodiment 1 to be limited further below：The present embodiment has cascaded three-level implementation
In case 1 amplifier circuit unit (amplifier in practice typically will multi-stage cascade meet the need to indexs such as gains
Ask, every stage circuit of cascade is commonly referred to as an amplifier circuit unit), and give its simulation result.Fig. 2 is cascade three
The circuit structure block diagram of amplifier circuit shown in level Fig. 1, contains the ultra-wideband amplifier circuit using inductance cancellation technology
Unit I, the ultra-wideband amplifier circuit unit II using inductance cancellation technology and the ultra wide band using inductance cancellation technology amplify
Device circuit unit III, Fig. 3 are circuit theory diagrams corresponding to block diagram shown in Fig. 2.As shown in figure 3, using the super of inductance cancellation technology
Wide-band amplifier circuit unit I, ultra-wideband amplifier circuit unit II and use inductance counteracting skill using inductance cancellation technology
The ultra-wideband amplifier circuit unit III of art respectively contains the amplifier circuit shown in a Fig. 1.Using inductance cancellation technology
Between ultra-wideband amplifier circuit unit I and the ultra-wideband amplifier circuit unit II for using inductance cancellation technology, using inductance
The ultra-wideband amplifier circuit unit II of cancellation technology and using inductance cancellation technology ultra-wideband amplifier circuit unit III it
Between connected respectively an electric capacity, the effect of the two electric capacity is barrier direct current, it is ensured that each circuit unit is biased in correctly partially
Under configuration state.
For the circuit structure shown in Fig. 3, simulating, verifying is carried out based on 0.15 μm of GaAsp pHEMT technique, the technique
The characteristic frequency of transistor is 95GHz.Fig. 4 gives the simulation result of gain and input return loss.As can be known from Fig. 4, adopt
0.1MHz, which is realized, with the ultra-wideband amplifier of the present embodiment has reached 500 to the bandwidth more than 50GHz, i.e. octave bandwidth,
Absolute bandwidth has exceeded the half of transistors characteristics frequency.Gain in bandwidth is more than 20dB, and return loss is better than 10dB,
Realize higher gain and preferably matching.
Above-described embodiment, the purpose of the present invention, technical scheme and beneficial effect are carried out further
Describe in detail, should be understood that the embodiment that the foregoing is only the present invention, be not intended to limit the present invention
Protection domain, within the spirit and principles of the invention, any modification, equivalent substitution and improvements done etc., all should include
Within protection scope of the present invention.
Claims (5)
1. a kind of ultra-wideband amplifier circuit using inductance cancellation technology, it is characterised in that including active bias circuit, inductance
The cascode structure of element, power vd D and two transistor stacks is offset, the active bias circuit connects with power vd D
Connect；The inductance, which offsets element, includes inductance L2 and inductance L3, and two transistors in the cascode structure are respectively brilliant
Body pipe M1 and transistor M2, the transistor M1 source electrodes are grounded by inductance L2, are inputted after transistor M1 grid series resistors R1
Grid voltage；The transistor M2 source electrodes are connected with transistor M1 drain electrodes, and transistor M2 grids are grounded by electric capacity C2, transistor M2 grid
Grid voltage is inputted after the series resistor R3 of pole, is connected after transistor M3 drain electrode tandem electric inductances L3 with active bias circuit；The inductance L2
Coupled between inductance L3 by transformer, to offset influences of the inductance L2 to high-frequency gain；The grid of the transistor M1
Pole is connected with input port, and the circuit between inductance L3 and active bias circuit is provided with output port.
2. a kind of ultra-wideband amplifier circuit using inductance cancellation technology according to claim 1, it is characterised in that also
Including feedback circuit, the feedback circuit include electric capacity C1 and with electric capacity C1 series winding resistance R2, described feedback circuit one end with
Transistor M1 grids are connected, and its other end is connected on the circuit between inductance L3 and output port.
3. a kind of ultra-wideband amplifier circuit using inductance cancellation technology according to claim 1, it is characterised in that also
Including input matching circuit, the input matching circuit includes inductance L1, the inductance L1 be serially connected with transistor M1 grids with it is defeated
On circuit between inbound port.
A kind of 4. ultra-wideband amplifier circuit using inductance cancellation technology according to claim 1, it is characterised in that institute
Stating active bias circuit includes transistor M3, inductance L4, resistance R4 and electric capacity C3, and the transistor M3 source electrodes connect with inductance L3
Connect, be connected after transistor M3 drain electrode tandem electric inductances L4 with power vd D, transistor M3 drain electrodes are grounded by electric capacity C3, resistance R4 two
End connects with transistor M3 grid and drain electrode respectively.
5. a kind of ultra-wideband amplifier circuit using inductance cancellation technology according to any one in Claims 1 to 4,
Characterized in that, the transistor in the cascode structure is N-channel transistor, p channel transistor, high electron mobility
Any one in transistor and counterfeit HEMT.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201710827355.1A CN107707203A (en) | 2017-09-14 | 2017-09-14 | A kind of ultra-wideband amplifier circuit using inductance cancellation technology |
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| CN201710827355.1A CN107707203A (en) | 2017-09-14 | 2017-09-14 | A kind of ultra-wideband amplifier circuit using inductance cancellation technology |
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Cited By (5)
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| CN109167574A (en) * | 2018-09-11 | 2019-01-08 | 西安交通大学 | Stack power amplifier and its dynamic bias network |
| CN109412536A (en) * | 2018-09-19 | 2019-03-01 | 天津大学 | A kind of power amplifier of the high efficiency high-output power applied to 5G system |
| CN113792512A (en) * | 2021-08-24 | 2021-12-14 | 天津大学 | Composite discrete semiconductor transistor |
| CN114285385A (en) * | 2022-02-21 | 2022-04-05 | 成都芯翼科技有限公司 | Offset circuit of operational amplifier input current |
| CN114679137A (en) * | 2022-03-03 | 2022-06-28 | 天津大学 | Ultra-wideband noise cancellation low-noise amplifier |
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| CN114679137A (en) * | 2022-03-03 | 2022-06-28 | 天津大学 | Ultra-wideband noise cancellation low-noise amplifier |
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