CN109725447A - 阵列基板、显示面板及显示装置 - Google Patents

阵列基板、显示面板及显示装置 Download PDF

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CN109725447A
CN109725447A CN201910133852.0A CN201910133852A CN109725447A CN 109725447 A CN109725447 A CN 109725447A CN 201910133852 A CN201910133852 A CN 201910133852A CN 109725447 A CN109725447 A CN 109725447A
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area
notch
display
array substrate
viewing area
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CN109725447B (zh
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卢延涛
刘广辉
王超
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Wuhan China Star Optoelectronics Technology Co Ltd
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Wuhan China Star Optoelectronics Technology Co Ltd
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Priority to PCT/CN2019/084915 priority patent/WO2020168634A1/zh
Priority to US16/496,687 priority patent/US11233021B2/en
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Abstract

本申请提供一种阵列基板、显示面板及显示装置，阵列基板包括基板，基板具有显示区及与显示区相邻的非显示区，基板的非显示区远离显示区的一端具有第一缺口，第一缺口靠近基板的显示区的第一边缘设置有绑定区。显示装置具有窄边框以及高屏占比。

Description

阵列基板、显示面板及显示装置
技术领域
本申请涉及显示技术领域，尤其涉及一种阵列基板、显示面板及显示装置。
背景技术
随着高屏占比的显示屏越来越受欢迎，高屏占比的显示屏成为研究热点。
目前，在显示屏下边框采用覆晶薄膜(Chip On film，COF)技术以缩小下边框宽度是实现显示屏具有高屏占比的方法之一。然而，将覆晶薄膜绑定于下边框的绑定区时，用于绑定覆晶薄膜的绑定区到显示屏的显示区的垂直距离过大会导致显示屏实现窄边框以及高屏占比变得困难。
因此，有必要提出一种技术方案以解决绑定区到显示屏的显示区的垂直距离过大而导致显示屏难以实现窄边框以及高屏占比的问题。
发明内容
鉴于此，本申请的目的在于提供一种阵列基板，该阵列基板有利于显示屏实现窄边框及高屏占比。
为实现上述目的，技术方案如下：
一种阵列基板，所述阵列基板包括基板，所述基板具有显示区及与所述显示区相邻的非显示区，所述基板的所述非显示区远离所述显示区的一端具有第一缺口，所述第一缺口靠近所述基板的所述显示区的第一边缘设置有绑定区。
在上述阵列基板中，所述第一缺口将所述基板的所述非显示区远离所述显示区的一端分为第一非显示区和第二非显示区。
在上述阵列基板中，所述阵列基板还包括测试垫及银胶涂布区，所述测试垫和所述银胶涂布区均设置于所述第一非显示区和/或所述第二非显示区，所述测试垫和所述银胶涂布区交错排列。
在上述阵列基板中，所述绑定区在第一方向上具有延伸区，所述绑定区在所述第一方向上的长度小于或等于所述第一缺口沿所述第一方向的长度，所述第一方向与所述非显示区指向所述显示区的方向垂直。
在上述阵列基板中，所述阵列基板还包括多个沿所述第一方向排列且等间隔设置于所述绑定区和所述延伸区的输入垫，每个所述输入垫在第一方向上的长度与每个所述输入垫在第二方向上的长度的比值范围为1/3-100。
在上述阵列基板中，所述第一非显示区和所述第二非显示区沿第一方向的长度相同，所述第一方向与所述非显示区指向所述显示区的方向垂直。
在上述阵列基板中，所述阵列基板还包括覆晶薄膜，所述覆晶薄膜绑定于所述绑定区并穿过所述第一缺口以弯折至所述基板背向所述显示区的一侧。
本申请还提供一种显示面板，所述显示面板包括上述阵列基板。
本申请还提供一种显示装置，所述显示装置包括上述显示面板及背光模组，所述背光模组对应所述显示面板的所述第一缺口的位置具有第二缺口。
在上述显示装置中，所述显示面板在所述背光模组上的垂直投影位于所述背光模组内。
在上述显示装置中，所述显示面板还包括覆晶薄膜，所述覆晶薄膜依次穿过所述第一缺口和所述第二缺口以弯折至所述背光模组背向所述显示面板的一侧。
在上述显示装置中，所述覆晶薄膜的弯折顶点位于所述第二缺口内。
在上述显示装置中，所述覆晶薄膜的弯折顶点在第二方向上到所述第一边缘的垂直距离与所述第一缺口在第二方向上的长度的比值范围为0.8-1.2，所述第二方向为所述非显示区指向所述显示区的方向。
有益效果：本申请提供一种阵列基板、显示面板及显示装置，通过在阵列基板的非显示区远离显示区的一端设置第一缺口，并在第一缺口靠近显示区的第一边缘设置绑定区以缩小绑定区与显示区之间的垂直距离从而减小阵列基板的边框，使阵列基板组成的显示装置以及显示面板具有窄边框以及高屏占比。
附图说明
图1为本申请实施例阵列基板的第一结构示意图；
图2为本申请实施例阵列基板的第二结构示意图；
图3为本申请实施例阵列基板的第三种结构示意图；
图4为图2中绑定区中设置输入垫的第一种结构示意图；
图5为图2中绑定区中设置输入垫的第二种结构示意图；
图6为本申请实施例显示面板的第一种结构示意图；
图7为本申请实施例显示装置的第一种结构示意图；
图8为图7所示显示装置沿切线A-A的剖面图；
图9为传统技术中覆晶薄膜从显示面板侧弯折至背光模组背面的结构示意图；
图10为本申请实施例显示装置的第二种结构示意图。
附图标识如下：
10基板；100显示区；101非显示区；101a第一缺口；1021第一边缘；
101b绑定区；101c第一非显示区；101d第二非显示区；101e银胶涂布区；
1011测试垫；1012识别标识；1013第一走线；1014第二走线；
1015覆晶薄膜；1016输入垫；11阵列基板；
20彩膜基板；100显示面板；200背光模组；102a第二缺口；2001第二边缘；
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述。显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
请参阅图1，其为本申请实施例阵列基板的第一种结构示意图，阵列基板包括基板10，基板10具有显示区100和非显示区101。
显示区100中设置垂直相交的扫描线和数据线，相邻的两条扫描线和相邻的两条数据围合的区域中均设置有薄膜晶体管，扫描线与薄膜晶体管(未示出)的栅极连接以输入扫描信号，数据线与薄膜晶体管的源极连接以输入数据信号。
基板的非显示区101远离显示区100的一端具有第一缺口101a。第一缺口101a靠近基板10的显示区100的第一边缘1021设置有绑定区101b。通过将绑定区101b设置于第一边缘1021使得显示区100到绑定区101b的垂直距离减小从而减小阵列基板的边框，且使得非显示区101在第二方向(非显示区101指向显示区100的方向)上用于设置走线以外的电路器件的空间增加。
第一缺口101a的形状为矩形。第一缺口101a将基板10的非显示区101远离显示区100的一端分为第一非显示区101c和第二非显示区101d。第一非显示区101c和第二非显示区101d分别位于第一缺口101a的两侧。第一非显示区101c和第二非显示区101d沿第一方向的长度相同，使得从显示区100靠近非显示区101一端延伸至绑定区101b的走线能均匀地布线，且使得阵列基板制成的显示面板具有对称的外观。
阵列基板还包括测试垫(Cell test pad)1011、银胶涂布区(Ag glue pad)101e。测试垫1011用于阵列基板进一步制备成显示面板后，通过对测试垫1011输入测试信号以对显示面板进行性能测试。银胶涂布区101e用于涂布导电银胶，导电银胶用于连接阵列基板非显示区101中的接地线(未示出)和显示面板中与阵列基板对置的彩膜基板中的导电层以起到防静电(Electro-static discharge，ESD)作用。阵列基板还包括设置于第一非显示区101c或第二非显示区101d中的识别标识1012，识别标识1012用于记录阵列基板的相关信息。测试垫、银胶涂布区以及识别标识同排设置于第一非显示区101c和第二非显示区101d。
阵列基板还包括多条从显示区100靠近非显示区101的一端延伸至绑定区101b的走线。走线包括与数据线连接的第一走线1013以及与外围走线连接的第二走线1014。多条第二走线1014位于多条第一走线1013的两侧。
阵列基板还包括覆晶薄膜1015，覆晶薄膜1015包括柔性衬底以及设置柔性衬底上的控制芯片(未示出)。控制芯片输出信号至第二走线1014以使栅极驱动电路(Gate OnArray)输出扫描信号至扫描线，控制芯片输出信号至第一走线1013以使数据线输入数据信号。覆晶薄膜1015绑定于绑定区101b并穿过第一缺口101a以弯折至基板10背向显示区100的一侧。第一缺口101a为覆晶薄膜1015的弯折段提供容纳空间从而使得阵列基板的下边框进一步变窄。
请参阅图2，其为本申请实施例阵列基板的第二种结构示意图。与第一种结构示意图不同之处在于，测试垫1011以及银胶涂布区101e可以均设置于第一非显示区101c和/或第二非显示区101d，测试垫1011与银胶涂布区101e交错排列，以使得第一非显示区101c和第二非显示区101d中在第一方向上占用的空间减小，从而使得第一缺口101a在第一方向上的长度增加，第一方向与非显示区101指向显示区100的方向垂直。阵列基板还包括识别标识以及短路环(未示出)等，识别标识1012以及短路环均设置于非显示区101，识别标识1012、短路环、银胶涂布区以及测试垫在第一方向上交错排列。在阵列基板的其他结构示意图中，测试垫1011以及银胶涂布区101e也可以分别位于第一非显示区101c和第二非显示区101d中，测试垫1011包括多个，多个测试垫1011交错排列在第一非显示区101c中。
绑定区101b在第一方向上的长度小于或等于第一缺口101a在第一方向上的长度。具体地，绑定区101b在第一方向上的长度等于第一缺口101a在第一方向上的长度以使设置于绑定区中的输入垫在第一方向上可利用的空间最大。
相邻两条走线在第一方向上的间距大于1.5微米。第一走线与第一方向的夹角大于第二走线与第一方向的夹角。
请参阅图3，其为本申请实施例阵列基板的第三种结构示意图。与图2所示阵列基板不同之处在于，第一缺口101a为梯形，在第二方向上，第一缺口101a为上窄下宽的梯形使得第一缺口101a的空间更大，更有利于阵列基板制造成窄边框的显示装置。
请参阅图4，其为图2中的绑定区101b设置输入垫1016的第一种结构示意图。每个输入垫1016均为条形且相同，每个输入垫1016在第一方向的长度d1与每个输入垫1016在第二方向上的长度L1的比值的取值范围为1/20-1/5。每个输入垫1016在第一方向上的长度d1的取值范围为5微米-100微米，每个输入垫1016在第二方向上的长度L1的取值范围为100微米-500微米，每个输入垫1016的面积不小于500平方微米。相邻两个输入垫1016在第一方向上的间距大于5微米。
由于图2中的绑定区101b相对于图1中的绑定区101b在第一方向上的长度增加，图2中相邻两个走线在第一方向上的间距相对于图1中相邻两个走线在第一方向的间距增加，避免相邻两个走线之间接触的同时，使得走线在第二方向上占用的空间减小，即使得绑定区101b到显示区100的距离进一步地减小，阵列基板的下边框进一步变窄。图2中的绑定区101b相对于图1中的绑定区101b在第一方向上的长度增加使得每个输入垫1016在第一方向可以利用的空间增大，通过增加每个输入垫1016在第一方向上的长度使每个输入垫的面积增大，可以使覆晶薄膜1015与输入垫1016接触的面积变大而提高绑定良率。
请参阅图5，其为图2中绑定区101b中设置输入垫1016的第二种结构示意图。与图4所示输入垫不同之处在于，每个输入垫1016的形状为扁宽形。具体地，每个输入垫1016在第一方向上的长度d1与每个输入垫1016在第二方向上的长度L2的比值的取值范围为1/3-100。进一步地，每个输入垫1016在第一方向上的长度d1与每个输入垫1016在第二方向上的长度L2的比值的取值范围为1/3-20。每个输入垫1016的面积不小于500平方微米。相对于图4中的输入垫1016，图5中的每个输入垫1016在第一方向上的长度增加且在第二方向的长度减小。每个输入垫1016在第二方向上的长度减小使得绑定区101b在第二方向上占用的空间减小。
本申请还提供一种显示面板，显示面板可以为液晶显示面板，也可以为有机发光二极管显示面板。显示面板包括上述阵列基板。
请参阅图6，本申请实施例显示面板的第一种结构示意图，显示面板包括阵列基板11和彩膜基板20。阵列基板11和彩膜基板20通过封框胶连接，阵列基板11和彩膜基板20之间形成台阶区，台阶区即上述阵列基板的非显示区101。台阶区远离彩膜基板20的一端具有第一缺口，第一缺口靠近彩膜基板20的第一边缘1021设置有绑定区，覆晶薄膜1015绑定于阵列基板11上的绑定区，覆晶薄膜1015穿过阵列基板10上的第一缺口以弯折至阵列基板11背向彩膜基板20的一侧。
本申请显示面板通过在阵列基板的非显示区远离显示区的一端设置第一缺口，第一缺口靠近阵列基板的显示区的第一边缘设置绑定区以缩小绑定区到显示区的垂直距离从而减小显示面板的下边框，且使得显示面板的台阶区在台阶区指向显示区方向上用于设置走线以外电路器件的空间增加。
请参阅图7，其为本申请实施例显示装置的第一种结构示意图，显示装置包括显示面板100和背光模组200。
显示面板100包括上述阵列基板以及彩膜基板，阵列基板与彩膜基板形成的台阶区设置有第一缺口101a，第一缺口101a为矩形，第一缺口101a位于台阶区远离彩膜基板的一端，台阶区为上述阵列基板中的非显示区101。第一缺口101a靠近阵列基板的显示区的第一边缘1021上设置有绑定区。
背光模组200为显示面板100的光源，其位于显示面板100发光面的背面。背光模组200对应显示面板100的第一缺口101a的位置具有第二缺口102a。第二缺口102a的形状与第一缺口101a相同，即第二缺口102a为矩形，在显示装置的其他结构示意图中，第二缺口102a的形状也可以与第一缺口101a不同。显示面板100在背光模组200上的垂直投影位于背光模组内以使背光模组200起到保护显示面板100的作用。
显示面板100上还包括覆晶薄膜1015，覆晶薄膜1015绑定于绑定区。
请参阅图8，其为图7所示显示装置沿切线A-A的剖面图。覆晶薄膜1015依次穿过第一缺口101a和第二缺口102a以弯折至背光模组200背向显示面板100的一侧。如图9所示，其为传统技术中覆晶薄膜从显示面板100弯折至背光模组200的背面的结构示意图，由于覆晶薄膜弯折时会导致显示装置的下边框增加距离D。而在本申请中，覆晶薄膜1015由于弯折在第二方向上占用空间位于第一缺口101a和第二缺口102a内或部分位于第二缺口102a外，使得本申请显示装置的下边框尺寸相对于传统技术中的显示装置下边框减小。
进一步地，覆晶薄膜1015的弯折顶点B位于第二缺口102a内以进一步地减小显示装置的整体尺寸，从而实现窄边框和高屏占比，覆晶薄膜1015的弯折顶点B为在第二方向上覆晶薄膜的弯折段上离第二边缘2001垂直距离最大的点，第二边缘2001为第二缺口102a上靠近显示面板100的显示区的边缘，显示面板100的显示区为上述阵列基板的显示区。
进一步地，覆晶薄膜1015的弯折顶点B在第二方向上到第一边缘1021的垂直距离D1与第一缺口101a在第二方向上的长度D2的比值范围为0.8-1.2，第一边缘1021为第一缺口101a上靠近显示面板100的显示区的边缘。
请参阅图10，其为本申请实施例显示装置的第二种结构示意图，与图8所示显示装置不同之处在于，第一缺口101a和第二缺口102a均为梯形，第一缺口101a和第二缺口102a均为梯形使得背光模组200的尺寸大于显示面板100的尺寸以对显示面板100进行保护时，覆晶薄膜1015与显示面板100上的绑定区接触面积更大。
本申请显示装置通过在阵列基板的非显示区远离显示区的一端设置第一缺口，第一缺口靠近阵列基板的显示区的第一边缘设置绑定区以缩小绑定区到显示区的垂直距离，并在背光模组对应阵列基板的第一缺口的位置设置第二缺口，以降低显示装置的窄边框并提高屏占比。使绑定于绑定区的覆晶薄膜依次穿过第一缺口和第二缺口以进一步地降低显示装置的边框并提高屏占比。
以上实施例的说明只是用于帮助理解本申请的技术方案及其核心思想；本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施例的技术方案的范围。

Claims (13)

1.一种阵列基板，其特征在于，所述阵列基板包括基板，所述基板具有显示区及与所述显示区相邻的非显示区，所述基板的所述非显示区远离所述显示区的一端具有第一缺口，所述第一缺口靠近所述基板的所述显示区的第一边缘设置有绑定区。
2.根据权利要求1所述的阵列基板，其特征在于，所述第一缺口将所述基板的所述非显示区远离所述显示区的一端分为第一非显示区和第二非显示区。
3.根据权利要求2所述的阵列基板，其特征在于，所述阵列基板还包括测试垫以及银胶涂布区，所述测试垫与所述银胶涂布区均设置于所述第一非显示区和/或所述第二非显示区，所述测试垫和所述银胶涂布区交错排列。
4.根据权利要求3所述的阵列基板，其特征在于，所述绑定区在所述第一方向上的长度小于或等于所述第一缺口沿所述第一方向的长度，所述第一方向与所述非显示区指向所述显示区的方向垂直。
5.根据权利要求4所述的阵列基板，其特征在于，所述阵列基板还包括多个沿所述第一方向排列且等间隔设置于所述绑定区的输入垫，每个所述输入垫在第一方向上的长度与每个所述输入垫在第二方向上的长度的比值范围为1/3-100。
6.根据权利要求2所述的阵列基板，其特征在于，所述第一非显示区和所述第二非显示区沿第一方向的长度相同，所述第一方向与所述非显示区指向所述显示区的方向垂直。
7.根据权利要求1所述的阵列基板，其特征在于，所述阵列基板还包括覆晶薄膜，所述覆晶薄膜绑定于所述绑定区并穿过所述第一缺口以弯折至所述基板背向所述显示区的一侧。
8.一种显示面板，其特征在于，所述显示面板包括权利要求1-7任一项所述的阵列基板。
9.一种显示装置，其特征在于，所述显示装置包括权利要求8所述的显示面板及背光模组，所述背光模组对应所述显示面板的所述第一缺口的位置具有第二缺口。
10.根据权利要求9所述的显示装置，其特征在于，所述显示面板在所述背光模组上的垂直投影位于所述背光模组内。
11.根据权利要求9所述的显示装置，其特征在于，所述显示面板还包括覆晶薄膜，所述覆晶薄膜依次穿过所述第一缺口和所述第二缺口以弯折至所述背光模组背向所述显示面板的一侧。
12.根据权利要求11所述的显示装置，其特征在于，所述覆晶薄膜的弯折顶点位于所述第二缺口内。
13.根据权利要求12所述的显示装置，其特征在于，所述覆晶薄膜的弯折顶点在第二方向上到所述第一边缘的垂直距离与所述第一缺口在第二方向上的长度的比值范围为0.8-1.2，所述第二方向为所述非显示区指向所述显示区的方向。
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112309265A (zh) * 2020-11-09 2021-02-02 武汉华星光电技术有限公司 显示面板及显示装置
WO2021022692A1 (zh) * 2019-08-06 2021-02-11 深圳市华星光电半导体显示技术有限公司 显示面板及液晶显示器
WO2021179251A1 (zh) * 2020-03-12 2021-09-16 京东方科技集团股份有限公司 显示基板及其制备方法、显示装置
CN113487971A (zh) * 2021-07-22 2021-10-08 武汉华星光电技术有限公司 显示面板及显示装置
WO2024160000A1 (zh) * 2023-01-31 2024-08-08 京东方科技集团股份有限公司 显示面板及其制作方法、显示装置

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113421888B (zh) * 2021-06-18 2023-05-23 上海中航光电子有限公司 一种阵列基板及显示面板
KR20230071475A (ko) * 2021-11-16 2023-05-23 주식회사 엘엑스세미콘 칩 온 필름 테스트 보드
CN116382001A (zh) * 2023-05-11 2023-07-04 福州京东方光电科技有限公司 显示基板和显示装置

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20080075659A (ko) * 2007-02-13 2008-08-19 엘지디스플레이 주식회사 액정 표시장치의 제조방법
CN106817451A (zh) * 2017-02-23 2017-06-09 京东方科技集团股份有限公司 一种移动终端触控显示结构及其制造方法、移动终端
CN107765919A (zh) * 2017-10-25 2018-03-06 武汉天马微电子有限公司 一种触控显示面板及显示装置
CN108777114A (zh) * 2018-06-26 2018-11-09 上海中航光电子有限公司 显示面板及其制造方法、显示装置和拼接屏
CN108845445A (zh) * 2018-08-24 2018-11-20 武汉华星光电技术有限公司 全面显示屏及采用该全面显示屏的显示装置
CN109188747A (zh) * 2018-11-27 2019-01-11 厦门天马微电子有限公司 显示面板和显示装置
CN209674154U (zh) * 2019-02-22 2019-11-22 武汉华星光电技术有限公司 阵列基板、显示面板及显示装置

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102248876B1 (ko) * 2014-12-24 2021-05-07 엘지디스플레이 주식회사 표시장치 어레이 기판 및 표시장치
KR102355256B1 (ko) * 2015-01-22 2022-01-25 삼성디스플레이 주식회사 표시 장치
CN205231068U (zh) * 2015-12-28 2016-05-11 昆山维信诺科技有限公司 Oled显示面板结构
CN107123388A (zh) * 2017-06-29 2017-09-01 厦门天马微电子有限公司 一种阵列基板及显示装置
CN113281930B (zh) * 2017-06-30 2022-08-12 厦门天马微电子有限公司 显示屏及显示装置
JP7002908B2 (ja) * 2017-10-13 2022-01-20 株式会社ジャパンディスプレイ 表示装置
CN107643638B (zh) * 2017-10-18 2020-05-15 厦门天马微电子有限公司 阵列基板和显示面板
CN107634072B (zh) * 2017-10-25 2020-04-03 厦门天马微电子有限公司 阵列基板及显示面板
CN108427228B (zh) * 2018-02-24 2021-03-16 武汉天马微电子有限公司 背光模组与显示装置
CN108447396B (zh) * 2018-02-26 2020-11-03 上海天马微电子有限公司 显示装置
CN108376518B (zh) * 2018-02-26 2021-07-16 厦门天马微电子有限公司 显示面板和显示装置
CN108416280B (zh) * 2018-02-26 2021-09-17 厦门天马微电子有限公司 显示模组和显示装置
KR102587861B1 (ko) * 2018-03-27 2023-10-12 삼성디스플레이 주식회사 표시 장치 및 이의 제조 방법
CN108281089B (zh) * 2018-03-29 2020-04-24 上海天马微电子有限公司 柔性显示面板和柔性显示装置
WO2019187159A1 (ja) * 2018-03-30 2019-10-03 シャープ株式会社 表示デバイス
US10546912B2 (en) * 2018-04-19 2020-01-28 Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd. Display panel and display device
US11081059B2 (en) * 2018-05-03 2021-08-03 Kunshan Go-Visionox Opto-Electronics Co., Ltd. Display panels and display devices
US10608022B2 (en) * 2018-05-14 2020-03-31 Kunshan Go-Visionox Opto-Electronics Co., Ltd. Array substrates, display devices and methods of manufacturing array substrates
US10783825B2 (en) * 2018-05-14 2020-09-22 Kunshan Go-Visionox Opto-Electronics Co., Ltd. Driving substrates and display panels
CN108761627A (zh) * 2018-05-22 2018-11-06 武汉华星光电技术有限公司 异形屏面板
CN109188809B (zh) * 2018-09-30 2021-09-17 武汉天马微电子有限公司 显示面板和显示装置
CN109410761B (zh) * 2018-10-30 2021-04-30 武汉天马微电子有限公司 显示面板和显示装置
CN109410772B (zh) * 2018-10-31 2021-02-09 武汉天马微电子有限公司 显示面板和显示装置

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20080075659A (ko) * 2007-02-13 2008-08-19 엘지디스플레이 주식회사 액정 표시장치의 제조방법
CN106817451A (zh) * 2017-02-23 2017-06-09 京东方科技集团股份有限公司 一种移动终端触控显示结构及其制造方法、移动终端
CN107765919A (zh) * 2017-10-25 2018-03-06 武汉天马微电子有限公司 一种触控显示面板及显示装置
CN108777114A (zh) * 2018-06-26 2018-11-09 上海中航光电子有限公司 显示面板及其制造方法、显示装置和拼接屏
CN108845445A (zh) * 2018-08-24 2018-11-20 武汉华星光电技术有限公司 全面显示屏及采用该全面显示屏的显示装置
CN109188747A (zh) * 2018-11-27 2019-01-11 厦门天马微电子有限公司 显示面板和显示装置
CN209674154U (zh) * 2019-02-22 2019-11-22 武汉华星光电技术有限公司 阵列基板、显示面板及显示装置

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021022692A1 (zh) * 2019-08-06 2021-02-11 深圳市华星光电半导体显示技术有限公司 显示面板及液晶显示器
WO2021179251A1 (zh) * 2020-03-12 2021-09-16 京东方科技集团股份有限公司 显示基板及其制备方法、显示装置
CN112309265A (zh) * 2020-11-09 2021-02-02 武汉华星光电技术有限公司 显示面板及显示装置
CN113487971A (zh) * 2021-07-22 2021-10-08 武汉华星光电技术有限公司 显示面板及显示装置
CN113487971B (zh) * 2021-07-22 2023-05-30 武汉华星光电技术有限公司 显示面板及显示装置
WO2024160000A1 (zh) * 2023-01-31 2024-08-08 京东方科技集团股份有限公司 显示面板及其制作方法、显示装置

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