CN109639241A - A kind of no inductance down-conversion mixer - Google Patents

A kind of no inductance down-conversion mixer Download PDF

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Publication number
CN109639241A
CN109639241A CN201811344489.9A CN201811344489A CN109639241A CN 109639241 A CN109639241 A CN 109639241A CN 201811344489 A CN201811344489 A CN 201811344489A CN 109639241 A CN109639241 A CN 109639241A
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transistor
capacitor
resistance
connect
source electrode
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CN109639241B (en
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梁煜
党艳杰
张为
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Tianjin University
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Tianjin University
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03DDEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/14Balanced arrangements
    • H03D7/1425Balanced arrangements with transistors
    • H03D7/1441Balanced arrangements with transistors using field-effect transistors

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

The present invention relates to a kind of no inductance down-conversion mixers, comprising: is equipped with input transconductance cell, cross coupling capacitor unit, switch unit, ohmic load unit, input transconductance cell uses different underlayer voltage structures;Cross coupling capacitor unit forms negative resistance in switch unit source electrode, to improve the linearity;Radio-frequency input signals is amplified by input transconductance cell, parasitic capacitance is offset by cross coupling capacitor unit, output is mixed to switch unit with local oscillation signal, and the output of switch unit connects ohmic load unit, and difference IF output signal exports between switch unit and ohmic load unit.

Description

A kind of no inductance down-conversion mixer
Technical field
The present invention relates to wireless communication field more particularly to a kind of no inductance down-conversion mixers.
Background technique
Core circuit one of of the frequency mixer as radio-frequency front-end, circuit performance directly determine the bulking property of radio-frequency front-end Energy.The linearity, conversion gain are to measure the important indicator of a frequency mixer performance.In receivers, frequency mixer has centainly Conversion gain can reduce the difficulty of frequency mixer subsequent stages module design, be conducive to improve system noise performance and sensitivity. The linearity determines the maximum signal that frequency mixer can be handled.Active mixer can provide gain, and typical structure is gill Bert double balanced mixer, it has preferable interport isolation, and is followed by trans-impedance amplifier relative to passive frequency mixer and has Lesser area, but the disadvantage is that the linearity is poor.
The gain of double balanced mixer and the linearity are mainly determined that traditional way is in mutual conductance by transconductance stage and switching stage Increase LC filter between grade and switching stage, but a large amount of chip areas can be consumed in this way, how as far as possible with less first device Part, less area realize the frequency mixer with high-gain and high linearity, are always the hot spot of industry research.
Summary of the invention
The purpose of the present invention is to provide a kind of no inductance down-conversion mixers, do not use inductance, as far as possible reduction chip Area.Gain with higher combines the linearity, low noise and reasonable power consumption.Technical scheme is as follows:
A kind of no inductance down-conversion mixer, comprising: it is single to be equipped with input transconductance cell, cross coupling capacitor unit, switch Member, ohmic load unit, which is characterized in that input transconductance cell uses different underlayer voltage structures;Cross coupling capacitor list Member forms negative resistance in switch unit source electrode, to improve the linearity;Radio-frequency input signals is amplified by input transconductance cell, passes through friendship It pitches coupled capacitor unit and offsets parasitic capacitance, output is mixed to switch unit with local oscillation signal, and the output of switch unit connects electricity Load unit is hindered, difference IF output signal exports between switch unit and ohmic load unit.
The input transconductance cell include: the first transistor (M1), second transistor (M2), third transistor (M3) and 4th transistor (M4);
Wherein, the grid of the grid Yu second transistor (M2) of the first transistor (M1), first resistor (R1) One end and rf inputs (RF+) connection;
The source electrode of the source electrode of the second transistor (M2) and the first transistor (M1), third transistor (M3) source electrode and The source electrode of 4th transistor (M4) connects;
The first end of the substrate of the second transistor (M2) and the substrate of third transistor (M3) and 3rd resistor (R3) Connection;
The grid of the grid of the third transistor (M3) and the 4th transistor (M4), second resistance (R2) first end and Rf inputs (RF-) connection.
The cross coupling capacitor unit includes: first capacitor (C1) and the second capacitor (C2);
Wherein, the first end of the first capacitor (C1) is connect with rf inputs (RF+);
The drain electrode of the second end of the first capacitor (C1) and the drain electrode of third transistor (M3) and the 4th transistor (M4) Connection;
The first end of second capacitor (C2) is connect with rf inputs (RF-);
The drain electrode of the second end of second capacitor (C2) and the drain electrode of the first transistor (M1) and second transistor (M2) Connection.
The switch unit includes: that the 5th transistor (M5), the 6th transistor (M6), the 7th transistor (M7) and the 8th are brilliant Body pipe (M8);
Wherein, the grid of the grid Yu local oscillator input signals (LO+), the 8th transistor (M8) of the 5th transistor (M5) It is connected with the first end of the 5th resistance (R5);
The second end of the source electrode of 5th transistor (M5) and the source electrode of the 6th transistor (M6) and the second capacitor (C2) Connection;
The grid of the grid of 6th transistor (M6) and the 7th transistor (M7), the 4th resistance (R4) first end and Local oscillation signal (LO-) connection;
The second end of the source electrode of 7th transistor (M7) and the source electrode of the 8th transistor (M8) and first capacitor (C1) Connection.
The ohmic load unit includes: the 6th resistance (R6) and the 7th resistance (R7);
Wherein, the first end of the first end of the 6th resistance (R6) and third capacitor (C3), the 7th transistor (M7) Drain electrode is connected with the drain electrode of the 8th transistor (M8);
The first end of 7th resistance (R7) and the first end of the 4th capacitor (C4), the 5th transistor (M5) drain electrode and The drain electrode of 6th transistor (M6) connects.
The second end of the first resistor (R1) and the second end of second resistance (R2) are connect with first voltage source (V1);
The second end of the 3rd resistor (R3) is connect with the second voltage source (V2);
The second end of 4th resistance (R4) and the second end of the 5th resistance (R5) are connect with tertiary voltage source (V3);
The second end of 6th resistance (R6) and the second end of the 7th resistance (R7) are connect with the 4th voltage source (V4);
The source electrode of the second transistor (M2), the source electrode of third transistor (M3), the substrate of the first transistor (M1), The substrate of four transistors (M4), the substrate of the 5th transistor (M5), the substrate of the 6th transistor (M6), the 7th transistor (M7) The substrate of substrate and the 8th transistor (M8) is connect with ground terminal;
The second end of the third capacitor (C3) connects IF output signal (IF+);The second end of 4th capacitor (C4) connects Meet IF output signal (IF-).
The first transistor (M1), second transistor (M2), third transistor (M3), the 4th transistor (M4), the 5th Transistor (M5), the 6th transistor (M6), the 7th transistor (M7) and the 8th transistor (M8) are NMOS transistor.
4th voltage source (V4) provides DC offset voltage, and voltage value is 1.8V.
Compared with prior art, the beneficial effect of the technical solution of the embodiment of the present invention is:
(1) present invention using different underlayer voltages input transconductance cell, in conjunction with electric current injection and derivative superposition technology, In the case where not increasing power consumption, while optimizing noise and the linearity;
(2) present invention uses cross coupling capacitor unit, forms negative resistance in switch unit source electrode, counteracts parasitic capacitance Non-linear effects further improve the linearity;
(3) present invention does not use inductance, and consumption chip area is small.
(4) realization of the invention uses mainstream CMOS processes, can be with the common digital baseband circuit for using CMOS technology It is integrated on same chip, system on chip easy to accomplish.
(5) present invention is realized using deep-submicron 0.18umCMOS technique, the power supply of 1.8V low supply voltage, power consumption consumption It is lower.
Detailed description of the invention
Fig. 1 is the circuit diagram of down-conversion mixer of the present invention;
Fig. 2 is the simulation result diagram of the conversion gain of down-conversion mixer of the present invention;
Fig. 3 is the simulation result diagram of the noise coefficient of down-conversion mixer of the present invention;
Fig. 4 is the simulation result diagram of the linearity of down-conversion mixer of the present invention.
Specific embodiment
The embodiment of the present invention solves existing in the prior art ask by providing a kind of no inductance down-conversion mixer Topic, how in the case where not using inductance, while excellent gain and linearity performance.For make the invention solves technology Problem, technical solution and advantage are clearer, are described in detail below in conjunction with the accompanying drawings and the specific embodiments.
The input transconductance cell includes: the first transistor M1, second transistor M2, third transistor M3 and the 4th crystal Pipe M4;Wherein, the first end and radio frequency of the grid of the grid of the first transistor M1 and second transistor M2, first resistor R1 Input terminal RF+ connection;The source electrode of the source electrode of the second transistor M2 and the first transistor M1, third transistor M3 source electrode and The source electrode of 4th transistor M4 connects;The substrate of the second transistor M2 and the substrate and 3rd resistor of third transistor M3 The first end of R3 connects;The first end of the grid of the grid of the third transistor M3 and the 4th transistor M4, second resistance R2 It is connected with rf inputs RF-.
In the embodiment of the present invention, radiofrequency signal is added in the first transistor M1, second transistor M2, third transistor respectively The grid of M3 and the 4th transistor M4, voltage signal are changed into current signal.The first transistor M1 and the 4th transistor M4 substrate Ground connection, second transistor M2 and third transistor M3 substrate meet voltage V2, and identical grid voltage is all V1.Transconductance stage is using different Double metal-oxide-semiconductors of underlayer voltage, combine electric current injection and derivative superposition technology optimizes simultaneously in the case where not increasing power consumption Noise and the linearity.
The cross coupling capacitor unit includes: first capacitor C1 and the second capacitor C2;Wherein, the first capacitor C1 First end is connect with rf inputs RF+;The second end of the first capacitor C1 and the drain electrode of third transistor M3 and the 4th crystalline substance The drain electrode of body pipe M4 connects;The first end of the second capacitor C2 is connect with rf inputs RF-;The second capacitor C2's Second end is connect with the drain electrode of the first transistor M1 and the drain electrode of second transistor M2.
In the embodiment of the present invention, in the drain electrode of the first transistor M1 and second transistor M2 and third transistor M3 and the The second capacitor C2 is added in the grid of four transistor M4.Drain electrode and the first transistor in third transistor M3 and the 4th transistor M4 First capacitor C1 is added in the grid of M1 and second transistor M2.First capacitor C1 and the second capacitor C2 forms cross coupling capacitor. Negative impedance is formed in insertion node, the influence of parasitic capacitance is offset, improves the non-linear of mutual conductance pipe, so as to improve the increasing of frequency mixer Benefit and the linearity.
The switch unit includes: the 5th transistor M5, the 6th transistor M6, the 7th transistor M7 and the 8th transistor M8;Wherein, the grid and the 5th resistance of the grid of the 5th transistor M5 and local oscillator input signals LO+, the 8th transistor M8 The first end of R5 connects;The second of the source electrode of the 5th transistor M5 and the source electrode of the 6th transistor M6 and the second capacitor C2 End connection;The grid of the grid of the 6th transistor M6 and the 7th transistor M7, the first end of the 4th resistance R4 and local oscillator are believed Number LO- connection;The second end of the source electrode of the 7th transistor M7 and the source electrode of the 8th transistor M8 and first capacitor C1 connects It connects.
In the embodiment of the present invention, in order to enable switch unit to work in ideal switch side under local oscillation signal appropriate 5th transistor M5, the 6th transistor M6, the 7th transistor M7 and the 8th transistor M8 are biased in cut-off area edge, i.e., by formula Gate source voltage and threshold voltage are close.Switch will input the electricity of transconductance stage generation to the alternate conduction under the control of local oscillation signal Stream is periodically transformed into another side by one side.
The ohmic load unit includes: the 6th resistance R6 and the 7th resistance R7;Wherein, the first of the 6th resistance R6 End is connect with the first end of third capacitor C3, the drain electrode of the 7th transistor M7 and the drain electrode of the 8th transistor M8;7th electricity The first end of resistance R7 is connect with the first end of the 4th capacitor C4, the drain electrode of the 5th transistor M5 and the drain electrode of the 6th transistor M6.
In the embodiment of the present invention, the 6th resistance R6 and the 7th resistance R7 make load unit, and resistance is as load, structure letter It is single, it will not introduce non-linear.And there is very wide bandwidth, it is most common load form in frequency mixer.

Claims (8)

1. a kind of no inductance down-conversion mixer, comprising: be equipped with input transconductance cell, cross coupling capacitor unit, switch unit, Ohmic load unit, which is characterized in that input transconductance cell uses different underlayer voltage structures;Cross coupling capacitor unit, Negative resistance is formed in switch unit source electrode, to improve the linearity;Radio-frequency input signals is amplified by input transconductance cell, by intersecting coupling It closes capacitor cell and offsets parasitic capacitance, output is mixed to switch unit with local oscillation signal, and the output connection resistance of switch unit is negative Carrier unit, difference IF output signal export between switch unit and ohmic load unit.
2. frequency mixer according to claim 1, which is characterized in that the input transconductance cell includes: the first transistor (M1), second transistor (M2), third transistor (M3) and the 4th transistor (M4);
Wherein, the grid of the grid Yu second transistor (M2) of the first transistor (M1), first resistor (R1) first end It is connected with rf inputs (RF+);
The source electrode of the second transistor (M2) and the source electrode of the first transistor (M1), the source electrode and the 4th of third transistor (M3) The source electrode of transistor (M4) connects;
The substrate of the second transistor (M2) is connect with the first end of the substrate of third transistor (M3) and 3rd resistor (R3);
The first end and radio frequency of the grid of the grid of the third transistor (M3) and the 4th transistor (M4), second resistance (R2) Input terminal (RF-) connection.
3. frequency mixer according to claim 2, which is characterized in that the cross coupling capacitor unit includes: first capacitor (C1) and the second capacitor (C2);
Wherein, the first end of the first capacitor (C1) is connect with rf inputs (RF+);
The second end of the first capacitor (C1) is connect with the drain electrode of third transistor (M3) and the drain electrode of the 4th transistor (M4);
The first end of second capacitor (C2) is connect with rf inputs (RF-);
The second end of second capacitor (C2) is connect with the drain electrode of the first transistor (M1) and the drain electrode of second transistor (M2).
4. frequency mixer according to claim 3, which is characterized in that the switch unit includes: the 5th transistor (M5), Six transistors (M6), the 7th transistor (M7) and the 8th transistor (M8);
Wherein, the grid Yu local oscillator input signals (LO+) of the 5th transistor (M5), the grid of the 8th transistor (M8) and The first end of five resistance (R5) connects;
The source electrode of 5th transistor (M5) is connect with the second end of the source electrode of the 6th transistor (M6) and the second capacitor (C2);
The first end and local oscillator of the grid of the grid of 6th transistor (M6) and the 7th transistor (M7), the 4th resistance (R4) Signal (LO-) connection;
The source electrode of 7th transistor (M7) is connect with the second end of the source electrode of the 8th transistor (M8) and first capacitor (C1).
5. frequency mixer according to claim 4, which is characterized in that the ohmic load unit includes: the 6th resistance (R6) With the 7th resistance (R7);
Wherein, the drain electrode of the first end, the 7th transistor (M7) of the first end and third capacitor (C3) of the 6th resistance (R6) It is connected with the drain electrode of the 8th transistor (M8);
The drain electrode and the 6th of the first end, the 5th transistor (M5) of the first end and the 4th capacitor (C4) of 7th resistance (R7) The drain electrode of transistor (M6) connects.
6. frequency mixer according to claim 5, which is characterized in that
The second end of the first resistor (R1) and the second end of second resistance (R2) are connect with first voltage source (V1);
The second end of the 3rd resistor (R3) is connect with the second voltage source (V2);
The second end of 4th resistance (R4) and the second end of the 5th resistance (R5) are connect with tertiary voltage source (V3);
The second end of 6th resistance (R6) and the second end of the 7th resistance (R7) are connect with the 4th voltage source (V4);
The source electrode of the second transistor (M2), the source electrode of third transistor (M3), the substrate of the first transistor (M1), the 4th crystalline substance The substrate of body pipe (M4), the substrate of the 5th transistor (M5), the substrate of the 6th transistor (M6), the 7th transistor (M7) substrate It is connect with ground terminal with the substrate of the 8th transistor (M8);
The second end of the third capacitor (C3) connects IF output signal (IF+);In the second end connection of 4th capacitor (C4) Frequency output signal (IF-).
7. frequency mixer according to claim 6, which is characterized in that the first transistor (M1), second transistor (M2), Third transistor (M3), the 4th transistor (M4), the 5th transistor (M5), the 6th transistor (M6), the 7th transistor (M7) and 8th transistor (M8) is NMOS transistor.
8. frequency mixer according to claim 7, which is characterized in that the 4th voltage source (V4) provides direct current biasing electricity Pressure, and voltage value is 1.8V.
CN201811344489.9A 2018-11-13 2018-11-13 Non-inductance down-conversion frequency mixer Expired - Fee Related CN109639241B (en)

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