CN107896093B - Low-noise low-power consumption high-gain mixer - Google Patents

Low-noise low-power consumption high-gain mixer Download PDF

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CN107896093B
CN107896093B CN201710919264.0A CN201710919264A CN107896093B CN 107896093 B CN107896093 B CN 107896093B CN 201710919264 A CN201710919264 A CN 201710919264A CN 107896093 B CN107896093 B CN 107896093B
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transistor
source
drain
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signal
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CN107896093A (en
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张为
李嘉骏
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Tianjin University
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Tianjin University
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/14—Balanced arrangements
    • H03D7/1425—Balanced arrangements with transistors
    • H03D7/1441—Balanced arrangements with transistors using field-effect transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/14—Balanced arrangements
    • H03D7/1425—Balanced arrangements with transistors
    • H03D7/1491—Arrangements to linearise a transconductance stage of a mixer arrangement

Abstract

The invention relates to a low-noise low-power consumption high-gain mixer, which adopts an orthogonal double-balanced Kilbert unit and uses two local oscillator signals with different frequencies, and comprises the following steps: the circuit comprises an input transconductance unit, a first switch unit, a second switch unit, a current injection unit and a load unit. The first switch unit modulates the radio-frequency current signal output by the input transconductance unit through current commutation; the second switch unit carries out secondary modulation on the radio frequency current signal output by the first switch unit through current commutation, the frequency of the second local oscillation signal LO2 is twice that of the first local oscillation signal LO1, the phase difference between the second local oscillation signal LO1 and the first local oscillation signal LO1 is 45 degrees, and when the first switch unit and the second switch unit carry out state switching, no direct current flows through a transistor; the current injection unit extracts the radio frequency current output by the transconductance input unit so as to improve the equivalent transconductance of the circuit and improve the gain of the circuit; the differential intermediate frequency output voltage signal is output from between the second switch unit and the load unit.

Description

Low-noise low-power consumption high-gain mixer
Technical Field
The invention belongs to the technical field of integrated circuit design, and relates to a low-noise, low-power-consumption and high-conversion-gain down mixer.
Background
With the continuous development of wireless communication technology, from military applications including radar technology to civil technologies mainly including mobile communication, more and more wireless communication applications are coming into the front of people. In modern communication systems, the rf transceiver front end plays a very important role, and the mixer, as one of the core modules, has a far-reaching influence on the system performance and cost.
In actual communication, a frequency band where an input signal is symmetric with respect to a local oscillator signal may have an image signal, and the signal may seriously affect the performance of a receiving front end, even cause the system to fail to operate normally. Usually, an off-chip image rejection filter is needed for filtering the image signal, so that the integration level of a chip is greatly reduced, and the design cost is improved. Zero-if architectures with image rejection have been continuously explored since the 1990 s. In the zero intermediate frequency radio frequency receiving front end, the frequency of a local oscillation signal is the same as that of a radio frequency input signal, and a useful signal is directly down-converted to a baseband. Therefore, the image signal of the system is the useful signal, so that the problem of the image signal does not exist in the zero intermediate frequency receiver adopting the orthogonal signal, and the application prospect is very attractive. However, since it directly transfers the input signal to the base frequency, the low frequency noise in the circuit will be output simultaneously with the intermediate frequency signal, which puts high demands on the noise performance of the mixer circuit. Therefore, it is very important to develop a zero if mixer with low noise.
In general, the main noise sources of the down converter circuit include: flicker noise of the transistor, thermal noise of each device, white noise, and the like, wherein the flicker noise has the greatest influence. The traditional circuit structure for reducing flicker noise is mainly based on the extraction of direct current from a switch, and the amplitude of noise pulse is reduced, so that noise is suppressed. There are roughly three types of structures: static current injection, dynamic current injection and the adoption of a resonant inductor structure. The static current injection structure reduces conversion gain while realizing flicker noise suppression, and white noise is introduced into the added shunt branch, so that the improvement effect is very limited. The dynamic current injection structure does not affect the conversion gain and introduce new differential mode noise, but needs larger amplitude of local oscillation signal to ensure the current injection tube to work synchronously with the switch tube, which is very difficult to realize. Although the resonant inductor structure does not affect the conversion gain and can also compensate the parasitic capacitance of the source electrode of the switch tube, new noise is introduced and more circuit area is consumed.
Disclosure of Invention
The invention aims to design a down mixer which has good noise performance, particularly low flicker noise and higher conversion gain on the premise of keeping low power consumption of a system. The technical scheme is as follows:
a low-noise low-power consumption high-gain mixer, which adopts a quadrature double-balanced-base-Boolean unit and uses local oscillation signals with two different frequencies, comprises: an input transconductance unit, a first switching unit, a second switching unit, a current injection unit, and a load unit, wherein,
the input transconductance unit realizes the conversion of a radio frequency voltage signal and a radio frequency current signal;
the first switch unit modulates the radio-frequency current signal output by the input transconductance unit through current commutation;
the second switch unit carries out secondary modulation on the radio frequency current signal output by the first switch unit through current commutation, the frequency of the second local oscillation signal LO2 is twice that of the first local oscillation signal LO1, the phase difference between the second local oscillation signal LO1 and the first local oscillation signal LO1 is 45 degrees, and when the first switch unit and the second switch unit carry out state switching, no direct current flows through a transistor, so that the elimination of low-frequency flicker noise is realized;
the current injection unit extracts the radio frequency current output by the transconductance input unit, so that the equivalent transconductance of the circuit is improved, and the gain of the circuit is improved;
the load unit converts the current signal output by the second switch unit into a voltage signal by using a PMOS tube cross coupling pair as an output load;
the differential intermediate frequency output voltage signal is output from between the second switch unit and the load unit.
Preferably, the mixer of claim 1, wherein the input transconductance unit comprises: first crystal
A transistor (M1) and a second transistor (M2);
wherein the source of the first transistor (M1) is connected with ground, the gate is connected with a radio frequency signal source, and the drain is connected with the source of the third transistor (M3) and the source of the fourth transistor (M4); the source of the second transistor (M2) is connected with the ground, the gate is connected with the radio frequency signal source, and the drain is connected with the source of the fifth transistor (M5) and the source of the sixth transistor (M6).
The first switching unit includes: a third transistor (M3), a fourth transistor (M4), a fifth transistor (M5), and a fourth transistor
A six transistor (M6);
the grid electrode of the third transistor (M3) is connected with the forward first local oscillator signal (LO1+), the drain electrode of the third transistor is connected with the source electrode of the seventh transistor (M7) and the source electrode of the eighth transistor (M8), and the source electrode of the third transistor is connected with the drain electrode of the first transistor (M1); the gate of the fourth transistor (M4) is connected with the reverse first local oscillator signal (LO1-), the drain of the fourth transistor is connected with the source of the eleventh transistor (M11) and the source of the twelfth transistor (M12), and the source of the fourth transistor is connected with the drain of the first transistor (M1); the gate of the fifth transistor (M5) is connected to the forward first local oscillator signal (LO1+), the drain of the fifth transistor is connected to the source of the ninth transistor (M9) and the source of the tenth transistor (M10), and the source of the fifth transistor is connected to the drain of the second transistor (M2); the gate of the sixth transistor (M6) is connected to the inverted first local oscillator signal (LO1-), the drain is connected to the source of the thirteenth transistor (M13) and the source of the fourteenth transistor (M14), and the source is connected to the drain of the second transistor (M2).
The second switching unit includes: a seventh transistor (M7), an eighth transistor (M8), a ninth transistor (M9), a tenth transistor (M10), an eleventh transistor (M11), a twelfth transistor (M12), a thirteenth transistor (M13), and a fourteenth transistor (M14); the grid electrode of the seventh transistor (M7) is connected with the inverted second local oscillation signal I (LO2-I-), the drain electrode of the seventh transistor is connected with the left side of the load network, and the source electrode of the seventh transistor is connected with the drain electrode of the third transistor (M3); the grid electrode of the eighth transistor (M8) is connected with the forward second local oscillation signal I (LO2-I +), the drain electrode of the eighth transistor is connected with the right side of the load network, and the source electrode of the eighth transistor is connected with the drain electrode of the third transistor (M3); the gate of the ninth transistor (M9) is connected with the forward second local oscillator signal I (LO2-I +), the drain is connected with the left side of the load network, and the source is connected with the drain of the fifth transistor (M5); the grid electrode of the tenth transistor (M10) is connected with the reverse second local oscillation signal I (LO2-I-), the drain electrode of the tenth transistor is connected with the right side of the load network, and the source electrode of the tenth transistor is connected with the drain electrode of the fifth transistor (M5); the grid electrode of the eleventh transistor (M11) is connected with the reverse second local oscillation signal I (LO2-I-), the drain electrode of the eleventh transistor is connected with the left side of the load network, and the source electrode of the eleventh transistor is connected with the drain electrode of the fourth transistor (M4); the grid electrode of the twelfth transistor (M12) is connected with the forward second local oscillation signal I (LO2-I +), the drain electrode of the twelfth transistor is connected with the right side of the load network, and the source electrode of the twelfth transistor is connected with the drain electrode of the fourth transistor (M4); the gate of the thirteenth transistor (M13) is connected with the forward second local oscillator signal I (LO2-I +), the drain is connected with the left side of the load network, and the source is connected with the drain of the sixth transistor (M6); the gate of the fourteenth transistor (M14) is connected to the inverted second local oscillator signal I (LO2-I-), the drain is connected to the right of the load network, and the source is connected to the drain of the sixth transistor (M6).
The current injection unit includes: a fifteenth transistor (M15), a sixteenth transistor (M16), a first capacitor (C1) and a first inductor (L1). Wherein a source of the fifteenth transistor (M15) is connected to a power supply, and a gate and a drain are connected to each other and to a current source; the source of the sixteenth transistor (M16) is connected with the power supply, the grid of the sixteenth transistor is connected with the grid of the fifteenth transistor, and the drain of the sixteenth transistor is connected with the first capacitor (C1) and the first inductor (L1).
The load unit includes: a seventeenth transistor (M17), a second resistor (R2) and a second capacitor (C2); wherein the seventeenth transistor (M17) has a source connected to the power supply, a gate and a drain connected to each other and to the drain of the seventh transistor (M7); the first end of the second resistor (R2) is connected with a power supply, and the second end of the second resistor (R2) is connected with the drain electrode of the seventh transistor (M7); the second capacitor (C2) has a first terminal connected to the power supply and a second terminal connected to the drain of the seventh transistor (M7).
The source of the fifteenth transistor (M15), the source of the sixteenth transistor (M16), the source of the seventeenth transistor, the first end of the second resistor (R2) and the first end of the second capacitor (C2) are all connected with a power supply VDD; the sources of the first transistor (M1) and the second transistor (M2) and the first capacitor (C1) are all connected with a ground terminal GND.
The fifteenth transistor (M15), the sixteenth transistor (M16), and the seventeenth transistor (M17) are all PMOS transistors, and the rest are all NMOS transistors.
The invention has the advantages that:
1. the method has excellent noise performance, and particularly has good inhibition effect on low-frequency flicker noise;
2. the circuit can work under a lower power supply voltage and has lower power consumption;
3. has higher conversion gain.
Due to the characteristics, the structure is suitable for being used as a down-mixer in a zero intermediate frequency or low intermediate frequency radio frequency receiving front end, and is particularly suitable for being applied to a narrow-band communication system with higher requirements on noise indexes.
Drawings
FIG. 1 is a circuit diagram of a quadrature double balanced down-mixer with low flicker noise
FIG. 2 is a waveform diagram of the operation of the main signals of the mixer
FIG. 3 is a circuit diagram of a quiescent current injection architecture with white noise cancellation
FIG. 4 is a circuit diagram of an RC/PMOS load network with low pass filtering characteristics
Detailed Description
The invention designs a novel down-mixer circuit with excellent noise performance, low power consumption and high conversion gain by adopting a double local oscillator signal, a static current injection structure and a low-pass filtering special-shaped load network based on an orthogonal double-balanced Gilbert unit. The following describes a specific embodiment of the present invention with reference to the drawings.
The source of the first transistor (M1) is grounded, the gate is connected with a radio frequency signal, and the drain is connected with the source of the third transistor (M3) and the source of the fourth transistor (M4); the source electrode of the second transistor (M2) is grounded, the grid electrode is connected with a radio frequency signal, and the drain electrode is connected with the source electrode of the fifth transistor (M5) and the source electrode of the sixth transistor (M6); the grid of the third transistor (M3) is connected with the positive first local oscillation signal (LO1+), the drain is connected with the source of the seventh transistor (M7) and the source of the eighth transistor (M8); the grid electrode of the fourth transistor (M4) is connected with a reverse first local oscillation signal (LO1-), and the drain electrode of the fourth transistor is connected with the source electrode of the eleventh transistor (M11) and the source electrode of the twelfth transistor (M12); the grid electrode of the fifth transistor (M5) is connected with the positive first local oscillation signal (LO1+), and the drain electrode is connected with the source electrode of the ninth transistor (M9) and the source electrode of the tenth transistor (M10); the grid electrode of the sixth transistor (M6) is connected with the reverse first local oscillation signal (LO1-), and the drain electrode of the sixth transistor is connected with the source electrode of the thirteenth transistor (M13) and the source electrode of the fourteenth transistor (M14); the grid electrode of the seventh transistor (M7) is connected with the reverse second local oscillation signal I (LO2-I-), and the drain electrode is connected with the left side of the load network; the grid electrode of the eighth transistor (M8) is connected with the positive second local oscillation signal I (LO2-I +), and the drain electrode is connected with the right side of the load network; the grid electrode of the ninth transistor (M9) is connected with the positive second local oscillator signal I (LO2-I +), and the drain electrode is connected with the left side of the load network; the grid electrode of the tenth transistor (M10) is connected with the reverse second local oscillation signal I (LO2-I-), and the drain electrode is connected with the right side of the load network; the grid electrode of the eleventh transistor (M11) is connected with the reverse second local oscillation signal I (LO2-I-), and the drain electrode is connected with the left side of the load network; the grid electrode of the twelfth transistor (M12) is connected with the forward second local oscillator signal I (LO2-I +), and the drain electrode is connected with the right side of the load network; the grid electrode of the thirteenth transistor (M13) is connected with the positive second local oscillation signal I (LO2-I +), and the drain electrode is connected with the left side of the load network; the grid electrode of the fourteenth transistor (M14) is connected with the reverse second local oscillation signal I (LO2-I-), and the drain electrode of the fourteenth transistor is connected with the right side of the load network; the left load network and the right load network are connected with the power supply.
Wherein the current injection structure is: the source electrode of the fifteenth transistor (M15) is connected with the power supply, and the grid electrode and the drain electrode are connected with each other and connected with the current source in parallel; the source of the sixteenth transistor (M16) is connected with the power supply, the grid is connected with the grid of the fifteenth transistor, and the drain is connected with the capacitor C1 and the inductor L1.
Wherein the left and right load structure are: a seventeenth transistor (M17) having a source connected to the power supply and a gate and a drain connected to each other; the resistor R2 is connected with a power supply section; the capacitor C2 has a power supply, and the drain of the seventeenth transistor is connected with the other ends of the resistor R2 and the capacitor C2.
1. And (3) realizing low noise characteristics. The double balanced quadrature mixer employed in the present invention can be divided into three stages as shown in fig. 1. Wherein M1-M2 are transconductance stages, M3-M6 are first switch stages, and M7-M14 are second switch stages. The transconductance stage MOS tube works in a small signal saturation region, the switching stage MOS tube works in a large signal mode, and the working region of the switching stage MOS tube is switched between the saturation region and a cut-off region along with a local oscillation signal. When the circuit works, firstly, a radio frequency input signal RF and a first local oscillator signal LO are input1Down-mixing to obtain a first intermediate frequency signal IF-RF-LO1(ii) a Then the output signal and a second local oscillator signal LO2Up-mixing is performed to finally output a second intermediate frequency signal IF-RF-LO1+LO2Wherein f isLO1＝2fLO2. In LO2During the positive half cycle of (a), the transconductance stage current flows to the I branch through M3 and M5; in LO2During the negative half-cycle of (a), the transconductance stage current flows through M4 and M6 to the Q branch. By making the LO1And LO2When the second switching stage is switched to the state with the phase difference of 45 ° maintained, no dc current flows through the transistors M7 to M14, and the waveforms of the signals are as shown in fig. 2. Thereby eliminating flicker noise of the second switching stage. While flicker noise generated by the first switching stage is transmitted in common mode to the I/Q branch and is ultimately suppressed in differential mode by the second switching stage. Since the two-stage switching transistors are connected together in a Cascode manner, the thermal noise performance of the circuit will also be improved.
When the circuit is designed, the sizes of the transistors of the transconductance stage and the first switch stages M1-M6 are smaller than that of the transistors of the second switch stage, so that parasitic capacitance is reduced, and the circuit can be enabled to be turned on/off more quickly. When the design of the bias is carried out, two switching stage transistors are biased at a place where the overdrive voltage is close to zero, the symmetry of the on/off working period of the circuit is improved, and therefore the port isolation degree and the harmonic suppression ratio of the circuit are optimized. Meanwhile, the overdrive voltage of the transconductance stage is increased under the condition of allowing power consumption so as to improve the input linearity of the circuit.
2. Low power consumption and high gain. The quiescent current injection structure with thermal noise cancellation shown in fig. 3 has the effect of reducing power consumption and improving gain. The current injection structure consisting of M15 and M16 draws a current I from the transconductance stageBThe dc current on the switching stage and the load is reduced. Therefore, the voltage falling on the MOS tube of the switching stage and the load resistor is reduced, so that the switching stage and the transconductance stage still have enough voltage margin under the lower power supply voltage. Thereby playing the role of reducing power consumption. Meanwhile, by adjusting the parameters of the current injection tube M16, the direct current of the transconductance stage can be increased under the condition that the working condition of the switching stage is kept unchanged, thereby realizing the improvement of the transconductance and the gain of the circuit.
3. Suppression of injected current white noise. The capacitor C1 is adopted to be shorted between the drain of the M16 and the ground, and the C1 is designed to select a larger capacitance value to short the white noise introduced by the current injection structure to the ground. The purpose of the inductor L1 is to prevent the signal from flowing to the ground through the C1, and also to compensate the parasitic capacitance of the drain of the transconductance stage MOS transistor, so as to reduce the charging time thereof, and to reduce the flicker noise of the first switching stage.
4. Implementation of a load network. The output signal of the gilbert double balanced mixer contains, in addition to the desired RF-LO signal, spurs (spurs) formed by odd harmonics of each order. The load network consisting of RC and PMOS is shown in fig. 4. The load network transfer function consisting of RC is:
Figure BDA0001426270000000051
wherein f isH1/2 pi RC is the 3dB bandwidth of the network. The load network has a low-pass characteristic, and high-frequency components in output signals are filtered by designing parameters of R2 and C2, so that the noise performance of the mixer is further improved. Meanwhile, the P-type transistor M17 is connected in parallel with the RC network, so that partial current in the load flows through the PMOS, the voltage drop of the resistor R2 is reduced, and the voltage margin of the switch-stage transistor and the transconductance-stage transistor is improved.

Claims (8)

1. A low-noise low-power consumption high-gain mixer, which adopts a quadrature double-balanced-base-Boolean unit and uses local oscillation signals with two different frequencies, comprises: the input transconductance unit, the first switch unit, the second switch unit, the current injection unit and the load unit; wherein the content of the first and second substances,
the input transconductance unit realizes the conversion of a radio frequency voltage signal and a radio frequency current signal;
the first switch unit modulates the radio-frequency current signal output by the input transconductance unit through current commutation;
the second switch unit carries out secondary modulation on the radio frequency current signal output by the first switch unit through current commutation, the frequency of the second local oscillation signal LO2 is twice that of the first local oscillation signal LO1, the phase difference between the second local oscillation signal LO1 and the first local oscillation signal LO1 is 45 degrees, and when the first switch unit and the second switch unit carry out state switching, no direct current flows through a transistor, so that the elimination of low-frequency flicker noise is realized;
the current injection unit extracts the radio frequency current output by the transconductance input unit so as to improve the equivalent transconductance of the circuit and improve the gain of the circuit;
the load unit converts the current signal output by the second switch unit into a voltage signal by using a PMOS tube cross coupling pair as an output load;
the differential intermediate frequency output voltage signal is output between the second switch unit and the load unit;
the second switching unit includes: a seventh transistor (M7), an eighth transistor (M8), a ninth transistor (M9), a tenth transistor (M10), an eleventh transistor (M11), a twelfth transistor (M12), a thirteenth transistor (M13), and a fourteenth transistor (M14); the grid electrode of the seventh transistor (M7) is connected with the inverted second local oscillation signal I (LO2-I-), the drain electrode of the seventh transistor is connected with the left side of the load network, and the source electrode of the seventh transistor is connected with the drain electrode of the third transistor (M3); the grid electrode of the eighth transistor (M8) is connected with the forward second local oscillation signal I (LO2-I +), the drain electrode of the eighth transistor is connected with the right side of the load network, and the source electrode of the eighth transistor is connected with the drain electrode of the third transistor (M3); the gate of the ninth transistor (M9) is connected with the forward second local oscillator signal I (LO2-I +), the drain is connected with the left side of the load network, and the source is connected with the drain of the fifth transistor (M5); the grid electrode of the tenth transistor (M10) is connected with the reverse second local oscillation signal I (LO2-I-), the drain electrode of the tenth transistor is connected with the right side of the load network, and the source electrode of the tenth transistor is connected with the drain electrode of the fifth transistor (M5); the grid electrode of the eleventh transistor (M11) is connected with the reverse second local oscillation signal I (LO2-I-), the drain electrode of the eleventh transistor is connected with the left side of the load network, and the source electrode of the eleventh transistor is connected with the drain electrode of the fourth transistor (M4); the grid electrode of the twelfth transistor (M12) is connected with the forward second local oscillation signal I (LO2-I +), the drain electrode of the twelfth transistor is connected with the right side of the load network, and the source electrode of the twelfth transistor is connected with the drain electrode of the fourth transistor (M4); the gate of the thirteenth transistor (M13) is connected with the forward second local oscillator signal I (LO2-I +), the drain is connected with the left side of the load network, and the source is connected with the drain of the sixth transistor (M6); the gate of the fourteenth transistor (M14) is connected to the inverted second local oscillator signal I (LO2-I-), the drain is connected to the right of the load network, and the source is connected to the drain of the sixth transistor (M6).
2. The mixer of claim 1, wherein the input transconductance cell comprises: a first transistor (M1) and a second transistor (M2); wherein the source of the first transistor (M1) is connected with ground, the gate is connected with a radio frequency signal source, and the drain is connected with the source of the third transistor (M3) and the source of the fourth transistor (M4); the source of the second transistor (M2) is connected with the ground, the gate is connected with the radio frequency signal source, and the drain is connected with the source of the fifth transistor (M5) and the source of the sixth transistor (M6).
3. The mixer according to claim 2, wherein the first switching unit comprises: a third transistor (M3), a fourth transistor (M4), a fifth transistor (M5), and a sixth transistor (M6); the grid electrode of the third transistor (M3) is connected with the forward first local oscillator signal (LO1+), the drain electrode of the third transistor is connected with the source electrode of the seventh transistor (M7) and the source electrode of the eighth transistor (M8), and the source electrode of the third transistor is connected with the drain electrode of the first transistor (M1); the gate of the fourth transistor (M4) is connected with the reverse first local oscillator signal (LO1-), the drain of the fourth transistor is connected with the source of the eleventh transistor (M11) and the source of the twelfth transistor (M12), and the source of the fourth transistor is connected with the drain of the first transistor (M1); the gate of the fifth transistor (M5) is connected to the forward first local oscillator signal (LO1+), the drain of the fifth transistor is connected to the source of the ninth transistor (M9) and the source of the tenth transistor (M10), and the source of the fifth transistor is connected to the drain of the second transistor (M2); the gate of the sixth transistor (M6) is connected to the inverted first local oscillator signal (LO1-), the drain is connected to the source of the thirteenth transistor (M13) and the source of the fourteenth transistor (M14), and the source is connected to the drain of the second transistor (M2).
4. The mixer according to claim 3, wherein the current injection unit comprises: a fifteenth transistor (M15), a sixteenth transistor (M16), a first capacitor (C1) and a first inductor (L1); wherein a source of the fifteenth transistor (M15) is connected to a power supply, and a gate and a drain are connected to each other and to a current source; the source of the sixteenth transistor (M16) is connected with the power supply, the grid of the sixteenth transistor is connected with the grid of the fifteenth transistor, and the drain of the sixteenth transistor is connected with the first capacitor (C1) and the first inductor (L1).
5. The mixer of claim 4, wherein the load unit comprises: a seventeenth transistor (M17), a second resistor (R2) and a second capacitor (C2); wherein the seventeenth transistor (M17) has a source connected to the power supply, a gate and a drain connected to each other and to the drain of the seventh transistor (M7); the first end of the second resistor (R2) is connected with a power supply, and the second end of the second resistor (R2) is connected with the drain electrode of the seventh transistor (M7); the second capacitor (C2) has a first terminal connected to the power supply and a second terminal connected to the drain of the seventh transistor (M7).
6. The mixer of claim 5, wherein the fifteenth transistor (M15), the sixteenth transistor (M16), the seventeenth transistor (M16), the source of the seventeenth transistor, the second resistor (R2), and the first terminal of the second capacitor (C2) are all connected to the power supply VDD; the sources of the first transistor (M1) and the second transistor (M2) and the first capacitor (C1) are all connected with a ground terminal GND.
7. The mixer of claim 6, wherein the fifteenth transistor (M15), the sixteenth transistor (M16), and the seventeenth transistor (M17) are all PMOS transistors, and the rest are NMOS transistors.
8. The mixer of claim 7, wherein the power supply VDD provides a DC bias voltage and the voltage value is 3.3V.
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