CN109086558A - The local active memristor emulator of logarithmic - Google Patents
The local active memristor emulator of logarithmic Download PDFInfo
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Abstract
The invention discloses a kind of local active memristor emulators of logarithmic.The present invention includes integrated operational amplifier U1, integrated operational amplifier U2, multiplier U3, multiplier U4, multiplier U5, multiplier U6 and component resistance, capacitor, diode.Integrated operational amplifier U1 amplifies operation for reverse phase add operation, integral operation and reverse phase；Integrated operational amplifier U2 is for realizing reverse phase add operation, reverse phase amplification operation and logarithm operation；Multiplier U3, U4, U5, U6 for realizing signal multiplying.The simulator model constructs the analog circuit for meeting the active memristor characteristic in part using devices such as integrated operational amplifier and multipliers, can be applied to the research of memristor tandem circuit characteristic.
Description
Technical field
The invention belongs to technical field of circuit design, are related to a kind of active memristor emulator in part of logarithmic form, tool
Body is related to the design and realization of a kind of local active memristor emulator of logarithmic.
Background technique
Memristor be it is a kind of there is non-volatile Passive Nonlinear resistance, can be applied to non-losss property memory, manually
The fields such as neural network, image procossing, nonlinear circuit design.In order to study the basic reason of complexity generation, Cai Shaotang religion
Award and propose the active concept in part, and point out part it is active be complexity origin.The active memristor in part has more multiple
Dynamic behavior miscellaneous and more abundant is nonlinear circuit complexity and the basic reason for keeping oscillation.Relatively passive memristor
For device, the research of the active memristor in part is also fewer, and the physical device that do not realize actually not only also lacks mathematical model
And circuit model.Therefore, the present invention devises the mathematical model and its emulator of a kind of active memristor of novel local, mathematical modulo
Type can provide theoretical model, the alternative practical active memristor device in part of emulator for the physics realization of the active memristor in part
Experiment and application study are carried out, this all has great importance to the realization and research of the active memristor of novel local.
Summary of the invention
In view of the above shortcomings of the prior art, the invention proposes a kind of active memristor numbers in the part of logarithmic form
Model and the emulator circuit based on the mathematical model are learned, to simulate the C-V characteristic of the active memristor in part, substitution is practical
Memristor carries out circuit design and application.
The technical solution adopted for solving the technical problem of the present invention is as follows:
The present invention includes integrated operational amplifier U1, integrated operational amplifier U2, multiplier U3, multiplier U4, multiplier
U5, multiplier U6 and component resistance, capacitor, diode.Integrated operational amplifier U1 is used for reverse phase add operation, integral operation
Amplify operation with reverse phase；Integrated operational amplifier U2 is for realizing reverse phase add operation, reverse phase amplification operation and logarithm operation；Multiply
Musical instruments used in a Buddhist or Taoist mass U3, U4, U5, U6 for realizing signal multiplying.
Integrated operational amplifier U1 uses LM347, and the pin 1 of integrated operational amplifier U1 passes through resistance R4 connection pin 2；
Pin 2 is separately connected u ,-x by resistance R1, resistance R2, resistance R33,0.25x；Pin 3 is grounded；Pin 5 is grounded；Pin 6 is logical
Cross resistance R5 connection pin 1；Pin 7 passes through capacitor C1 connection pin 6；Pin 8 passes through resistance R6 connection pin 9；Pin 9 passes through
Resistance R7 connection pin 7；Pin 4 meets power supply VCC, and pin 11 meets power supply VEE；The output of pin 7 is x；The output of pin 8 is-x.
Multiplier U3, U4, U6 use AD633,1 connection-x of multiplier U4 pin；3 connection-x of pin；Pin 2,4,6 connects
Ground；Pin 8 meets power supply VCC, and pin 5 meets power supply VEE；Pin 7 is that output is x2.Multiplier U3 pin 1 connects x2；Pin 3 connects
Meet-x；Pin 2,4,6 is grounded；Pin 8 meets power supply VCC, and pin 5 meets power supply VEE；Pin 7 is that output is-x3.Multiplier U6 draws
Foot 1 connects x；Pin 3 connects 0.25V；Pin 2,4,6 is grounded；Pin 8 meets power supply VCC, and pin 5 meets power supply VEE；Pin 7 is defeated
It is out 0.25x.
Integrated operational amplifier U2 uses LM347, and the pin 1 of integrated operational amplifier U2 passes through resistance R10 connection pin
2；Pin 2 is separately connected x by resistance R8, resistance R92,0.1；Pin 3 is grounded；Pin 5 is grounded；Pin 6 is connected by resistance R14
Connect pin 8；Pin 7 passes through resistance R15 connection pin 6；Pin 8 passes through diode D1 connection pin 9；Pin 9 passes through resistance R13
Connect pin 14；Pin 10 is grounded；Pin 12 is grounded；Pin 13 passes through resistance R11 connection pin 1；Pin 14 passes through resistance R12
Connect pin 13；Pin 4 meets power supply VCC, and pin 11 meets power supply VEE；The output of pin 7 is ln (x2+0.1)。
Multiplier U5 uses AD633, and the pin 1 of multiplier U5 connects u；Pin 3 connects integrated operational amplifier U2 pin
7；Pin 2,4,6 is grounded；Pin 8 meets power supply VCC, and pin 5 meets power supply VEE；The output of pin 7 is electric current i.
The present invention devises a kind of mathematical model that can be realized the active memristor C-V characteristic in part, and according to its mathematics
Its simulator model of model foundation, contains 2 integrated transporting dischargings and 4 multipliers, and circuit realizes that the active memristor volt-ampere in part is special
Property.It is current and it is following can not obtain practical memory resistor in the case where, can replace practical memristor realization it is related to memristor
Circuit design, experiment and application, characteristic and application study to memristor have important practical significance.
The present invention realizes the corresponding operation in memristor characteristic using integrated computation circuit and analog multiplier, wherein collection
At operational amplifier mainly to realize reverse phase add operation, integral operation, inverting amplifier and the logarithm operation of voltage, simulation
Product calculation of the multiplier to realize voltage.The voltage u of memristor passes through reverse phase adder, the product of integrated operational amplifier U1
Point device obtains memristor internal state variable x, and internal state variable x passes through the reverse phase adder of integrated operational amplifier U2, anti-
The multiplying of phase amplifier, logarithmic circuit and multiplier obtains the electric current i of memristor.
Detailed description of the invention
Fig. 1 is equivalent circuit block diagram of the invention.
Fig. 2 is simulating equivalent circuit schematic diagram of the present invention.
Specific embodiment
It elaborates with reference to the accompanying drawing to the preferred embodiment of the present invention.
Theoretical starting point of the invention is that a kind of logarithmic gone out by general voltage-controlled memristor Derivation of Mathematical Model locally has
The expression formula of source memristor mathematical model:
I=ln (x2+0.1)·u
Dx/dt=-x3+0.25·x+u
Wherein, i and u is the electric current and voltage of memristor, and x is the state variable of memristor.
As shown in Figure 1, the present embodiment includes integrated operational amplifier U1, integrated operational amplifier U2, multiplier U3, multiplication
Device U4, multiplier U5, multiplier U6 and component resistance, capacitor, diode, integrated operational amplifier U1 are transported for reverse phase addition
It calculates, operation is amplified in integral operation and reverse phase；Integrated operational amplifier U2 for realizing reverse phase add operation, reverse phase amplification operation and
Logarithm operation；Multiplier U3, U4, U5, U6 for realizing signal multiplying；U1 and U2 uses chip LF347, U3, U4, U5
Chip AD633 is used with U6.LF347, AD633 are the prior art.
As shown in Fig. 2, the 1st of integrated operational amplifier U1 the, 2, the corresponding operational amplifier of 3 pins, with peripheral resistance R1,
R2, R3, R4 constitute reverse phase adder, and input is respectively u ,-x3, 0.25x, wherein x indicate memristor state, 0.25x be multiply
The W pin voltage of musical instruments used in a Buddhist or Taoist mass U6 ,-x3For the W pin voltage of multiplier U3.Due to R1=R2=R3=R4=10K, then U1 pin 1
Voltage are as follows:
Integrated operational amplifier U1 the 5th, 6,7 pins and peripheral capacitor C1, resistance R5 constitute integrator, it is defeated to realize
Enter voltage u1-1Integral, due to R5=1M, C1=1uF, the i.e. voltage of U1 pin 7:
From the active memristor mathematical model in part: dx/dt=-x3+ 0.25x+u, i.e. x=∫ (- x3+0.25x+u)dt
Then:
u1-7=∫ (- x3+ 0.25x+u) dt=x
The then voltage u of the 7th pin of integrated operational amplifier U11-7Indicate the state variable x of memristor.
Integrated operational amplifier U1 the 8th, 9, the corresponding operational amplifier of 10 pins, constituted with peripheral resistance R6, R7 anti-
Phase amplifier, for realizing input voltage u1-7Reverse phase amplification, and R6=R7=10K, the i.e. voltage of U1 pin 8 are as follows:
Voltage u of the multiplier U6 to realize integrated operational amplifier U1 pin 71-7With the product calculation of voltage 0.25V,
That is the voltage of U6 output end W pin:
u6w=0.25u1-7=0.25x
Voltage u of the multiplier U4 to realize integrated operational amplifier U1 pin 81-8Square operation, i.e. U4 output end W
The voltage of pin:
u4w=u1-7u1-7=x2
Voltage u of the multiplier U3 to realize U4 output end W pin4wWith the voltage u of U1 pin 81-8Product calculation, i.e.,
The voltage of U3 output end W pin:
u3w=u2wu1-7=-x3
Integrated operational amplifier U2 the 1st, 2, the corresponding operational amplifier of 3 pins, with peripheral resistance R8, R9, R10 constitute
Reverse phase adder, input are respectively x2, 0.1V, and R8=R9=R10=10K, the i.e. voltage of U2 pin 1 are as follows:
Integrated operational amplifier U2 the 12nd, 13, the corresponding operational amplifier of 14 pins, with peripheral resistance R11, R12 structure
At inverting amplifier, for realizing input voltage u2-1Reverse phase amplification, and R11=R12=10K, the i.e. voltage of U2 pin 14 are as follows:
Integrated operational amplifier U2 the 8th, 9, the corresponding operational amplifier of 10 pins, with peripheral resistance R13, diode
MBR1045 constitutes logarithmic circuit, for realizing input voltage u2-14Logarithm operation, and R13=10K, diode parameters are reversely satisfied
With electric current IS=0.1mA, UT=26mV, u2-14>>UT, i.e. the voltage of U2 pin 8 are as follows:
Integrated operational amplifier U2 the 5th, 6, the corresponding operational amplifier of 7 pins, constituted with peripheral resistance R14, R15 anti-
Phase amplifier, the reverse phase for realizing the pin 8 of integrated operational amplifier U2 is amplified, and R14=0.26K, R15=10K, i.e. U2
The voltage of pin 7 are as follows:
Voltage u of the multiplier U5 to realize integrated operational amplifier U2 pin 72-7With the product calculation of input voltage u,
That is the voltage of U5 output end W pin:
u5w=u2-7U=ln (x2+0.1)·u
Multiplier U5 output end W is electric current i, therefore,
I=ln (x2+0.1)·u
Wherein,
X=∫ (- x3+0.25x+u)dt
The C-V characteristic of memristor simulating equivalent circuit learns conductance compared with voltage-controlled memristor C-V characteristic:
G=ln (x2+0.1)
Integrated operational amplifier U1 uses LM347, and the 1st pin of integrated operational amplifier U1 passes through resistance R4 connection the 2nd
Pin；2nd pin is separately connected u ,-x by resistance R1, resistance R2, resistance R33,0.25x；3rd pin ground connection；4th pin connects
Power supply VCC；5th pin ground connection；6th pin passes through the 1st pin of resistance R5 connection；7th pin is drawn by capacitor C1 connection the 6th
Foot；8th pin passes through the 9th pin of resistance R6 connection；9th pin passes through the 7th pin of resistance R7 connection；10th pin ground connection；The
11 pins meet power supply VEE.
Multiplier U3, U4, U6 use AD633, the 1st pin connection-x of multiplier U4；2nd pin ground connection；3rd pin connects
Meet-x；4th pin ground connection；5th pin meets power supply VEE；6th pin ground connection；7th pin is that output is x2；8th pin connects power supply
VCC.The 1st pin of multiplier U3 connects x2；2nd pin ground connection；3rd pin connection-x；4th pin ground connection；5th pin connects power supply
VEE；6th pin ground connection；7th pin is that output is-x3；8th pin meets power supply VCC.The 1st pin of multiplier U6 connects x；2nd
Pin ground connection；3rd pin connects 0.25V；4th pin ground connection；5th pin meets power supply VEE；6th pin ground connection；7th pin is
Output is 0.25x；8th pin meets power supply VCC.
Integrated operational amplifier U2 uses LM347, and the 1st pin of integrated operational amplifier U2 passes through resistance R10 connection the 2nd
Pin；2nd pin is separately connected x by resistance R8, resistance R92,0.1；3rd pin ground connection；4th pin meets power supply VCC；5th
Pin ground connection；6th pin passes through the 8th pin of resistance R14 connection；7th pin passes through the 6th pin of resistance R15 connection；8th pin
Pass through the 9th pin of diode D1 connection；9th pin passes through the 14th pin of resistance R13 connection；10th pin ground connection；11st pin
Meet power supply VEE；12nd pin ground connection；13rd pin passes through the 1st pin of resistance R11 connection；14th pin is connected by resistance R12
13rd pin.
Multiplier U5 uses AD633, and the 1st pin of multiplier U5 connects u；2nd pin ground connection；The connection of 3rd pin is integrated
The 7th pin of operational amplifier U2；4th pin ground connection；5th pin meets power supply VEE；6th pin ground connection；The output of 7th pin is electricity
Flow i；8th pin meets power supply VCC.
Those skilled in the art are it should be appreciated that above embodiments are intended merely to the verifying present invention, and not make
For limitation of the invention, as long as within the scope of the invention, will all fall in the present invention to variation, the deformation of above embodiments
Protection scope in.
Claims (1)
1. the local active memristor emulator of logarithmic is based on following Design of Mathematical Model:
I=ln (x2+0.1)·u
Dx/dt=-x3+0.25·x+u
I and u is the electric current and voltage of memristor, and x is the state variable of memristor, it is characterised in that:
Including integrated operational amplifier U1, integrated operational amplifier U2 and multiplier U3, U4, U5, U6；Integrated operational amplifier U1
Amplify operation for reverse phase add operation, integral operation and reverse phase；Integrated operational amplifier U2 for realizing reverse phase add operation,
Reverse phase amplifies operation and logarithm operation；Multiplier U3, U4, U5, U6 for realizing signal multiplying, specifically:
Integrated operational amplifier U1 uses LM347, and pin 1 passes through resistance R4 connection pin 2；Pin 2 passes through resistance R1, resistance
R2, resistance R3 are separately connected u ,-x3,0.25x；Pin 3 is grounded；Pin 5 is grounded；Pin 6 passes through resistance R5 connection pin 1；Draw
Foot 7 passes through capacitor C1 connection pin 6；Pin 8 passes through resistance R6 connection pin 9；Pin 9 passes through resistance R7 connection pin 7；Pin
4 meet power supply VCC, and pin 11 meets power supply VEE；The output of pin 7 is x；The output of pin 8 is-x；
Multiplier U3, U4, U6 are all made of AD633,1 connection-x of multiplier U4 pin；3 connection-x of pin；Pin 2,4,6 is grounded；
Pin 8 meets power supply VCC, and pin 5 meets power supply VEE；Pin 7 is that output is x2；Multiplier U3 pin 1 connects x2；3 connection-x of pin；
Pin 2,4,6 is grounded；Pin 8 meets power supply VCC, and pin 5 meets power supply VEE；Pin 7 is that output is-x3；Multiplier U6 pin 1 connects
Meet x；Pin 3 connects 0.25V；Pin 2,4,6 is grounded；Pin 8 meets power supply VCC, and pin 5 meets power supply VEE；Pin 7 is that output is
0.25x；
Integrated operational amplifier U2 uses LM347, and pin 1 passes through resistance R10 connection pin 2；Pin 2 passes through resistance R8, resistance
R9 is separately connected x2,0.1V；Pin 3 is grounded；Pin 5 is grounded；Pin 6 passes through resistance R14 connection pin 8；Pin 7 passes through resistance
R15 connection pin 6；Pin 8 passes through diode D1 connection pin 9；Pin 9 passes through resistance R13 connection pin 14；Pin 10 connects
Ground；Pin 12 is grounded；Pin 13 passes through resistance R11 connection pin 1；Pin 14 passes through resistance R12 connection pin 13；Pin 4 connects
Power supply VCC, pin 11 meet power supply VEE；The output of pin 7 is ln (x2+0.1)；
Multiplier U5 uses AD633, and multiplier U5 pin 1 connects u；Pin 3 connects integrated operational amplifier U2 pin 7；Pin
2,4,6 ground connection；Pin 8 meets power supply VCC, and pin 5 meets power supply VEE；The output of pin 7 is electric current i.
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Cited By (3)
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| CN109840365A (en) * | 2019-01-16 | 2019-06-04 | 山东科技大学 | A kind of active memristor emulator |
| CN110222451A (en) * | 2019-06-14 | 2019-09-10 | 杭州电子科技大学 | The local active memristor circuit model of three rank absolute values |
| CN110245421A (en) * | 2019-06-14 | 2019-09-17 | 杭州电子科技大学 | A kind of local active memristor circuit model of novel logarithm absolute value |
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| CN110222451A (en) * | 2019-06-14 | 2019-09-10 | 杭州电子科技大学 | The local active memristor circuit model of three rank absolute values |
| CN110245421A (en) * | 2019-06-14 | 2019-09-17 | 杭州电子科技大学 | A kind of local active memristor circuit model of novel logarithm absolute value |
| CN110222451B (en) * | 2019-06-14 | 2023-11-10 | 杭州电子科技大学 | Third-order absolute value local active memristor circuit model |
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| CN109086558B (en) | 2024-06-25 |
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