CN110222451A - The local active memristor circuit model of three rank absolute values - Google Patents
The local active memristor circuit model of three rank absolute values Download PDFInfo
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Abstract
The invention discloses the mathematical models and its equivalent-circuit model of a kind of local active memristor of three rank absolute values.Circuit model of the invention includes integrated operational amplifier U1, integrated operational amplifier U2 and multiplier U3, U4, U5, U6, U7 and component resistance, capacitor.Integrated operational amplifier U1 amplifies operation for realizing integral operation, add operation and reverse phase.Integrated operational amplifier U2 is used for signed magnitude arithmetic(al), add operation and reverse phase operation, the control signal needed.The multiplying of multiplier U3, U4, U5, U6, U7 realization signal.The present invention substitutes the practical active memristor in part and is tested and application and research using integrated operational amplifier and the Multiplier Design equivalent circuit of local active memristor.
Description
Technical field
The invention belongs to technical field of circuit design, are related to a kind of active memristor circuit mould in part of absolute value form
A kind of type, and in particular to the three rank absolute value types locally mathematical model of active memristor and its design of equivalent-circuit model and reality
It is existing.
Background technique
In circuit field, local active device has the ability for amplifying minimum small-signal, and local active nature is all
The origin of complexity.The active memristor in part can produce dynamic behavior more complicated and abundant in circuit, to meet people
The various needs such as artificial neural networks, chaotic oscillating circuit have for maintaining the oscillation of nonlinear dynamic system and putting high low signal
Important meaning.As a non-volatile local active device, it can be applied to oscillating circuit, artificial neural network
The various fields such as network, non-volatile memories and Digital Logical Circuits have the application prospect of great potential.
Currently, big multipair passive memristor is studied both at home and abroad, the concept of the active memristor in part just just it has been related in the recent period.
Since the local active nature of memristor is more complicated, it is currently in preliminary theory analysis and Modeling Research state, is only proposed
Few mathematical model, and there is no commercialized practical devices.Organs weight is the pass of theory analysis and application circuit design
Key technology, in the case where not yet there are the active memristor practical devices in part, the mathematical model of the active memristor in design part
And its equivalent circuit substitutes practical memristor with equivalent circuit and carries out experiment and application study to abundant memristor mathematical model
It is of great significance.
Summary of the invention
In view of the above shortcomings of the prior art, the invention proposes a kind of local active memristors of three rank absolute values
Mathematical model, and equivalent-circuit model is devised, to simulate the voltage-current characteristic of memristor, substitutes practical memristor and answer
In circuit design.
The technical solution adopted for solving the technical problem of the present invention is as follows:
The mathematical model of the active memristor in design part: i=(| x3| -1) u, dx/dt=-x3+ 0.62x+u, wherein i, u, x
The respectively electric current of memristor, voltage and internal state variable.According to its equivalent circuit of the Design of Mathematical Model.Equivalent circuit packet
It includes control and recalls the active memristor equivalent circuit of the state variable generation circuit for leading value and part, wherein the state change for leading value is recalled in control
Amount generation circuit is made of integrated operational amplifier U1 and multiplier U3, U4, U5, and the state variable of generation is used as part is active to recall
Recalling for device equivalent circuit of resistance leads control input signal, and integrated operational amplifier U1 is for realizing integral operation, add operation and anti-
Mutually amplification operation.The active memristor equivalent circuit in part is made of integrated operational amplifier U2 and multiplier U6, and integrated computation is put
Big device U2 is for realizing signed magnitude arithmetic(al), add operation and reverse phase operation, the control signal needed, and multiplier U7 is realized will
Control signal is multiplied with the voltage signal of input, obtains final memristor current.
Preferably, the active memristor equivalent circuit in a kind of part, including integrated operational amplifier U1, integrated computation
Amplifier U2, multiplier U3, U4, U5, U6, U7,14 resistance and a capacitor；The wherein integrated operational amplifier U1
LF347 is used with integrated operational amplifier U2；Multiplier U3, U4, U5, U6, U7 use AD633；
The pin 1 of the integrated operational amplifier U1 passes through resistance R4 connection pin 2；Pin 2 passes through resistance R1, resistance
R2, resistance R3 are separately connected signal u ,-x3,0.64x；Pin 3,5 is grounded；Pin 4 meets power supply VCC；Pin 6 by resistance R5 with
Pin 1 connects, and pin 7 is connect by capacitor C1 with pin 6, and pin 8 passes through resistance R6 connection pin 9；Pin 9 passes through resistance R7
Connect x3, the ground connection of pin 10；Pin 11 meets VEE；The output of pin 7 is x；The output of pin 8 is-x3。
Multiplier U3, U4, U5 use AD633, and multiplier U4 pin 1,3 all connects x respectively；Pin 2,4,6 is grounded；Pin
8 meet power supply+VS, and pin 5 meets power supply-VS；Pin 7 is output x2.Multiplier U3 pin 1 connects x2；Pin 3 connects x；Pin 2,
4,6 ground connection；Pin 8 meets power supply+VS, and pin 5 meets power supply-VS；Pin 7 is output x3.Multiplier U6 pin 1 connects x；Pin 3
Connect 0.64V；Pin 2,4,6 is grounded；Pin 8 meets power supply+VS, and pin 5 meets power supply-VS；Pin 7 is output 0.64x.
The pin 1 of the integrated operational amplifier U2 is connected directly with pin 6；Pin 2 connects x3；Pin 3,5 is grounded；
Pin 4 meets power supply VCC；Pin 6 connect pin 7 with by R8；Pin 7 passes through resistance R9 connection pin 6；The output of pin 7 connects
Connect the pin 1 of multiplier U6；The pin 3 of U6 connects x3；Pin 2,4,6 is grounded；Pin 8 meets power supply+VS, and pin 5 connects power supply-
VS；Pin 7 is output | x3|；The pin 9 of U2 passes through the pin 7 of resistance R10 connection multiplier U6, and pin 9 is connected by resistance R11
Meet -1V；The pin 8 of U2 passes through resistance R12 connection pin 9；The output of pin 8 be-| x3|+1；Pin 10,12 is grounded；Pin 11
Meet VEE；Pin 13 passes through resistance R13 connection-| x3|+1；Pin 14 passes through resistance R14 connection pin 13；The output of pin 14 is
|x3|-1。
The 1 connection signal u of pin of multiplier U7；The pin 14 of the connection of pin 3 integrated operational amplifier U2；Pin 2,4,6
Ground connection；Pin 8 meets power supply+VS；Pin 5 meets power supply-VS；The output of pin 7 is electric current i.
The present invention devises a kind of mathematical model that can be realized the active memristor C-V characteristic in part, and according to mathematical modulo
Type establishes simulating equivalent circuit, which contains 2 integrated operational amplifier chips and 5 multipliers, and structure is simple,
At present and in the case that future can not obtain the active memory resistor in practical part, practical devices realization can be replaced to recall with locally active
The relevant circuit design of device, experiment and application are hindered, there is important reality to the characteristic and application study of the active memristor in part
Meaning.
The analog circuit for the active memristor in realization part that the present invention designs, realizes that part is active using analog circuit and recalls
The C-V characteristic for hindering device, has implemented the C-V characteristic of the active memristor in voltage-controlled part.The present invention is amplified using integrated computation
Device and analog multiplier circuit realize the corresponding operation recalled in sensor characteristic, wherein integrated operational amplifier U1 is mainly used for reality
Integral operation, voltage reversal amplification and the add operation of status state variable, state variable is by integrated operational amplifier U2 and multiplies
Musical instruments used in a Buddhist or Taoist mass realizes absolute value circuit, add circuit, reverse phase amplification voltage and recalls the product calculation for leading control function.
Detailed description of the invention
Fig. 1 is equivalent circuit block diagram of the invention.
Fig. 2 is simulating equivalent circuit schematic diagram of the invention.
Specific embodiment
It elaborates with reference to the accompanying drawing to the preferred embodiment of the present invention.
Theoretical starting point of the invention is the novel voltage-controlled three ranks absolute value of one kind defined below locally active memristor number
Learn model:
I and u indicates that the electric current and voltage of the active memristor in part, variable x indicate the state of memristor.
According to the mathematical model of the active memristor in part, its equivalent-circuit model, functional-block diagram such as Fig. 1 can be designed
It is shown.
As shown in Figure 1, the active memristor simulating equivalent circuit in the voltage-controlled part of this example includes integrated operational amplifier U1, collection
At operational amplifier U2 and multiplier U3, U4, U5, U6, U7 and a small amount of resistance, capacitor, integrated operational amplifier U1 is mainly realized
Integral operation, add operation and reverse phase amplify operation；Integrated operational amplifier U2 and multiplier U6 mainly realize signed magnitude arithmetic(al)；
Multiplier U3, U4, U5, U7 realize the multiplication operation of two signals.U1, U2 use LF347, and U3, U4, U5, U6, U7 are used
AD633, LF347, AD633 are the prior art.
As shown in Fig. 2, the 1st of integrated operational amplifier U1 the, 2, the corresponding operational amplifier of 3 pins, with peripheral resistance R1,
R2, R3, R4 constitute reverse phase adder, and input is respectively u ,-x3, 0.64x, wherein x indicate memristor state, 0.64x be multiply
The W pin voltage of musical instruments used in a Buddhist or Taoist mass U6 ,-x3For the voltage of the pin 8 of amplifier U1.Due to R1=R2=R3=R4=10K, then U1 pin 1
Voltage are as follows:
u1-1=-(- x3+0.64x+u)
Integrated operational amplifier U1 the 5th, 6, the corresponding operational amplifier of 7 pins, with peripheral C1, resistance R5 constitute integrate
Device, for realizing input voltage u1-1Integral, due to R5=100M, C1=10nF, the voltage of U1 pin 7 are as follows:
From the active memristor mathematical model in part:I.e.
X=∫-x3+0.62x+u-x3Dt, then:
u1-7=∫-x3+0.62x+u-x3Dt=x
That is the voltage u of the pin 7 of integrated operational amplifier1-7Indicate the state variable x of memristor.
Integrated operational amplifier U1 the 8th, 9, the corresponding operational amplifier of 10 pins, with peripheral resistance R6, resistance R7 structure
At rp-op amp, for realizing the reverse phase of the voltage of the pin 9 of U1, wherein resistance R6=R7=10K, U1 pin 8
Voltage is u1-8:
Voltage u of the multiplier U5 to realize integrated operational amplifier pin 71-7With the product calculation of voltage 0.64V, i.e.,
The voltage of U6 output end W pin:
u5w=0.64u1-7=0.64x
Voltage u of the multiplier U4 to realize integrated operational amplifier pin 71-7Square operation, i.e. U4 output end W draws
Foot voltage:
u4w=u1-7u1-7=x2
Voltage u of the multiplier U3 to realize integrated operational amplifier pin 71-7With multiplying for U4 output end W pin voltage
Product, i.e. U3 output end W pin voltage:
u3w=u4wu1-7=x3
Integrated operational amplifier U2 the 1st, 2, the corresponding operational amplifier of 3 pins constitute minus symbol function, if it is opened
Ring amplification factor is A, output saturation voltage Esat, herein Esat ≈ 13, then output of the amplifier operation in linear zone
There is A → ∞ in ideal conditions in voltage.Therefore the output voltage of pin 1 are as follows:
u2-1=-Esatsgn (x3)
Integrated operational amplifier U2 the 5th, 6,7 pins and periphery resistance R8 and resistance R9 composition reverse phase arithmetic unit, because
For R8=13K, R9=1K, Esat ≈ 13,7 output voltage of U2 pin:
The pin 1 of multiplier U6 connects the pin 7 of U2, and the pin 3 of U6 meets x3, to realize signed magnitude arithmetic(al), i.e. U6 output
Hold the voltage of W pin:
u6w=x3sgn(x3)=| x3|
Integrated operational amplifier U2 the 8th, 9, the corresponding operational amplifier of 10 pins, with peripheral resistance R10, resistance R11,
Resistance R12 constitutes reverse phase adder, R10=R11=R12=10K, the then voltage of U2 pin 8 are as follows:
The corresponding operational amplifier of pin 12,13,14 of integrated operational amplifier U2, resistance R13, R14 structure with periphery
At inverting amplifier, for realizing the reverse phase operation of the pin 8 of integrated operational amplifier U2, R13=R14=10K, i.e. U2 pin
14 output voltage are as follows:
Voltage u of the multiplier U7 to realize integrated operational amplifier pin 142-14With the product calculation of input voltage u,
That is the output end W pin voltage of U7:
u7w=(| x3|-1)u
Multiplier U7 output end W is electric current i, therefore,
I=(| x3|-1)u
Wherein,
X=∫-x3+0.62x+u-x3dt
The C-V characteristic of memristor simulating equivalent circuit learns conductance compared with voltage-controlled memristor C-V characteristic:
G=| x3|-1
Integrated operational amplifier U1 uses LM347, its 1st pin passes through the 2nd pin of resistance R4 connection；2nd pin is logical
It crosses resistance R1, resistance R2, resistance R3 and is separately connected signal u ,-x3,0.64x；3rd pin；Pin 4 meets power supply VCC；5th pin
Ground connection；6th pin is connect by resistance R5 with the 1st pin, and the 7th pin is connect by capacitor C1 with the 6th pin, and the 8th pin is logical
Cross the 9th pin of resistance R6 connection；9th pin passes through resistance R7 connection x3, the 10th pin ground connection；11st pin meets VEE；Pin 7
Output is x；The output of pin 8 is-x3。
Multiplier U3, U4, U5 use AD633, and the 1st pin of multiplier U3 connects x2；2nd pin ground connection；The connection of 3rd pin
x；4th pin ground connection；5th pin meets power supply-VS；6th pin ground connection；7th pin exports x3；Pin 8 meets power supply+VS.Multiplication
The 1st pin of device U4 connects x；2nd pin ground connection；3rd pin connects x；4th pin ground connection；5th pin meets power supply-VS；6th draws
Foot ground connection；7th pin is output x2；8th pin meets power supply+VS.The 1st pin of multiplier U5 connects x；Pin 3 connects 0.64V；
2nd pin ground connection；4th pin ground connection；5th pin meets power supply-VS；6th pin ground connection；7th pin is output 0.64x；8th draws
Foot meets power supply+VS；.
Integrated operational amplifier U2 uses LM347, multiplier U6 to use AD633.The 1st pin of integrated operational amplifier U1
It is connected directly with the 6th pin；2nd pin connects x3；3rd pin ground connection；4th pin meets power supply VCC；5th pin ground connection；6th
Pin connect the 7th pin with by R8；7th pin passes through the 6th pin of resistance R9 connection；The output of 7th pin connects multiplier
The 1st pin of U6；The 2nd pin of U6 is grounded；3rd pin connects x3；4th pin ground connection；5th pin meets power supply-VS；6th pin
Ground connection；7th pin is output | x3|；8th pin meets power supply+VS；The 9th pin of U2 passes through resistance R10 connection multiplier U6's
8th pin of the 7th pin, U2 passes through the 9th pin of resistance R12 connection；9th passes through resistance R11 connection -1V；The output of 8th pin
For-| x3|+1；10th pin ground connection；11st pin meets VEE；12nd pin ground connection；13rd pin passes through resistance R13 connection-| x3|
+1；14th pin passes through the 13rd pin of resistance R14 connection；The output of 4th pin is | x3|-1。
Multiplier U7 uses AD633, the 1st pin connection signal u of U7；2nd pin ground connection；The integrated fortune of 3rd pin connection
Calculate the pin 14 of amplifier U2；4th pin ground connection；5th pin meets power supply-VS；6th pin ground connection；8th pin meets power supply+VS；
The output of 7th pin is electric current i.
Those skilled in the art are it should be appreciated that above embodiments are intended merely to the verifying present invention, and not make
For limitation of the invention, as long as within the scope of the invention, will all fall in the present invention to variation, the deformation of above embodiments
Protection scope in.
Claims (4)
1. the local active memristor circuit model of three rank absolute values, which is characterized in that the circuit model is based on following mathematics relationship
Design:
I and u is respectively the electric current and voltage of memristor, and variable x is the state of memristor；
The circuit model includes integrated operational amplifier U1, integrated operational amplifier U2 and multiplier U3, U4, U5, U6, U7, collection
Control is constituted at operational amplifier U1 and multiplier U3, U4, U5 and recalls the state variable generation circuit led, and wherein integrated computation amplifies
Device U1 amplifies operation for realizing integral operation, add operation and reverse phase, using output signal recalling as memristor equivalent circuit
Lead control signal；The active memristor equivalent circuit in part is made of integrated operational amplifier U2 and multiplier U6, U7, integrated computation
For realizing absolute value macrooperation, reverse phase add operation, reverse phase operation, the control signal needed multiplies amplifier U2 and U6
Musical instruments used in a Buddhist or Taoist mass U7 is multiplied for realizing that will control signal with voltage, obtains final memristor current amount.
2. circuit model according to claim 1, it is characterised in that: the integrated operational amplifier U1, integrated computation
Amplifier U2 uses LM324, and multiplier U3, U4, U5, U6, U7 use AD633；The 1st foot input of integrated operational amplifier U1 is recalled
Device voltage is hindered, the 7th pin of multiplier U7 exports memristor current.
3. circuit model according to claim 2, it is characterised in that: the 1st pin of integrated operational amplifier passes through resistance
The 2nd pin of R4 connection；2nd pin by resistance R1, resistance R2, resistance R3 be separately connected signal u (t), U1 the 8th pin, multiply
The 7th pin of musical instruments used in a Buddhist or Taoist mass U5；3rd pin ground connection；4th pin meets power supply VCC；5th pin ground connection；6th pin by resistance R5 with
The connection of 1st pin, the 7th pin are connect by capacitor C1 with the 6th pin, and the 8th pin passes through the 9th pin of resistance R6 connection；9th draws
Foot passes through the 8th pin of resistance R7 connection U1, the 10th pin ground connection；11st pin meets VEE.
4. circuit model according to claim 3, it is characterised in that: the 1st pin of the integrated operational amplifier U2
It is connected to the 6th pin, the 2nd pin connects the 7th pin of multiplication U3, the 3rd pin ground connection, and the 4th pin connects power supply VCC, the 5th pin
Ground connection, the 6th pin are connected to the 7th pin by resistance R8, and the 7th pin is connected to the 6th pin by resistance R9, multiplier U6's
1st pin is connected to the 7th pin of operational amplifier U2, and the 3rd pin of multiplier U6 is connected to the 7th pin of multiplier U3,
The 7th pin of multiplier U6 is connected to the 9th pin of integrated operational amplifier U2 by resistance R10, and -1V is connected by resistance R11
It is connected to the 9th pin, the 9th draws and is connected to the 8th pin, the 10th pin ground connection by resistance R12, and the 11st pin meets power supply VEE, and the 12nd
Pin ground connection, the 13rd pin are connected to the 8th pin by R13, and the 14th pin is connected to 13 pin of bottom, multiplier U7 by R14
The 1st pin connect the input terminal of voltage, the 3rd pin of multiplier U7 is connected to the 14th pin of U2, the 7th pin of multiplier U7
For the output end of electric current.
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| CN111950213A (en) * | 2019-11-26 | 2020-11-17 | 杭州电子科技大学 | Emulator circuit model of binary local active memristor |
| CN112906879A (en) * | 2021-03-11 | 2021-06-04 | 杭州电子科技大学 | HR neuron circuit model based on local active memristor |
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| CN110222451B (en) | 2023-11-10 |
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