CN108959837A - A kind of realization circuit of four values memristor emulator - Google Patents
A kind of realization circuit of four values memristor emulator Download PDFInfo
- Publication number
- CN108959837A CN108959837A CN201811156823.8A CN201811156823A CN108959837A CN 108959837 A CN108959837 A CN 108959837A CN 201811156823 A CN201811156823 A CN 201811156823A CN 108959837 A CN108959837 A CN 108959837A
- Authority
- CN
- China
- Prior art keywords
- pin
- resistance
- multiplier
- memristor
- connect
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000003990 capacitor Substances 0.000 claims description 10
- 238000013461 design Methods 0.000 claims description 7
- 230000005611 electricity Effects 0.000 claims description 5
- 238000013178 mathematical model Methods 0.000 claims description 4
- 238000005259 measurement Methods 0.000 claims description 4
- 238000002474 experimental method Methods 0.000 abstract description 2
- 238000012360 testing method Methods 0.000 abstract description 2
- 230000006870 function Effects 0.000 description 6
- 238000004364 calculation method Methods 0.000 description 3
- 238000011160 research Methods 0.000 description 3
- 230000003321 amplification Effects 0.000 description 2
- 238000004458 analytical method Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000015654 memory Effects 0.000 description 2
- 238000003199 nucleic acid amplification method Methods 0.000 description 2
- 238000013528 artificial neural network Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/36—Circuit design at the analogue level
- G06F30/367—Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/36—Circuit design at the analogue level
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
The invention discloses a kind of realization circuits of four value memristor emulators, the present invention includes integrated operational amplifier U1 and multiplier U2, U3, U4, U5, U6, U7, U8, U9, U10, U11, integrated operational amplifier U1 connection input terminal, the i.e. test lead of the voltage u and electric current i of four value memristors；Integrated operational amplifier U1 and multiplier U2, U3, U6, U7, U8, U9, U10, U11 acquire control and recall the state variable for leading value, control function is led in recalling for being needed for realizing integral operation, summation operation and reverse phase operation.By the reverse phase add operation of multiplier U4, U5 and integrated operational amplifier U1, final memristor current amount is obtained.The invention proposes a kind of emulators for realizing four value memristor characteristics, to simulate the C-V characteristic of four value memristors, convenient for carrying out experiment and application study to four value memristors.
Description
Technical field
The invention belongs to technical field of circuit design, are related to a kind of four value memristor emulators, and in particular to a kind of four values
The mathematical model of memristor and the design of emulator and realization.
Background technique
Four value memristors are a kind of extensions for memory device two-value memristor, and such memristor can be such that memristor stablizes
The equilibrium state different to four kinds can be applied to multivalue Digital Logical Circuits, memristor neural network, non-volatile memories, complexity
Among chaos system.In order to carry out pre research to multivalue memristor, designing four value memristor emulators of one kind be there has been very
Important meaning.
Although being suggested currently, having a large amount of two-value memristor models, its application range has significant limitation.This
The four value memristors that invention proposes are the expansion types after two-value memristor, have more flexible non-volatile function.
Due to also lacking the concept and model of multivalue memristor at present, also in preliminary theory analysis and Modeling Research state.Therefore,
Practical multivalue memristor is replaced to be applied to circuit reality there is an urgent need to design the emulator for realizing multivalue memristor, and with circuit model
In testing, this also has very important meaning to the analysis and research of memristor.
Summary of the invention
For existing two-value memristor above shortcomings, the invention proposes a kind of four value memristor mathematical models and
Emulator circuit based on the mathematical model substitutes practical memristor and carries out electricity to simulate the C-V characteristic of four value memristors
Road design and application.
The technical solution adopted for solving the technical problem of the present invention is as follows:
The present invention includes state variable generation circuit and measurement port circuit, and state variable generation circuit is put by integrated computation
Big device U1 and multiplier U2, U3, U6, U7, U8, U9, U10, U11 composition, the state variable x of generation are emulated as four value memristors
Control input signal is led in recalling for device circuit, and integrated operational amplifier U1 is for realizing the amplification of integral operation, add operation and reverse phase
Operation.Measurement port circuit is made of integrated operational amplifier U1 and multiplier U4, U5, and integrated operational amplifier U1 is used for addition
Operation, the control signal needed, multiplier U4, U5, which are realized, is multiplied control signal with the voltage signal of input, obtains most
Four whole value memristor current amounts.
The 1st pin of the integrated operational amplifier U1 is connect with one end of first resistor R1, the 2nd pin and the first electricity
Hinder one end connection of the other end of R1, one end of second resistance R2, one end of 3rd resistor R3, the 4th resistance R4, the 3rd, 5 pins
Ground connection, the 4th pin meet power supply VCC, the 6th pin and one end of the 5th resistance R5, one end of the 6th resistance R6, the 7th resistance R7
One end, one end of the 8th resistance R8, one end of the 9th resistance R9, one end of the tenth resistance R10, eleventh resistor R11 one end,
One end of twelfth resistor R12, one end of thirteenth resistor R13 are connected with one end of first capacitor C1, the 7th pin and the first electricity
Hold the other end connection of C1, the 8th pin is connect with one end of first resistor R14, and the 9th pin is another with the 14th resistance R14's
One end connection at end, the 15th resistance R15, the 10th, 12 pins ground connection, the 11st pin connect VEE, the 13rd pin and the 17th resistance
One end of R17 is connected with one end of the 16th resistance R16, and the 14th pin is connect with the other end of the 16th resistance R16, and the 15th
The other end of resistance R15 is state variable x, and twelfth resistor R12 is the input terminal of memristor voltage, and the 1st pin of U1 is to recall
Hinder the output end of device electric current.
The 7th pin of the multiplier U2 connects with the 1st and the 3rd pin of multiplier U3, the 3rd pin of multiplier U4
It connects, the 7th pin of multiplier U3 is connect with the other end of the other end of the 8th resistance R8, the 17th resistance R17, multiplier U5's
7th pin is connect with the other end of second resistance R2, and the 7th pin of multiplier U6 is connect with the other end of the 5th resistance R5, is multiplied
The 7th pin of musical instruments used in a Buddhist or Taoist mass U7 is connect with the other end of thirteenth resistor R13, and the 7th pin of multiplier U8 draws with the 1st of multiplier U9
The 3rd pin of the other end connection of foot, the tenth resistance R10, the 7th pin of multiplier U9 and multiplier U6, the 9th resistance R9
Other end connection, the 7th pin of multiplier U10 are connect with the other end of the 1st pin of multiplier U11, the 7th resistance R7, multiplication
The 7th pin of device U9 is connect with the other end of the 9th resistance R9.The 1st pin of multiplier U2 as state variable output end and with
The 3rd pin of multiplier U8, the 3rd pin of U9, the 1st pin of U10, the 3rd pin of U11, eleventh resistor R11 it is another
The other end connection at end, the other end of the 15th resistance R15, first capacitor C1.
The multiplier the 2nd, 4,6 pins ground connection, the 5th pin meets power supply VEE, and the 8th pin meets power supply VCC.
The present invention devises a kind of four value memristor emulator circuits, which contains 1 integrated operational amplifier
Chip and 11 multipliers, structure is simple, on the basis of two-value memory resistor before, extends the type and function of memristor
Can, practical devices can be replaced to realize the relevant circuit design of four value memristors, experiment and application, characteristic to multivalue memristor and
Application study has important practical significance.
The four value memristor emulator circuits that the present invention designs have implemented the C-V characteristic variation of four value memristors.
The present invention realizes the corresponding operation in memristor characteristic using integrated operational amplifier and analog multiplier circuit, wherein integrated
Operational amplifier is mainly used for realizing that the integral operation of state variable, voltage reversal amplification and add operation, analog multiplier are used
The product calculation of control function is led with recalling in realizing voltage.
Detailed description of the invention
Fig. 1 is mathematical modeling principles figure of the invention；
Fig. 2 is emulator circuit block diagram of the invention；
Fig. 3 is emulator circuit schematic diagram of the invention.
Specific embodiment
It elaborates with reference to the accompanying drawing to the preferred embodiment of the present invention.
Theoretical starting point of the invention is the mathematic(al) representation of the C-V characteristic of four value memristors:
I and u indicates that the electric current and voltage of four value memristors, x indicate the variable states of four value memristors.
As shown in Figure 1, four value memristors are after power-off (u=0), equalization point have (- 1,0) seven: Q1, Q2 (- 0.5,
0),Q3(0,0),Q4(0.5,0),Q5(0.8,0),Q6(1,0),Q7(1.5,0).According to kinetic locus it is found that Q1, Q3, Q5
It is asymptotically stable equalization point with Q7, and Q2, Q4 and Q6 are unstable equalization point, thus obtain four kinds of stable equilibrium-likes
State, i.e. x (Q1)=- 1, x (Q3)=0, x (Q5)=0.8, x (Q7)=1.5, corresponding four kinds of stable recalling lead value W (x (Q1))=-
5, W (x (Q3))=- 5, W (x (Q5))=- 5.2304, W (x (Q1))=- 2.1875, obtain the mathematical modulo of four value memristors accordingly
Type.
As shown in Fig. 2, four value memristor emulator circuits in this example include integrated operational amplifier U1, multiplier
U2, U3, U4, U5, U6, U7, U8, U9, U10, U11 and a small amount of resistance, capacitor, integrated operational amplifier U1 mainly realize integral fortune
It calculates, operation is amplified in add operation and reverse phase；Multiplier U2-U11 realizes the multiplication operation of two signals.U1 uses LM324, U2-
U11 uses AD633, and LM324, AD633 are the prior art.
As shown in figure 3, be integrated with 4 operational amplifiers in integrated operational amplifier U1, wherein the 1st, 2,3 pins it is corresponding
Operational amplifier constitutes reverse phase add operation with peripheral first resistor R1, second resistance R2,3rd resistor R3, the 4th resistance R4
Circuit, to realize the product calculation of four value memristor voltage amounts and its state variable function, i.e. the electric current i of the pin 1 of U1m
(t)。
This is the voltage and current characteristics of four value memristor emulator circuits, wherein a, b represent meaning and be described below.
Integrated operational amplifier U1 the 5th, 6, the corresponding operational amplifier of 7 pins, with the 5th resistance R5 of periphery, the 6th electricity
Hinder R6, the 7th resistance R7, the 8th resistance R8, the 9th resistance R9, the tenth resistance R10, eleventh resistor R11, twelfth resistor
R12, thirteenth resistor R13, first capacitor C1, which are constituted, simplifies reverse phase addition and integral operation amplifier, and the voltage of input is u (t)
It is input to the 6th pin of integrated operational amplifier U1, by twelfth resistor R12 to obtain the state variable x of memristor.
This is four value memristor state variable function circuits, the voltage-current relation function simultaneous obtained with above formula
The model of four value memristors is obtained, wherein c can hereinafter be referred to.
Integrated operational amplifier U1 the 8th, 9, the corresponding operational amplifier of 10 pins and the 14th resistance R14, the 15th
Resistance R15 constitutes inverter cricuit, and for realizing the voltage inversion gain of the pin 8 of U1, the voltage of U1 pin 9 is u15(t)。
Integrated operational amplifier U1 the 12nd, 13, the corresponding operational amplifier of 14 pins and the 16th resistance R16, the tenth
Seven resistance R17 constitute inverter cricuit, and for realizing the voltage inversion gain of the pin 14 of U1, the voltage of U1 pin 13 is u17(t)。
The model AD633 of multiplier U2-U11, for realizing the product calculation of input signal.
The 1st pin of integrated operational amplifier U1 is connect with one end of first resistor R1, and the 2nd pin is with first resistor R1's
One end connection of the other end, one end of second resistance R2, one end of 3rd resistor R3, the 4th resistance R4, the 3rd, 5 pins ground connection,
4th pin meets power supply VCC, the 6th pin and one end of the 5th resistance R5, one end of the 6th resistance R6, the 7th resistance R7 one end,
One end, one end of the 9th resistance R9, one end of the tenth resistance R10, one end of eleventh resistor R11, the tenth of 8th resistance R8
One end of two resistance R12, one end of thirteenth resistor R13 are connected with one end of first capacitor C1, the 7th pin and first capacitor C1
Other end connection, the 8th pin connect with one end of first resistor R14, the other end of the 9th pin and the 14th resistance R14, the
One end of 15 resistance R15 connects, the 10th, 12 pins ground connection, and the 11st pin meets VEE, the 13rd pin and the 17th resistance R17's
One end is connected with one end of the 16th resistance R16, and the 14th pin is connect with the other end of the 16th resistance R16, the 15th resistance
The other end of R15 is state variable x, and twelfth resistor R12 is the input terminal of memristor voltage, and the 1st pin of U1 is memristor
The output end of electric current.
The 7th pin of multiplier U2 is connect with the 3rd pin of the 1st and the 3rd pin of multiplier U3, multiplier U4, multiplication
The 7th pin of device U3 is connect with the other end of the other end of the 8th resistance R8, the 17th resistance R17, the 7th pin of multiplier U5
It is connect with the other end of second resistance R2, the 7th pin of multiplier U6 is connect with the other end of the 5th resistance R5, multiplier U7's
7th pin is connect with the other end of thirteenth resistor R13, the 1st pin of the 7th pin of multiplier U8 and multiplier U9, the tenth
The other end of resistance R10 connects, and the 7th pin and the 3rd pin of multiplier U6, the other end of the 9th resistance R9 of multiplier U9 connects
It connecing, the 7th pin of multiplier U10 is connect with the other end of the 1st pin of multiplier U11, the 7th resistance R7, and the of multiplier U9
7 pins are connect with the other end of the 9th resistance R9.The 1st pin of multiplier U2 as state variable output end and with multiplier U8
The 3rd pin, U9 the 3rd pin, the 1st pin of U10, the 3rd pin of U11, the other end of eleventh resistor R11, the 15th
The other end connection of the other end, first capacitor C1 of resistance R15.
Multiplier U2, U3, U4, U5, U6, U7, U8, U9, U10 and U11 the 2nd, 4,6 pins ground connection, the 5th pin connects power supply
VEE, the 8th pin meet power supply VCC, and the 1st pin, the 3rd pin and the 7th pin are the input and output side of multiplier respectively.
Those skilled in the art are it should be appreciated that above embodiments are intended merely to the verifying present invention, and not make
For limitation of the invention, as long as within the scope of the invention, will all fall in the present invention to variation, the deformation of above embodiments
Protection scope in.
Claims (1)
1. a kind of realization circuit of four value memristor emulators, which is characterized in that be based on following Design of Mathematical Model:
I and u is the electric current and voltage of memristor, and x is the variable states of memristor；
Including state variable generation circuit and measurement port circuit, the state variable generation circuit is by integrated operational amplifier U1
It is formed with multiplier U2, U3, U6, U7, U8, U9, U10, U11, state variable x the recalling as four value memristor emulators of generation
Control input signal is led, wherein integrated operational amplifier U1 amplifies operation for realizing integral operation, add operation and reverse phase；Institute
It states measurement port circuit to be made of integrated operational amplifier U1 and multiplier U4, U5, integrated operational amplifier U1 is transported for addition
It calculates, obtains control signal, multiplier U4, U5, which are realized, is multiplied control signal with the voltage signal of input, obtains four final values
Memristor current, specific structure are as follows:
The 1st pin of the integrated operational amplifier U1 is connect with one end of first resistor R1, the 2nd pin and first resistor R1
The other end, one end of second resistance R2, one end of 3rd resistor R3, the 4th resistance R4 one end connection, the 3rd, 5 pins connect
Ground, the 4th pin meet power supply VCC, the 6th pin and one end of the 5th resistance R5, one end of the 6th resistance R6, the 7th resistance R7 one
End, one end of the 8th resistance R8, one end of the 9th resistance R9, one end of the tenth resistance R10, one end of eleventh resistor R11,
One end of 12 resistance R12, one end of thirteenth resistor R13 are connected with one end of first capacitor C1, the 7th pin and first capacitor
The other end of C1 connects, and the 8th pin is connect with one end of first resistor R14, the other end of the 9th pin and the 14th resistance R14,
One end of 15th resistance R15 connects, and the 10th, 12 pins ground connection, the 11st pin meet VEE, the 13rd pin and the 17th resistance R17
One end connected with one end of the 16th resistance R16, the 14th pin is connect with the other end of the 16th resistance R16, the 15th electricity
The other end for hindering R15 is state variable x, and twelfth resistor R12 is the input terminal of memristor voltage, integrated operational amplifier U1's
1st pin is the output end of memristor current；
Described multiplier U2, U3, U4, U5, U6, U7, U8, U9, U10 and U11 the 2nd, 4,6 pins ground connection, the 5th pin connects power supply
VEE, the 8th pin meet power supply VCC, and the 1st pin, the 3rd pin are the input terminals of multiplier, and the 7th pin is the output end of multiplier,
Wherein the 7th pin of the multiplier U2 is connect with the 3rd pin of the 1st and the 3rd pin of multiplier U3, multiplier U4, is multiplied
The 7th pin of musical instruments used in a Buddhist or Taoist mass U3 is connect with the other end of the other end of the 8th resistance R8, the 17th resistance R17, and the 7th of multiplier U5 is drawn
Foot is connect with the other end of second resistance R2, and the 7th pin of multiplier U6 is connect with the other end of the 5th resistance R5, multiplier U7
The 7th pin connect with the other end of thirteenth resistor R13, the 1st pin of the 7th pin of multiplier U8 and multiplier U9, the
The other end of ten resistance R10 connects, the 7th pin and the 3rd pin of multiplier U6, the other end of the 9th resistance R9 of multiplier U9
Connection, the 7th pin of multiplier U10 are connect with the other end of the 1st pin of multiplier U11, the 7th resistance R7, multiplier U9's
7th pin is connect with the other end of the 9th resistance R9；The 1st pin of multiplier U2 is as state variable output end and and multiplier
The 3rd pin of U8, the 3rd pin of U9, the 1st pin of U10, the 3rd pin of U11, the other end of eleventh resistor R11, the tenth
The other end connection of the other end, first capacitor C1 of five resistance R15；The integrated operational amplifier U1 uses LM324, multiplication
Device U2-U11 is all made of AD633.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811156823.8A CN108959837B (en) | 2018-09-30 | 2018-09-30 | Realization circuit of four-value memristor simulator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811156823.8A CN108959837B (en) | 2018-09-30 | 2018-09-30 | Realization circuit of four-value memristor simulator |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108959837A true CN108959837A (en) | 2018-12-07 |
| CN108959837B CN108959837B (en) | 2024-03-01 |
Family
ID=64472493
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811156823.8A Active CN108959837B (en) | 2018-09-30 | 2018-09-30 | Realization circuit of four-value memristor simulator |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN108959837B (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110222451A (en) * | 2019-06-14 | 2019-09-10 | 杭州电子科技大学 | The local active memristor circuit model of three rank absolute values |
| CN110598351A (en) * | 2019-09-24 | 2019-12-20 | 杭州电子科技大学 | Threshold type memristor circuit simulator |
| CN110765718A (en) * | 2019-09-24 | 2020-02-07 | 杭州电子科技大学 | Binary memristor circuit simulator |
| CN111950213A (en) * | 2019-11-26 | 2020-11-17 | 杭州电子科技大学 | Emulator circuit model of binary local active memristor |
| CN113054987A (en) * | 2021-03-11 | 2021-06-29 | 杭州电子科技大学 | Homonymy twinborn local active memristor simulator |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105373678A (en) * | 2015-12-10 | 2016-03-02 | 杭州电子科技大学 | Circuit for memory capacitor simulator |
| CN205265656U (en) * | 2015-12-15 | 2016-05-25 | 杭州电子科技大学 | Superficially voltage -controlled recall hinder ware emulation ware circuit |
| CN107451380A (en) * | 2017-09-08 | 2017-12-08 | 杭州电子科技大学 | Realize that the circuit of container emulator is recalled in exponential type lotus control |
| CN208705884U (en) * | 2018-09-30 | 2019-04-05 | 杭州电子科技大学 | A kind of four value memristor emulators |
-
2018
- 2018-09-30 CN CN201811156823.8A patent/CN108959837B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105373678A (en) * | 2015-12-10 | 2016-03-02 | 杭州电子科技大学 | Circuit for memory capacitor simulator |
| CN205265656U (en) * | 2015-12-15 | 2016-05-25 | 杭州电子科技大学 | Superficially voltage -controlled recall hinder ware emulation ware circuit |
| CN107451380A (en) * | 2017-09-08 | 2017-12-08 | 杭州电子科技大学 | Realize that the circuit of container emulator is recalled in exponential type lotus control |
| CN208705884U (en) * | 2018-09-30 | 2019-04-05 | 杭州电子科技大学 | A kind of four value memristor emulators |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110222451A (en) * | 2019-06-14 | 2019-09-10 | 杭州电子科技大学 | The local active memristor circuit model of three rank absolute values |
| CN110222451B (en) * | 2019-06-14 | 2023-11-10 | 杭州电子科技大学 | Third-order absolute value local active memristor circuit model |
| CN110598351A (en) * | 2019-09-24 | 2019-12-20 | 杭州电子科技大学 | Threshold type memristor circuit simulator |
| CN110765718A (en) * | 2019-09-24 | 2020-02-07 | 杭州电子科技大学 | Binary memristor circuit simulator |
| CN110598351B (en) * | 2019-09-24 | 2022-11-08 | 杭州电子科技大学 | Threshold type memristor circuit simulator |
| CN111950213A (en) * | 2019-11-26 | 2020-11-17 | 杭州电子科技大学 | Emulator circuit model of binary local active memristor |
| CN111950213B (en) * | 2019-11-26 | 2024-03-22 | 杭州电子科技大学 | Simulator circuit model of binary local active memristor |
| CN113054987A (en) * | 2021-03-11 | 2021-06-29 | 杭州电子科技大学 | Homonymy twinborn local active memristor simulator |
Also Published As
| Publication number | Publication date |
|---|---|
| CN108959837B (en) | 2024-03-01 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN108959837A (en) | A kind of realization circuit of four values memristor emulator | |
| CN105553459B (en) | Voltage-controlled memristor emulator circuit floatingly | |
| CN206991310U (en) | A kind of logarithmic recalls container equivalent simulation circuit | |
| CN108846165A (en) | A kind of local active memristor circuit model of quadravalence | |
| CN105375914B (en) | It is a kind of to realize the analog circuit for recalling sensor characteristic | |
| CN107169253A (en) | Logarithmic recalls container equivalent simulation circuit | |
| CN107451380B (en) | Circuit for realizing exponential type charge control memory capacitor simulator | |
| CN107526897A (en) | A kind of equivalent simulation circuit for flowing control and recalling sensor | |
| CN105447270B (en) | Exponential type recalls sensor circuit | |
| CN105373679B (en) | It is a kind of to realize the analog circuit for recalling capacitor characteristic | |
| CN108696274A (en) | A kind of circuit model of exponential type flow control memristor | |
| CN105389443B (en) | One kind recalling sensor logarithmic model equivalent circuit | |
| CN110245421A (en) | A kind of local active memristor circuit model of novel logarithm absolute value | |
| CN208705884U (en) | A kind of four value memristor emulators | |
| CN205232190U (en) | Analog circuit of sensilla characteristic is recalled in realization | |
| CN110598371A (en) | Three-value local active memristor simulator | |
| CN105701306B (en) | Exponential type magnetic control recalls container equivalent circuit | |
| CN109086558A (en) | The local active memristor emulator of logarithmic | |
| CN205263816U (en) | Sensilla circuit is recalled to exponent form | |
| CN105373678B (en) | One kind recalling container emulator circuit | |
| CN110222451A (en) | The local active memristor circuit model of three rank absolute values | |
| CN207148838U (en) | A kind of circuit realized exponential type lotus control and recall container emulator | |
| CN108416102A (en) | A kind of equivalent simulation circuit for recalling sensor | |
| CN108718190A (en) | A kind of local active memristor emulator of exponential type | |
| CN108736860A (en) | Container equivalent-circuit model is recalled in a kind of lotus control |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |