CN108807501A - 一种低导通压降的绝缘栅双极晶体管及其制备方法 - Google Patents
一种低导通压降的绝缘栅双极晶体管及其制备方法 Download PDFInfo
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- CN108807501A CN108807501A CN201810570229.7A CN201810570229A CN108807501A CN 108807501 A CN108807501 A CN 108807501A CN 201810570229 A CN201810570229 A CN 201810570229A CN 108807501 A CN108807501 A CN 108807501A
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- 239000012535 impurity Substances 0.000 claims abstract description 29
- 239000000758 substrate Substances 0.000 claims abstract description 17
- 229910052751 metal Inorganic materials 0.000 claims description 26
- 239000002184 metal Substances 0.000 claims description 26
- 238000002513 implantation Methods 0.000 claims description 20
- 238000004026 adhesive bonding Methods 0.000 claims description 18
- 229920002120 photoresistant polymer Polymers 0.000 claims description 18
- 238000001312 dry etching Methods 0.000 claims description 11
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- 239000010703 silicon Substances 0.000 claims description 3
- UQZIWOQVLUASCR-UHFFFAOYSA-N alumane;titanium Chemical compound [AlH3].[Ti] UQZIWOQVLUASCR-UHFFFAOYSA-N 0.000 claims description 2
- UIFOTCALDQIDTI-UHFFFAOYSA-N arsanylidynenickel Chemical compound [As]#[Ni] UIFOTCALDQIDTI-UHFFFAOYSA-N 0.000 claims description 2
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 claims description 2
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
- H01L29/7398—Vertical transistors, e.g. vertical IGBT with both emitter and collector contacts in the same substrate side
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66325—Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
- H01L29/66333—Vertical insulated gate bipolar transistors
- H01L29/6634—Vertical insulated gate bipolar transistors with a recess formed by etching in the source/emitter contact region
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Thyristors (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Description
Claims (10)
Priority Applications (1)
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CN201810570229.7A CN108807501B (zh) | 2018-06-05 | 2018-06-05 | 一种低导通压降的绝缘栅双极晶体管及其制备方法 |
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CN201810570229.7A CN108807501B (zh) | 2018-06-05 | 2018-06-05 | 一种低导通压降的绝缘栅双极晶体管及其制备方法 |
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CN108807501A true CN108807501A (zh) | 2018-11-13 |
CN108807501B CN108807501B (zh) | 2021-05-25 |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112713199A (zh) * | 2019-10-25 | 2021-04-27 | 株洲中车时代电气股份有限公司 | 碳化硅肖特基二极管及其制备方法 |
CN110190029B (zh) * | 2019-04-28 | 2021-07-09 | 爱特微(张家港)半导体技术有限公司 | 一种功率半导体器件的制备方法 |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0436171A1 (en) * | 1990-01-02 | 1991-07-10 | Motorola, Inc. | High voltage planar edge termination using a punch-through retarding implant |
US5075739A (en) * | 1990-01-02 | 1991-12-24 | Motorola, Inc. | High voltage planar edge termination using a punch-through retarding implant and floating field plates |
US20030025124A1 (en) * | 2001-08-01 | 2003-02-06 | Gerald Deboy | Circuit configuration for load-relieved switching |
CN103367398A (zh) * | 2013-07-23 | 2013-10-23 | 上海北车永电电子科技有限公司 | 终端保护环及其制造方法 |
CN103824879A (zh) * | 2014-01-30 | 2014-05-28 | 株洲南车时代电气股份有限公司 | 一种功率器件结终端结构与制造方法 |
CN105895679A (zh) * | 2015-01-22 | 2016-08-24 | 肖胜安 | 一种绝缘栅双极晶体管的结构和制造方法 |
US20170062596A1 (en) * | 2015-08-31 | 2017-03-02 | Ixys Corporation | IGBT With Waved Floating P-Well Electron Injection |
CN107924843A (zh) * | 2015-06-09 | 2018-04-17 | Abb瑞士股份有限公司 | 用于制造用于碳化硅功率半导体器件的边缘终端的方法 |
-
2018
- 2018-06-05 CN CN201810570229.7A patent/CN108807501B/zh active Active
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0436171A1 (en) * | 1990-01-02 | 1991-07-10 | Motorola, Inc. | High voltage planar edge termination using a punch-through retarding implant |
US5075739A (en) * | 1990-01-02 | 1991-12-24 | Motorola, Inc. | High voltage planar edge termination using a punch-through retarding implant and floating field plates |
US20030025124A1 (en) * | 2001-08-01 | 2003-02-06 | Gerald Deboy | Circuit configuration for load-relieved switching |
CN103367398A (zh) * | 2013-07-23 | 2013-10-23 | 上海北车永电电子科技有限公司 | 终端保护环及其制造方法 |
CN103824879A (zh) * | 2014-01-30 | 2014-05-28 | 株洲南车时代电气股份有限公司 | 一种功率器件结终端结构与制造方法 |
CN105895679A (zh) * | 2015-01-22 | 2016-08-24 | 肖胜安 | 一种绝缘栅双极晶体管的结构和制造方法 |
CN107924843A (zh) * | 2015-06-09 | 2018-04-17 | Abb瑞士股份有限公司 | 用于制造用于碳化硅功率半导体器件的边缘终端的方法 |
US20170062596A1 (en) * | 2015-08-31 | 2017-03-02 | Ixys Corporation | IGBT With Waved Floating P-Well Electron Injection |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110190029B (zh) * | 2019-04-28 | 2021-07-09 | 爱特微(张家港)半导体技术有限公司 | 一种功率半导体器件的制备方法 |
CN112713199A (zh) * | 2019-10-25 | 2021-04-27 | 株洲中车时代电气股份有限公司 | 碳化硅肖特基二极管及其制备方法 |
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