CN108565284A - 一种沟槽栅场截止逆导型igbt - Google Patents

一种沟槽栅场截止逆导型igbt Download PDF

Info

Publication number
CN108565284A
CN108565284A CN201810185958.0A CN201810185958A CN108565284A CN 108565284 A CN108565284 A CN 108565284A CN 201810185958 A CN201810185958 A CN 201810185958A CN 108565284 A CN108565284 A CN 108565284A
Authority
CN
China
Prior art keywords
area
trench
base
igbt
areas
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201810185958.0A
Other languages
English (en)
Inventor
刘志红
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STARPOWER SEMICONDUCTOR Ltd
Original Assignee
STARPOWER SEMICONDUCTOR Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STARPOWER SEMICONDUCTOR Ltd filed Critical STARPOWER SEMICONDUCTOR Ltd
Priority to CN201810185958.0A priority Critical patent/CN108565284A/zh
Publication of CN108565284A publication Critical patent/CN108565284A/zh
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7395Vertical transistors, e.g. vertical IGBT
    • H01L29/7396Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
    • H01L29/7397Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/0619Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

一种沟槽栅场截止逆导型IGBT,它是在N‑Base高电阻率半导体材料表面形成P Base区,在P Base区表面沿器件横向方向分别并列交替形成N+发射区和P+体接触区;在N+发射区紧临区域形成贯穿P Base区、且底部与N‑Base高电阻率半导体区相接触的沟槽区,沟槽区由位于槽内壁的绝缘介质层和由绝缘介质层包围的导电材料构成,由沟槽区中的导电材料引出栅电极,形成沟槽栅结构;N+发射区和P+体接触区的共同引出端为发射极电极;在N‑Base高电阻率半导体区的背面,沿器件横向方向由连续交替变换的N+型区和P+型区形成集电区,N+型区和P+型区的共同引出端为集电极;集电区的顶部引入具有电场截止作用的重掺杂N型缓冲层。

Description

一种沟槽栅场截止逆导型IGBT
技术领域
本发明涉及的是一种新型的沟槽栅场截止逆导型IGBT器件,属于功率半导体器件技术领域。
背景技术
IGBT(绝缘栅双极型晶体管)是一种新型功率半导体器件,其兼具有MOSFET的电压驱动、可工作频率高以及BJT的导通压降低、电流密度高的优点,因而被广泛应用于开关频率在30kHz以下,功率范围从1kW到5MW的电力电子系统中实现对电能的可控变换与控制。
图1所示为常规的采用IGBT作为三相桥逆变电路以驱动三相异步电动机的电路结构示意图,因为在一般的电力电子电路中,寄生电感的存在或负载具有感性,故在功率回路开关切断后需要为感性负载中储存的无功能量提供续流回路,故在此类应用中需要为每颗IGBT器件反并联一颗二极管器件。传统的解决方案是将IGBT芯片和二极管芯片通过一定的封装技术反并联连接到一起以提供正反向的电流通路,随着逆导型IGBT器件的出现,可以通过集成电路的方式将IGBT和续流二极管制作在同一颗芯片上面,这种方式的主要好处是可以大幅降低芯片的总成本、可以提高功率模块的功率密度(同一封装内可以提高电流等级),可以降低原先IGBT和续流二极管两颗芯片轮流工作带来的芯片结温大幅波动,提高芯片工作可靠性。故逆导型IGBT芯片技术是IGBT技术进一步发展的一个重要方向。
逆导型IGBT现阶段面临的两个主要问题是:其一,IGBT正向导通工作模式下存在着集电极电压的回跳现象(Snapback),如图2所示。电压回跳现象是由于逆导型IGBT存在着单极性MOSFET导电和双极性IGBT导电的两种工作模式的切换,电压回跳会导致并联的元胞之间或并联的芯片之间产生电流不均,极易导致器件损坏。其二,传统的与IGBT反并联的高压续流二极管均采用一定的载流子寿命控制技术,以提高二极管的反向恢复速度,降低反向恢复损耗。但在逆导型IGBT器件中,因二极管与IGBT集成在同一颗芯片之中,如果采用载流子寿命控制技术,会对IGBT工作模式下的性能和可靠性产生不利影响,故需要通过对器件结构的优化来大幅改善二极管的反向恢复性能。常规的不对二极管性能进行任何优化的逆导型IGBT一般不能满足典型感性负载应用的硬开关要求,只能应用于一些软开关模式下,对二极管反向恢复要求极低的领域,如:单端反激式电磁炉应用等。
发明内容
本发明的目的在于克服现有技术存在的不足,而提供一种在现有逆导型IGBT的二极管基础上,通过在逆导型IGBT中集成JBS肖特基二极管结构,在不影响逆导型IGBT其它性能的条件下,利用肖特基势垒较低的优势,可在降低逆导型IGBT在二极管正向导通模式下导通压降的同时,可大幅度减小逆导型IGBT的二极管反向恢复电荷和反向恢复能量,提升逆导型IGBT的二极管性能的沟槽栅场截止逆导型IGBT器件。
本发明的目的是通过如下技术方案来完成的,一种沟槽栅场截止逆导型IGBT,它是在N- Base高电阻率半导体材料表面形成P Base区,在所述P Base区表面沿器件横向方向分别并列交替形成N+发射区和P+体接触区;在N+发射区紧临区域形成贯穿P Base区、且底部与N- Base高电阻率半导体区相接触的沟槽区,沟槽区由位于槽内壁的绝缘介质层和由绝缘介质层包围的导电材料构成,由沟槽区中的导电材料引出栅电极,形成沟槽栅结构;所述N+发射区和P+体接触区的共同引出端为发射极电极;在N- Base高电阻率半导体区的背面,沿器件横向方向由连续交替变换的N+型区和P+型区形成集电区,所述N+型区和P+型区的共同引出端为集电极;所述集电区的顶部引入具有电场截止作用的重掺杂N型缓冲层,所述重掺杂N型缓冲层沿器件横向方向分布,位于N- Base高电阻率半导体区和集电区之间。
作为优选:所述P+体接触区中部形成N- Base高电阻率半导体区并与发射极金属层之间形成肖特基接触,使得逆导型IGBT发射极与集电极间形成结势垒肖特基二极管结构。
作为优选:P+体接触区的P+区在N- Base内的距离L需经过优化,且满足L>0,以在集电极与发射极加正向电压时,可在结势垒肖特基二极管结构区域形成的耗尽区完全耗尽P+体接触区之间的区域,形成对肖特基接触区的屏蔽,以提高结势垒肖特基二极管的耐压达到IGBT同等水平。
作为优选:所述结势垒肖特基二极管结构处于常规沟槽栅场截止IGBT的Dummy元胞区域,即该元胞内部与沟槽区临近的N+重掺杂区域、未形成与N+发射区类似的N+ 重掺杂结构。
本发明的主要有益效果为,可通过在传统沟槽栅场截止型逆导IGBT结构中用于控制短路电流的Dummy元胞内形成结型肖特基势垒二极管结构,利用肖特基势垒较低的优势,可在降低逆导型IGBT在二极管正向导通模式下的导通压降的同时,可大幅度减小逆导型IGBT的二极管反向恢复电荷和反向恢复能量,提升逆导型IGBT的二极管性能。
附图说明
图1是采用IGBT的桥式逆变电路示意图;
图2是逆导型IGBT的二极管反向恢复特性示意图;
图3是传统沟槽栅场截止逆导型IGBT结构示意图;
图4是本专利实施沟槽栅场截止逆导型IGBT结构示意图。
具体实施方式
下面结合附图对本发明进行详细的描述。图3所示,传统沟槽栅场截止逆导型IGBT结构是:在沟槽栅结构IGBT中一般存在两种IGBT元胞,一种为常规IGBT元胞,如图3中沟槽2左侧所示,其内部包含表面N+重掺杂区域31,以形成发射区结构,并作为发射极引出端;另一类元胞为Dummy元胞,如图3中沟槽2右侧所示,其内部不含有N+重掺杂区域,如图中区域33所示,该元胞无发射区引出,该类Dummy元胞主要用于减小沟槽栅IGBT的电流增益,降低IGBT短路电流幅值,提高短路可靠性,传统沟槽栅场截止逆导型IGBT同样具有芯片正面Dummy元胞结构,该区域未加以有效利用以提升芯片的整体性能,本发明即旨在对Dummy元胞区域进行结构改进,以用于改善逆导型IGBT的二极管反向恢复特性。
图4所示,本发明所述的一种沟槽栅场截止逆导型IGBT,它是在N- Base高电阻率半导体材料表面形成P Base区1,在所述P Base区1表面沿器件横向方向分别并列交替形成N+发射区31、32和P+体接触区41、42、43、44;在N+发射区31、32紧临区域形成贯穿P Base区1、且底部与N- Base高电阻率半导体区相接触的沟槽区2,沟槽区2由位于槽内壁的绝缘介质层21和由绝缘介质层21包围的导电材料22构成,由沟槽区2中的导电材料22引出栅电极,形成沟槽栅结构;所述N+发射区31、32和P+体接触区41、42、43、44的共同引出端为发射极电极;在N- Base高电阻率半导体区的背面,沿器件横向方向由连续交替变换的N+型区52和P+型区51形成集电区,所述N+型区52和P+型区51的共同引出端为集电极;所述集电区的顶部引入具有电场截止作用的重掺杂N型缓冲层6,所述重掺杂N型缓冲层6沿器件横向方向分布,位于N- Base高电阻率半导体区和集电区之间。
本发明所述P+体接触区43、44中部形成N- Base高电阻率半导体区并与发射极金属层之间形成肖特基接触,使得逆导型IGBT发射极与集电极间形成结势垒肖特基二极管结构7。
本发明所述P+体接触区43、44的P+区在N- Base内的距离L需经过优化,且满足L>0,以在集电极与发射极加正向电压时,可在结势垒肖特基二极管结构7区域形成的耗尽区完全耗尽P+体接触区43、44之间的区域,形成对肖特基接触区的屏蔽,以提高结势垒肖特基二极管的耐压达到IGBT同等水平。
所述结势垒肖特基二极管结构7处于常规沟槽栅场截止IGBT的Dummy元胞区域,即该元胞内部与沟槽区2临近的N+重掺杂区域33、34、未形成与N+发射区31、32类似的N+ 重掺杂结构。
本例的工作原理为:在传统的沟槽栅场截止逆导型IGBT结构中,因为要控制短路饱和电流的大小,使其发生短路工况时不致因瞬间释放能量过高而损坏,会在周期性重复的沟槽元胞中插入一定比例的Dummy Cell,以此来调节短路饱和电流的大小,该部分DummyCell对IGBT的反向耐压性能影响较小。
本实施例即在沟槽栅元胞中Dummy Cell区域中部构造出结势垒肖特基(JunctionBarrier Schottky)结构,在可以利用肖特基势垒较低的优势降低二极管的正向压降的同时,可利用该结型肖特基势垒二极管两侧的P+重掺杂深阱,在器件承受正向电压时对肖特基进行电场屏蔽,同时在二极管经历反向恢复时,利用肖特基快速反向恢复特性提升器件整体的二极管反向恢复性能,降低反向恢复损耗。

Claims (4)

1.一种沟槽栅场截止逆导型IGBT,其特征在于:在N- Base高电阻率半导体材料表面形成P Base区(1),在所述P Base区(1)表面沿器件横向方向分别并列交替形成N+发射区(31、32)和P+体接触区(41、42、43、44);在N+发射区(31、32)紧临区域形成贯穿P Base区(1)、且底部与N- Base高电阻率半导体区相接触的沟槽区(2),沟槽区(2)由位于槽内壁的绝缘介质层(21)和由绝缘介质层(21)包围的导电材料(22)构成,由沟槽区(2)中的导电材料(22)引出栅电极,形成沟槽栅结构;所述N+发射区(31、32)和P+体接触区(41、42、43、44)的共同引出端为发射极电极;在N- Base高电阻率半导体区的背面,沿器件横向方向由连续交替变换的N+型区(52)和P+型区(51)形成集电区,所述N+型区(52)和P+型区(51)的共同引出端为集电极;所述集电区的顶部引入具有电场截止作用的重掺杂N型缓冲层(6),所述重掺杂N型缓冲层(6)沿器件横向方向分布,位于N- Base高电阻率半导体区和集电区之间。
2.根据权利要求1所述的沟槽栅场截止逆导型IGBT,其特征在于:所述P+体接触区(43、44)中部形成N- Base高电阻率半导体区并与发射极金属层之间形成肖特基接触,使得逆导型IGBT发射极与集电极间形成结势垒肖特基二极管结构(7)。
3.根据权利要求2所述的沟槽栅场截止逆导型IGBT,其特征在于:P+体接触区(43、44)的P+区在N- Base内的距离L需经过优化,且满足L>0,以在集电极与发射极加正向电压时,可在结势垒肖特基二极管结构(7)区域形成的耗尽区完全耗尽P+体接触区(43、44)之间的区域,形成对肖特基接触区的屏蔽,以提高结势垒肖特基二极管的耐压达到IGBT同等水平。
4.根据权利要求2或3所述的沟槽栅场截止逆导型IGBT,其特征在于:所述结势垒肖特基二极管结构(7)处于常规沟槽栅场截止IGBT的Dummy元胞区域,即该元胞内部与沟槽区(2)临近的N+重掺杂区域(33、34)、未形成与N+发射区(31、32)类似的N+ 重掺杂结构。
CN201810185958.0A 2018-03-07 2018-03-07 一种沟槽栅场截止逆导型igbt Pending CN108565284A (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201810185958.0A CN108565284A (zh) 2018-03-07 2018-03-07 一种沟槽栅场截止逆导型igbt

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201810185958.0A CN108565284A (zh) 2018-03-07 2018-03-07 一种沟槽栅场截止逆导型igbt

Publications (1)

Publication Number Publication Date
CN108565284A true CN108565284A (zh) 2018-09-21

Family

ID=63532363

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201810185958.0A Pending CN108565284A (zh) 2018-03-07 2018-03-07 一种沟槽栅场截止逆导型igbt

Country Status (1)

Country Link
CN (1) CN108565284A (zh)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111735549A (zh) * 2019-03-25 2020-10-02 株洲中车时代电气股份有限公司 集成于igbt芯片的温度传感器及其制造方法
CN112018174A (zh) * 2020-08-19 2020-12-01 广东美的白色家电技术创新中心有限公司 一种半导体器件及其制作方法、家用电器
CN112687744A (zh) * 2020-12-29 2021-04-20 电子科技大学 平面型碳化硅逆阻mosfet器件及其制备方法
CN115117152A (zh) * 2022-08-26 2022-09-27 深圳芯能半导体技术有限公司 一种逆导型igbt器件及制备方法
CN115832039A (zh) * 2022-12-09 2023-03-21 宁波达新半导体有限公司 一种逆导型igbt器件

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106024876A (zh) * 2016-07-19 2016-10-12 东南大学 用于消除回滞现象的逆导型横向绝缘栅双极型晶体管器件
CN106206679A (zh) * 2016-08-31 2016-12-07 电子科技大学 一种逆导型igbt
CN106252399A (zh) * 2016-08-31 2016-12-21 电子科技大学 一种逆导型igbt
CN207938615U (zh) * 2018-03-07 2018-10-02 嘉兴斯达半导体股份有限公司 沟槽栅场截止逆导型igbt

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106024876A (zh) * 2016-07-19 2016-10-12 东南大学 用于消除回滞现象的逆导型横向绝缘栅双极型晶体管器件
CN106206679A (zh) * 2016-08-31 2016-12-07 电子科技大学 一种逆导型igbt
CN106252399A (zh) * 2016-08-31 2016-12-21 电子科技大学 一种逆导型igbt
CN207938615U (zh) * 2018-03-07 2018-10-02 嘉兴斯达半导体股份有限公司 沟槽栅场截止逆导型igbt

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111735549A (zh) * 2019-03-25 2020-10-02 株洲中车时代电气股份有限公司 集成于igbt芯片的温度传感器及其制造方法
CN112018174A (zh) * 2020-08-19 2020-12-01 广东美的白色家电技术创新中心有限公司 一种半导体器件及其制作方法、家用电器
CN112687744A (zh) * 2020-12-29 2021-04-20 电子科技大学 平面型碳化硅逆阻mosfet器件及其制备方法
CN112687744B (zh) * 2020-12-29 2022-05-24 电子科技大学 平面型碳化硅逆阻mosfet器件及其制备方法
CN115117152A (zh) * 2022-08-26 2022-09-27 深圳芯能半导体技术有限公司 一种逆导型igbt器件及制备方法
CN115832039A (zh) * 2022-12-09 2023-03-21 宁波达新半导体有限公司 一种逆导型igbt器件

Similar Documents

Publication Publication Date Title
CN102593168B (zh) 半导体器件和逆导igbt
CN108565284A (zh) 一种沟槽栅场截止逆导型igbt
CN110797403B (zh) 一种rc-igbt半导体装置
KR101808411B1 (ko) 반도체 장치
CN102683403B (zh) 一种沟槽栅电荷存储型igbt
KR101613442B1 (ko) 절연 게이트형 바이폴라 트랜지스터
CN109427869B (zh) 一种半导体器件
CN107464842A (zh) 一种具有集电极槽的超结逆导型igbt
JP2013115223A (ja) 半導体装置
CN109888007B (zh) 具有二极管钳位载流子存储层的soi ligbt器件
CN106252399B (zh) 一种逆导型igbt
CN106024876B (zh) 用于消除回滞现象的逆导型横向绝缘栅双极型晶体管器件
CN109103257A (zh) 高可靠性深沟槽功率mos器件
CN110444589B (zh) 一种具有过流保护功能的igbt
US11973132B2 (en) Semiconductor device comprising insulated gate bipolar transistor (IGBT), diode, and well region
CN107516679B (zh) 一种深槽超结dmos器件
CN207938615U (zh) 沟槽栅场截止逆导型igbt
CN208835068U (zh) 高可靠性深沟槽功率mos器件
CN109686787A (zh) 一种利用二极管钳位的具有载流子存储层的igbt器件
CN110504312B (zh) 一种具有短路自保护能力的横向igbt
CN111900202A (zh) 一种沟槽栅igbt器件
CN110504259B (zh) 一种具有过流保护能力的横向igbt
CN112750901B (zh) 一种逆导型igbt器件及智能功率模块
CN113644137B (zh) 一种大功率快恢复二极管结构
WO2022224840A1 (ja) 半導体装置及びそれを用いた電力変換装置、半導体装置の製造方法

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
CB02 Change of applicant information

Address after: No.988, Kexing Road, Nanhu District, Jiaxing City, Zhejiang Province

Applicant after: Star Semiconductor Co.,Ltd.

Address before: No.988, Kexing Road, Nanhu District, Jiaxing City, Zhejiang Province

Applicant before: STARPOWER SEMICONDUCTOR Ltd.

CB02 Change of applicant information