CN108535626B - A fully automatic testing device and method for SOC single particle testing - Google Patents

A fully automatic testing device and method for SOC single particle testing Download PDF

Info

Publication number
CN108535626B
CN108535626B CN201711477725.XA CN201711477725A CN108535626B CN 108535626 B CN108535626 B CN 108535626B CN 201711477725 A CN201711477725 A CN 201711477725A CN 108535626 B CN108535626 B CN 108535626B
Authority
CN
China
Prior art keywords
host
soc chip
tested
power supply
soc
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201711477725.XA
Other languages
Chinese (zh)
Other versions
CN108535626A (en
Inventor
沈国琳
于立新
彭和平
庄伟�
亓洪亮
王舒敏
刘亚丽
尤利达
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Beijing Microelectronic Technology Institute
Mxtronics Corp
Original Assignee
Beijing Microelectronic Technology Institute
Mxtronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Beijing Microelectronic Technology Institute, Mxtronics Corp filed Critical Beijing Microelectronic Technology Institute
Priority to CN201711477725.XA priority Critical patent/CN108535626B/en
Publication of CN108535626A publication Critical patent/CN108535626A/en
Application granted granted Critical
Publication of CN108535626B publication Critical patent/CN108535626B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

一种SOC单粒子测试的全自动测试装置,包括主机、SOC测试板和程控电源;所述SOC测试板包括flash、被测SOC芯片和上电复位电路;所述主机通过指令命令被测SOC芯片依次遍历被测SOC芯片内的存储区域或者模块,被测SOC芯片获得遍历结果后以固定周期发送给主机;主机接收并存储被测SOC芯片发送的遍历结果;同时主机监测并存储被测SOC芯片发送遍历结果的状态和程控电源的电流,主机还用于控制程控电源的断电和加电;主机利用被测SOC芯片发送的遍历结果和被测SOC芯片发送遍历结果的状态,然后采用统计方法完成被测SOC芯片的测试。同时本发明还包括一种SOC单粒子测试的全自动测试方法。

Figure 201711477725

A fully automatic testing device for SOC single-particle testing, comprising a host, a SOC test board and a program-controlled power supply; the SOC test board includes a flash, a tested SOC chip and a power-on reset circuit; the host commands the tested SOC chip through an instruction Traverse the storage areas or modules in the tested SOC chip in turn, and the tested SOC chip obtains the traversal results and sends them to the host in a fixed period; the host receives and stores the traversal results sent by the tested SOC chip; at the same time, the host monitors and stores the tested SOC chip Send the status of the traversal results and the current of the program-controlled power supply, and the host is also used to control the power-off and power-on of the program-controlled power supply; the host uses the traversal results sent by the tested SOC chip and the state of the traversal results sent by the tested SOC chip, and then uses statistical methods. Complete the test of the SOC chip under test. At the same time, the invention also includes a fully automatic testing method for SOC single particle testing.

Figure 201711477725

Description

Full-automatic test device and method for SOC single particle test
Technical Field
The invention relates to a full-automatic testing device and method for SOC single event testing, and belongs to the technical field of computers.
Background
The space processor is affected by radiation, which may cause the memory content in the memory bank to suddenly change between "0" and "1", thereby causing the wrong logic state of the semiconductor circuit, affecting the function of the semiconductor device, commonly referred to as Single Event Upset (SEU), and also may cause the latch-up phenomenon that the parasitic thyristor inherent in the CMOS device is triggered to turn on, forming a low-impedance large-current path between the power supply and the ground. In order to test the operation state of the space processor in the space environment, the irradiation experiment is carried out on the ground surface as a necessary approach. The irradiation particle accelerator can send a large amount of particle (preset) radiation with different energies to a space processor to be tested in a short time, and further imitates the influence of the processor after long-time irradiation in a space environment in a short time. The machine of the particle accelerator needs to be reserved in advance, and the value is high. In the conventional method for testing the SOC, the test board is manually controlled to reload the program, so that on one hand, time is consumed, and on the other hand, if irradiation is continued in the process of downloading the program, statistical errors can be caused.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: the full-automatic test device and method for SOC single event test overcome the defects of the prior art, can complete the automatic test of the tested SOC chip by constructing the SOC test board and combining the host, improve the test precision, shorten the test period, improve the test reliability, and greatly save manpower, material resources and time cost.
The purpose of the invention is realized by the following technical scheme:
a full-automatic test device for SOC single-particle test comprises a host, an SOC test board and a programmable power supply; the SOC test board comprises a flash, a SOC chip to be tested and a power-on reset circuit;
the host computer orders the SOC chip to be tested to sequentially traverse the storage area or the module in the SOC chip to be tested through the instruction, and the SOC chip to be tested obtains a traversal result and then sends the traversal result to the host computer in a fixed period; the host receives and stores the traversal result sent by the SOC chip to be tested; meanwhile, the host monitors and stores the state of the traversal result sent by the SOC chip to be tested and the current of the programmable power supply, and is also used for controlling the power-off and power-on of the programmable power supply; the host machine utilizes the traversal result sent by the SOC chip to be tested and the state of the traversal result sent by the SOC chip to be tested, and then adopts a statistical method to complete the test of the SOC chip to be tested;
when the host does not receive the traversal result sent by the SOC chip to be tested in a fixed period, the host judges that the SOC chip to be tested has a crash failure mode; and then the host commands the programmable power supply to be powered up again, and when the SOC chip to be tested is powered up again, the power-on reset circuit controls the SOC chip to be tested to read the reset program in the flash, so that the storage area or the module in the SOC chip to be tested is initialized normally.
According to the full-automatic test device for the SOC single-particle test, the host computer orders the SOC chip to be tested to sequentially traverse the storage area or the module in the SOC chip to be tested through the automatic control instruction or the manual control instruction.
In the fully-automatic test device for the SOC single-particle test, the traversal result sent by the tested SOC chip comprises the upset error mode generated by the tested SOC chip.
According to the full-automatic testing device for the SOC single-event test, the host monitors the current of the programmable power supply, and when the current of the programmable power supply is more than 2 times of the rated current of the SOC chip to be tested, the host controls the programmable power supply to be powered off.
According to the full-automatic test device for the SOC single-particle test, the tested SOC chip sends the traversal result to the host at a fixed period of 0.1-3 s.
According to the full-automatic testing device for the SOC single event test, when the host monitors the state that the tested SOC chip sends the traversal result and the current of the programmable power supply, the current abnormity priority of the programmable power supply is higher than the state fault mode that the tested SOC chip sends the traversal result, namely when the host judges that the current of the tested SOC chip is abnormal by monitoring the current of the programmable power supply, the programmable power supply is preferentially controlled to be powered off.
According to the full-automatic test device for the SOC single-event test, the SOC test board further comprises a power supply, the programmable power supply supplies power to other components of the SOC test board through the power supply, and the power supply is used for finishing voltage transformation output by the programmable power supply.
According to the full-automatic test device for the SOC single-particle test, the SOC test board further comprises a Max3232 module, and the Max3232 module is used for testing a serial port controller of the SOC chip to be tested; meanwhile, the Max3232 module is used for serial port communication between the SOC chip to be tested and the host.
A full-automatic test method for SOC single-particle test comprises the following steps:
selecting an automatic mode or a manual mode on a host to carry out SOC single-particle test;
step two, the host computer orders the SOC chip to be tested to sequentially traverse the storage area or the module in the SOC chip to be tested through the instruction, and simultaneously monitors and stores the state of the traverse result sent by the SOC chip to be tested and the current of the programmable power supply;
thirdly, the host machine judges the current of the program control power supply; if the current is abnormal, the test is finished, otherwise, the step four is carried out;
step four, the host judges the state of the traversal result sent by the SOC chip to be tested; if the state is normal, the step two is carried out, the storage area or the module in the SOC chip to be tested is continuously traversed until the test is finished, and otherwise, the step five is carried out;
and step five, the host commands the programmable power supply to be powered up again, initializes the storage area or the module in the SOC chip to be tested, and then shifts to step two until the test is finished.
Compared with the prior art, the invention has the following beneficial effects:
(1) compared with the prior art, the device has the advantages that the operation of the test process is simple, the test result is obtained under the condition of less human intervention, the test efficiency is high, and the test period is short;
(2) the host of the device provides automatic protection for the SOC test board, if the current exceeds twice of the rated limit, the power is automatically cut off for alarming, and the SOC chip to be tested can be powered on after confirmation, so that the SOC chip to be tested is effectively protected;
(3) the device can greatly save the test time, the whole experiment process in the manual measurement mode in the prior art can be completed by at least two persons, and after the device and the method are adopted, the whole test can be completed by only monitoring the device by one person; the power-on operation is automatically carried out after the SOC test chip is automatically judged to be dead, and the process saves at least ten percent of time;
(4) the device can improve the measurement response precision, can automatically measure data in a period of 0.1s, is far less than the fastest manual 1s in the prior art, saves the test period, and simultaneously, can detect the data more quickly, thereby further improving the measurement precision.
Drawings
FIG. 1 is a schematic diagram of a fully automatic test device for SOC single event testing according to the present invention;
FIG. 2 is a flow chart of a fully automatic test method for SOC single event testing according to the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
A full-automatic test device for SOC single-particle test comprises a remote monitor, a host, an SOC test board and a programmable power supply. The SOC test board comprises an MAC module, an sram module, a flash module, a Max3232 module, a DDR module, a SOC chip to be tested, a power supply module and a power-on reset circuit, and is shown in figure 1.
The SOC chip to be tested comprises a plurality of storage areas or modules; the SOC chip to be tested sequentially traverses a storage area or a module in the SOC chip to be tested according to the instruction of the host, and a program traversing the storage area or the module in the SOC chip to be tested is stored in the flash module; after the SOC chip receives the traversal command sent by the host, the SOC chip reads the traversal program from the flash module, and then the SOC chip sequentially traverses the storage area or the module in the SOC chip.
The SOC chip to be tested obtains the traversal result, and the SOC chip to be tested is sent to the host computer at a fixed period of 0.1-3 s through the serial port; in this embodiment, the SOC chip under test sends the traversal result to the host at a fixed period of 0.5s, where the traversal result includes a rollover error pattern occurring in a storage area or a module in the SOC chip under test.
The host is used for controlling the SOC chip to be tested to sequentially traverse the storage area or the module in the SOC chip to be tested, the host can command the SOC chip to be tested to sequentially traverse the storage area or the module in the SOC chip to be tested through an automatic control instruction or a manual control instruction, and then the host receives and stores a traversal result sent by the SOC chip to be tested; meanwhile, the host monitors and stores the state of the traversal result sent by the SOC chip to be tested and the current of the programmable power supply, and controls the power-off and power-on of the programmable power supply. And the host completes the test of the SOC chip to be tested by adopting a statistical method according to the traversal result sent by the SOC chip to be tested and the state of the traversal result sent by the SOC chip to be tested.
Specifically, the host obtains a turnover error mode of the SOC chip from a traversal result sent by the SOC chip to be tested; the host judges whether the state of the traversal result sent by the SOC chip to be tested is normal, when the SOC chip to be tested sends the traversal result to the host through the serial port in a fixed period, the host judges that the SOC chip to be tested does not have a dead halt fault mode, when the host does not receive the traversal result sent by the SOC chip to be tested in the fixed period, the host judges that the SOC chip to be tested has the dead halt fault mode, in the embodiment, when the host does not receive the traversal result sent by the SOC chip to be tested in 1s, the host judges that the SOC chip to be tested has the dead halt fault mode.
The purpose of monitoring the current of the programmable power supply by the host computer is to judge whether the current of the SOC chip to be tested is abnormal, when the current of the programmable power supply is more than 2 times of the rated current of the SOC chip to be tested, the host computer judges that the current of the SOC chip to be tested is abnormal, the host computer controls the programmable power supply to be powered off, and the physical damage of the SOC chip to be tested caused by the abnormal current is avoided. In the process that the host monitors the state that the SOC chip to be tested sends the traversal result and the current of the programmable power supply, the priority of the current of the programmable power supply is higher than the state that the SOC chip to be tested sends the traversal result, namely when the host judges that the current of the SOC chip to be tested is abnormal by monitoring the current of the programmable power supply, the programmable power supply is directly controlled to be powered off.
When the host computer judges that the SOC chip to be tested has a crash failure mode, the host computer sends a command to the programmable power supply to command the programmable power supply to be powered off, then the host computer sends a command to the programmable power supply to command the programmable power supply to be powered on, and the programmable power supply is used for supplying power to the SOC test board. When the SOC chip to be tested is powered on again, the power-on reset circuit sends a power-on reset pulse to the SOC chip to be tested, and after the SOC chip to be tested receives the power-on reset pulse, the SOC chip to be tested reads a reset program in the flash so as to ensure that a storage area or a module in the SOC chip to be tested is initialized normally.
The remote monitor is used for monitoring a command sent by the host to the SOC chip to be tested, a traversal result sent to the host after the SOC chip to be tested traverses, the current of the program-controlled power supply monitored by the host, and the power failure of the program-controlled power supply controlled by the host, and meanwhile, the remote monitor can control the command sent by the host to the SOC chip to be tested and the power failure command of the program-controlled power supply controlled by the host. The remote monitor can be far away from the host, which is beneficial to realizing remote monitoring and control, and is convenient for equipment arrangement in the test process, and reduces the equipment arrangement near the test environment.
The power supply is used for finishing voltage conversion output by the program control power supply so as to meet the voltage requirement of normal work of other components in the SOC test boards such as the SOC chip to be tested. The program-controlled power supply has the function of multi-output of V1, V2, V3, V4 and the like, and can meet the voltage requirements of normal work of other components in a plurality of different SOC chips to be tested and SOC test boards when being matched with the power supply.
The MAC module is used for testing the Ethernet transmission controller of the SOC chip to be tested, and can measure each working mode of the Ethernet transmission controller.
The Max3232 module is used as a serial port module of the SOC test board and is used for testing whether a serial port controller of the SOC chip to be tested is normal or not on one hand; on the other hand, the Max3232 module is used for serial port communication between the SOC chip to be tested and the host, namely the host sends an instruction to the SOC chip to be tested through the Max3232 module, and the SOC chip to be tested sends a traversal result through the Max3232 module.
The DDR module is used for testing whether the DDR control module of the SOC chip to be tested is normal in function.
The sram module is used for testing whether the sram memory controller of the tested SOC chip is normal.
A full-automatic test method for SOC single event test is disclosed, as shown in FIG. 2, which is realized by using the full-automatic test of SOC single event test, and comprises the following steps:
selecting an automatic mode or a manual mode on a host to carry out SOC single-particle test;
step two, the host computer orders the SOC chip to be tested to sequentially traverse the storage area or the module in the SOC chip to be tested through the instruction, and simultaneously monitors and stores the state of the traverse result sent by the SOC chip to be tested and the current of the programmable power supply;
thirdly, the host machine judges the current of the program control power supply; if the current is abnormal, the test is finished, otherwise, the step four is carried out;
step four, the host judges the state of the traversal result sent by the SOC chip to be tested; if the state is normal, the step two is carried out, the storage area or the module in the SOC chip to be tested is continuously traversed until the test is finished, and otherwise, the step five is carried out;
and step five, the host commands the programmable power supply to be powered up again, initializes the storage area or the module in the SOC chip to be tested, and then shifts to step two until the test is finished.
In the device and the operation process of the invention, the SOC test board is fixed in the particle emitter, the irradiation particles are adjusted to hit the SOC test chip to be tested by adjusting the position and the distance of the SOC test board, and simultaneously, the irradiation particles are prevented from influencing other circuits, and the programmable power supply and the host are connected with the SOC test board through data lines outside the experimental environment.
Those skilled in the art will appreciate that those matters not described in detail in the present specification are well known in the art.

Claims (5)

1.一种SOC单粒子测试的全自动测试装置,其特征在于:包括主机、SOC测试板和程控电源;所述SOC测试板包括flash、被测SOC芯片和上电复位电路;还包括远程监控器;1. a fully automatic testing device for SOC single-particle testing, characterized in that: comprising a host, a SOC test board and a program-controlled power supply; the SOC test board comprises flash, a tested SOC chip and a power-on reset circuit; also includes a remote monitoring device; 所述主机通过指令命令被测SOC芯片依次遍历被测SOC芯片内的存储区域或者模块,被测SOC芯片获得遍历结果后以固定周期发送给主机;主机接收并存储被测SOC芯片发送的遍历结果;同时主机监测并存储被测SOC芯片发送遍历结果的状态和程控电源的电流,主机还用于控制程控电源的断电和加电;主机利用被测SOC芯片发送的遍历结果和被测SOC芯片发送遍历结果的状态,然后采用统计方法完成被测SOC芯片的测试;The host instructs the tested SOC chip to traverse the storage area or module in the tested SOC chip in turn through instructions, and the tested SOC chip obtains the traversal result and sends it to the host in a fixed period; the host receives and stores the traversal result sent by the tested SOC chip ;At the same time, the host monitors and stores the state of the traversal results sent by the tested SOC chip and the current of the program-controlled power supply, and the host is also used to control the power-off and power-on of the program-controlled power supply; the host uses the traversal results sent by the tested SOC chip and the tested SOC chip. Send the status of the traversal results, and then use the statistical method to complete the test of the SOC chip under test; 当主机在固定周期内未收到上述被测SOC芯片发送的遍历结果,主机判定被测SOC芯片发生死机故障模式;然后主机命令程控电源重新加电,被测SOC芯片被重新加电时,上电复位电路控制被测SOC芯片读取flash中的复位程序,使被测SOC芯片内的存储区域或模块正常初始化;When the host does not receive the traversal results sent by the tested SOC chip within a fixed period, the host determines that the tested SOC chip has a crash failure mode; then the host commands the program-controlled power supply to re-power on, and when the tested SOC chip is powered on again, the The electrical reset circuit controls the tested SOC chip to read the reset program in the flash, so that the storage area or module in the tested SOC chip is initialized normally; 远程监控器用于监视主机向被测SOC芯片发送的指令、被测SOC芯片遍历后向主机发送的遍历结果、主机监测的程控电源的电流、主机控制程控电源断电,同时远程监控器能够控制主机向被测SOC芯片发送的指令和主机控制程控电源的断电指令;远程监视器远离主机,实现远程监视与控制,同时便于测试过程中的设备布置,减少测试环境附近的设备安放;The remote monitor is used to monitor the instructions sent by the host to the tested SOC chip, the traversal results sent to the host after the tested SOC chip has traversed, the current of the program-controlled power supply monitored by the host, and the power-off of the host-controlled program-controlled power supply. At the same time, the remote monitor can control the host. The command sent to the SOC chip under test and the power-off command of the host to control the program-controlled power supply; the remote monitor is far away from the host to realize remote monitoring and control, and at the same time, it is convenient for the arrangement of equipment during the test process and reduces the placement of equipment near the test environment; 所述SOC测试板还包括电源,程控电源通过电源向SOC测试板的其他组件供电,电源用于完成程控电源输出的电压变换;The SOC test board also includes a power supply, and the program-controlled power supply supplies power to other components of the SOC test board through the power supply, and the power supply is used to complete the voltage transformation of the output of the program-controlled power supply; 所述被测SOC芯片发送的遍历结果包括被测SOC芯片发生的翻转错误模式;The traversal result sent by the tested SOC chip includes the flip error pattern that occurs in the tested SOC chip; 所述主机监测程控电源的电流,当程控电源的电流大于被测SOC芯片额定电流的2倍时,主机控制程控电源断电;The host monitors the current of the program-controlled power supply, and when the current of the program-controlled power supply is greater than twice the rated current of the tested SOC chip, the host controls the program-controlled power supply to power off; 所述主机监测被测SOC芯片发送遍历结果的状态和程控电源的电流,程控电源的电流异常优先级高于被测SOC芯片发送遍历结果的状态故障模式,即主机通过监测程控电源的电流判定被测SOC芯片的电流异常时,优先控制程控电源断电。The host monitors the state of the traversal result sent by the SOC chip under test and the current of the program-controlled power supply. The abnormal current priority of the program-controlled power supply is higher than the state failure mode of the traversal result sent by the tested SOC chip, that is, the host determines that the current of the program-controlled power supply is detected by monitoring the current of the program-controlled power supply. When the current of the measured SOC chip is abnormal, the program-controlled power supply is given priority to power off. 2.根据权利要求1所述的一种SOC单粒子测试的全自动测试装置,其特征在于:所述主机通过自动控制指令或手动控制指令命令被测SOC芯片依次遍历被测SOC芯片内的存储区域或者模块。2. The fully automatic testing device of a SOC single-particle test according to claim 1, wherein the host instructs the tested SOC chip to sequentially traverse the storage in the tested SOC chip through automatic control instructions or manual control instructions area or module. 3.根据权利要求1所述的一种SOC单粒子测试的全自动测试装置,其特征在于:所述被测SOC芯片以0.1s~3s的固定周期将遍历结果发送给主机。3 . The fully automatic testing device for SOC single particle testing according to claim 1 , wherein the tested SOC chip sends the traversal result to the host at a fixed period of 0.1s to 3s. 4 . 4.根据权利要求1~3之一所述的一种SOC单粒子测试的全自动测试装置,其特征在于:所述SOC测试板还包括Max3232模块,Max3232模块用于测试被测SOC芯片的串口控制器;同时Max3232模块用于被测SOC芯片和主机之间的串口通信。4. The fully automatic test device for SOC single-particle test according to one of claims 1 to 3, wherein the SOC test board further comprises a Max3232 module, and the Max3232 module is used to test the serial port of the tested SOC chip Controller; at the same time, the Max3232 module is used for serial communication between the tested SOC chip and the host. 5.一种SOC单粒子测试的全自动测试方法,其特征在于:采用权利要求1所述的全自动测试装置,包括如下步骤:5. a fully automatic testing method of SOC single particle test is characterized in that: adopt the fully automatic testing device described in claim 1, comprise the steps: 步骤一、在主机上选择自动模式或手动模式开展SOC单粒子测试;Step 1. Select automatic mode or manual mode on the host to carry out SOC single event test; 步骤二、主机通过指令命令被测SOC芯片依次遍历被测SOC芯片内的存储区域或者模块,同时主机监测并存储被测SOC芯片发送遍历结果的状态和程控电源的电流;Step 2: The host instructs the tested SOC chip to traverse the storage area or module in the tested SOC chip in turn through an instruction, and the host monitors and stores the state of the traversal result sent by the tested SOC chip and the current of the program-controlled power supply; 步骤三、主机判断程控电源的电流;如果上述电流异常,则测试结束,否则转入步骤四;Step 3, the host determines the current of the program-controlled power supply; if the above current is abnormal, the test is over, otherwise, go to Step 4; 步骤四、主机判断被测SOC芯片发送遍历结果的状态;如果上述状态正常,则转入步骤二,继续遍历被测SOC芯片内的存储区域或者模块,直到测试结束,否则转入步骤五;Step 4: The host determines the state of the traversal result sent by the tested SOC chip; if the above state is normal, then go to step 2, and continue to traverse the storage area or module in the tested SOC chip until the test is over, otherwise go to step five; 步骤五、主机命令程控电源重新加电,被测SOC芯片内的存储区域或模块初始化,然后转入步骤二,直到测试结束。Step 5: The host instructs the program-controlled power supply to re-power on, the storage area or module in the tested SOC chip is initialized, and then goes to step 2 until the test ends.
CN201711477725.XA 2017-12-29 2017-12-29 A fully automatic testing device and method for SOC single particle testing Active CN108535626B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201711477725.XA CN108535626B (en) 2017-12-29 2017-12-29 A fully automatic testing device and method for SOC single particle testing

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201711477725.XA CN108535626B (en) 2017-12-29 2017-12-29 A fully automatic testing device and method for SOC single particle testing

Publications (2)

Publication Number Publication Date
CN108535626A CN108535626A (en) 2018-09-14
CN108535626B true CN108535626B (en) 2021-06-08

Family

ID=63489808

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201711477725.XA Active CN108535626B (en) 2017-12-29 2017-12-29 A fully automatic testing device and method for SOC single particle testing

Country Status (1)

Country Link
CN (1) CN108535626B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109581185B (en) * 2018-11-16 2021-11-09 北京时代民芯科技有限公司 SoC chip laser simulation single particle irradiation detection and fault positioning method and system

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1760676A (en) * 2004-10-14 2006-04-19 中国科学院空间科学与应用研究中心 A kind of detector and method that detects capability of microprocessor for anti event of single particle
CN101145118A (en) * 2007-10-30 2008-03-19 北京时代民芯科技有限公司 SPARC processor single particle effect detection device and method
CN101196837A (en) * 2007-12-26 2008-06-11 北京时代民芯科技有限公司 Device for detecting 80C31 single particle effect
CN101286126A (en) * 2008-06-13 2008-10-15 北京时代民芯科技有限公司 Spatial processor single particle experiment automatized test system and method
CN103744014A (en) * 2013-12-24 2014-04-23 北京微电子技术研究所 SRAM type FPGA single particle irradiation test system and method
CN104793080A (en) * 2015-04-16 2015-07-22 西安交通大学 Method for testing single event effect of on-chip system

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107271885A (en) * 2017-07-05 2017-10-20 西安微电子技术研究所 A kind of single particle experiment system suitable for processor class device

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1760676A (en) * 2004-10-14 2006-04-19 中国科学院空间科学与应用研究中心 A kind of detector and method that detects capability of microprocessor for anti event of single particle
CN101145118A (en) * 2007-10-30 2008-03-19 北京时代民芯科技有限公司 SPARC processor single particle effect detection device and method
CN101196837A (en) * 2007-12-26 2008-06-11 北京时代民芯科技有限公司 Device for detecting 80C31 single particle effect
CN101286126A (en) * 2008-06-13 2008-10-15 北京时代民芯科技有限公司 Spatial processor single particle experiment automatized test system and method
CN103744014A (en) * 2013-12-24 2014-04-23 北京微电子技术研究所 SRAM type FPGA single particle irradiation test system and method
CN104793080A (en) * 2015-04-16 2015-07-22 西安交通大学 Method for testing single event effect of on-chip system

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
一种微控制器单粒子效应在轨监测系统设计;曹光伟 等;《航天器环境工程》;20141231;第31卷(第6期);1-3节 *
曹光伟 等.一种微控制器单粒子效应在轨监测系统设计.《航天器环境工程》.2014,第31卷(第6期),第1-3节. *

Also Published As

Publication number Publication date
CN108535626A (en) 2018-09-14

Similar Documents

Publication Publication Date Title
CN107678356B (en) Flexible direct-current transmission system simulation experiment device and method based on FPGA chip platform
CN104572371B (en) A kind of hard disk powered-off fault tests system
CN104021093A (en) Power-down protection method for memory device based on NVDIMM (non-volatile dual in-line memory module)
CN104237685B (en) A kind of space single particle effect test method
US10191827B2 (en) Methods, systems, and computer readable media for utilizing loopback operations to identify a faulty subsystem layer in a multilayered system
US20160189802A1 (en) Semiconductor memory and system using the same
CN102981093A (en) Test system for central processing unit (CPU) module
TW201629960A (en) Apparatuses and methods to perform post package trim
CN108535626B (en) A fully automatic testing device and method for SOC single particle testing
CN110989562B (en) Testing system and method of valve control system
CN108009062A (en) A kind of enterprise-level SSD system power failures function test method, apparatus and system
CN103092310A (en) Power supply control device and processing system
TWI711361B (en) Stacked structure of circuit boards
WO2019041663A1 (en) Die test device and method
US20250045220A1 (en) Method for controlling a target memory by programmably selecting an action execution circuit module corresponding to a triggered preset state
CN110570893B (en) Flash automatic screening system and screening method for realizing voltage bias
US20140115307A1 (en) Method and System for Resetting a SoC
TWI485417B (en) Disposing method and system of over-current protection point for eletrical device and control device thereof
CN104183272A (en) Self-inspection and burning device and method of stamp hole packaging core board
WO2022056772A1 (en) Self-locking and detection circuit and apparatus, and control method
CN107181235A (en) Fault control for high-current pulse power supply
CN105608278B (en) A kind of electrifying timing sequence configuration method based on OpenPower platforms
CN112115011A (en) Method, device and system for testing automatic sleep function in Linux system
CN114734941A (en) Vehicle body control system and method matched with different wire diameters
CN109596970A (en) PCBA board test macro

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant