CN108463527B - Sheet for manufacturing three-dimensional integrated laminated circuit and method for manufacturing three-dimensional integrated laminated circuit - Google Patents

Sheet for manufacturing three-dimensional integrated laminated circuit and method for manufacturing three-dimensional integrated laminated circuit Download PDF

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CN108463527B
CN108463527B CN201780004484.9A CN201780004484A CN108463527B CN 108463527 B CN108463527 B CN 108463527B CN 201780004484 A CN201780004484 A CN 201780004484A CN 108463527 B CN108463527 B CN 108463527B
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adhesive layer
laminated circuit
sheet
dimensional integrated
integrated laminated
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CN108463527A (en
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根津裕介
杉野贵志
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Lintec Corp
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Lintec Corp
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    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J5/00—Adhesive processes in general; Adhesive processes not provided for elsewhere, e.g. relating to primers
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J7/00—Adhesives in the form of films or foils
    • C09J7/20—Adhesives in the form of films or foils characterised by their carriers
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J11/00—Features of adhesives not provided for in group C09J9/00, e.g. additives
    • C09J11/02—Non-macromolecular additives
    • C09J11/04—Non-macromolecular additives inorganic
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J201/00—Adhesives based on unspecified macromolecular compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H01L23/3672—Foil-like cooling fins or heat sinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2203/00—Applications of adhesives in processes or use of adhesives in the form of films or foils
    • C09J2203/326—Applications of adhesives in processes or use of adhesives in the form of films or foils for bonding electronic components such as wafers, chips or semiconductors
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2301/00—Additional features of adhesives in the form of films or foils
    • C09J2301/30—Additional features of adhesives in the form of films or foils characterized by the chemical, physicochemical or physical properties of the adhesive or the carrier
    • C09J2301/312—Additional features of adhesives in the form of films or foils characterized by the chemical, physicochemical or physical properties of the adhesive or the carrier parameters being the characterizing feature

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Organic Chemistry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Inorganic Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Materials Engineering (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Adhesive Tapes (AREA)

Abstract

The present invention provides a three-dimensional integrated laminated circuit manufacturing sheet 1 which is interposed between a plurality of semiconductor chips having through electrodes and is used for bonding the plurality of semiconductor chips to each other to form a three-dimensional integrated laminated circuit, wherein the three-dimensional integrated laminated circuit manufacturing sheet 1 at least comprises a curable adhesive layer 13, the adhesive layer 13 contains a thermally conductive filler, and the standard deviation of the thickness (T2) of the adhesive layer 13 is 2.0 [ mu ] m or less. The sheet 1 for manufacturing a three-dimensional integrated laminated circuit can manufacture a three-dimensional integrated laminated circuit having excellent heat dissipation properties.

Description

Sheet for manufacturing three-dimensional integrated laminated circuit and method for manufacturing three-dimensional integrated laminated circuit
Technical Field
The present invention relates to a sheet suitable for manufacturing a three-dimensional integrated laminated circuit, and a method for manufacturing a three-dimensional integrated laminated circuit using the sheet.
Background
In recent years, from the viewpoint of increasing the capacity and the functionality of electronic circuits, a three-dimensional integrated laminated circuit (hereinafter, sometimes referred to as "laminated circuit") in which a plurality of semiconductor chips are three-dimensionally laminated has been developed. In such a multilayer circuit, a semiconductor chip having a through electrode (TSV) penetrating from a circuit formation surface to an opposite surface thereof is used for miniaturization and high functionality. In this case, the stacked semiconductor chips are electrically connected to each other by the contact between the through electrodes (or the bumps provided at the ends of the through electrodes) provided in the respective through electrodes.
In order to secure the electrical connection and mechanical strength, a resin composition is used to bond the semiconductor chips together while electrically connecting the through-electrodes to each other. For example, patent document 1 proposes a method of interposing a Film-like adhesive agent, which is generally called a non-Conductive Film (No-Conductive Film), between semiconductor chips to bond the semiconductor chips to each other.
However, in the laminated circuit described above, since a plurality of semiconductor chips are laminated, heat is very easily generated when a current is applied to the circuit. The heat generation of the laminated circuit causes a reduction in the operation processing capability and an erroneous operation, and causes a reduction in the performance of the laminated circuit. Further, if the laminated circuit generates heat excessively, the laminated circuit may be deformed, damaged, or broken. Therefore, in order to ensure reliability, the laminated circuit described above is required to have high heat dissipation properties.
Documents of the prior art
Patent document
Patent document 1: japanese patent laid-open publication No. 2010-010368
Disclosure of Invention
Technical problem to be solved by the invention
However, a laminated circuit manufactured using a conventional adhesive has a problem that good heat dissipation properties cannot necessarily be achieved.
The present invention has been made in view of such circumstances, and an object thereof is to provide a sheet for manufacturing a three-dimensional integrated laminated circuit, which can manufacture a three-dimensional integrated laminated circuit having excellent heat dissipation properties. It is another object of the present invention to provide a method for manufacturing such a three-dimensional integrated laminated circuit.
Means for solving the problems
In order to achieve the above object, the present invention provides a sheet for manufacturing a three-dimensional integrated laminated circuit, interposed between a plurality of semiconductor chips having through electrodes, for bonding the plurality of semiconductor chips to each other to form a three-dimensional integrated laminated circuit, wherein the sheet for manufacturing a three-dimensional integrated laminated circuit comprises at least a curable adhesive layer containing a thermally conductive filler, and the adhesive layer has a thickness (T2) having a standard deviation of 2.0 μm or less (invention 1).
The three-dimensional integrated laminated circuit manufacturing sheet of the invention (invention 1) has excellent heat dissipation properties of the laminated circuit manufactured using the sheet, in which the adhesive layer contains the thermally conductive filler having high thermal conductivity, and the standard deviation of the thickness (T2) of the adhesive layer is within the above range. Therefore, by using the sheet for manufacturing a three-dimensional integrated laminated circuit of the invention (invention 1), a laminated circuit having high reliability can be manufactured.
In the above invention (invention 1), the thermally conductive filler is preferably made of a material selected from the group consisting of metal oxides, silicon carbide, carbides, nitrides and metal hydroxides (invention 2).
In the above inventions (inventions 1 and 2), the content of the thermally conductive filler in the pressure-sensitive adhesive layer is preferably 35 mass% or more and 95 mass% or less (invention 3).
In the above inventions (inventions 1 to 3), the thermally conductive filler preferably has a thermal conductivity of 10W/m · K or more at 25 ℃ (invention 4).
In the above inventions (inventions 1 to 4), the average particle diameter of the thermally conductive filler is preferably 0.01 μm or more and 20 μm or less (invention 5).
In the above inventions (inventions 1 to 5), the thermal conductivity of the pressure-sensitive adhesive layer after curing is preferably 0.5W/mK or more and 8.0W/mK or less (invention 6).
In the above inventions (inventions 1 to 6), the material constituting the pressure-sensitive adhesive layer preferably contains a thermosetting component, a high molecular weight component and a curing catalyst (invention 7).
In the above inventions (inventions 1 to 7), the glass transition temperature of the high molecular weight component is preferably 50 ℃ or higher (invention 8).
In the above inventions (inventions 1 to 8), the material constituting the pressure-sensitive adhesive layer preferably contains a flux component (invention 9).
In the above inventions (inventions 1 to 9), the thickness of the pressure-sensitive adhesive layer is preferably 2 μm or more and 500 μm or less (invention 10).
In the above invention (inventions 1 to 10), the sheet for manufacturing a three-dimensional integrated laminated circuit preferably further includes: the adhesive layer is laminated on one surface side of the adhesive layer, and the substrate is laminated on the surface side of the adhesive layer opposite to the adhesive layer (invention 11).
In the above invention (invention 11), the thickness of the base material is preferably 10 μm or more and 500 μm or less (invention 12).
In the above invention (invention 11 or 12), a ratio (T2/T1) of the thickness (T2) of the adhesive layer to the thickness (T1) of the base material is preferably 0.01 to 5.0 (invention 13).
In the above inventions (inventions 10 and 11), the storage modulus of the adhesive at 23 ℃ is preferably 1X 103Pa or above, 1X 109Pa or less (invention 14).
In the above inventions (inventions 11 to 14), the tensile elastic modulus of the base material at 23 ℃ is preferably 100MPa or more and 5000MPa or less (invention 15).
A second aspect of the present invention provides a method for manufacturing a three-dimensional integrated laminated circuit, including the steps of: bonding one surface of the adhesive layer of the three-dimensional integrated laminated circuit production sheet (inventions 1 to 10) or the surface of the adhesive layer of the three-dimensional integrated laminated circuit production sheet (inventions 11 to 15) opposite to the adhesive layer to at least one surface of a semiconductor wafer having a through electrode; dicing the semiconductor wafer together with the adhesive layer of the three-dimensional integrated laminated circuit manufacturing sheet to obtain semiconductor chips with adhesive layers; a step of obtaining a semiconductor chip laminate by laminating a plurality of the semiconductor chips with the adhesive layer, which are obtained by dicing, so that the through-electrodes are electrically connected to each other and the adhesive layer and the semiconductor chips are alternately arranged; and a step (invention 16) of curing the adhesive layer of the semiconductor chip laminate to bond the semiconductor chips constituting the semiconductor chip laminate to each other.
Effects of the invention
According to the sheet for manufacturing a three-dimensional integrated laminated circuit of the present invention, a three-dimensional integrated laminated circuit having excellent heat dissipation properties can be manufactured. Further, according to the manufacturing method of the present invention, such a three-dimensional integrated laminated circuit can be manufactured.
Drawings
Fig. 1 is a cross-sectional view of a three-dimensional integrated laminated circuit manufacturing sheet according to a first embodiment of the present invention.
Fig. 2 is a cross-sectional view of a three-dimensional integrated laminated circuit manufacturing sheet according to a second embodiment of the present invention.
Detailed Description
Hereinafter, embodiments of the present invention will be described.
[ sheet for producing three-dimensional Integrated laminated Circuit ]
Fig. 1 shows a cross-sectional view of a three-dimensional integrated laminated circuit manufacturing sheet 1 of the first embodiment. As shown in fig. 1, the three-dimensional integrated laminated circuit manufacturing sheet 1 of the present embodiment (hereinafter, sometimes referred to as "manufacturing sheet 1") includes a pressure-sensitive adhesive layer 13 and a release sheet 14 laminated on at least one surface of the pressure-sensitive adhesive layer 13. In addition, the release sheet 14 may be omitted.
Fig. 2 is a cross-sectional view of the three-dimensional integrated laminated circuit manufacturing sheet 2 according to the second embodiment. As shown in fig. 2, the three-dimensional integrated laminated circuit production sheet 2 of the present embodiment (hereinafter, sometimes referred to as "production sheet 2") includes a base material 11, an adhesive layer 12 laminated on at least one surface side of the base material 11, and an adhesive layer 13 laminated on the surface side of the adhesive layer 12 opposite to the base material 11. Further, a release sheet 14 may be laminated on the surface of the pressure-sensitive adhesive layer 13 opposite to the pressure-sensitive adhesive layer 12.
In the sheets 1 and 2 for manufacturing a three-dimensional integrated laminated circuit according to the present embodiment, the adhesive layer 13 contains a thermally conductive filler having high thermal conductivity. In the sheets 1 and 2 for manufacturing a three-dimensional integrated laminated circuit according to the present embodiment, the standard deviation of the thickness (T2) of the pressure-sensitive adhesive layer 13 is 2.0 μm or less.
In general, a multilayer circuit is formed by stacking a plurality of semiconductor chips, and therefore, includes many circuits serving as heat sources and has a structure that is difficult to radiate heat. Therefore, when a current is applied to the laminated circuit, the laminated circuit easily generates heat, and the generated heat is not easily released to the outside.
However, in the laminated circuit manufactured using the sheets 1 and 2 for manufacturing a three-dimensional integrated laminated circuit according to the present embodiment, since the semiconductor chips are bonded to each other by the adhesive layer 13 having excellent heat dissipation properties due to the inclusion of the thermally conductive filler, heat is easily dissipated from the end portion of the adhesive layer 13. When the standard deviation of the thickness (T2) of the adhesive layer 13 is within the above range, the thickness of the adhesive 13 constituting the laminated circuit becomes uniform, and the thickness of the laminated circuit itself also becomes uniform, and as a result, the heat conduction in the laminated circuit is excellent. This makes it possible to suppress excessive temperature increase even when current is applied, while the overall laminated circuit has excellent heat dissipation properties. As a result, a highly reliable multilayer circuit can be manufactured.
On the other hand, since a plurality of semiconductor chips are stacked in a stacked circuit, it is generally difficult to make the stacked circuit uniform in thickness. This is because, even if there is a small deviation between the thickness of the semiconductor chip or the adhesive layer constituting the laminated circuit and the desired thickness, the semiconductor chip and the adhesive layer are laminated, and this deviation accumulates, and as a result, it becomes one of important factors that the laminated circuit is significantly different from the desired thickness. Further, voids may be generated when the through-electrodes or bumps of the semiconductor wafer are embedded in the adhesive layer, and the thickness of the adhesive layer in the laminated circuit may partially change due to the voids. In particular, in the laminated circuit, since the interface between the adhesive layer and the semiconductor wafer having a plurality of voids is provided, the probability of voids occurring is high, and it is further difficult to make the thickness of the laminated circuit uniform. However, in the sheets 1 and 2 for manufacturing a three-dimensional integrated laminated circuit according to the present embodiment, the standard deviation of the thickness (T2) of the pressure-sensitive adhesive layer 13 is set to the above range, so that the deviation of the thickness of the pressure-sensitive adhesive layer 13 from the required thickness can be suppressed, and thus the laminated circuit can be made to have a uniform thickness. Further, by setting the standard deviation of the thickness (T2) of the adhesive layer 13 to the above range, it is possible to suppress the occurrence of voids when embedding the through-electrodes or bumps of the semiconductor wafer into the adhesive layer 13, and to embed them well, whereby the laminated circuit can be made to have a uniform thickness.
The three-dimensional integrated laminated circuit manufacturing sheets 1 and 2 of the present embodiment are interposed between a plurality of semiconductor chips having through electrodes, and are used for bonding the plurality of semiconductor chips to each other to form a three-dimensional integrated laminated circuit. One or both ends of the through electrode may protrude from the surface of the semiconductor chip. In addition, the semiconductor chip may further include a bump, and in this case, the bump may be provided at one end or both ends of the through electrode.
In the three-dimensional integrated laminated circuit sheets 1 and 2 according to the present embodiment, the adhesive layer 13 has curability. Here, having curability means that the adhesive layer 13 can be cured by heating or the like. That is, the pressure-sensitive adhesive layer 13 is not cured in a state of constituting the production sheets 1 and 2. The adhesive layer 13 may be thermosetting or may be energy ray-curable. However, the adhesive layer 13 is preferably thermosetting from the viewpoint of being able to be cured satisfactorily when the production sheets 1 and 2 are used in a method for producing a laminated circuit. Specifically, when the production sheets 1 and 2 are used in a method for producing a laminated circuit, the adhesive layer 13 is cut in a state of being attached to a semiconductor wafer as described later. This can provide a laminate of the semiconductor chip and the diced adhesive layer 13. In this laminate, the surface on the side of the adhesive layer 13 is attached to the laminate of the semiconductor chips, and the adhesive layer 13 is cured in this state. In general, the semiconductor chip does not have a transmittance to an energy ray or the transmittance is very low in many cases, and even in such a case, if the adhesive layer 13 has a thermosetting property, the adhesive layer 13 can be cured quickly.
1. Adhesive layer
(1) Material
In the sheets 1 and 2 for manufacturing a three-dimensional integrated laminated circuit according to the present embodiment, the material constituting the pressure-sensitive adhesive layer 13 contains a thermally conductive filler. Further, the material preferably further contains a thermosetting component, a curing agent, a curing catalyst, a high molecular weight component, a component having a flux function, and the like.
(1-1) thermally conductive Filler
The material constituting the adhesive layer 13 contains a thermally conductive filler. The thermally conductive filler is a filler having a high thermal conductivity, and is, for example, a filler having a thermal conductivity of 10W/m.K or more at 25 ℃, preferably a filler having a thermal conductivity of 20W/m.K or more at 25 ℃, and particularly preferably a filler having a thermal conductivity of 30W/m.K or more at 25 ℃. The upper limit of the thermal conductivity of the thermally conductive filler at 25 ℃ is not limited, but is usually 300W/m.K or less.
As described above, the adhesive layer 13 exhibits excellent heat release properties due to the interaction that the adhesive layer 13 contains the thermally conductive filler and has a uniform thickness with respect to the laminated circuit. Further, by containing the thermally conductive filler in the adhesive layer 13, the rigidity of the resulting laminated circuit is increased, and dimensional change due to environmental change is less likely to occur.
As the thermally conductive filler, a filler composed of a material selected from the group consisting of metal oxides such as zinc oxide, magnesium oxide, aluminum oxide, titanium oxide, and iron oxide, carbides such as silicon carbide and calcium carbonate, nitrides such as boron nitride and aluminum nitride, metal hydroxides such as magnesium hydroxide, and talc is preferably used. Among them, from the viewpoint of achieving more excellent heat radiation, it is preferable to use a filler composed of a material selected from the group consisting of metal oxides such as zinc oxide, magnesium oxide, aluminum oxide, titanium oxide, and iron oxide, carbides such as silicon carbide and calcium carbonate, nitrides such as boron nitride and aluminum nitride, and metal hydroxides such as magnesium hydroxide. These materials may be used as a filler in the form of powder, or may be used as a filler in the form of a spherical particle or a single crystal fiber. The thermally conductive filler obtained from the above-mentioned materials may be used singly or in combination of two or more. Further, the thermally conductive filler preferably has no electrical conductivity.
The shape of the thermally conductive filler is not particularly limited, and may have at least one shape selected from the group consisting of granular shape, needle shape, plate shape, and amorphous shape, for example. Among them, a particulate heat conductive filler is preferably used. By making the thermally conductive filler granular, the filling rate of the thermally conductive filler in the adhesive layer 13 is increased, and an effective heat conduction path is formed in the adhesive layer 13, and as a result, the adhesive layer 13 has a better heat release property.
When the thermally conductive filler is in the form of particles, the lower limit of the average particle diameter thereof is preferably 0.01 μm or more, more preferably 0.05 μm or more, and particularly preferably 0.1 μm or more. The upper limit of the average particle diameter of the thermally conductive filler is preferably 20 μm or less, more preferably 5 μm or less, and particularly preferably 1 μm or less. When the average particle diameter of the thermally conductive filler is in the above range, the heat release property of the pressure-sensitive adhesive layer 13 is more excellent, the film formability of the pressure-sensitive adhesive layer 13 is improved, and the filling rate of the thermally conductive filler in the pressure-sensitive adhesive layer 13 can be further improved. In the present specification, the average particle diameter of the thermally conductive filler means: the long axis diameter of 20 randomly selected thermally conductive fillers was measured using an electron microscope, and the particle diameter was calculated as the arithmetic average value thereof.
When the thermally conductive filler is in the form of particles, the maximum particle diameter of the thermally conductive filler is preferably 50 μm or less, and more preferably 25 μm or less. When the maximum particle diameter of the thermally conductive filler is 50 μm or less, the thermally conductive filler is easily filled in the adhesive layer 13, and as a result, the adhesive layer 13 has more excellent heat release properties. Further, by setting the maximum particle diameter of the inorganic filler to 50 μm or less, the through-electrodes (or the bumps provided at the ends of the through-electrodes) in the laminated circuit can be easily electrically connected to each other, and a highly reliable laminated circuit can be efficiently manufactured.
When the thermally conductive filler is in the form of particles, the particle size distribution (CV value) of the thermally conductive filler is preferably 15% or more, and particularly preferably 30% or more. The particle size distribution (CV value) is preferably 80% or less, and particularly preferably 60% or less. By setting the particle size distribution of the thermally conductive filler to the above range, uniform heat dissipation can be effectively achieved. The CV value is an index of variation in particle size, and a larger CV value means a larger variation in particle size. Therefore, particularly by setting the CV value to 15% or more, variation in particle diameter becomes good, and particles having a smaller size are easily taken in the gaps between the particles. This allows the thermally conductive filler to be efficiently filled, and the pressure-sensitive adhesive layer 13 exhibiting high heat radiation properties to be easily obtained. Further, by setting the CV value to 80% or less, the particle diameter of the thermally conductive filler can be suppressed from becoming larger than the thickness of the adhesive layer 13. As a result, the occurrence of irregularities on the surface of the pressure-sensitive adhesive layer 13 opposite to the pressure-sensitive adhesive layer 12 can be suppressed, and good adhesion can be easily obtained. Further, by setting the CV value to 80% or less, the adhesive layer 13 having uniform performance is easily formed. In addition, the particle size distribution (CV value) of the thermally conductive filler can be obtained by: the thermal conductive filler was observed by an electron microscope, and the long axis diameter was measured for 200 or more particles to determine the standard deviation of the long axis diameter, and the standard deviation was divided by the average particle diameter to obtain a value as a particle size distribution (CV value).
When the thermally conductive filler is needle-like in shape, the average axial length (average axial length in the long axis direction) of the thermally conductive filler is preferably 0.01 μm or more, particularly preferably 0.05 μm or more, and more preferably 0.1 μm or more. The average axial length is preferably 10 μm or less, particularly preferably 5 μm or less, and more preferably 1 μm or less.
The aspect ratio (aspect ratio) of the thermally conductive filler is preferably 1 or more, and particularly preferably 5 or more. The aspect ratio is preferably 20 or less, and particularly preferably 15 or less. By setting the aspect ratio of the thermally conductive filler to the above range, an efficient heat conduction path is formed in the pressure-sensitive adhesive layer 13, and the pressure-sensitive adhesive layer 13 has a more favorable heat radiation property. The aspect ratio can be obtained by dividing the average minor axis diameter by the average major axis diameter of the thermally conductive filler. Here, the short axis number average diameter and the long axis number average diameter refer to the number average particle diameter calculated as the arithmetic average of respective short axis diameters and long axis diameters of 20 thermal conductive fillers arbitrarily selected by transmission electron microscope photograph measurement.
The specific gravity of the thermally conductive filler is preferably 1g/cm3Above, 3g/cm is particularly preferable3The above. Further, the specific gravity is preferably 10g/cm3Hereinafter, it is particularly preferably 6g/cm3The following. When the specific gravity is within the above range, the heat release property of the pressure-sensitive adhesive layer 13 is more excellent.
The lower limit of the content of the thermally conductive filler in the pressure-sensitive adhesive layer 13 is preferably 35 mass% or more, more preferably 40 mass% or more, and particularly preferably 50 mass% or more, based on the total amount of the materials constituting the pressure-sensitive adhesive layer 13. The upper limit of the content of the thermally conductive filler is preferably 95% by mass or less, and more preferably 90% by mass or less. By setting the content of the thermally conductive filler to 35 mass% or more in the material constituting the pressure-sensitive adhesive layer 13, the pressure-sensitive adhesive layer 13 has more excellent heat dissipation properties, and by using the sheets 1 and 2 for three-dimensional integrated laminated circuit production of the present embodiment, a laminated circuit having excellent heat dissipation properties can be efficiently produced. When the content is 95 mass% or less, the content of the component other than the thermally conductive filler in the material constituting the pressure-sensitive adhesive layer 13 becomes relatively high, and the pressure-sensitive adhesive layer 13 can exhibit more favorable adhesiveness.
(1-2) thermosetting Components
The material constituting the adhesive layer 13 preferably contains a thermosetting component. The thermosetting component is not particularly limited as long as it is a binder component generally used for connection of semiconductor chips. Specific examples thereof include epoxy resins, phenol resins, melamine resins, urea resins, polyester resins, urethane resins, acrylic resins, polyimide resins, benzoxazine resins, phenoxy resins, and the like, and these may be used singly or in combination of two or more. Among them, from the viewpoint of adhesiveness and the like, epoxy resins and phenol resins are preferable, and epoxy resins are particularly preferable.
The epoxy resin has a property of forming a three-dimensional network upon heating and forming a strong cured product. As such an epoxy resin, various epoxy resins conventionally known can be used, and specific examples thereof include glycidyl ethers of phenols such as bisphenol a, bisphenol F, resorcinol, phenyl novolac, and cresol novolac; glycidyl ethers of alcohols such as butanediol, polyethylene glycol, and polypropylene glycol; glycidyl ethers of carboxylic acids such as phthalic acid, isophthalic acid, and tetrahydrophthalic acid; glycidyl-type or alkyl glycidyl-type epoxy resins obtained by substituting an active hydrogen bonded to a nitrogen atom of aniline isocyanurate or the like with a glycidyl group; examples of the epoxy group-containing alicyclic epoxy compounds include alicyclic epoxy compounds in which an epoxy group is introduced by oxidation of a carbon-carbon double bond in the molecule, such as vinylcyclohexane diepoxide, 3, 4-epoxycyclohexylmethyl-3, 4-bicyclohexane carboxylate, and 2- (3, 4-epoxy) cyclohexyl-5, 5-spiro (3, 4-epoxy) cyclohexane-m-dioxane. Further, an epoxy resin having a biphenyl skeleton, a dicyclohexyldiene skeleton, a naphthalene skeleton, or the like can also be used. These epoxy resins may be used alone or in combination of two or more.
The lower limit of the content of the thermosetting component in the material constituting the pressure-sensitive adhesive layer 13 is preferably 5% by mass or more, and more preferably 10% by mass or more, based on the total amount of the material constituting the pressure-sensitive adhesive layer 13. The upper limit of the content of the thermosetting component is preferably 75% by mass or less, and more preferably 55% by mass or less. When the content of the thermosetting component is in the above range, the heat generation starting temperature and the heat generation peak temperature can be easily adjusted to the above ranges.
(1-3) curing agent/curing catalyst
When the material constituting the pressure-sensitive adhesive layer 13 contains the above-mentioned thermosetting component, the material preferably further contains a curing agent and a curing catalyst.
The curing agent is not particularly limited, and examples thereof include phenols, amines, thiols, and the like, and can be appropriately selected according to the kind of the thermosetting component. For example, when an epoxy resin is used as the curable component, phenols are preferable from the viewpoint of reactivity with the epoxy resin and the like.
Examples of the phenol include bisphenol a, tetramethylbisphenol a, diallylbisphenol a, biphenol, bisphenol F, diallylbisphenol F, triphenylmethane-type phenol, tetraphenol, novolak-type phenol, and cresol novolak resin, and these may be used singly or in combination of two or more.
The curing catalyst is not particularly limited, and may be an imidazole, a phosphorus compound, an amine, or the like, and may be appropriately selected according to the kind of the thermosetting component or the like. As the curing catalyst, a latent curing catalyst which is inactivated under a predetermined condition and activated when heated to a high-temperature pressure bonding temperature or higher at which the solder melts is preferably used. Further, the latent curing catalyst is preferably used as a microencapsulated latent curing catalyst.
For example, when an epoxy resin is used as the curable component, an imidazole-based curing catalyst is preferably used as the curing catalyst in view of reactivity with the epoxy resin, storage stability, physical properties of a cured product, curing speed, and the like. As the imidazole-based curing catalyst, a known imidazole-based curing catalyst can be used, but from the viewpoint of excellent curability, storage stability and connection reliability, an imidazole-based curing catalyst having a triazine skeleton is preferable. They may be used alone or in combination of two or more. In addition, they can also be used as microencapsulated latent curing catalysts. The melting point of the imidazole-based curing catalyst is preferably 200 ℃ or higher, and particularly preferably 250 ℃ or higher, from the viewpoint of excellent curability, storage stability and connection reliability.
In the present embodiment, the lower limit of the content of the curing catalyst in the material constituting the pressure-sensitive adhesive layer 13 is preferably 0.1 mass% or more, more preferably 0.2 mass% or more, and particularly preferably 0.4 mass% or more, based on the total amount of the materials constituting the pressure-sensitive adhesive layer 13. The upper limit of the content of the curing catalyst is preferably 10% by mass or less, more preferably 5% by mass or less, and particularly preferably 3% by mass or less. When the content of the curing catalyst in the material constituting the pressure-sensitive adhesive layer 13 is not less than the lower limit, the thermosetting component can be sufficiently cured. On the other hand, if the content of the curing catalyst is not more than the above upper limit, the storage stability of the pressure-sensitive adhesive layer 13 becomes good.
(1-4) high molecular weight component
The material constituting the adhesive layer 13 preferably contains a high molecular weight component other than the thermosetting component. By containing the high molecular weight component, the material easily satisfies the numerical range described later in terms of melt viscosity at 90 ℃ and average linear expansion coefficient, and the obtained laminated circuit has high connection reliability.
Examples of the high molecular weight component include (meth) acrylic resins, phenoxy resins, polyester resins, polyurethane resins, polyimide resins, polyamideimide resins, silicone-modified polyimide resins, polybutadiene resins, polypropylene resins, styrene-butadiene-styrene copolymers, styrene-ethylene-butylene-styrene copolymers, polyacetal resins, polyvinyl acetal resins including polyvinyl butyral resins, butyl rubbers, chloroprene rubbers, polyamide resins, acrylonitrile-butadiene copolymers, acrylonitrile-butadiene-acrylic copolymers, acrylonitrile-butadiene-styrene copolymers, polyvinyl acetate, nylon, and the like, and one kind or two or more kinds of these can be used alone or in combination.
In the present specification, "(meth) acrylic" means both acrylic and methacrylic. The same applies to other similar terms such as "(meth) acrylic resin".
Among the high molecular weight components, one or more selected from the group consisting of polyvinyl acetal resins, polyester resins, and phenoxy resins are preferably used. By containing these high molecular weight components, the material constituting the above-mentioned production sheet has low melt viscosity at 90 ℃ and low average linear expansion coefficient, and as a result, these values are easily made to fall within the numerical range described later.
Here, the polyvinyl acetal resin is obtained by: polyvinyl alcohol obtained by saponifying polyvinyl acetate is acetalized with an aldehyde. Examples of the aldehyde used for the acetalization include n-butyraldehyde, n-hexanal, and n-valeraldehyde. As the polyvinyl acetal resin, a polyvinyl butyral resin obtained by acetalization with n-butyl aldehyde is also preferably used.
Examples of the polyester resin include polyester resins obtained by polycondensation of a dicarboxylic acid component and a diol component of polyethylene terephthalate resin, polybutylene terephthalate resin, polyethylene oxalate resin, and the like; modified polyester resins such as urethane-modified polyester resins obtained by reacting polyisocyanate compounds with these; the acrylic resin and/or the vinyl resin may be grafted to form a polyester resin, and the like, and these may be used alone or in combination of two or more.
When the material constituting the pressure-sensitive adhesive layer 13 contains a polyvinyl acetal resin or a polyester resin as the high molecular weight component, it is particularly preferable to further contain a phenoxy resin. When the phenoxy resin is further contained, the material constituting the pressure-sensitive adhesive layer 13 more easily satisfies the numerical range described later in terms of the melt viscosity at 90 ℃ and the average linear expansion coefficient.
The phenoxy resin is not particularly limited, and examples thereof include bisphenol a type, bisphenol F type, bisphenol a/bisphenol F copolymer type, biphenol type, biphenyl type, and the like.
The lower limit of the softening point of the high molecular weight component is preferably 50 ℃ or higher, more preferably 100 ℃ or higher, and particularly preferably 120 ℃ or higher. The upper limit of the softening point of the high-molecular weight component is preferably 200 ℃ or lower, more preferably 180 ℃ or lower, and particularly preferably 150 ℃ or lower. By containing a high molecular weight component having a softening point of not less than the lower limit, the average linear expansion coefficient of the material constituting the pressure-sensitive adhesive layer 13 can be reduced, and the numerical range described below can be easily satisfied. When the softening point is not higher than the upper limit, embrittlement of the pressure-sensitive adhesive layer 13 can be suppressed. The softening point is a value measured according to ASTM D1525.
The lower limit of the glass transition temperature of the high molecular weight component is preferably 50 ℃ or higher, more preferably 60 ℃ or higher, and particularly preferably 80 ℃ or higher. The upper limit of the glass transition temperature of the high-molecular weight component is preferably 250 ℃ or lower, more preferably 200 ℃ or lower, and particularly preferably 180 ℃ or lower. By containing a high molecular weight component having a glass transition temperature of not less than the lower limit, the average linear expansion coefficient of the material constituting the pressure-sensitive adhesive layer 13 can be reduced, and the numerical range described below can be easily satisfied. When the glass transition temperature is not higher than the upper limit, the compatibility with other materials is excellent. The glass transition temperature of the high-molecular-weight component is a value measured by a differential scanning calorimeter.
The weight average molecular weight of the high molecular weight component is preferably 1 ten thousand or more, more preferably 3 ten thousand or more, and particularly preferably 5 ten thousand or more. The upper limit value is preferably 100 ten thousand or less, more preferably 70 ten thousand or less, and particularly preferably 50 ten thousand or less. The weight average molecular weight is preferably not less than the lower limit because the melt viscosity can be reduced while maintaining the film formability. Further, the weight average molecular weight is preferably not more than the upper limit because compatibility with a low molecular weight component such as a thermosetting component is improved. The weight average molecular weight in the present specification is a value in terms of standard polystyrene measured by a Gel Permeation Chromatography (GPC) method.
The limit of the content of the high molecular weight component in the material constituting the pressure-sensitive adhesive layer 13 is preferably 3% by mass or more, more preferably 5% by mass or more, and particularly preferably 7% by mass or more, based on the total amount of the materials constituting the pressure-sensitive adhesive layer 13. The upper limit of the content of the high-molecular weight component is preferably 95% by mass or less, more preferably 90% by mass or less, and particularly preferably 80% by mass or less. When the content of the high molecular weight component is not less than the lower limit, the melt viscosity at 90 ℃ of the material constituting the pressure-sensitive adhesive layer 13 can be made lower, and the above numerical range can be easily satisfied. On the other hand, when the content of the high molecular weight component is not more than the upper limit, the average linear expansion coefficient of the material constituting the pressure-sensitive adhesive layer 13 can be further reduced, and the numerical range described below can be easily satisfied.
(1-5) component having flux function
In the present embodiment, when the through-electrodes or the bumps of the semiconductor chip are bonded with solder, the material constituting the adhesive layer 13 preferably contains a component having a flux function (hereinafter, sometimes referred to as "flux component"). The flux component has an action of removing the metal oxide film formed on the surface of the electrode, and the electrical connection between the electrodes by the solder can be more ensured, and the connection reliability of the solder part can be improved.
The flux component is not particularly limited, but a component having a phenolic hydroxyl group and/or a carboxyl group is preferable, and a component having a carboxyl group is particularly preferable. The component having a carboxyl group has a flux function and also functions as a curing agent when an epoxy resin described later is used as a thermosetting component. Therefore, the component having the carboxyl group is consumed as a curing agent after completion of the welding, and therefore, a defect due to an excessive flux component can be suppressed.
Specific examples of the flux component include glutaric acid, 2-methylglutaric acid, anthranilic acid, diphenolic acid, adipic acid, acetylsalicylic acid, benzoic acid, benzilic acid, azelaic acid, benzylbenzoic acid, malonic acid, 2-bis (hydroxymethyl) propionic acid, salicylic acid, o-methoxybenzoic acid, m-hydroxybenzoic acid, succinic acid, 2, 6-dimethoxymethyl-p-cresol, benzoic acid hydrazide, carbohydrazide, malonic dihydrazide, succinic dihydrazide, glutaric dihydrazide, salicylic acid hydrazide, iminodiacetic acid dihydrazide, itaconic dihydrazide, citric acid trihydrazide, thiocarbohydrazide, benzophenone hydrazone, 4' -oxybis benzenesulfonyl hydrazide, adipic acid dihydrazide, rosin derivatives, and the like, and these can be used singly or in combination of two or more.
Examples of the rosin derivatives include gum rosin, tall rosin (tall rosin), wood rosin, polymerized rosin, hydrogenated rosin, formylated rosin, rosin ester, rosin-modified maleic acid resin, rosin-modified phenol resin, and rosin-modified alkyd resin.
Among them, at least one selected from the group consisting of 2-methylglutaric acid, adipic acid and rosin derivatives is particularly preferably used. 2-methylglutaric acid and adipic acid have small molecular weights in the material constituting the pressure-sensitive adhesive layer 13, but have two carboxyl groups in the molecule, so that they are excellent in flux function even when added in a small amount, and can be particularly suitably used in the present embodiment. The rosin derivative has a high softening point and can impart a melting property while maintaining a low linear expansion coefficient, and therefore, it is particularly suitable for the present embodiment.
At least one of the melting point and the softening point of the flux component is preferably 80 ℃ or higher, more preferably 110 ℃ or higher, and still more preferably 130 ℃ or higher. When at least one of the melting point and the softening point of the flux component is in the above range, more excellent flux function can be obtained, and exhaust gas (out gas) and the like can be reduced, which is preferable. The upper limit of the melting point and softening point of the flux component is not particularly limited, but may be, for example, the melting point of the solder or less.
In the present embodiment, the lower limit of the content of the flux component in the material constituting the pressure-sensitive adhesive layer 13 is preferably 0.1 mass% or more, more preferably 0.2 mass% or more, and particularly preferably 0.3 mass% or more, based on the total amount of the material constituting the pressure-sensitive adhesive layer 13. The upper limit of the content of the flux component is preferably 20 mass% or less, more preferably 15 mass% or less, and particularly preferably 10 mass% or less. When the content of the flux component is equal to or greater than the lower limit value in the material constituting the pressure-sensitive adhesive layer 13, the electrical connection between the electrodes by the solder can be more reliably made, and the connection reliability of the soldered portion can be further improved. On the other hand, if the content of the flux component is not more than the upper limit, it is possible to prevent defects such as ion migration due to excessive flux components.
(1-6) other Components
The adhesive layer 13 may further contain a plasticizer, a stabilizer, a tackifier, a colorant, a coupling agent, an antistatic agent, an antioxidant, electrically conductive particles, an inorganic filler other than the thermally conductive filler, and the like as a material constituting the adhesive layer 13.
For example, when anisotropic conductivity is imparted to the sheets 1 and 2 for three-dimensional integrated laminated circuit production by incorporating conductive particles in the material constituting the adhesive layer 13, the semiconductor chips can be electrically connected to each other by a method of complementary soldering or a method different from soldering.
(2) Physical Properties
(2-1) thermal conductivity
In the sheets 1 and 2 for producing a three-dimensional integrated laminated circuit according to the present embodiment, the thermal conductivity of the pressure-sensitive adhesive layer 13 after curing is preferably 0.5W/m · K or more, particularly preferably 0.7W/m · K or more, and more preferably 1.0W/m · K or more. The thermal conductivity is preferably 8.0W/mK or less, particularly preferably 4.0W/mK or less, and more preferably 3.0W/mK or less. By setting the thermal conductivity to 0.5W/m · K or more, the adhesive layer 13 is likely to exhibit good heat dissipation properties, and a laminated circuit having high reliability can be efficiently manufactured using the three-dimensional integrated laminated circuit manufacturing sheets 1, 2 of the present embodiment. On the other hand, when the thermal conductivity is 8.0W/m · K or less, the content of the thermally conductive filler in the pressure-sensitive adhesive layer 13 is not excessively increased, and as a result, it is easy to achieve both of good heat radiation property in the pressure-sensitive adhesive layer 13 and adhesiveness and sheet processability of the pressure-sensitive adhesive layer 13. The method of measuring the thermal conductivity of the pressure-sensitive adhesive layer 13 is shown in test examples described later.
(2-2) melt viscosity
In the sheets 1 and 2 for producing a three-dimensional integrated laminated circuit according to the present embodiment, the upper limit of the melt viscosity at 90 ℃ before curing (hereinafter, sometimes referred to as "90 ℃ melt viscosity") of the material constituting the pressure-sensitive adhesive layer 13 is preferably 5.0 × 105Pa · s or less, particularly preferably 1.0X 105Pa · s or less, more preferably 5.0X 104Pa · s or less. When the melt viscosity at 90 ℃ is not more than the above upper limit, when the adhesive layer 13 is interposed between the electrodes, it is possible to favorably follow irregularities due to the through electrodes or the bumps on the surface of the semiconductor chip, and it is possible to prevent voids from being generated at the interface between the semiconductor chip and the adhesive layer 13. The lower limit of the melt viscosity at 90 ℃ is preferably 1.0X 100 pas or more, and particularly preferably 1.0X 101Pa · s or more, and more preferably 1.0X 102Pa · s or more. When the melt viscosity at 90 ℃ is not less than the lower limit, the material constituting the pressure-sensitive adhesive layer 13 does not excessively flowIn this way, contamination of the device can be prevented when the adhesive layer 13 is attached or when semiconductor chips are stacked. Therefore, the three-dimensional integrated laminated circuit manufacturing sheets 1 and 2 of the present embodiment have high reliability by setting the melt viscosity of the constituent material at 90 ℃ to the above range.
Here, the 90 ℃ melt viscosity of the material constituting the adhesive layer 13 can be measured using a flow tester. Specifically, the melt viscosity of the pressure-sensitive adhesive layer 13 having a thickness of 15mm can be measured under the conditions of a load of 50kgf, a temperature range of 50 to 120 ℃ and a temperature rise rate of 10 ℃/min using a flow rate meter (CFT-100D, manufactured by Shimadzu corporation).
(2-3) average linear expansion coefficient
In the present embodiment, the upper limit of the average linear expansion coefficient (hereinafter, may be simply referred to as "average linear expansion coefficient") of the cured product of the material constituting the pressure-sensitive adhesive layer 13 at 0 to 130 ℃ is preferably 45ppm or less, particularly preferably 35ppm or less, and more preferably 25ppm or less. If the average linear expansion coefficient is equal to or less than the upper limit value, the difference in linear expansion coefficient between the adhesive layer 13 made of a cured product and the semiconductor chip is reduced, and the stress that may occur between the adhesive layer 13 and the semiconductor chip can be reduced based on the difference. As a result, the three-dimensional integrated laminated circuit manufacturing sheets 1 and 2 according to the present embodiment can improve the connection reliability between the semiconductor chips, and particularly exhibit high connection reliability in the temperature cycle test shown in the examples.
On the other hand, the lower limit of the average linear expansion coefficient is not particularly limited, but is preferably 5ppm or more, and more preferably 10ppm or more, from the viewpoint of film formability.
Here, the average linear expansion coefficient of the material constituting the adhesive layer 13 can be measured using a thermomechanical analyzer. Specifically, after a pressure-sensitive adhesive layer 13 having a thickness of 45 μm was formed on a substrate, the pressure-sensitive adhesive layer 13 was cured at 160 ℃ for 1 hour to obtain a cured product, and the linear expansion coefficient of the cured product was measured using a thermomechanical analyzer (TMA 4030SA manufactured by Bruker AXS) under conditions of a load of 2g, a temperature range of 0 to 300 ℃ and a temperature rise rate of 5 ℃/min. From the measurement results, the average linear expansion coefficient of 0 to 130 ℃ can be calculated.
(2-4) glass transition temperature
In the present embodiment, the lower limit of the glass transition temperature (Tg) of the cured product of the material constituting the pressure-sensitive adhesive layer 13 is preferably 150 ℃ or higher, more preferably 200 ℃ or higher, and particularly preferably 240 ℃ or higher. When the glass transition temperature of the cured product is not less than the lower limit, the cured product is not deformed and stress is not easily generated in the temperature cycle test, which is preferable. On the other hand, the upper limit of the glass transition temperature of the cured product is not particularly limited, but from the viewpoint of suppressing embrittlement of the cured product, it is preferably 350 ℃ or less, and more preferably 300 ℃ or less.
Here, the glass transition temperature of the cured product of the material constituting the pressure-sensitive adhesive layer 13 was a temperature at which the maximum point of tan δ (loss modulus/storage modulus) was measured when the temperature was raised from 0 ℃ to 300 ℃ at a frequency of 11Hz, an amplitude of 10 μm, and a temperature rise rate of 3 ℃/min using a dynamic viscoelasticity measuring instrument (manufactured by TA instruments, DMA Q800) and viscoelasticity in the tensile mode was measured.
(2-5) 5% mass reduction temperature
In the sheets 1 and 2 for producing a three-dimensional integrated laminated circuit according to the present embodiment, the 5% mass reduction temperature of the cured product of the material constituting the pressure-sensitive adhesive layer 13 in thermogravimetric measurement is preferably 350 ℃ or higher, and particularly preferably 360 ℃ or higher. When the 5% mass reduction temperature is 350 ℃ or higher, the cured product of the pressure-sensitive adhesive layer 13 has excellent resistance to high temperatures. Therefore, even when the cured product is exposed to high temperatures in the production of a laminated circuit or the like, generation of volatile components accompanying decomposition of the components contained in the cured product can be suppressed, and the performance of the laminated circuit can be maintained satisfactorily. The upper limit of the 5% mass reduction temperature is not particularly limited, but the 5% mass reduction temperature is preferably 500 ℃ or lower in general.
Here, the 5% mass reduction temperature can be measured using a differential thermal/thermogravimetric simultaneous measurement apparatus. Specifically, after the pressure-sensitive adhesive layer 13 having a thickness of 45 μm was formed on the substrate, the pressure-sensitive adhesive layer 13 was cured by treatment at 160 ℃ for 1 hour to obtain a cured product, which was measured according to JIS K7120: 1987 thermogravimetry was carried out on the cured product by using a differential thermal/thermogravimetry simultaneous measurement apparatus (DTG-60, manufactured by Shimadzu corporation) and heating from 40 ℃ to 550 ℃ at a gas inflow rate of 100ml/min and a heating rate of 20 ℃/min using nitrogen as an inflow gas. Based on the obtained thermogravimetric curve, the temperature at which the mass loss at the temperature of 100 ℃ is 5% (5% mass loss temperature) is obtained.
(2-6) storage modulus
In the sheets 1 and 2 for producing a three-dimensional integrated laminated circuit according to the present embodiment, the storage modulus of the pressure-sensitive adhesive layer 13 at 23 ℃ after curing is preferably 1.0 × 102MPa or more, particularly preferably 1.0X 103Is more than MPa. Further, the storage modulus is preferably 1.0X 105MPa or less, particularly preferably 1.0X 104MPa or less. By setting the storage modulus to the above range, a laminate in which the semiconductor chip and the diced adhesive layer 13 are alternately laminated has good strength when a laminated circuit is manufactured. As a result, even when the semiconductor chips are further stacked or the stacked body is handled, the state of the stacked body can be favorably maintained, and a stacked circuit having excellent quality can be manufactured.
Here, the storage modulus at 23 ℃ after curing of the adhesive layer 13 can be measured using a dynamic viscoelasticity measuring instrument. Specifically, after an adhesive layer 13 having a thickness of 45 μm was formed on a substrate, the adhesive layer 13 was cured by a treatment at 160 ℃ for 1 hour to obtain a cured product, and the viscoelasticity in the tensile mode at a temperature of from 0 ℃ to 300 ℃ was measured on the cured product under the conditions of a frequency of 11Hz, an amplitude of 10 μm, and a temperature rise rate of 3 ℃/min using a dynamic viscoelasticity measuring instrument (manufactured by TA instruments). From the measurement results, the storage modulus (MPa) at 23 ℃ after curing of the adhesive layer can be read.
(2-7) exothermic onset temperature and exothermic peak temperature based on differential scanning calorimetry
In the sheets 1 and 2 for producing a three-dimensional integrated laminated circuit according to the present embodiment, the heat generation starting Temperature (TS) of the pressure-sensitive adhesive layer 13 before curing, which is measured at a temperature rise rate of 10 ℃/min by Differential Scanning Calorimetry (DSC), is preferably in the range of 70 to 150 ℃, particularly preferably in the range of 100 to 150 ℃, and more preferably in the range of 120 to 150 ℃. By setting the heat generation starting Temperature (TS) to the above range, for example, unintended stage curing of the adhesive layer 13 upon receiving heat generated when a semiconductor wafer is diced using a dicing blade can be suppressed, and the storage stability of the production sheets 1 and 2 is also excellent. In particular, when a plurality of semiconductor chips are stacked and then the plurality of adhesive layers 13 present between the semiconductor chips are collectively cured in order to manufacture a stacked circuit, it is possible to suppress the adhesive layers 13 from being cured at an unintended stage before the completion of stacking of the semiconductor chips.
In the sheets 1 and 2 for manufacturing a three-dimensional integrated laminated circuit according to the present embodiment, the heat generation peak Temperature (TP) of the pressure-sensitive adhesive layer 13 before curing, which is measured at a temperature rise rate of 10 ℃/min by Differential Scanning Calorimetry (DSC), is preferably a heat generation starting Temperature (TS) +5 to 60 ℃, more preferably TS +5 to 50 ℃, and still more preferably TS +10 to 40 ℃. When the heat generation peak Temperature (TP) is in the above range, the time from the start to the completion of curing becomes shorter when the pressure-sensitive adhesive layer 13 is cured. In general, when a laminated circuit is manufactured using an adhesive such as NCF, it takes time to cure the adhesive. Therefore, the production time (tact time) in manufacturing the laminated circuit is often specified in accordance with the curing time of the adhesive. Therefore, by shortening the time for curing the adhesive layer 13 as described above, the production work time can be effectively shortened. In particular, in the case of manufacturing a laminated circuit, in order to improve the process efficiency, a plurality of semiconductor chips are laminated (temporarily placed), and then a plurality of adhesive layers 13 existing between the semiconductor chips are finally collectively cured in some cases. Even in such a case, by setting the heat generation peak Temperature (TP) to the above range, it is possible to suppress the adhesive layer 13 existing between the semiconductor chips stacked at the initial stage of the process from being cured at an unintended stage before the completion of the stacking of the semiconductor chips.
Here, the heat generation starting temperature and the heat generation peak temperature may be measured using a differential scanning calorimeter. Specifically, the adhesive layer 13 having a thickness of 15mm was heated from room temperature to 300 ℃ at a temperature rise rate of 10 ℃/min using a differential scanning calorimeter (Q2000, manufactured by TA instruments). From the DSC curve thus obtained, the temperature at which heat generation starts (heat generation start Temperature) (TS) and the heat generation peak Temperature (TP) can be obtained.
(2-8) thickness of adhesive layer, etc
In the sheets 1 and 2 for producing a three-dimensional integrated laminated circuit according to the present embodiment, the thickness (T2) of the pressure-sensitive adhesive layer 13 is preferably 2 μm or more, particularly preferably 5 μm or more, and more preferably 10 μm or more. The thickness (T2) is preferably 500 μm or less, particularly preferably 300 μm or less, and more preferably 100 μm or less. By setting the thickness (T2) of the adhesive layer 13 to 2 μm or more, the through-electrodes or bumps existing in the semiconductor chip can be embedded in the adhesive layer 13 well. Further, by setting the thickness (T2) of the adhesive layer 13 to 500 μm or less, the adhesive layer 13 does not excessively bleed out on the side surface when the semiconductor chip having the through electrode is bonded via the adhesive layer 13, and a highly reliable semiconductor device can be manufactured. The thickness (T2) of the pressure-sensitive adhesive layer 13 was an average value measured at 100 points in total at 50mm intervals in the production sheet 1.
In the sheets 1 and 2 for producing a three-dimensional integrated laminated circuit according to the present embodiment, the standard deviation of the thickness (T2) of the pressure-sensitive adhesive layer 13 is 2.0 μm or less, preferably 1.8 μm or less, and particularly preferably 1.6 μm or less. If the standard deviation is larger than 2.0 μm, voids are likely to be generated when the adhesive layer 13 is embedded with the through-electrodes or bumps of the semiconductor wafer using the production sheets 1 and 2, and it is difficult to make the thickness of the adhesive layer 13 constituting the laminated circuit and the thickness of the laminated circuit itself uniform, resulting in insufficient heat dissipation of the laminated circuit. In particular, since a laminated circuit is obtained by laminating a plurality of semiconductor chips and the adhesive layer 13, if the standard deviation of the thickness (T2) of the adhesive layer 13 is more than 2.0 μm, the uniformity of the thickness of the obtained laminated circuit is impaired, and the laminated circuit cannot achieve good heat dissipation. The method of measuring the standard deviation of the thickness (T2) of the pressure-sensitive adhesive layer 13 is shown in test examples described later.
In the sheet 2 for manufacturing a three-dimensional integrated laminated circuit according to the second embodiment including the substrate 11, the ratio (T2/T1) of the thickness (T2) of the pressure-sensitive adhesive layer 13 to the thickness (T1) of the substrate 11 is preferably 0.01 or more, particularly preferably 0.1 or more, and more preferably 0.4 or more. The ratio (T2/T1) is preferably 1.5 or less, particularly preferably 1.0 or less, and further preferably 0.9 or less. By setting the ratio (T2/T1) to the above range, the thickness balance between the substrate 11 and the pressure-sensitive adhesive layer 13 becomes good, the workability in attaching the manufacturing sheet 2 to a semiconductor wafer is excellent, and the attachment suitability in the attachment is easily adjusted. As a result, the attachment can be performed well, and a laminated circuit having excellent quality can be manufactured. In particular, by setting the ratio (T2/T1) to 0.01 or more, the relative thickness of the substrate 11 in the production sheet 1 becomes small, and the relative rigidity of the production sheet 1 can be suppressed to be low. As a result, when the manufacturing sheet 1 is attached to a semiconductor wafer, the through-electrodes or bumps existing on the semiconductor wafer are easily embedded in the adhesive layer 13. On the other hand, by setting the ratio (T2/T1) to 1.5 or less, the relative thickness of the base material 11 in the production sheet 1 becomes large, and the relative rigidity of the production sheet 1 can be maintained high. As a result, the manufacturing sheet 1 is excellent in handling properties, and the manufacturing sheet 1 can be easily attached to a semiconductor wafer. The thickness (T1) of the base material 11 was an average value measured at 100 points in total at 50mm intervals in the production sheet 1.
2. Adhesive layer
(1) Material
In the three-dimensional integrated laminated circuit production sheet 2 of the second embodiment including the adhesive layer 12, the adhesive layer 12 may be composed of a non-curable adhesive or a curable adhesive. As described later, when the three-dimensional integrated laminated circuit production sheet 2 of the present embodiment is used in a method for producing a laminated circuit, the adhesive layer 13 is peeled from the laminate of the substrate 11 and the adhesive layer 12. Therefore, from the viewpoint of facilitating the peeling, the adhesive layer 12 is preferably made of a curable adhesive and the adhesive force is reduced by curing.
When the adhesive layer 12 is composed of a curable adhesive, the adhesive may be an energy ray curable adhesive or a thermosetting adhesive. Here, in order to cure the adhesive layer 12 and the adhesive layer 13 at different stages, when the adhesive layer 13 is thermosetting, the adhesive layer 12 is preferably composed of an energy ray curable adhesive, and when the adhesive layer 13 is energy ray curable, the adhesive layer 12 is preferably composed of a thermosetting adhesive. However, since the adhesive layer 13 is preferably thermosetting for the above reasons, the adhesive layer 12 is preferably made of an energy ray-curable adhesive.
The non-curable adhesive is preferably a non-curable adhesive having desired adhesive strength and removability, and examples thereof include acrylic adhesives, rubber adhesives, silicone adhesives, urethane adhesives, polyester adhesives, and polyvinyl ether adhesives. Among these, acrylic pressure-sensitive adhesives are preferred from the viewpoint of effectively suppressing peeling at the interface between the pressure-sensitive adhesive layer 12 and the pressure-sensitive adhesive layer 13 in unintended stages such as a dicing step.
The energy ray-curable adhesive may be an energy ray-curable adhesive containing an energy ray-curable polymer as a main component, or an energy ray-curable adhesive containing a mixture of a non-energy ray-curable polymer (a polymer that does not have energy ray-curing properties) and a monomer and/or oligomer having at least one or more energy ray-curable groups as a main component. Further, the curable composition may be a mixture of a polymer curable with an energy ray and a non-energy ray-curable polymer, a mixture of a polymer curable with an energy ray and a monomer and/or oligomer having at least one or more energy ray-curable groups, or a mixture of 3 kinds thereof.
The energy ray-curable polymer is preferably a (meth) acrylate (co) polymer having a functional group curable with an energy ray (energy ray-curable group) introduced into a side chain thereof. The polymer is preferably obtained by reacting an acrylic copolymer having a functional group-containing monomer unit with an unsaturated group-containing compound having a functional group bonded to the functional group.
Examples of the monomer and/or oligomer having at least one or more energy ray-curable groups include esters of a polyol and (meth) acrylic acid.
As the non-energy ray-curable polymer component, for example, the acrylic copolymer having a functional group-containing monomer unit can be used.
(2) Physical properties and the like
In the three-dimensional integrated laminated circuit manufacturing sheet 2 of the present embodiment, the storage modulus of the adhesive layer 12 at 23 ℃ is preferably 1 × 103Pa or more, particularly preferably 1X 104Pa or above. Further, the storage modulus is preferably 1 × 109Pa or less, particularly preferably 1X 108Pa or less. When the adhesive layer 12 is made of a curable adhesive, the storage modulus refers to the storage modulus before curing. By setting the storage modulus of the adhesive layer 12 at 23 ℃ to the above range, the through-electrodes or bumps present on the semiconductor wafer can be embedded in the adhesive layer 13 well when the production sheet 2 is attached to the semiconductor wafer. Further, when the surfaces of the semiconductor wafer on which no bumps are formed are subjected to back grinding using the manufacturing sheets 1 and 2, the occurrence of warpage or dishing in the semiconductor wafer can be suppressed. The storage modulus of the adhesive layer 12 at 23 ℃ can be measured, for example, using a dynamic viscoelasticity measuring apparatus (ARES, manufactured by TA instruments) under the conditions of a frequency of 1Hz, a measurement temperature range of-50 to 150 ℃ and a temperature rise rate of 3 ℃/min.
The thickness of the adhesive layer 12 is not particularly limited, but is, for example, preferably 1 μm or more, and particularly preferably 10 μm or more. The thickness is preferably 100 μm or less, and particularly preferably 50 μm or less, for example. When the thickness of the adhesive layer 12 is 1 μm or more, the adhesive layer 12 can exhibit a good adhesive force. Further, by setting the thickness to 100 μm or less, the adhesive agent layer 12 can be suppressed from becoming an unnecessary thickness, and the cost can be reduced.
3. Base material
(1) Material
In the three-dimensional integrated laminated circuit manufacturing sheet 2 of the second embodiment including the base material 11, the material constituting the base material 11 is not particularly limited. However, when the manufacturing sheet 2 is a dicing sheet-integrated type adhesive sheet (dicing die bonding sheet), the material constituting the base material 11 is preferably a material generally used for a base material constituting a dicing sheet. Examples of the material of the substrate 11 include polyethylene, polypropylene, polybutylene, polybutadiene, polymethylpentene, polyvinyl chloride, vinyl chloride copolymer, polyethylene terephthalate, polybutylene terephthalate, polyurethane, ethylene vinyl acetate copolymer, ionomer, ethylene- (meth) acrylic acid copolymer, ethylene- (meth) acrylic acid ester copolymer, polystyrene, vinyl polyisoprene, polycarbonate, polyolefin, and the like, and one kind or a mixture of two or more kinds of these may be used.
When the production sheet 2 is a back-grinding-sheet-integrated adhesive sheet, the material constituting the base material 11 is preferably a material generally used for the base material constituting the back grinding sheet. Examples of the material of the substrate 11 include those composed of resins such as polyethylene terephthalate, polyethylene, polypropylene, and ethylene-vinyl acetate copolymer, and one kind or a mixture of two or more kinds of these materials can be used.
In order to improve the adhesion to the adhesive layer 12, the surface of the substrate 11 on the adhesive layer 12 side may be subjected to surface treatment such as primer treatment, corona treatment, or plasma treatment.
(2) Physical properties and the like
In the sheet 2 for producing a three-dimensional integrated laminated circuit of the present embodiment, the tensile elastic modulus of the base material 11 at 23 ℃ is preferably 100MPa or more, particularly preferably 200MPa or more, and more preferably 300MPa or more. The tensile elastic modulus is preferably 5000MPa or less, particularly preferably 1000MPa or less, and more preferably 400MPa or less. When the tensile elastic modulus of the base material 11 at 23 ℃ is within the above range, the through-electrodes or bumps existing on the semiconductor wafer can be embedded in the adhesive layer 13 satisfactorily when the manufacturing sheet 2 is attached to the semiconductor wafer. When the production sheet 2 is a dicing sheet-integrated adhesive sheet, it is preferable that the tensile elastic modulus of the substrate 11 at 23 ℃ be in the above range, because the substrate 11 is less likely to break when the production sheet 2 is expanded to increase the distance between the semiconductor chips. Further, the tensile elastic modulus of the substrate 11 at 23 ℃ can be measured using a tensile tester in accordance with jis k 7127: 1999.
The thickness (T1) of the substrate 11 is not particularly limited, and is preferably 10 μm or more, and more preferably 15 μm or more, for example. The thickness (T1) is preferably 500 μm or less, and particularly preferably 100 μm or less. By setting the thickness (T1) of the base material 11 to the above range, the value of the ratio (T2/T1) of the thickness (T2) of the pressure-sensitive adhesive layer 13 to the thickness (T1) of the base material 11 can be easily set to the above range, and the workability when the production sheets 1 and 2 are bonded to a semiconductor wafer is excellent. As a result, a laminated circuit having excellent quality can be efficiently manufactured.
4. Release sheet
The release sheet 14 may be formed of any desired material, for example, a polyester film such as polyethylene terephthalate, polybutylene terephthalate, or polyethylene naphthalate, or a plastic film such as a polyolefin film such as polypropylene or polyethylene. It is preferable to subject the release surface (surface in contact with the pressure-sensitive adhesive layer 13) to a release treatment. Examples of the release agent used for the release treatment include silicone-based, fluorine-based, and long-chain alkyl-based release agents.
The thickness of the release sheet is not particularly limited, but is usually 20 μm or more and 250 μm or less.
5. Method for manufacturing sheet for manufacturing three-dimensional integrated laminated circuit
The three-dimensional integrated laminated circuit manufacturing sheet 1 according to the first embodiment can be manufactured in the same manner as a conventional three-dimensional integrated laminated circuit manufacturing sheet. For example, when the three-dimensional integrated laminated circuit production sheet 1 provided with the release sheet 14 is produced, a three-dimensional integrated laminated circuit production sheet containing: the production sheet 2 can be produced by applying a coating solution of the thermally conductive filler, other material constituting the pressure-sensitive adhesive layer 13, and if necessary, a solvent or a dispersion medium to the release surface of the release sheet 14 using a die coater, a curtain coater, a spray coater, a slit coater, a blade coater, or the like to form a coating film, and drying the coating film. The coating liquid is not particularly limited as long as it can be applied, and may contain a component for forming the pressure-sensitive adhesive layer 13 as a solute or a dispersoid. The release sheet 14 may be peeled off as a process material, or may protect the adhesive layer 13 until it is attached to a semiconductor wafer.
In addition, as a method for producing a laminate in which 2 release sheets 14 are laminated on both surfaces of the three-dimensional integrated laminated circuit production sheet 1, a coating film is formed by applying a coating liquid to the release surface of the release sheet 14, and the coating film is dried to form a laminate composed of the pressure-sensitive adhesive layer 13 and the release sheet 14, and the pressure-sensitive adhesive layer 13 of the laminate is attached to the release surface of the other release sheet 14 on the opposite side to the release sheet 14, thereby obtaining a laminate composed of the release sheet 14/the pressure-sensitive adhesive layer 13/the release plate 14. The release sheet 14 in the laminate may be peeled off as a process material, or may protect the pressure-sensitive adhesive layer 13 until it is bonded to a semiconductor wafer.
The three-dimensional integrated laminated circuit manufacturing sheet 2 according to the second embodiment can be manufactured in the same manner as the conventional three-dimensional integrated laminated circuit manufacturing sheet 2. For example, the sheet 2 can be produced by separately producing a laminate of the adhesive layer 13 and the release sheet 14 and a laminate of the adhesive layer 12 and the substrate 11, and bonding these laminates so that the adhesive layer 13 and the adhesive layer 12 are in contact with each other.
A laminate of the pressure-sensitive adhesive layer 13 and the release sheet 14 can be obtained by preparing the coating liquid described above for forming the pressure-sensitive adhesive layer 13, applying the coating liquid to the release surface of the release sheet 14 by the coating method described above to form a coating film, and drying the coating film.
Examples of the solvent include organic solvents such as toluene, ethyl acetate, and methyl ethyl ketone. By blending these organic solvents to prepare a solution having an appropriate solid content concentration, variation in the thickness (T2) of the pressure-sensitive adhesive layer 13 can be further suppressed, and the pressure-sensitive adhesive layer 13 having the standard deviation described above with respect to the thickness (T2) can be efficiently formed. In particular, the solid content concentration of the coating liquid is preferably 5% by mass or more, and particularly preferably 10% by mass or more, from the viewpoint of uniformly applying the coating liquid. From the same viewpoint, the solid content concentration is preferably 55% by mass or less, and preferably 50% by mass or less. By setting the solid content concentration to 5 mass% or more, the occurrence of shrinkage or the like at the time of forming a coating film can be suppressed, and the solvent can be easily sufficiently dried, and variations in the thickness or physical properties of the pressure-sensitive adhesive layer 13 can be more easily suppressed. As a result, the standard deviation of the thickness (T2) of the adhesive layer 13 can be easily adjusted within the above range. Further, by setting the solid content concentration to 55 mass% or less, aggregation of the filler in the coating liquid can be suppressed, the coating liquid can be easily fed, occurrence of coating unevenness (lateral unevenness) continuously occurring in a direction perpendicular to the coating direction can be suppressed, and occurrence of thickness variation of the pressure-sensitive adhesive layer 13 can be further suppressed. The viscosity of the coating liquid at 25 ℃ as measured with a B-type viscometer is preferably 20mPa · s or more, and particularly preferably 25mPa · s or more. The viscosity is preferably 500 mPas or less, and particularly preferably 100 mPas or less.
A laminate of the adhesive layer 12 and the substrate 11 can be obtained by preparing a coating liquid containing a material constituting the adhesive layer 12 and, if necessary, a solvent or a dispersion medium, applying the coating liquid to one surface of the substrate 11 by the above-described coating method to form a coating film, and drying the coating film. As another method for producing a laminate of the adhesive layer 12 and the substrate 11, a laminate of the adhesive layer 12 and the substrate 11 may be obtained by forming the adhesive layer 12 on the release surface of a release sheet for a process, transferring the adhesive layer 12 to one surface of the substrate 11, and releasing the release sheet for a process from the adhesive layer 12.
[ method for producing three-dimensional Integrated laminated Circuit ]
A three-dimensional integrated laminated circuit can be manufactured using the sheets 1 and 2 for manufacturing a three-dimensional integrated laminated circuit of the present embodiment. An example of the production method will be described below.
First, the three-dimensional integrated laminated circuit manufacturing sheets 1 and 2 of the present embodiment are attached to one surface of a semiconductor wafer having through electrodes. Specifically, the adhesive layer 13 side surfaces of the three-dimensional integrated laminated circuit manufacturing sheets 1 and 2 are attached to one surface of the semiconductor wafer.
In addition, the semiconductor wafer having the through electrode may have a weak strength. Therefore, the semiconductor wafer can be reinforced by being fixed to a support such as a support glass via a temporary fixing member. In this case, after the semiconductor wafer side surface of the laminate is bonded to the three-dimensional integrated laminated circuit manufacturing sheets 1 and 2, the support is peeled off together with the temporary fixing member.
When the three-dimensional integrated laminated circuit manufacturing sheet 1 of the present embodiment is used, dicing sheets are further laminated. In this case, the dicing sheet may be attached to the semiconductor wafer first, and the manufacturing sheet 1 may be attached to the surface of the semiconductor wafer opposite to the dicing sheet. Alternatively, the manufacturing sheet 1 may be attached to the semiconductor wafer first, and then the dicing sheet may be attached to the surface of the semiconductor wafer opposite to the manufacturing sheet 1. Alternatively, a dicing sheet may be attached to the surface of the laminated body obtained by attaching the manufacturing sheet 1 to the semiconductor wafer, on the side of the manufacturing sheet 1. On the other hand, when the three-dimensional integrated laminated circuit manufacturing sheet 2 according to the second embodiment is used, it is not necessary to further laminate dicing sheets, and the following dicing step can be performed on the manufacturing sheet 2.
Next, the semiconductor wafer is cut into individual chips (dicing step). At this time, the adhesive layer 13 is also cut at the same time as the semiconductor wafer is cut. The method of cutting the wafer is not particularly limited, and various conventionally known cutting methods can be used. For example, a method of cutting a semiconductor wafer using a dicing blade is given. In addition, other cutting methods such as laser cutting may also be employed.
After the dicing process, the semiconductor chips are picked up. At this time, the semiconductor chip is picked up in a state where the diced adhesive layer 13 is attached. That is, the semiconductor chip to which the pressure-sensitive adhesive layer 13 is attached is peeled off from the pressure-sensitive adhesive layer of the dicing sheet or the pressure-sensitive adhesive layer 12 of the three-dimensional integrated laminated circuit production sheet 2. When the adhesive layer 12 is made of an energy ray-curable adhesive, the adhesive layer 12 is preferably irradiated with an energy ray before picking up. This reduces the adhesive force of the adhesive, and thus facilitates the pickup of the semiconductor chip. Further, the interval between the semiconductor chips may be enlarged by expanding the dicing sheet or the three-dimensional integrated laminated circuit manufacturing sheet 2 before the pickup as necessary.
Next, the semiconductor chip with the adhesive layer is mounted on the circuit board. The semiconductor chip with the adhesive layer is placed on the circuit board with the semiconductor chip side electrode and the circuit board electrode facing each other.
Further, the semiconductor chip with the adhesive layer and the circuit board are heated and pressed, and then cooled. Thereby, the semiconductor chip and the circuit board are bonded via the adhesive layer 13, and the electrode of the semiconductor chip and the electrode of the chip mounting portion in the circuit board are electrically joined via the solder bump formed on the semiconductor chip. The soldering conditions depend on the metal composition used, and in the case of Sn-Ag, for example, the solder is preferably heated at 200 to 300 ℃ for 1 to 30 seconds.
After the soldering, the adhesive layer 13 interposed between the semiconductor chip and the circuit board is cured. For example, the curing can be carried out by heating at 100 to 200 ℃ for 1 to 120 minutes. In addition, the curing step may be performed under pressurized conditions. When the curing of the adhesive layer 13 is completed in the soldering step, the curing step may be omitted.
Next, a new semiconductor chip with an adhesive layer is laminated on the semiconductor chip bonded to the circuit board as described above. In this case, the semiconductor chip with a new adhesive layer is laminated such that the surface on the adhesive layer 13 side of the semiconductor chip is in contact with the surface of the semiconductor chip laminated on the circuit board on the side opposite to the circuit board, and the through electrodes of the two semiconductor chips are electrically connected to each other. Then, soldering is performed between the through-electrodes of the newly stacked semiconductor chips and the through-electrodes of the semiconductor chips stacked on the circuit board, and the adhesive layer 13 interposed between these semiconductor chips is further cured. The welding and the curing of the adhesive layer 13 at this time can be performed by the above-described method and conditions. Thus, a laminate in which two semiconductor chips are laminated on a circuit board can be obtained.
By repeating the steps of laminating the semiconductor chip with the adhesive layer on the semiconductor chip laminated on the circuit board and soldering and curing the adhesive layer 13 as described above, a laminated circuit in which a plurality of semiconductor chips are bonded by the cured product of the adhesive layer 13 can be obtained. In this laminated circuit, the adhesive layer 13 contains the thermally conductive filler, and the standard deviation of the thickness (T2) of the adhesive layer 13 is within the above range, whereby the laminated circuit has excellent heat dissipation properties. Therefore, by using the three-dimensional integrated laminated circuit manufacturing sheets 1 and 2 of the present embodiment, a highly reliable laminated circuit can be manufactured.
In the method for manufacturing a laminated circuit described above, the bonding and the curing of the adhesive layer 13 are performed for each semiconductor chip to be laminated, but for the sake of process efficiency, after a plurality of semiconductor chips are laminated, the bonding between the semiconductor chips and the curing of the adhesive layer 13 interposed between the semiconductor chips may be performed at the end.
The embodiments described above are described for the purpose of facilitating understanding of the present invention, and are not described for the purpose of limiting the present invention. Therefore, each element disclosed in the above embodiments includes all the design modifications and equivalents that fall within the technical scope of the present invention.
Examples
The present invention will be described in more detail below by way of examples, test examples, and the like, but the present invention is not limited to the test examples and the like described below.
Examples 1 to 7 and comparative example 1
The compositions containing the components shown in table 1 were diluted with methyl ethyl ketone so that the solid content concentration was 40 mass%, to obtain coating liquids. The viscosity of the coating solution at 25 ℃ was measured using a B-type viscometer, and found to be 50 mPas. This coating liquid was applied to a silicone-treated release film (SP-PET 381031, manufactured by linec corporation) and the resulting coating film was dried at 100 ℃ for 1 minute by an oven, whereby a first laminate composed of an adhesive layer and a release film having a thickness of 45 μm was obtained.
An adhesive composition was prepared by mixing 100 parts by mass (solid content equivalent; the same applies hereinafter) of an acrylic copolymer (weight average molecular weight: 70 ten thousand) obtained by copolymerizing 80 parts by mass of 2-ethylhexyl acrylate, 10 parts by mass of methyl acrylate, and 10 parts by mass of 2-hydroxyethyl acrylate, with 10 parts by mass of an isocyanate-based crosslinking agent (Nippon Polyurethane Industry co., ltd., corONAte L).
The adhesive composition obtained as described above was applied to one surface of an ethylene-methacrylic acid copolymer (EMAA) film (thickness: 100 μm, tensile elastic modulus: 230MPa) as a substrate to form a coating film. Thus, a second laminate comprising a base material and an adhesive layer having a thickness of 10 μm was obtained. The storage modulus at 23 ℃ of the adhesive layer was measured by the method described later, and the result was 4.6X 105Pa。
Next, the surface of the first laminate on the pressure-sensitive adhesive layer side was bonded to the surface of the second laminate on the pressure-sensitive adhesive layer side, thereby obtaining a three-dimensional integrated laminated circuit production sheet.
Comparative example 2
The compositions containing the components shown in table 1 were diluted with methyl ethyl ketone so that the solid content concentration was 55% by mass, to obtain coating liquids. The viscosity of the coating solution at 25 ℃ was measured using a B-type viscometer, and the result was 150 mPas. A three-dimensional integrated laminated circuit production sheet was obtained in the same manner as in example 1, except that the adhesive layer was formed using the coating liquid.
Here, the details of the constituent components shown in table 1 are as follows.
High molecular weight component
Bisphenol a (bpa)/bisphenol f (bpf) copolymer phenoxy resin: tohto Kasei Co., Ltd., product name "ZX-1356-2", glass transition temperature 71 ℃, weight average molecular weight 6 ten thousand
Thermosetting component
Epoxy resin 1: tris (hydroxyphenyl) methane-type solid EPOXY resin, manufactured by JAPAN EPOXY RESINS CO. LTD., product name "E1032H 60", 5 wt.% reduction temperature of 350 ℃, solid, melting point of 60 DEG C
Epoxy resin 2: Bis-F type liquid EPOXY resin, Japan EPOXY RESINS CO. LTD. manufactured under the product name "YL-983U", EPOXY equivalent 184
Epoxy resin 3: long-chain Bis-F-modified EPOXY resin, Japan EPOXY RESINS CO. LTD. manufacture, product name "YL-7175"
Curing catalyst
2 MZA-PW: 2, 4-diamino-6- [2 '-methylimidazolyl- (1') ] -ethyl-s-triazine, manufactured by SHIKOKU CHEMICALS CORPORATION, having a product name of "2 MZA-PW" and a melting point of 250 DEG C
Flux composition
Rosin derivatives: prepared in crude Sichuan chemical industry, with a softening point of 124-134 DEG C
Filler material
Thermally conductive fillers (spherical alumina); spherical alumina, manufactured by Denka Company Limited, product name "DAM-0", average particle diameter 3 μm, thermal conductivity 40W/m.K
Thermally conductive filler (spherical zinc oxide): spherical zinc oxide, SAKAI CHEMICAL INDUSTRY CO., LTD. PREPARATION, average particle diameter 0.6 μm, thermal conductivity 54W/m.K
Thermally conductive filler (boron nitride): boron nitride, SHOWA DENKO k.k. manufacture, product name "UHP-2", shape: plate-like, average particle diameter of 11.8 μm, aspect ratio of 11.2, and thermal conductivity in major axis direction of 200W/m.K
Fused silica filler: an average particle diameter of 3 μm and a thermal conductivity of 2W/m.K
Further, with respect to the storage modulus of the adhesive agent layer at 23 ℃, a laminate of adhesive agent layers having a thickness of 800 μm was produced by laminating a plurality of adhesive agent layers, and the storage modulus (Pa) was measured using a dynamic viscoelasticity measuring apparatus (TA instruments, ARES) under the conditions of a frequency of 1Hz, a measurement temperature range of-50 to 150 ℃, and a temperature rise rate of 3 ℃/min for a measurement sample obtained by punching the laminate of the adhesive agent layers into a circle having a diameter of 10 mm.
[ test example 1] measurement of thermal conductivity
In each of examples and comparative examples, a composition containing the constituent components shown in table 1 was diluted with methyl ethyl ketone so that the solid content concentration was 40 mass%, and the diluted composition was applied to a silicone-treated release film (SP-PET 381031, manufactured by linec corporation), and the resulting coating film was dried in an oven at 100 ℃ for 1 minute, thereby forming a pressure-sensitive adhesive layer having a thickness of 40 μm. The adhesive layer obtained in this step was laminated in a multilayer manner to have a thickness of 2 mm. A disk-shaped adhesive layer having a diameter of 5cm was punched out of the laminate having a thickness of 2mm, and this was used as a sample for measurement.
The sample was heated at 130 ℃ for 2 hours to be cured, and then the thermal conductivity (W/m.K.) was measured using a thermal conductivity measuring apparatus (HC-110, manufactured by EKO Instruments). The results are shown in Table 2.
Test example 2 measurement of thickness of adhesive layer and standard deviation of the thickness
The total of 100 points of the thickness (T2) of the pressure-sensitive adhesive layer of the first laminate produced in examples and comparative examples was measured at 50mm intervals. Based on the measurement results, the average value (μm) of the thickness (T2) and the standard deviation (μm) of the thickness (T2) were calculated. The results are shown in Table 2.
Test example 3 evaluation of exothermic Properties based on temperature cycle test
A evaluation wafer having bumps formed on one surface and pads formed on the other surface was prepared, and the three-dimensional integrated laminated circuit manufacturing sheets manufactured in examples and comparative examples were attached to the surface of the evaluation wafer on the side where the bumps were formed using a full-automatic poly wafer mounter (RAD-2700F/12, manufactured by linec corporation) and further fixed to a ring frame.
Next, the adhesive layer and the evaluation wafer were cut together with a full automatic dicing saw (manufactured by DISCO corporation, DFD651), and the wafer was sliced into chips having a size of 7.3mm × 7.3mm in plan view.
Next, the diced adhesive layer and the chip were simultaneously picked up and flip-chip bonded to the substrate using a flip-chip bonding machine (substrate joining co., ltd. manufacturing, FC 3000W). Subsequently, the second adhesive layer-attached chip is flip-chip bonded to the first layer chip temporarily placed on the substrate. This process was repeated to manufacture a semiconductor device in which a total of 5 chips were stacked on a substrate.
The obtained semiconductor device was subjected to a temperature cycle test of 1000 cycles in an environment in which one cycle was set at-55 ℃, 10 minutes, 125 ℃, and 10 minutes. For the semiconductor devices before and after the test, the connection resistance values between the semiconductor chips were measured using a digital multimeter, and the rate of change of the connection resistance value of the semiconductor device after the test with respect to the connection resistance value of the semiconductor device before the test was measured. Then, the connection reliability was evaluated according to the following evaluation criteria. The results are shown in Table 2.
O: the rate of change of the connection resistance value is 20% or less.
X: the variation rate of the connection resistance value is more than 20%.
[ test example 4] evaluation of embeddability
A plurality of semiconductor devices were manufactured by the method described in test example 3. The thickness of each surface in the stacking direction was measured while observing 4 side surfaces of 5 semiconductor devices arbitrarily selected from these semiconductor devices using a digital microscope to confirm whether or not cracks were generated in the bumps and the embedded state of the bumps in the adhesive layer. Based on these results, the three-dimensional integrated laminated circuit production sheets obtained in examples and comparative examples were evaluated for embeddability in bumps according to the following evaluation criteria. The results are shown in Table 2.
O: all of the 5 semiconductor devices did not crack at the bump, the bump was well embedded in the adhesive layer, and the thickness in the stacking direction was the same between 4 side surfaces.
X: in the 5 semiconductor devices, cracks were generated in the bumps, the bumps were not sufficiently embedded in the adhesive layer, or the thickness in the stacking direction was different between 4 side surfaces.
[ Table 1]
Figure GDA0001689393510000321
[ Table 2]
Figure GDA0001689393510000331
As is clear from table 2, the adhesive layer in the three-dimensional integrated laminated circuit production sheet of the example had excellent thermal conductivity of 0.5W/m · K or more, and the standard deviation of the thickness (T2) of the adhesive layer was 2.0 μm or less. Further, it was confirmed that the laminated circuit produced using the three-dimensional integrated laminated circuit production sheet obtained in the examples was excellent in heat dissipation, good in temperature cycle test results, and excellent in embedding property of the bumps.
On the other hand, the thermal conductivity of the adhesive layer of the three-dimensional integrated laminated circuit production sheet of the comparative example was 0.3W/m · K, which was an insufficient value, and the heat dissipation of the laminated circuit produced using the production sheet was also insufficient. Further, the standard deviation of the thickness (T2) of the pressure-sensitive adhesive layer was 2.5 μm, and the three-dimensional integrated laminated circuit production sheet of comparative example 2 had insufficient heat dissipation properties of the laminated circuit and poor embedding properties of the bumps.
Industrial applicability
The sheet for manufacturing a three-dimensional integrated laminated circuit of the present invention has excellent heat dissipation properties and can be suitably used for manufacturing a laminated circuit having high reliability.
Description of the reference numerals
1. 2: a three-dimensional integrated laminated circuit manufacturing sheet;
11: a substrate;
12: an adhesive layer;
13: an adhesive layer;
14: and (4) peeling off the sheet.

Claims (15)

1. A three-dimensional integrated laminated circuit manufacturing sheet for bonding a plurality of semiconductor chips having through-electrodes to each other and manufacturing a three-dimensional integrated laminated circuit, the sheet being interposed between the plurality of semiconductor chips,
the sheet for producing a three-dimensional integrated laminated circuit comprises at least a curable adhesive layer,
the adhesive layer contains a thermally conductive filler having a thermal conductivity of 10W/m.K or more at 25 ℃,
the standard deviation of the thickness (T2) of the adhesive layer is 2.0 [ mu ] m or less,
the material constituting the adhesive layer contains a high molecular weight component,
the high molecular weight component is at least 1 selected from (meth) acrylic resin, phenoxy resin, polyester resin, polyurethane resin, polyimide resin, polyamideimide resin, silicone-modified polyimide resin, polybutadiene resin, polypropylene resin, styrene-butadiene-styrene copolymer, styrene-ethylene-butylene-styrene copolymer, polyacetal resin, polyvinyl acetal resin, butyl rubber, chloroprene rubber, polyamide resin, acrylonitrile-butadiene copolymer, acrylonitrile-butadiene-acrylic acid copolymer, acrylonitrile-butadiene-styrene copolymer, and polyvinyl acetate,
the phenoxy resin is at least 1 phenoxy resin selected from bisphenol A type, bisphenol F type, bisphenol A/bisphenol F copolymerization type and biphenol type.
2. The sheet for manufacturing a three-dimensional integrated laminated circuit according to claim 1, wherein the thermally conductive filler is composed of a material selected from the group consisting of metal oxides, carbides, nitrides, and metal hydroxides.
3. The sheet for manufacturing a three-dimensional integrated laminated circuit according to claim 1, wherein a content of the thermally conductive filler in the adhesive layer is 35% by mass or more and 95% by mass or less.
4. The sheet for producing a three-dimensional integrated laminated circuit according to claim 1, wherein the average particle diameter of the thermally conductive filler is 0.01 μm or more and 20 μm or less.
5. The sheet for producing a three-dimensional integrated laminated circuit according to claim 1, wherein the adhesive layer has a thermal conductivity of 0.5W/m-K to 8.0W/m-K after curing.
6. The sheet for producing a three-dimensional integrated laminated circuit according to claim 1, wherein a material constituting the adhesive layer contains a thermosetting component and a curing catalyst.
7. The sheet for producing a three-dimensional integrated laminated circuit according to claim 1, wherein the glass transition temperature of the high molecular weight component is 50 ℃ or higher.
8. The sheet for manufacturing a three-dimensional integrated laminated circuit according to claim 1, wherein a material constituting the adhesive layer contains a flux component.
9. The sheet for producing a three-dimensional integrated laminated circuit according to claim 1, wherein the thickness of the adhesive layer is 2 μm or more and 500 μm or less.
10. The sheet for manufacturing a three-dimensional integrated laminated circuit according to claim 1, further comprising: the adhesive layer is laminated on one surface side of the adhesive layer, and the substrate is laminated on the surface side of the adhesive layer opposite to the adhesive layer.
11. The sheet for manufacturing a three-dimensional integrated laminated circuit according to claim 10, wherein the thickness of the base material is 10 μm or more and 500 μm or less.
12. The sheet for producing a three-dimensional integrated laminated circuit according to claim 10, wherein a ratio (T2/T1) of the thickness (T2) of the adhesive layer to the thickness (T1) of the base material is 0.01 to 5.0.
13. The sheet for manufacturing a three-dimensional integrated laminated circuit according to claim 10, wherein the adhesive has a storage modulus of 1 x 10 at 23 ℃31X 10 above Pa9Pa or less.
14. The sheet for producing a three-dimensional integrated laminated circuit according to claim 10, wherein the tensile modulus of elasticity of the base material at 23 ℃ is 100MPa or more and 5000MPa or less.
15. A method for manufacturing a three-dimensional integrated laminated circuit, comprising the steps of:
bonding one surface of the adhesive layer of the three-dimensional integrated laminated circuit manufacturing sheet according to any one of claims 1 to 9 or the surface of the adhesive layer of the three-dimensional integrated laminated circuit manufacturing sheet according to any one of claims 10 to 14, which is opposite to the adhesive layer, to at least one surface of a semiconductor wafer provided with a through electrode;
dicing the semiconductor wafer together with the adhesive layer of the three-dimensional integrated laminated circuit manufacturing sheet to obtain semiconductor chips with adhesive layers;
a step of obtaining a semiconductor chip laminate by laminating a plurality of the semiconductor chips with the adhesive layer, which are obtained by dicing, so that the through-electrodes are electrically connected to each other and the adhesive layer and the semiconductor chips are alternately arranged; and
and a step of curing the adhesive layer of the semiconductor chip laminate to bond the semiconductor chips constituting the semiconductor chip laminate to each other.
CN201780004484.9A 2016-04-05 2017-02-13 Sheet for manufacturing three-dimensional integrated laminated circuit and method for manufacturing three-dimensional integrated laminated circuit Active CN108463527B (en)

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