TWI722115B - Three-dimensional build-up volume layer circuit manufacturing plate and three-dimensional build-up volume layer circuit manufacturing method - Google Patents

Abstract

A plate 1 for manufacturing a three-dimensional volume layer circuit, which is interposed between a plurality of semiconductor wafers having through electrodes, and is used in order to connect the plurality of semiconductor wafers to each other to form a three-dimensional volume layer circuit. The plate 1 for manufacturing a volume layer circuit. The aforementioned plate 1 for manufacturing a three-dimensional volume layer circuit has at least a curable adhesive layer 13, and the adhesive layer 13 contains a thermally conductive filler, and the adhesive layer 13 The standard deviation of the thickness (T2) is 2.0 μm or less. The sheet 1 for manufacturing such a three-dimensional volume-layer circuit has excellent heat dissipation properties.

Description

Three-dimensional build-up volume layer circuit manufacturing plate and three-dimensional build-up volume layer circuit manufacturing method

The present invention relates to a plate suitable for manufacturing a three-dimensional volume-layer circuit and a method for manufacturing a three-dimensional volume-layer circuit using the plate.

In recent years, from the viewpoint of increasing the capacity and functionality of electronic circuits, the development of a three-dimensional volumetric layer circuit (hereinafter referred to as "layered circuit") in which a plurality of semiconductor wafers are stacked three-dimensionally Department is in progress. In this type of multilayer circuit, in order to miniaturize. For high-functionality, a semiconductor wafer with through electrodes (TSV) that penetrates from the circuit formation surface to the opposite surface is used. At this time, the stacked semiconductor wafers are electrically connected by the through electrodes (or bumps provided at the ends of the through electrodes) provided in each of them are in contact with each other.

When manufacturing such a multilayer circuit, in order to ensure the above-mentioned electrical connection and mechanical strength, a resin composition is used to electrically connect the through electrodes to each other and at the same time to bond the semiconductor wafers to each other. For example, Patent Document 1 proposes to disclose a method in which a film-like adhesive, which is generally called a non-conductive film (Non-Conductive Film, NCF), is interposed between semiconductor wafers and the semiconductor wafers are bonded to each other. .

However, in the above-mentioned multilayer circuit, because multiple semiconductors Since the wafers are stacked, it is very easy to generate heat when the current flows through the circuit. The heat generation of the multilayer circuit can cause a decrease in calculation processing capability or erroneous operation, which is the cause of the lower performance of the multilayer circuit. In addition, when the multilayer circuit generates excessive heat, the multilayer circuit may also be deformed, damaged, or malfunction. Therefore, the above-mentioned multilayer circuit is required to have high heat dissipation to ensure reliability.

[Prior Technical Literature] [Patent Literature]

[Patent Document 1] JP 2010-010368 A

However, there is a problem that a multilayer circuit manufactured using a conventional adhesive may not necessarily achieve good heat dissipation.

The present invention was made in view of the actual situation, and its object is to provide a plate for manufacturing a three-dimensional volume-layer circuit with excellent heat dissipation. In addition, the object of the present invention is to provide a method for manufacturing such a three-dimensional build-up volume layer circuit.

In order to achieve the above-mentioned object, the first series of the present invention provides a three-dimensional build-up layer circuit manufacturing plate, which is interposed between a plurality of semiconductor wafers having through electrodes, in order to connect the aforementioned plurality of semiconductor wafers to each other. A three-dimensional volume-layer circuit manufacturing plate used in a three-dimensional volume-layer circuit is characterized in that the plate for manufacturing a three-dimensional volume-layer circuit is at least a hardenable adhesive layer, and the adhesive layer contains A thermally conductive filler, and the standard deviation of the thickness (T2) of the aforementioned adhesive layer is 2.0 μm or less (Invention 1).

The above-mentioned invention (Invention 1) of the three-dimensional volume-layer circuit manufacturing board, because the adhesive layer contains a thermally conductive filler with high thermal conductivity, and the standard deviation of the thickness (T2) of the adhesive layer is within the above range, The multilayer circuit system manufactured by using this sheet piece is excellent in heat dissipation. Therefore, by using the three-dimensional volume-layer circuit manufacturing plate of the above-mentioned invention (Invention 1), it is possible to manufacture a multilayer circuit with high reliability.

In the above invention (Invention 1), the aforementioned thermally conductive filler is preferably composed of a material selected from the group consisting of metal oxides, silicon carbide, carbides, nitrides, and metal hydroxides (Invention 2).

In the above inventions (Inventions 1 and 2), the content of the thermally conductive filler in the adhesive layer is preferably 35% by mass or more and 95% by mass or less (Invention 3).

In the above inventions (Inventions 1 to 3), the thermal conductivity of the aforementioned thermally conductive filler at 25°C is 10W/m. K or higher is preferable (Invention 4).

In the above inventions (Inventions 1 to 4), the average particle size of the thermally conductive filler is preferably 0.01 μm or more and 20 μm or less (Invention 5).

In the above inventions (Inventions 1 to 5), the thermal conductivity of the aforementioned adhesive layer after hardening is 0.5W/m. Above K, 8.0W/m. K or less is better (Invention 6).

In the above inventions (Inventions 1 to 6), the material constituting the aforementioned adhesive layer preferably contains a thermosetting component, a high molecular weight component, and a curing catalyst (Invention 7).

In the above inventions (Inventions 1 to 7), the glass transition temperature of the high molecular weight component is preferably 50°C or higher (Invention 8).

In the above inventions (Inventions 1 to 8), the material constituting the aforementioned adhesive layer preferably contains a flux component (Invention 9).

In the above inventions (Inventions 1 to 9), the thickness of the adhesive layer is preferably 2 μm or more and 500 μm or less (Invention 10).

In the aforementioned inventions (Inventions 1 to 10), the aforementioned three-dimensional build-up volume layer circuit manufacturing board preferably further comprises: an adhesive layer laminated on one side of the aforementioned adhesive layer; and a substrate, which The system is laminated on the opposite side of the adhesive layer to the adhesive layer (Invention 11).

In the above invention (Invention 11), the thickness of the substrate is preferably 10 μm or more and 500 μm or less (Invention 12).

In the above invention (Invention 11 or 12), the ratio (T2/T1) of the thickness (T2) of the adhesive layer to the thickness (T1) of the substrate is preferably 0.01 or more and 5.0 or less (Invention 13).

In the above inventions (Inventions 10 and 11), the storage elastic modulus of the adhesive layer at 23°C is preferably 1×10 ³ Pa or more and 1×10 ⁹ Pa or less (Invention 14).

In the above inventions (Inventions 11-14), the tensile modulus of the substrate at 23°C is preferably 100 MPa or more and 5000 MPa or less (Invention 15).

The second aspect of the present invention provides a method for manufacturing a three-dimensional volumetric layer circuit, which is characterized by including the following steps: aligning one side or the adhesive layer of the plate for manufacturing the three-dimensional volumetric layer circuit (Inventions 1 to 10) The step of bonding the adhesive layer on the opposite side of the adhesive layer to at least one side of the semiconductor wafer provided with through-electrodes on the plate for manufacturing the three-dimensional volume layer circuit (Inventions 11 to 15); The step of simultaneously cutting the aforementioned semiconductor wafer and the aforementioned adhesive layer of the aforementioned three-dimensional build-up volume layer circuit manufacturing plate, and then slicing them into a semiconductor wafer of the adhesive layer; attaching a plurality of pieces of the aforementioned adhesive layer The semiconductor wafer of the agent layer is laminated in a plurality of layers such that the through electrodes are electrically connected to each other and the adhesive layer and the semiconductor wafer are alternately arranged to obtain a semiconductor wafer laminate; and the step of forming the semiconductor wafer on the semiconductor wafer The step of curing the adhesive layer of the laminated body and bonding the semiconductor wafers constituting the semiconductor wafer laminated body to each other (Invention 16).

When the plate for manufacturing a three-dimensional volume-layer circuit of the present invention is used, a three-dimensional volume-layer circuit with excellent heat dissipation properties can be manufactured. In addition, when the manufacturing method of the present invention is used, such a three-dimensional volumetric layer circuit can be manufactured.

1, 2‧‧‧Plates for manufacturing three-dimensional volume layer circuits

11‧‧‧Substrate

12‧‧‧Adhesive layer

13‧‧‧Adhesive layer

14‧‧‧Peeling plate

Fig. 1 is a cross-sectional view of a plate for manufacturing a three-dimensional volume layer circuit according to the first embodiment of the present invention.

Fig. 2 is a cross-sectional view of a plate for manufacturing a three-dimensional volume layer circuit according to a second embodiment of the present invention.

[Form to implement invention]

Hereinafter, embodiments of the present invention will be described.

[Plates for manufacturing three-dimensional volume layer circuits]

Fig. 1 is a cross-sectional view showing a plate 1 for manufacturing a three-dimensional volume layer circuit of the first embodiment. As shown in Fig. 1, the board 1 for manufacturing the three-dimensional build-up volume layer circuit of this embodiment (hereinafter referred to as "the board 1 for manufacturing") is provided with an adhesive layer 13 and laminated on it Then, at least one side of the agent layer 13 is peeled off the sheet 14. In addition, the peeling sheet 14 may be omitted.

In addition, Fig. 2 is a cross-sectional view of the plate 2 for manufacturing the three-dimensional volume layer circuit of the second embodiment. As shown in Fig. 2, the plate 2 for manufacturing a three-dimensional build-up volume layer circuit of this embodiment (hereinafter referred to as "the plate 2 for manufacturing") is provided with a substrate 11, which is laminated on the substrate The adhesive layer 12 on at least one side of 11 and the adhesive layer 13 laminated on the side of the adhesive layer 12 opposite to the base material 11. In addition, the release sheet 14 may be laminated on the opposite surface of the adhesive layer 13 and the adhesive layer 12.

In the three-dimensional volume layer circuit manufacturing plates 1 and 2 of this embodiment, the adhesive layer 13 contains a thermally conductive filler having high thermal conductivity. In addition, in the plates 1 and 2 for manufacturing a three-dimensional volume layer circuit of the present embodiment, the standard deviation of the thickness (T2) of the adhesive layer 13 is 2.0 μm or less.

Generally, since a multilayer circuit is formed by laminating a plurality of semiconductor wafers, it contains a large number of circuits that become a heat source and has a structure that does not easily emit heat. Therefore, when the current flows in the multilayer circuit, the multilayer circuit easily generates heat, and at the same time, the generated heat is not easily dissipated to the outside.

However, in the build-up circuit manufactured using the plates 1 and 2 for manufacturing the three-dimensional build-up layer circuit of this embodiment, the semiconductor wafers are bonded to each other by the adhesive layer 13 containing a thermally conductive filler and excellent in heat dissipation. It is easily released from the end of the adhesive layer 13. In addition, since the standard deviation of the thickness (T2) of the adhesive layer 13 is in the above range, the thickness of the adhesive layer 13 constituting the multilayer circuit becomes uniform, and the thickness of the multilayer circuit itself becomes uniform. As a result, the thickness of the multilayer circuit becomes uniform. Excellent heat conduction in the circuit. With the above, the heat dissipation of the entire multilayer circuit is excellent, and even when a current flows, it can be suppressed from becoming excessively high. As a result, a multilayer circuit with high reliability can be manufactured.

On the other hand, the build-up circuit is formed by laminating a plurality of semiconductor wafers, so it is generally difficult to make the build-up circuit to a uniform thickness. This is because even if the thickness of the semiconductor wafer or the adhesive layer constituting the multilayer circuit is slightly deviated from the required thickness, the deviation is accumulated due to the stacking of the semiconductor wafer and the adhesive layer, and as a result, the One of the important reasons for the large deviation of the multilayer circuit from the required thickness. In addition, when the through electrodes or bumps of the semiconductor wafer are embedded in the adhesive layer, voids may occur. Due to the voids, the thickness of the adhesive layer of the multilayer circuit may partially change. Especially in the multilayer circuit, because there are a plurality of interfaces between the semiconductor wafer and the adhesive layer that may have voids, the probability of voids is high, and it becomes more difficult to make the thickness of the multilayer circuit uniform. However, in the three-dimensional volume layer circuit manufacturing plates 1 and 2 of the present embodiment, since the standard deviation of the thickness (T2) of the adhesive layer 13 is within the above-mentioned range, the thickness of the adhesive layer 13 can be suppressed from being reduced. The required thickness is shifted, whereby the multilayer circuit can be made into a uniform thickness. Furthermore, since the standard deviation of the thickness (T2) of the adhesive layer 13 is in the above range, when the through electrode or bump of the semiconductor wafer is embedded in the adhesive layer 13, the generation of voids can be suppressed, and the embedment can be good By this, the multilayer circuit can also be made into a uniform thickness.

The plates 1 and 2 for manufacturing the three-dimensional volume layer circuit of this embodiment are interposed between a plurality of semiconductor wafers having through electrodes, and are used to connect the plurality of semiconductor wafers to each other to form a three-dimensional volume layer circuit. . One end or both ends of the penetrating electrode may also protrude from the surface of the semiconductor wafer. In addition, the semiconductor wafer may be further provided with bumps. In this case, the bumps may also be provided on one or both ends of the through electrode.

In the three-dimensional volume-layer circuit boards 1 and 2 of this embodiment, the adhesive layer 13 has curability. Here, the term "hardenability" means that the adhesive layer 13 can be hardened by heating or the like. That is, the adhesive layer 13 is not hardened in the state constituting the manufacturing plates 1 and 2. The adhesive layer 13 may be thermally curable, or may also be energy-ray curable. However, from the viewpoint that it can be cured well when the manufacturing plates 1 and 2 are used in the manufacturing method of a build-up circuit, the adhesive layer 13 is preferably thermosetting. Specifically, when the manufacturing plates 1 and 2 are used in the manufacturing method of a build-up circuit, as described later, the adhesive layer 13 is formed into pieces in a state of being attached to a semiconductor wafer. Thereby, a laminate of the semiconductor wafer and the adhesive layer 13 formed into individual pieces can be obtained. In this laminated system, the adhesive layer 13 side surface is attached to the laminated body of the semiconductor wafer, and the adhesive layer 13 is cured in this state. Generally, semiconductor wafers do not have energy ray transmittance, or in most cases, the transmittance is very low. Even in this case, if the adhesive layer 13 has thermosetting properties, the adhesive layer 13 can be quickly made. To harden.

1. Adhesive layer

(1) Material

In the three-dimensional volume-layer circuit manufacturing plates 1 and 2 of this embodiment, the material constituting the adhesive layer 13 contains a thermally conductive filler. In addition, the material preferably further contains a thermosetting component, a curing agent, a curing catalyst, a high molecular weight component, a component having a flux function, and the like.

(1-1) Thermal conductive filler

The material constituting the adhesive layer 13 contains a thermally conductive filler. Here, the so-called thermally conductive filler refers to a filler with a relatively high thermal conductivity, for example, refers to a thermal conductivity of 10W/m at 25°C. Fillers above K are preferably 20W/m. Fillers above K, which are particularly preferably 30W/m. Fillers above K. In addition, the upper limit of the thermal conductivity of the thermally conductive filler at 25°C is not limited, and it is usually 300W/m. Below K.

As described above, when the adhesive layer 13 contains a thermally conductive filler, the adhesive layer 13 exhibits excellent heat dissipation due to the interaction with the build-up circuit having a uniform thickness. In addition, since the adhesive layer 13 contains a thermally conductive filler, the resulting multilayer circuit has a higher rigidity, and at the same time it is less likely to cause dimensional changes due to environmental changes.

As the above-mentioned thermally conductive filler, one selected from the group consisting of metal oxides such as zinc oxide, magnesium oxide, aluminum oxide, titanium oxide, and iron oxide, carbides such as silicon carbide and calcium carbonate, boron nitride, aluminum nitride, etc. Fillers made of metal hydroxides such as nitrides and magnesium hydroxide, and talc materials are preferred. Among these, from the viewpoint of achieving more excellent heat dissipation, the use of metal oxides selected from zinc oxide, magnesium oxide, aluminum oxide, titanium oxide, iron oxide, etc., silicon carbide, calcium carbonate, etc. is used for carbonization. Fillers made of materials such as nitrides, boron nitride, aluminum nitride and other nitrides, and magnesium hydroxide and other metal hydroxides are preferred. For these materials, powders thereof may be used as fillers, those spheroidized and become beads may be used as fillers, or single crystal fibers thereof may be used as fillers. The thermally conductive filler obtained from the above-mentioned materials can be used singly or in combination of two or more kinds. In addition, the thermally conductive filler is preferably non-conductive.

The shape of the thermally conductive filler is not particularly limited, for example, It has at least one shape selected from granular, needle-like, plate-like, and amorphous. Among them, it is preferable to use granular thermal conductive fillers. Since the thermally conductive filler is granular, the filling rate of the thermally conductive filler in the adhesive layer 13 is increased, and an efficient heat conduction path is formed in the adhesive layer 13. As a result, the adhesive layer 13 has better heat dissipation Sex.

When the thermally conductive filler is granular, the lower limit of the average particle size is preferably 0.01 μm or more, more preferably 0.05 μm or more, and particularly preferably 0.1 μm or more. In addition, the upper limit of the average particle size of the thermally conductive filler is preferably 20 μm or less, more preferably 5 μm or less, and particularly preferably 1 μm or less. When the average particle diameter of the thermally conductive filler is in the above range, the adhesive layer 13 has more excellent heat dissipation properties, while the film-forming properties of the adhesive layer 13 are improved, and the thermal conductivity in the adhesive layer 13 can be improved. Filling rate of the filler. In addition, the average particle diameter of the thermally conductive filler in this specification refers to the particle diameter calculated by measuring the major axis diameters of 20 arbitrarily selected thermally conductive fillers using an electron microscope and using the arithmetic average value.

In addition, when the thermally conductive filler is granular, the maximum particle size of the thermally conductive filler is preferably 50 μm or less, and more preferably 25 μm or less. When the maximum particle size of the thermally conductive filler is 50 μm or less, it is easy to fill the thermally conductive filler in the adhesive layer 13. As a result, the adhesive layer 13 has better heat dissipation properties. In addition, since the maximum particle size of the inorganic filler is 50μm or less, the through electrodes (or bumps provided at the ends of the through electrodes) of the multilayer circuit are easily electrically connected to each other, and can be efficiently manufactured with high reliability. Sexual multilayer circuit.

When the thermally conductive filler is granular, the particle size distribution (CV value) of the thermally conductive filler is preferably 15% or more, especially 30% or more. In addition, the particle size distribution (CV value) is preferably 80% or less, especially 60% or less. By setting the particle size distribution of the thermally conductive filler in the above range, it is possible to efficiently achieve uniform heat dissipation. In addition, the CV value is an indicator of the deviation of the particle size, which means that the larger the CV value, the greater the deviation of the particle size. Therefore, especially with a CV value of 15% or more, the deviation of the particle size becomes good, and particles with a smaller size can easily enter the gap between the particles. Thereby, the thermally conductive filler can be effectively filled, and the adhesive layer 13 exhibiting high heat dissipation can be easily obtained. In addition, with the CV value being 80% or less, it is possible to suppress the particle size of the thermally conductive filler from becoming larger than the thickness of the adhesive layer 13. As a result, it is possible to suppress the occurrence of irregularities on the surface of the adhesive layer 13 on the opposite side to the adhesive layer 12, and it is easy to obtain good adhesiveness. Moreover, since the CV value is 80% or less, it is easy to form the adhesive layer 13 with uniform performance. In addition, the particle size distribution (CV value) of the thermally conductive filler can be observed by electron microscope observation of the thermally conductive filler, the major axis diameter can be measured for 200 or more particles, and the standard deviation of the major axis diameter can be determined and set as It is obtained by dividing the standard deviation by the value of the above-mentioned average particle diameter.

When the shape of the thermally conductive filler is needle-like, the average axial length (average axial length in the long axis direction) of the thermally conductive filler is preferably 0.01 μm or more, especially 0.05 μm or more, and further 0.1 μm The above is better. In addition, the average axial length is preferably 10 μm or less, particularly 5 μm or less, and more preferably 1 μm or less.

The aspect ratio of the thermally conductive filler is preferably 1 or more, especially 5 or more. In addition, the aspect ratio is preferably 20 or less, and particularly preferably 15 or less. With the aspect ratio of the thermally conductive filler as the above range In this way, an efficient heat conduction path is formed in the adhesive layer 13 so that the adhesive layer 13 has better heat dissipation properties. In addition, the aspect ratio system can be set to a value obtained by dividing the average diameter of the number of minor axes of the thermally conductive filler by the number average diameter of the major axes. Here, the number average diameter of the minor axis and the number average diameter of the major axis refer to the minor axis diameter and the major axis diameter of 20 arbitrarily selected thermally conductive fillers measured by electron microscopy, and calculated as the respective arithmetic averages. The number average particle size.

The specific gravity of the thermally conductive filler is ^{preferably 1 g/cm 3} or more, especially 3 g/cm ³ or more. In addition, the specific gravity is preferably 10 g/cm ³ or less, and particularly preferably 6 g/cm ³ or less. When the specific gravity is in the above range, the heat dissipation of the adhesive layer 13 becomes more excellent.

In addition, the content of the thermally conductive filler in the adhesive layer 13 is based on the total amount of the materials constituting the adhesive layer 13, and the lower limit is preferably 35% by mass or more, and more preferably 40% by mass or more. More than 50% by mass is particularly preferred. In addition, the upper limit of the content of the thermally conductive filler is preferably 95% by mass or less, and more preferably 90% by mass or less. In the material constituting the adhesive layer 13, since the content of the thermally conductive filler is 35% by mass or more, the adhesive layer 13 has better heat dissipation properties. The three-dimensional volume layer circuit manufacturing board of this embodiment is used Sheets 1 and 2 can effectively manufacture multilayer circuits with excellent heat dissipation properties. Moreover, when the content is 95% by mass or less, the content of components other than the thermally conductive filler in the material constituting the adhesive layer 13 becomes relatively high, so that the adhesive layer 13 can exhibit better adhesiveness.

(1-2) Thermosetting ingredients

嗪樹脂、苯氧基樹脂等，該等能夠單獨使用1種或組合2種以上而使用。該等之中，從接著性等的觀點而言，係以環氧樹脂及酚樹脂為佳，以環氧樹脂為特佳。 The material constituting the adhesive layer 13 preferably contains a thermosetting component. The thermosetting component is not particularly limited as long as it is generally used as an adhesive component for connecting semiconductor wafers. Specifically, epoxy resin, phenol resin, melamine resin, urea resin, polyester resin, urethane resin, acrylic resin, polyimide resin, benzo

An oxazine resin, a phenoxy resin, etc., these can be used individually by 1 type or in combination of 2 or more types. Among them, from the viewpoint of adhesiveness, etc., epoxy resins and phenol resins are preferred, and epoxy resins are particularly preferred.

烷等之分子內的碳-碳雙鍵藉由例如氧化而導入環氧基而成之所謂脂環型環氧化物。此外，亦能夠使用具有聯苯骨架、二環己二烯骨架、萘骨架等之環氧樹脂。該等環氧樹脂可單獨1種、或組合2種以上而使用。 Epoxy resin has the property of three-dimensional network formation when heated to form a strong hardened product. As such epoxy resins, various previously known epoxy resins can be used. Specifically, phenols such as bisphenol A, bisphenol F, resorcinol, phenol novolac, and cresol novolac can be used. Glycidyl ethers of alcohols; butanediol, polyethylene glycol, polypropylene glycol and other alcohols; phthalic acid, isophthalic acid, tetrahydrophthalic acid and other carboxylic acid rings Oxypropyl ether; epoxy propyl type or alkyl glycidyl type epoxy resin formed by replacing the active hydrogen bonded to the nitrogen atom of aniline isocyanurate with glycidyl group; For example, vinyl cyclohexane diepoxide, 3,4-epoxycyclohexylmethyl-3,4-dicyclohexane carboxylate, 2-(3,4-epoxy)cyclohexyl-5, 5-spiro(3,4-epoxy)cyclohexane-m-di

A so-called alicyclic epoxide is formed by introducing an epoxy group into a carbon-carbon double bond in the molecule such as alkane, for example, by oxidation. In addition, epoxy resins having a biphenyl skeleton, a dicyclohexadiene skeleton, a naphthalene skeleton, and the like can also be used. These epoxy resins can be used individually by 1 type or in combination of 2 or more types.

The content of the thermosetting component in the material constituting the adhesive layer 13 is based on the total amount of the materials constituting the adhesive layer 13, and the lower limit is preferably 5 mass% or more, and 10 mass% or more For better. In addition, the upper limit of the content of the thermosetting component is preferably 75% by mass or less. It is more preferable that it is 55% by mass or less. When the content of the thermosetting component is in the above range, it becomes easy to adjust the above-mentioned heat generation initiation temperature and heat generation peak temperature to the above-mentioned range.

(1-3) Hardener. Hardening catalyst

When the material constituting the adhesive layer 13 contains the aforementioned thermosetting component, the material preferably further contains a curing agent and a curing catalyst.

The curing agent is not particularly limited, and phenols, amines, mercaptans, etc. can be mentioned, and it can be appropriately selected according to the type of the aforementioned thermosetting component. For example, when an epoxy resin is used as a curable component, from the viewpoint of reactivity with the epoxy resin, etc., phenols are preferred.

Examples of phenols include bisphenol A, tetramethyl bisphenol A, diallyl bisphenol A, biphenol, bisphenol F, diallyl bisphenol F, triphenylmethane type phenol, and tetramethyl bisphenol A. Phenol, novolak-type phenol, cresol novolak resin, etc., these systems can be used individually by 1 type or in combination of 2 or more types.

In addition, the curing catalyst is not particularly limited, and examples include imidazole-based, phosphorus-based, amine-based, etc., and can be appropriately selected in accordance with the types of the aforementioned thermosetting components and the like. In addition, as the hardening catalyst, it is preferable to use a latent hardening catalyst, which does not activate under predetermined conditions, but activates when heated to a pressure higher than the high pressure bonding temperature at which the solder is melted. Furthermore, the latent hardening catalyst is also preferably used as a microencapsulated latent hardening catalyst.

For example, when epoxy resin is used as a curable component, from the viewpoints of reactivity with epoxy resin, storage stability, physical properties of the cured product, curing speed, etc., an imidazole-based curing catalyst is used as a curing catalyst. The media is better. As the imidazole-based curing catalyst, conventional materials can be used, but from the excellent curing properties, From the standpoint of storage stability and connection reliability, it is better to use an imidazole catalyst with a triazine skeleton. These can be used individually or in combination of 2 or more types. In addition, these can also be used as microencapsulated latent hardening catalysts. The melting point of the imidazole-based hardening catalyst is preferably 200°C or higher, especially 250°C or higher, from the viewpoints of excellent hardenability, storage stability, and connection reliability.

In this embodiment, the content of the curing catalyst in the material constituting the adhesive layer 13 is based on the total amount of the materials constituting the adhesive layer 13, and the lower limit is preferably 0.1% by mass or more, and 0.2 The mass% or more is more preferable, and 0.4 mass% or more is particularly preferable. In addition, the upper limit of the content of the hardening catalyst is preferably 10% by mass or less, more preferably 5% by mass or less, and particularly preferably 3% by mass or less. When the content of the curing catalyst in the material constituting the adhesive layer 13 is greater than or equal to the above lower limit, the thermosetting component can be sufficiently cured. On the other hand, when the content of the curing catalyst is equal to or less than the above upper limit, the storage stability of the adhesive layer 13 becomes good.

(1-4) High molecular weight ingredients

The above-mentioned material constituting the adhesive layer 13 preferably contains a high molecular weight component other than the aforementioned thermosetting component. By containing the high molecular weight component, the 90°C melt viscosity and average linear expansion coefficient of the material easily satisfy the numerical range described later, and the connection reliability of the resulting multilayer circuit becomes higher.

As high molecular weight components, for example, (meth)acrylic resins, phenoxy resins, polyester resins, polyurethane resins, polyimide resins, polyimide imide resins, silicone modified poly Imidine resin, polybutadiene resin, polypropylene resin, styrene-butadiene-styrene copolymer, styrene-ethylene-butene-styrene copolymer, polyacetal resin, polyethylene butadiene Aldehyde resin Polyvinyl acetal resin, butyl rubber, chloroprene rubber, polyamide resin, acrylonitrile-butadiene copolymer, acrylonitrile-butadiene-acrylic acid copolymer, acrylonitrile-butadiene-benzene Ethylene copolymer, polyvinyl acetate, nylon, etc. can be used alone or in combination of two or more.

In addition, "(meth)acrylic acid" in this specification means both acrylic acid and methacrylic acid. The same applies to other similar terms such as "(meth)acrylic resin".

Among the aforementioned high molecular weight components, it is preferable to use one or more selected from the group consisting of polyvinyl acetal resin, polyester resin, and phenoxy resin. The material constituting the above-mentioned manufacturing sheet contains these high molecular weight components, so that the melt viscosity at 90°C and the average linear expansion coefficient become low values. As a result, these values fall within the numerical range described later. easy.

Here, the polyvinyl acetal resin can be obtained by acetalizing polyvinyl alcohol with an aldehyde, wherein the polyvinyl alcohol is obtained by saponifying polyvinyl acetate. Examples of the aldehyde used in the acetalization include n-butyraldehyde, n-hexanal, n-valeraldehyde, and the like. As the polyvinyl acetal resin, it is also preferable to use a polyvinyl butyral resin obtained by acetalization with n-butyraldehyde.

As the polyester resin, for example, a polycondensation of a dicarboxylic acid component and a diol component such as polyethylene terephthalate resin, polybutylene terephthalate resin, and poly(ethylene oxalate resin). Ester resins; modified polyester resins such as urethane modified polyester resins obtained by reacting polyisocyanate compounds with these reactions; polyester resins obtained by grafting acrylic resins and/or vinyl resins, etc. And it can be used individually by 1 type or in combination of 2 or more types.

In addition, the material constituting the adhesive layer 13 contains polyvinyl acetal When resin or polyester resin is used as the above-mentioned high molecular weight component, it is particularly preferable to further contain a phenoxy resin. When the phenoxy resin is further contained, the 90°C melt viscosity and average linear expansion coefficient of the material constituting the adhesive layer 13 are more likely to satisfy the numerical range described later.

The phenoxy resin is not particularly limited. For example, bisphenol A type, bisphenol F type, bisphenol A/bisphenol F copolymer type, biphenol type, biphenyl type, etc. can be exemplified.

The lower limit of the softening point of the high molecular weight component is preferably 50°C or higher, more preferably 100°C or higher, and particularly preferably 120°C or higher. In addition, the upper limit of the softening point of the high molecular weight component is preferably 200°C or lower, more preferably 180°C or lower, and particularly preferably 150°C or lower. By containing a high molecular weight component having a softening point equal to or greater than the above lower limit, the average linear expansion coefficient of the material constituting the adhesive layer 13 can be reduced, and the numerical range described later can be easily satisfied. In addition, when the softening point is equal to or lower than the above upper limit value, embrittlement of the adhesive layer 13 can be suppressed. In addition, the softening point is a value measured based on ASTM D1525.

The lower limit of the glass transition temperature of the high molecular weight component is preferably 50°C or higher, more preferably 60°C or higher, and particularly preferably 80°C or higher. In addition, the upper limit of the glass transition temperature of the high molecular weight component is preferably 250°C or less, more preferably 200°C or less, and particularly preferably 180°C or less. By containing the high molecular weight component whose glass transition temperature is more than the said lower limit, the average linear expansion coefficient of the material which comprises the adhesive layer 13 can be reduced, and it becomes easy to satisfy the numerical range mentioned later. In addition, when the glass transition temperature is equal to or lower than the above upper limit, the compatibility with other materials becomes excellent. In addition, the glass transition temperature of the high molecular weight component is a value measured using a differential scanning calorimeter.

The weight average molecular weight of the high molecular weight component is preferably 10,000 or more, more preferably 30,000 or more, and particularly preferably 50,000 or more. In addition, the upper limit is preferably 1 million or less, more preferably 700,000 or less, and particularly preferably 500,000 or less. When the weight average molecular weight is more than the above lower limit, it is preferable to reduce the melt viscosity while maintaining the film formability. In addition, when the weight average molecular weight is less than the above upper limit, the compatibility with low-molecular-weight components such as thermosetting components is improved, which is preferable. In addition, the weight average molecular weight in this specification is a value in terms of standard polystyrene measured by a gel permeation chromatography (GPC) method.

The content of the high molecular weight components in the material constituting the adhesive layer 13 is based on the total amount of the materials constituting the adhesive layer 13, and the lower limit is preferably 3% by mass or more, and 5% by mass or more. More preferably, 7% by mass or more is particularly preferred. In addition, the upper limit of the content of the high molecular weight component is preferably 95% by mass or less, more preferably 90% by mass or less, and particularly preferably 80% by mass or less. When the content of the high-molecular-weight component is greater than or equal to the lower limit, the 90°C melt viscosity of the material constituting the adhesive layer 13 can be made a lower value, and the aforementioned numerical range can be easily satisfied. On the other hand, when the content of the high-molecular-weight component is below the upper limit, the average linear expansion coefficient of the material constituting the adhesive layer 13 can be further reduced, and the numerical range described later can be easily satisfied.

(1-5) Ingredients with flux function

In this embodiment, when the through electrodes or bumps of a semiconductor chip are joined by solder, the material constituting the adhesive layer 13 contains a component having a flux function (hereinafter referred to as a "flux component") as good. The flux component has the function of removing the metal oxide film formed on the surface of the electrode, and can The electrical connection between the electrodes by the solder becomes more reliable, and the reliability of the connection at the soldering part can be improved.

The flux component is not particularly limited, but a component having a phenolic hydroxyl group and/or a carboxyl group is preferred, and a component having a carboxyl group is particularly preferred. The component having a carboxyl group has the function of a flux, and when the epoxy resin described later is used as a thermosetting component, it also has a role as a hardening agent. Therefore, the component having the carboxyl group is consumed as a hardening agent after the soldering is completed, so that defects caused by excess flux components can be suppressed.

As specific flux components, for example, glutaric acid, 2-methylglutaric acid, o-anisic acid, diphenolic acid, adipic acid, acetosic acid, benzoic acid, diphenyl glycolic acid, Azelaic acid, benzyl benzoic acid, malonic acid, 2,2-bis(hydroxymethyl)propionic acid, benzoic acid, o-methoxybenzoic acid, m-hydroxybenzoic acid, succinic acid, 2,6- Dimethoxymethyl p-cresol, hydrazine benzoate, carbohydrazide, dihydrazide malonate, dihydrazine succinate, dihydrazine glutarate, hydrazine glutarate, iminodiacetic acid Dihydrazine, dihydrazide itaconic acid, trihydrazine citrate, thiocarbohydrazide, Benzophenone hydrazone, 4,4'-oxydiphenylsulfonamide, diadipate These systems, such as hydrazine and rosin derivatives, can be used individually by 1 type or in combination of 2 or more types.

Examples of rosin derivatives include gum rosin, tall rosin, wood rosin, polymerized rosin, hydrogenated rosin, formate rosin, rosin ester, rosin-modified maleic acid resin, Rosin modified phenol resin, rosin modified alkyd resin, etc.

Among these, it is particularly preferable to use at least one selected from 2-methylglutaric acid, adipic acid, and rosin derivatives. 2-Methylglutaric acid and adipic acid, series Since the material constituting the adhesive layer 13 has a small molecular weight but has two carboxyl groups in the molecule, it has an excellent flux function even if it is added in a small amount, and is particularly suitable for this embodiment. The rosin derivative system has a high softening point and can impart flux properties while maintaining a low linear expansion coefficient, so it can be particularly suitable for this embodiment.

At least one of the melting point and softening point of the flux component is preferably 80°C or higher, preferably 110°C or higher, and more preferably 130°C or higher. When at least one of the melting point and the softening point of the flux component is in the above range, it is possible to obtain a more excellent flux function, and it is also possible to reduce outgassing, etc., which is preferable. In addition, the melting point and the upper limit of the softening point of the flux component are not particularly limited, and for example, the melting point of the solder may be below the melting point.

In this embodiment, the content of the flux component of the material constituting the adhesive layer 13 is based on the total amount of the material constituting the adhesive layer 13, and the lower limit is preferably 0.1% by mass or more, and 0.2 The mass% or more is more preferable, and 0.3 mass% or more is particularly preferable. In addition, the upper limit of the content of the flux component is preferably 20% by mass or less, more preferably 15% by mass or less, and particularly preferably 10% by mass or less. When the content of the flux component of the material constituting the adhesive layer 13 is more than the above lower limit, the electrical connection between the electrodes by the solder can be made more reliable, and the reliability of the connection at the soldered portion can be further improved. Sex. On the other hand, when the content of the flux component is below the above upper limit, it is possible to prevent defects such as ion migration caused by the excess flux component.

(1-6) Other ingredients

The adhesive layer 13 may further contain plasticizers, stabilizers, adhesion-imparting agents, colorants, coupling agents, antistatic agents, antioxidants, conductive particles, and Inorganic fillers other than the above-mentioned thermally conductive filler are used as the material constituting the adhesive layer 13.

For example, when the material constituting the adhesive layer 13 contains conductive particles and can impart anisotropic conductivity to the plates 1 and 2 for manufacturing the three-dimensional volume layer circuit, it can be used in the state of auxiliary welding or in the In a different aspect from soldering, the semiconductor wafers can be electrically connected to each other.

(2) Physical properties (2-1) Thermal conductivity

In the three-dimensional volume-layer circuit manufacturing plates 1 and 2 of this embodiment, the thermal conductivity of the adhesive layer 13 after hardening is 0.5W/m. K or higher is better, especially 0.7W/m. K or higher is better, and further 1.0W/m. K or higher is better. In addition, the thermal conductivity is 8.0W/m. K or less is better, especially 4.0W/m. K or less is better, and further 3.0W/m. K or less is better. With the thermal conductivity of 0.5W/m. Above K, the adhesive layer 13 tends to exhibit good heat dissipation. The use of the three-dimensional bulk layer circuit manufacturing plates 1 and 2 of this embodiment can effectively produce a highly reliable multilayer circuit. On the other hand, with the thermal conductivity of 8.0W/m. Below K, the content of the thermally conductive filler in the adhesive layer 13 does not increase excessively. As a result, it is easy to have good heat dissipation properties in the adhesive layer 13, adhesiveness with the adhesive layer 13, and sheet processability. In addition, the method of measuring the thermal conductivity of the adhesive layer 13 is as shown in the test example described later.

(2-2) Melt viscosity

In the three-dimensional volume layer circuit manufacturing plates 1 and 2 of this embodiment, the 90°C melt viscosity of the material constituting the adhesive layer 13 before hardening (hereinafter referred to as "90°C melt viscosity") , The upper limit is 5.0×10 ⁵ Pa. s or less is better, especially 1.0×10 ⁵ Pa. s or less is better, and further 5.0×10 ⁴ Pa. s or less is better. When the melt viscosity at 90°C is below the above upper limit, when the adhesive layer 13 is interposed between the electrodes, it can well follow the unevenness caused by the penetrating electrodes or bumps on the surface of the semiconductor wafer, thereby preventing A void is generated at the interface with the adhesive layer 13. In addition, the lower limit of the melt viscosity at 90°C is 1.0×10 ⁰ Pa. s or more is better, especially 1.0×10 ¹ Pa. s or more is better, and further 1.0×10 ² Pa. s or more is better. When the 90°C melt viscosity is more than the above lower limit, the material constituting the adhesive layer 13 does not flow excessively, and it is possible to prevent device contamination when the adhesive layer 13 is attached or semiconductor wafers are laminated. Therefore, the plates 1 and 2 for manufacturing the three-dimensional volume layer circuit of the present embodiment have high reliability because the 90°C melt viscosity of the material is within the above-mentioned range.

Here, the 90°C melt viscosity of the material constituting the adhesive layer 13 can be measured using a flow tester. Specifically, the adhesive layer 13 with a thickness of 15 mm can be measured using a flow tester (manufactured by Shimadzu Corporation, CFT-100D) under the conditions of a load of 50 kgf, a temperature range of 50 to 120°C, and a temperature increase rate of 10°C/min. Melt viscosity.

(2-3) Average linear expansion coefficient

In this embodiment, the material constituting the adhesive layer 13 has an average linear expansion coefficient of the cured product at 0 to 130°C (hereinafter referred to as "average linear expansion coefficient"). The upper limit is 45 ppm or less. Preferably, it is particularly preferably 35 ppm or less, and further preferably 25 ppm or less. When the average linear expansion coefficient is less than the above upper limit, the difference between the linear expansion coefficient of the adhesive layer 13 and the semiconductor wafer made of the cured product becomes smaller. Based on this difference, the gap between the adhesive layer 13 and the semiconductor wafer can be reduced. Possible stress. Thereby, the plates 1 and 2 for manufacturing the three-dimensional volume layer circuit of this embodiment can be connected to each other of semiconductor wafers. The connection reliability becomes higher, especially the temperature cycle test shown in the embodiment, it becomes the one showing higher connection reliability.

On the other hand, the lower limit of the average linear expansion coefficient is not particularly limited, but from the viewpoint of film formability, it is preferably 5 ppm or more, and more preferably 10 ppm or more.

Here, the average linear expansion coefficient of the material constituting the adhesive layer 13 can be measured using a thermomechanical analyzer. Specifically, for the cured product obtained by forming the adhesive layer 13 with a thickness of 45 μm on the substrate and curing the adhesive layer 13 at 160° C. for 1 hour, a thermomechanical analysis device (Bruker AXS Co., Ltd.) was used. Manufacture, TMA4030SA), the coefficient of linear expansion was measured under the conditions of a load of 2g, a temperature range of 0 to 300°C, and a heating rate of 5°C/min. From the measurement results, the average linear expansion coefficient at 0 to 130°C can be calculated.

(2-4) Glass transition temperature

In this embodiment, the lower limit of the glass transition temperature (Tg) of the cured product of the material constituting the adhesive layer 13 is preferably 150°C or higher, more preferably 200°C or higher, and 240°C or higher. good. When the glass transition temperature of the cured product is higher than the above lower limit, it is preferable that the cured product is not deformed during the temperature cycle test and stress is not easily generated. On the other hand, the upper limit of the glass transition temperature of the cured product is not particularly limited. From the viewpoint of suppressing embrittlement of the cured product, it is preferably 350°C or less, and more preferably 300°C or less.

Here, the glass transition temperature of the hardened material of the material constituting the adhesive layer 13 is a dynamic viscoelasticity measuring machine (manufactured by TA Instruments, DMA Q800) at a frequency of 11 Hz, an amplitude of 10 μm, and a heating rate of 3° C./min. Measure the viscoelasticity when the temperature is raised from 0°C to 300°C in accordance with the stretching mode The temperature at the maximum point of tanδ (loss modulus of elasticity/storage modulus of elasticity) during performance.

(2-5) 5% mass reduction temperature

In the three-dimensional volume layer circuit manufacturing plates 1 and 2 of this embodiment, the cured product of the material constituting the adhesive layer 13 has a 5% mass reduction temperature measured by thermogravimetry, which is preferably 350°C or higher. Particularly, 360°C or higher is preferred. When the 5% mass reduction temperature is 350° C. or higher, the cured product of the adhesive layer 13 has excellent resistance to high temperatures. Therefore, even when the cured product is exposed to a high temperature in the manufacture of a multilayer circuit, it is possible to suppress the generation of volatile components and the like accompanying the decomposition of the components contained in the cured product, and to maintain the performance of the multilayer circuit well. In addition, the upper limit of the 5% mass reduction temperature is not particularly limited, but the 5% mass reduction temperature is generally preferably 500°C or less.

Here, the 5% mass reduction temperature is capable of using differential heating. The thermogravimetry is measured by a simultaneous measuring device. Specifically, the cured product can be obtained by curing the adhesive layer 13 by treating the obtained sample at 160°C for 1 hour after forming the adhesive layer 13 with a thickness of 45 μm on the substrate, according to JIS K7120 : 1987 and using differential heating. Simultaneous thermogravimetry measuring device (manufactured by Shimadzu Corporation, DTG-60), using nitrogen as the inflow gas, and heating from 40°C to 550°C at a gas inflow rate of 100ml/min and a heating rate of 20°C/min Thermogravimetric determination. Based on the obtained thermogravimetric curve, find the temperature at which the mass is reduced by 5% (the temperature at which the mass is reduced by 5%) relative to the mass at a temperature of 100°C.

(2-6) Storage elastic modulus

The storage elastic modulus at 23°C of the three-dimensional volume layer circuit manufacturing plates 1 and 2 of the present embodiment after the adhesive layer 13 is cured is preferably 1.0×10 ² MPa or more, especially 1.0 ×10 ³ MPa or more is better. In addition, the storage elastic modulus is preferably 1.0×10 ⁵ MPa or less, especially 1.0×10 ⁴ MPa or less. When the storage elastic modulus is in the above-mentioned range, the laminated body formed by alternately laminating semiconductor wafers and individual adhesive layers 13 in the manufacture of a laminated circuit has good strength. As a result, even when the semiconductor wafer is further laminated or when the laminated body is handled, the state of the laminated body can be maintained well, and a laminated circuit having excellent quality can be manufactured.

Here, the storage elastic modulus at 23° C. after curing of the adhesive layer 13 can be measured using a dynamic viscoelasticity measuring machine. Specifically, for the cured product obtained by forming the adhesive layer 13 with a thickness of 45 μm on the substrate and curing the adhesive layer 13 at 160° C. for 1 hour, a dynamic viscoelasticity measuring machine (TA Instruments) was used. Manufactured, DMA Q800), and measured the viscoelasticity obtained in the stretching mode when the temperature was raised from 0°C to 300°C at a frequency of 11 Hz, an amplitude of 10 μm, and a heating rate of 3°C/min. From this measurement result, the storage elastic modulus (MPa) at 23°C after the adhesive layer is cured can be read.

(2-7) Heat starting temperature and heat peak temperature by differential scanning calorimetry

In the three-dimensional volume layer circuit manufacturing plates 1 and 2 of this embodiment, the adhesive layer 13 before curing is measured by the differential scanning calorimetry (DSC) method at a temperature increase rate of 10°C/min. The heating onset temperature (TS) is preferably in the range of 70°C to 150°C, particularly preferably in the range of 100°C to 150°C, and further preferably in the range of 120°C to 150°C. Since the heating start temperature (TS) is in the above range, for example, it is possible to prevent the adhesive layer 13 from being hardened at an unintentional stage when receiving the heat generated when a dicing blade is used to cut a semiconductor wafer. The storage stability of the plates 1 and 2 for manufacturing is also excellent. Especially in order to manufacture a build-up circuit, when a plurality of semiconductor wafers are laminated and then a plurality of adhesive layers 13 existing between the semiconductor wafers are collectively hardened, it is possible to prevent unintentional failure before the semiconductor wafer build-up is completed. The stage causes the adhesive layer 13 to harden.

In the three-dimensional volume layer circuit manufacturing plates 1 and 2 of this embodiment, the adhesive layer 13 before curing is measured by the differential scanning calorimetry (DSC) method at a temperature increase rate of 10°C/min. The heating peak temperature (TP) is preferably the heating start temperature (TS) +5~60℃, especially TS+5~50℃, and further preferably TS+10~40℃. When the exothermic peak temperature (TP) is in the above range, when the adhesive layer 13 is cured, the time from the start of curing to the completion of curing becomes a relatively short time. Generally, when a multilayer circuit is manufactured using NCF adhesive, it takes time to harden the adhesive. Therefore, the tact time (tact time) in the manufacture of the multilayer circuit is mostly regulated in accordance with the curing time of the adhesive. Therefore, as described above, since the time until the adhesive layer 13 is cured is short, the production operation time can be effectively shortened. Particularly when manufacturing a multilayer circuit, in order to increase the efficiency of the process, there are cases in which a plurality of semiconductor wafers are laminated (temporarily placed), and finally the plurality of adhesive layers 13 existing between the semiconductor wafers are hardened. Even in this case, since the heat peak temperature (TP) falls within the above range, it is possible to prevent the presence of an adhesive layer between the semiconductor wafers layered at the beginning of the process at an unintentional stage before the semiconductor wafer layering is completed. 13 produces hardening.

Here, the heating start temperature and the heating peak temperature can be measured using a differential scanning calorimeter. Specifically, the thickness is 15mm A differential scanning calorimeter (manufactured by TA Instruments, Q2000) was used for the adhesive layer 13 to be heated from room temperature to 300°C at a temperature increase rate of 10°C/min. The temperature at which heat generation starts (heat generation start temperature) (TS) and the heat peak temperature (TP) can be obtained from the DSC curve thus obtained.

(2-8) The thickness of the adhesive layer, etc.

The thickness (T2) of the adhesive layer 13 in the plates 1 and 2 for manufacturing the three-dimensional volume layer circuit of this embodiment is preferably 2 μm or more, particularly preferably 5 μm or more, and more preferably 10 μm or more. In addition, the thickness (T2) is preferably 500 μm or less, particularly 300 μm or less, and more preferably 100 μm or less. When the thickness (T2) of the adhesive layer 13 is 2 μm or more, the through electrodes or bumps existing on the semiconductor wafer can be well buried in the adhesive layer 13. In addition, since the thickness (T2) of the adhesive layer 13 is 500 μm or less, when a semiconductor wafer with a through electrode is passed through the adhesive layer 13 and then adhered, the adhesive layer 13 does not excessively ooze out on the side surface, and can be manufactured reliably. High-performance semiconductor devices. In addition, the thickness (T2) of the adhesive layer 13 is set as an average value when a total of 100 points are measured at an interval of 50 mm in the plate 1 for production.

The standard deviation of the thickness (T2) of the adhesive layer 13 in the plates 1 and 2 for manufacturing the three-dimensional volume layer circuit of this embodiment is 2.0 μm or less, preferably 1.8 μm or less, especially 1.6 μm or less good. When the standard deviation is greater than 2.0 μm, when the through electrodes or bumps of the semiconductor wafer are buried in the adhesive layer 13 using the manufacturing plates 1 and 2, voids are likely to occur, and the adhesive layer that constitutes the multilayer circuit It becomes difficult to make the thickness of 13 and the thickness of the multilayer circuit itself uniform, and as a result, the heat dissipation of the multilayer circuit becomes insufficient. Especially because the multilayer circuit is obtained by laminating a semiconductor wafer and an adhesive layer 13 in multiple layers However, when the standard deviation of the thickness (T2) of the adhesive layer 13 is greater than 2.0 μm, the resulting thickness uniformity of the multilayer circuit is impaired, and the multilayer circuit cannot achieve good heat dissipation. In addition, the method of measuring the standard deviation of the thickness (T2) of the adhesive layer 13 is as shown in the test example described later.

In the plate 2 for manufacturing a three-dimensional volume-layer circuit of the second embodiment provided with a substrate 11, the ratio (T2/T1) of the thickness (T2) of the adhesive layer 13 to the thickness (T1) of the substrate 11 is It is preferably 0.01 or more, especially 0.1 or more, and more preferably 0.4 or more. In addition, the ratio (T2/T1) is preferably 1.5 or less, particularly preferably 1.0 or less, and further preferably 0.9 or less. When the ratio (T2/T1) is in the above-mentioned range, the thickness balance of the base material 11 and the adhesive layer 13 is good, the workability when attaching the manufacturing sheet 2 to the semiconductor wafer is excellent, and the adjustment is made at the same time. The sticking suitability at the time of sticking becomes easy. As a result, this attachment can be performed well, and a multilayer circuit with excellent quality can be manufactured. In particular, when the ratio (T2/T1) is 0.01 or more, the relative thickness of the substrate 11 in the manufacturing sheet 1 becomes smaller, and the relative rigidity of the manufacturing sheet 1 can be suppressed to be low. As a result, when attaching the manufacturing sheet 1 to the semiconductor wafer, it becomes easy to well embed the through electrodes or bumps existing on the semiconductor wafer in the adhesive layer 13 system. On the other hand, when the ratio (T2/T1) is 1.5 or less, the relative thickness of the substrate 11 in the manufacturing sheet 1 becomes larger, and the relative rigidity of the manufacturing sheet 1 can be maintained high . As a result, the workability of the manufacturing sheet 1 is excellent, and it is easy to attach the manufacturing sheet 1 to the semiconductor wafer. In addition, the thickness (T1) of the base material 11 is set as the average value when the sheet 1 for production measures 100 points in total at intervals of 50 mm.

2. Adhesive layer

(1) Material

In the three-dimensional volume layer circuit manufacturing board 2 of the second embodiment provided with the adhesive layer 12, the adhesive layer 12 may be composed of a non-curable adhesive, or may be composed of a curable adhesive. As described later, when the sheet 2 for manufacturing a three-dimensional bulk layer circuit of the present embodiment is used in a method of manufacturing a multilayer circuit, the adhesive layer 13 is peeled from the laminate of the base material 11 and the adhesive layer 12. Therefore, from the viewpoint of easy peeling, the adhesive layer 12 is preferably made of a curable adhesive and has an adhesive force that is reduced by curing.

When the adhesive layer 12 is made of a curable adhesive, the adhesive may be an energy ray curable adhesive or a thermosetting adhesive. Here, in order to harden the adhesive layer 12 and the adhesive layer 13 at different stages, when the adhesive layer 13 has thermosetting properties, the adhesive layer 12 is preferably composed of an energy-ray curable adhesive. When the agent layer 13 has energy ray curability, the adhesive layer 12 is preferably composed of a thermosetting adhesive. However, since the adhesive layer 13 is preferably thermally curable for the aforementioned reasons, the adhesive layer 12 is preferably composed of an energy-ray curable adhesive.

As the above-mentioned non-curing adhesive, it is better to have the required adhesive force and releasability. For example, acrylic adhesives, rubber adhesives, silicone adhesives, and urethane adhesives can be used. Adhesives, polyester adhesives, polyvinyl ether adhesives, etc. Among these, from the viewpoint of effectively suppressing peeling at the interface between the adhesive layer 12 and the adhesive layer 13 in the cutting step at an unintentional stage, an acrylic adhesive is preferred.

As the above-mentioned energy-ray-curable adhesive, it may be a polymer having energy-ray-curable properties as the main component, or it may be a A mixture of a compound (a polymer that does not have energy ray curable properties) and at least one or more monomers and/or oligomers having energy ray curable groups as the main component. In addition, it may be a mixture of a polymer having energy ray curability and a non-energy ray curable polymer, or it may be a polymer having energy ray curability and at least one monomer having energy ray curable groups. And/or a mixture of oligomers may also be a mixture of these three types.

The above-mentioned energy-ray-curable polymer is preferably a (meth)acrylate (co)polymer in which a functional group having energy-ray-curable properties (energy-ray-curable group) is introduced into the side chain. The polymer is preferably obtained by reacting an acrylic copolymer having a functional group-containing monomer unit and an unsaturated group-containing compound having a functional group bonded to the functional group.

As the above-mentioned at least one or more monomers and/or oligomers having energy-ray curable groups, for example, esters of polyols and (meth)acrylic acid can be used.

As the non-energy-ray curable polymer component, for example, an acrylic copolymer having the aforementioned functional group-containing polymer unit can be used.

(2) Physical properties, etc.

In the three-dimensional volume layer circuit manufacturing board 2 of this embodiment, the storage elastic modulus of the adhesive layer 12 at 23°C is preferably 1×10 ³ Pa or more, and 1×10 ⁴ Pa or more is the characteristic good. In addition, the storage elastic modulus is preferably 1×10 ⁹ Pa or less, and particularly preferably 1×10 ⁸ Pa or less. When the adhesive layer 12 is made of a curable adhesive, the storage elastic modulus is the storage elastic modulus before curing. Since the storage elastic modulus of the adhesive layer 12 at 23°C is in the above range, when the manufacturing sheet 2 is attached to the semiconductor wafer, the through electrodes or bumps existing on the semiconductor wafer can be buried well To the adhesive layer 13. In addition, when using the manufacturing sheets 1 and 2 to back-grind the surface of the semiconductor wafer on which bumps are not formed, it is possible to suppress warpage or dimples in the semiconductor wafer. In addition, the storage elastic modulus of the adhesive layer 12 at 23°C can be used, for example, a dynamic viscoelasticity measuring device (manufactured by TA Instruments, ARES) at a frequency of 1 Hz, a measurement temperature range of -50 to 150°C, and a heating rate Measure under the condition of 3℃/min.

The thickness of the adhesive layer 12 is not particularly limited. For example, it is preferably 1 μm or more, and particularly preferably 10 μm or more. In addition, the thickness is, for example, preferably 100 μm or less, and particularly preferably 50 μm or less. When the thickness of the adhesive layer 12 is 1 μm or more, the adhesive layer 12 can exhibit good adhesive force. In addition, when the thickness is 100 μm or less, it is possible to prevent the adhesive layer 12 from becoming an unnecessary thickness, and it is possible to reduce the cost.

3. Substrate

(1) Material

In the sheet 2 for manufacturing the three-dimensional volume-layer circuit of the second embodiment provided with the base material 11, the material constituting the base material 11 is not particularly limited. However, when the manufacturing sheet 2 is set as a dicing sheet-integrated adhesive sheet (dicing and wafer bonding sheet), the material constituting the substrate 11 is a material that is generally used for the substrate constituting the dicing sheet Better. For example, as the material of such substrate 11, polyethylene, polypropylene, polybutene, polybutadiene, polymethylpentene, polyvinyl chloride, vinyl chloride copolymer, polyethylene terephthalate can be mentioned. Ester, polybutylene terephthalate, polyurethane, ethylene vinyl acetate copolymer, ionic polymer, ethylene. (Meth) acrylic acid copolymer, ethylene. (Meth)acrylate copolymer, polystyrene, vinyl polyisoprene, polycarbonate, polyolefin, etc. Among them, 1 can be used One or a mixture of two or more.

In addition, when the manufacturing sheet 2 is a back-grinding sheet-integrated adhesive sheet, the material constituting the substrate 11 is preferably a material that is generally used for the substrate constituting the back-grinding sheet. For example, as the material of such a base material 11, polyethylene terephthalate, polyethylene, polypropylene, and ethylene can be cited. Among resins such as vinyl acetate copolymers, one type or a mixture of two or more types can be used.

The surface of the substrate 11 on the side of the adhesive layer 12 may also be subjected to surface treatments such as primer treatment, corona treatment, plasma treatment, etc., to improve the adhesion to the adhesive layer 12.

(2) Physical properties, etc.

In the three-dimensional volume layer circuit manufacturing plate 2 of this embodiment, the tensile modulus of elasticity of the substrate 11 at 23°C is preferably 100 MPa or more, especially 200 MPa or more, and further 300 MPa or more. good. In addition, the tensile modulus of elasticity is preferably 5000 MPa or less, particularly preferably 1000 MPa or less, and further preferably 400 MPa or less. Since the tensile modulus of the base material 11 at 23°C is within the above range, when the manufacturing sheet 2 is attached to the semiconductor wafer, the through electrodes or bumps existing on the semiconductor wafer can be buried well To the adhesive layer 13. In addition, when the manufacturing sheet 2 is used as a dicing sheet-integrated adhesive sheet, since the tensile modulus of the base material 11 at 23°C is within the above range, the manufacturing sheet 2 is expanded to expand the semiconductor When the wafers are spaced apart, it is preferable because the substrate 11 is not easily broken. In addition, the tensile modulus of the base material 11 at 23°C can be measured using a tensile tester in accordance with JISK 7127:1999.

The thickness (T1) of the substrate 11 is not particularly limited. For example, it is preferably 10 μm or more, and particularly preferably 15 μm or more. In addition, the thickness (T1) is, for example, preferably 500 μm or less, and particularly preferably 100 μm or less. Since the thickness (T1) of the substrate 11 is in the above range, the ratio (T2/T1) of the thickness (T2) of the aforementioned adhesive layer 13 to the thickness (T1) of the substrate 11 can be easily set to In the aforementioned range, it has excellent workability when attaching the manufacturing plates 1 and 2 to the semiconductor wafer. As a result, it is possible to efficiently manufacture a multilayer circuit with excellent quality.

4. Peel off the plate

The configuration of the release sheet 14 is arbitrary, and examples include polyester films such as polyethylene terephthalate, polybutylene terephthalate, and polyethylene naphthalate, polypropylene, and polyethylene. Plastic films such as polyolefin films, etc. The peeling surface (the surface in contact with the adhesive layer 13) is preferably subjected to peeling treatment. Examples of the release agent used in the release treatment include silicone-based, fluorine-based, and long-chain alkyl-based release agents.

The thickness of the release sheet is not particularly limited, but it is usually 20 μm or more and 250 μm or less.

5. Manufacturing method of plate for manufacturing three-dimensional volume layer circuit

The plate 1 for manufacturing a three-dimensional volume-layer circuit of the first embodiment can be manufactured in the same manner as the conventional plate for manufacturing a three-dimensional volume-layer circuit. For example, when manufacturing the sheet 1 for manufacturing a three-dimensional volume layer circuit with a peeling sheet 14, it can be prepared by containing the aforementioned thermally conductive filler, other materials constituting the adhesive layer 13, and further containing a solvent or The coating liquid of the dispersion medium is applied to the peeling surface of the release sheet 14 using a die coater, curtain coater, spray coater, slit coater, knife coater, etc. A coating film is formed on the top, and the coating film is dried to manufacture the sheet 2 for manufacturing. Coating liquid system as long as It can be coated, and its properties are not particularly limited. The components used to form the adhesive layer 13 may be contained in a solute form, or may be contained in a disperse form. The peeling plate 14 can also be peeled off as a process material, and can also protect the adhesive layer 13 during the period until it is attached to the semiconductor wafer.

In addition, as a method for manufacturing a laminate in which two release sheets 14 are laminated on both sides of the plate 1 for manufacturing a three-dimensional volume layer circuit, the coating liquid can be applied to one of the aforementioned release sheets 14 The coating film is formed on the peeling surface, and it is dried to form a laminate composed of the adhesive layer 13 and the peeling sheet 14. The laminate is attached to the adhesive layer 13 on the opposite side of the peeling sheet 14 It is attached to the peeling surface of another peeling sheet 14 to obtain a laminate composed of peeling sheet 14/adhesive layer 13/peeling sheet 14. The release sheet 14 in the laminate can also be peeled off as a process material, and it can also protect the adhesive layer 13 until it is attached to the semiconductor wafer.

The plate 2 for manufacturing a three-dimensional volume layer circuit of the second embodiment can be manufactured in the same manner as the conventional plate 2 for manufacturing a three-dimensional volume layer circuit. For example, a laminate of the adhesive layer 13 and the release sheet 14 and a laminate of the adhesive layer 12 and the base material 11 can be produced separately, and the adhesive layer 13 can be laminated with the adhesive layer 12 in contact with each other. The body is bonded together to obtain the plate 2 for manufacturing.

The laminate of the adhesive layer 13 and the release sheet 14 can be prepared by preparing the aforementioned coating liquid for forming the adhesive layer 13 and applying the aforementioned coating method on the release surface of the release sheet 14 It is obtained by forming a coating film and drying the coating film.

As said solvent, organic solvents of toluene, ethyl acetate, methyl ethyl ketone, etc. are mentioned. By blending these organic solvents into a solution with an appropriate solid content concentration, the deviation of the thickness (T2) of the adhesive layer 13 can be further suppressed, and the thickness (T2) can effectively form an adhesive with the aforementioned standard deviation剂层13。 Agent layer 13. From the standpoint of uniformly applying the coating liquid, in particular, the solid content concentration of the coating liquid is preferably 5% by mass or more, and particularly preferably 10% by mass or more. In addition, from the same viewpoint, the solid content concentration is preferably 55% by mass or less, and more preferably 50% by mass or less. When the solid content concentration is 5% by mass or more, the occurrence of shrinkage and the like can be suppressed when the coating film is formed, the solvent can be easily dried sufficiently, and variations in the thickness or physical properties of the adhesive layer 13 can be more easily suppressed. As a result, it becomes easy to adjust the standard deviation of the thickness (T2) of the adhesive layer 13 within the aforementioned range. In addition, when the solid content concentration is 55% by mass or less, the filler in the coating liquid can be prevented from agglomerating, the coating liquid can be easily fed, and the continuous generation of coating in the direction perpendicular to the coating direction can be suppressed. Distribution unevenness (lateral wave-like unevenness), and the occurrence of thickness variation of the adhesive layer 13 can be suppressed. The viscosity of the above-mentioned coating liquid at 25°C measured with a B-type viscometer is 20mPa. s or more is better, especially 25mPa. s or more is better. Also, the viscosity is 500mPa. s or less is better, especially 100mPa. s or less is better.

The laminate of the adhesive layer 12 and the base material 11 can be applied to the coating solution according to the aforementioned coating method by preparing a coating solution containing the material constituting the adhesive layer 12, and further containing a solvent or dispersion medium as required A coating film is formed on one surface of the substrate 11, and the coating film is dried to obtain it. In addition, as another method of manufacturing a laminate of the adhesive layer 12 and the base material 11, the adhesive layer 12 is formed on the peeling surface of the process release sheet, and then the adhesive layer 12 is transferred It is printed on one side of the substrate 11, and the release sheet for the process is peeled from the adhesive layer 12 to obtain a laminate of the adhesive layer 12 and the substrate 11.

[Manufacturing Method of Three-Dimensional Volume Layer Circuit]

Using the plates 1 and 2 for manufacturing a three-dimensional volume-layer circuit of this embodiment, a three-dimensional volume-layer circuit can be manufactured. Hereinafter, an example of the manufacturing method will be described.

First, the plates 1 and 2 for manufacturing the three-dimensional volume layer circuit of this embodiment are attached to one side of a semiconductor wafer having through electrodes. Specifically, the surface of the adhesive layer 13 side of the three-dimensional volume layer circuit manufacturing sheets 1 and 2 is attached to one surface of the semiconductor wafer.

In addition, semiconductor wafers with penetrating electrodes have weak strength. Therefore, it is also possible to reinforce the semiconductor wafer by fixing it to a support such as supporting glass through a temporary fixing material. At this time, after bonding the surface on the semiconductor wafer side of the laminate to the plates 1 and 2 for manufacturing the three-dimensional volume layer circuit, the support and the temporary fixing material are simultaneously peeled off.

When the plate 1 for manufacturing a three-dimensional build-up volume layer circuit of the first embodiment is used, the cut plate is further laminated. At this time, a dicing sheet may be attached to the semiconductor wafer first, and then the manufacturing sheet 1 may be attached to the surface of the semiconductor wafer on the opposite side to the dicing sheet. In addition, it is also possible to first attach the manufacturing sheet 1 to the semiconductor wafer, and then attach the dicing sheet to the surface of the semiconductor wafer on the opposite side to the manufacturing sheet 1. Alternatively, the dicing sheet may be attached to the surface on the side of the manufacturing sheet 1 of the laminate obtained by attaching the manufacturing sheet 1 to the semiconductor wafer. On the other hand, when using the plate 2 for manufacturing a three-dimensional build-up volume layer circuit of the second embodiment, it is not necessary to further laminate the cut plates, and the following cutting steps can be performed on the plate 2 for manufacturing.

Next, the semiconductor wafer is cut into individual wafers (dicing step). At this time, the adhesive layer 13 is also cut at the same time as the semiconductor wafer is cut. The method of cutting the wafer is not particularly limited, and various conventionally known cutting methods can be used. For example, a method of cutting a semiconductor wafer using a dicing blade can be cited. In addition, other cutting methods such as laser cutting can also be used.

After the dicing step, the semiconductor wafer is picked up. At this time, the semiconductor wafer is picked up in a state where the individualized adhesive layer 13 is attached. That is, the semiconductor wafer to which the adhesive layer 13 is attached is peeled from the adhesive layer of the dicing sheet or the adhesive layer 12 of the sheet 2 for manufacturing a three-dimensional volume layer circuit. In addition, when the adhesive layer 12 is composed of an energy-ray curable adhesive, it is preferable to irradiate the adhesive layer 12 with energy rays before picking up. Thereby, since the adhesive force of the adhesive is low, the pickup of the semiconductor wafer becomes easy. In addition, if necessary, the gap between the semiconductor wafers can be enlarged by expanding the dicing plate or the plate 2 for manufacturing the three-dimensional volume layer circuit before picking up.

Next, the semiconductor wafer of the adhesive layer is placed on the circuit board. The semiconductor wafer of the adhesive layer is aligned with the electrode on the side of the semiconductor wafer and the electrode on the circuit board facing each other, and is placed on the circuit board.

Next, heat the semiconductor wafer and circuit substrate of the adhesive layer. After pressurizing, cooling is performed. Thereby, the semiconductor chip and the circuit board are bonded through the adhesive layer 13, and the electrodes of the semiconductor chip and the electrodes on the chip mounting portion of the circuit board are electrically joined through the solder bumps formed on the semiconductor chip. The welding conditions also depend on the metal composition used. For example, in the case of Sn-Ag, it is better to heat it at 200-300°C for 1-30 seconds.

After soldering, it is made between the semiconductor chip and the circuit board The adhesive layer 13 between is hardened. The curing system can be performed by, for example, heating at 100 to 200°C for 1 to 120 minutes. Moreover, this hardening step can also be carried out under pressurized conditions. In addition, in the above-mentioned welding step, when the curing of the adhesive layer 13 is completed, such a curing step may be omitted.

Next, on the semiconductor wafer adhered to the circuit substrate as described above, a semiconductor wafer of a new adhesive layer is laminated. At this time, the surface on the adhesive layer 13 side of the semiconductor wafer of the new adhesive layer is in contact with the surface of the semiconductor wafer laminated on the circuit board on the opposite side to the circuit board, and the two The through electrodes of the semiconductor wafer are laminated in a manner that they are electrically connected to each other. Subsequently, soldering is performed between the through electrodes of the newly laminated semiconductor wafer and the through electrodes of the semiconductor wafer laminated on the circuit board to harden the adhesive layer 13 between the semiconductor wafers. The welding and hardening of the adhesive layer 13 at this time can be performed using the above-mentioned method and conditions. Thereby, a laminated body in which two semiconductor wafers are laminated on a circuit board can be obtained.

Repeating the above steps of laminating the semiconductor wafer with the adhesive layer on the semiconductor wafer laminated on the circuit board, soldering, and curing the adhesive layer 13 can be obtained by the cured product of the adhesive layer 13 A multilayer circuit formed by connecting a plurality of semiconductor chips. In such a multilayer circuit, since the adhesive layer 13 contains a thermally conductive filler and the standard deviation of the thickness (T2) of the adhesive layer 13 is in the aforementioned range, the multilayer circuit has excellent heat dissipation properties. Therefore, by using the plates 1 and 2 for manufacturing the three-dimensional volume-layer circuit of this embodiment, it is possible to manufacture a multilayer circuit with high reliability.

In addition, in the manufacturing method of the multilayer circuit described above, the soldering and the hardening of the adhesive layer 13 are performed every time one semiconductor chip is stacked, but In order to increase the efficiency of the manufacturing process, after stacking a plurality of semiconductor wafers, the bonding between the semiconductor wafers and the curing of the adhesive layer 13 between the semiconductor wafers may be performed collectively.

The embodiments described above are described in order to facilitate the understanding of the present invention, and are not described in order to limit the present invention. Therefore, each element disclosed in the above embodiment includes all design changes and equivalents belonging to the technical scope of the present invention.

[Example]

Hereinafter, examples and test examples will be disclosed to explain the present invention in more detail, but the present invention is not limited by the following test examples and the like at all.

[Examples 1 to 7, Comparative Example 1]

The composition containing the structural components shown in Table 1 was diluted with methyl ethyl ketone so that the solid content concentration might become 40 mass %, and the coating liquid was obtained. The viscosity of the coating solution at 25°C was determined to be 50mPa using a B-type viscometer. s. This coating solution was applied to a release film (SP-PET381031 made by LINTEC Corporation) treated with silicone, and the resulting coating film was dried in an oven at 100°C for 1 minute to obtain a thickness of 45 μm. The first laminate composed of the adhesive layer and the release film.

Acrylic acid copolymer (weight average molecular weight: 700,000) 100 parts by mass (solid) copolymerized with 80 parts by mass of 2-ethylhexyl acrylate, 10 parts by mass of methyl acrylate and 10 parts by mass of 2-hydroxyethyl acrylate (solid Component conversion value; the same below), and 10 parts by mass of an isocyanate-based crosslinking agent (manufactured by Polyurethane Industrial Co., Ltd., CORONATE L) were mixed to prepare an adhesive composition.

The adhesive composition obtained as described above was applied to one side of an ethylene-methacrylic acid copolymer (EMAA) film (thickness: 100 μm) as a substrate to form a coating film. Subsequently, the coating film was dried at 100°C for 1 minute. Thereby, a second layered body composed of an adhesive layer having a thickness of 10 μm and a base material was obtained. The storage elastic modulus of the adhesive layer at 23°C was 4.6×10 ⁵ Pa when measured by the method described later.

Next, the surface on the adhesive layer side of the first laminate and the surface on the adhesive layer side of the second laminate were bonded together to obtain a three-dimensional volume layer circuit manufacturing board.

[Comparative Example 2]

The composition containing the constituent components shown in Table 1 was diluted with methyl ethyl ketone so that the solid content concentration became 55% by mass to obtain a coating liquid. The viscosity of the coating solution at 25°C was determined to be 150mPa using a B-type viscometer. s. Except for forming an adhesive layer using this coating liquid, it carried out similarly to Example 1, and obtained the sheet|seat for three-dimensional volume layer circuit manufacture.

Here, the details of the constituent components shown in Table 1 are as follows.

High molecular weight ingredients

. Bisphenol A (BPA)/Bisphenol F (BPF) copolymerized phenoxy resin: manufactured by Toto Kasei Co., Ltd., product name "ZX-1356-2", glass transition temperature 71°C, weight average molecular weight 60,000

Thermosetting ingredients

. Epoxy resin 1: Ginseng (hydroxyphenyl) methane type solid epoxy resin, manufactured by JAPAN EPOXY RESINS, product name "E1032H60", 5 wt% reduction temperature 350°C, solid, melting point 60°C

. Epoxy resin 2: Bis-F liquid epoxy resin, JAPAN EPOXY Made by RESINS, product name "YL-983U", epoxy equivalent 184

. Epoxy resin 3: Long-chain Bis-F modified epoxy resin, manufactured by JAPAN EPOXY RESINS, product name "YL-7175"

Hardening catalyst

. 2MZA-PW: 2,4-Diamino-6-[2'-methylimidazolyl-(1')]-ethyl-s-triazine, manufactured by Shikoku Chemical Industry Co., Ltd., product name "2MZA-PW "Flux composition with melting point 250℃

. Rosin derivative: made by Arakawa Chemical Industry, softening point 124~134℃ inorganic filler

filler

. Thermally conductive filler (spherical alumina); spherical alumina, manufactured by Denki Kogyo Co., Ltd., product name "DAM-0", average particle size 3μm, thermal conductivity 40W/m. K

. Thermally conductive filler (spherical zinc oxide): spherical zinc oxide, manufactured by Sakai Chemical Industry Co., Ltd., average particle size 0.6μm, thermal conductivity 54W/m. K

. Thermally conductive filler (boron nitride): Boron nitride, manufactured by Showa Denko Corporation, product name "UHP-2", shape: plate shape, average particle size 11.8μm, aspect ratio 11.2, thermal conductivity in the long axis direction 200W/m . K

. Fused silica filler: average particle size 3μm, thermal conductivity 2W/m. K

In addition, the storage elastic modulus of the aforementioned adhesive layer at 23°C is obtained by laminating a plurality of adhesive layers to produce a laminate of an adhesive layer with a thickness of 800 μm, and punching out the laminate of the adhesive layer The measurement sample obtained as a circle with a diameter of 10 mm was measured using a dynamic viscoelasticity measuring device (manufactured by TA Instruments, ARES) at a frequency of 1 Hz and a measurement temperature range Measure the storage elastic modulus (Pa) under the conditions of -50~150℃ and heating rate of 3℃/min.

[Test Example 1] Measurement of thermal conductivity

For each of the Examples and Comparative Examples, the composition containing the components shown in Table 1 was diluted with methyl ethyl ketone so that the solid content concentration became 40% by mass, and then coated on a silicone-treated release film On (the LINTEC company make, SP-PET381031), by drying the obtained coating film in an oven at 100 degreeC for 1 minute, the adhesive layer of thickness 40 micrometers was formed. The adhesive layer obtained in accordance with this procedure is laminated in a plurality of layers so as to have a thickness of 2 mm. A disc-shaped adhesive layer with a diameter of 5 cm was punched out from the laminate having a thickness of 2 mm, and used as a sample for measurement.

After the sample was heated at 130°C for 2 hours to be cured, the thermal conductivity (W/mK) was measured using a thermal conductivity measuring device (manufactured by EKO Corporation, HC-110). The results are shown in Table 2.

[Test Example 2] The thickness of the adhesive layer and the measurement of the standard deviation of the thickness

With respect to the first laminate produced in the Examples and Comparative Examples, the thickness (T2) of the adhesive layer was measured at 50 mm intervals in a total of 100 points. Based on the measurement result, the average value (μm) of the thickness (T2) and the standard deviation (μm) of the thickness (T2) are calculated. The results are shown in Table 2.

[Test Example 3] Evaluation of heat release by temperature cycle test

An evaluation wafer with bumps formed on one side and spacers formed on the other side was prepared. A fully automatic multi-wafer mounter (manufactured by LINTEC, RAD-2700F/12) was used. The manufactured three-dimensional volume layer circuit manufacturing board is attached to the side where bumps are formed on the evaluation wafer Surface, and fixed to the ring frame.

Next, the adhesive layer and the evaluation wafer were simultaneously cut using a fully automatic dicing saw (manufactured by DISCO, DFD651), and individualized into wafers having a size of 7.3 mm×7.3 mm in plan view.

Then, a flip chip bonding machine (manufactured by TORAY Engineering, FC3000W) was used to pick up the individualized adhesive layer and the wafer at the same time, and then the flip chip bonding was performed on the substrate. Subsequently, the wafer of the second layer of adhesive layer is flip-chip bonded to the first layer of wafer temporarily placed on the substrate. This step is repeated to manufacture a semiconductor device in which a total of 5 layers of wafers are laminated on the substrate.

The obtained semiconductor device was subjected to a temperature cycle test of 1000 cycles in an environment where -55°C, 10 minutes, and 125°C, 10 minutes were set as one cycle. For the semiconductor device before and after the test, use a digital multimeter to measure the connection resistance between the semiconductor chips to determine the connection resistance value of the semiconductor device after the test versus the connection resistance of the semiconductor device before the test The rate of change of the value. In addition, the connection reliability was evaluated in accordance with the following evaluation criteria. The results are shown in Table 2.

○: The rate of change of the connection resistance value is 20% or less.

×: The rate of change of the connection resistance value is greater than 20%.

[Test Example 4] Evaluation of Implantability

The method described in Experimental Example 3 was used to manufacture a plurality of semiconductor devices. Use a digital microscope to observe the 4 sides of 5 semiconductor devices randomly selected from these semiconductor devices to confirm whether there are cracks in the bumps and the state of the bumps embedded in the adhesive layer, and at the same time measure the layers on each surface The thickness in the product direction. Based on these results, the results obtained in the examples and comparative examples were evaluated according to the following evaluation criteria The embedding of bumps of the three-dimensional build-up volume layer circuit manufacturing plate. The results are shown in Table 2.

○: In all the five semiconductor devices, no cracks were generated in the bumps, the bumps were well embedded in the adhesive layer, and the thickness in the lamination direction was the same among the four sides.

×: Among the five semiconductor devices, cracks were generated in the bumps, the bumps were insufficiently embedded in the adhesive layer, or the thickness in the lamination direction was different among the four sides.

It can be seen from Table 2 that the adhesive layer of the plate for manufacturing the three-dimensional volume layer circuit of the embodiment has 0.5W/m. Excellent heat above K The standard deviation of the conductivity and the thickness (T2) of the adhesive layer is 2.0 μm or less. Furthermore, it can be confirmed that the build-up circuit produced using the three-dimensional build-up volume layer circuit manufacturing sheet obtained in the examples has excellent heat dissipation, good results of the temperature cycle test, and excellent embedding properties of bumps.

On the other hand, the thermal conductivity of the adhesive layer of the plate for manufacturing the three-dimensional volume layer circuit of the comparative example is 0.3W/m. With an insufficient value of K, the heat dissipation properties of the multilayer circuit produced using the manufacturing sheet are also insufficient. Moreover, the standard deviation of the thickness (T2) of the adhesive layer of the board for manufacturing the three-dimensional volume-layer circuit of Comparative Example 2 is 2.5μm, the heat dissipation of the multilayer circuit is insufficient, and the embedding of the bump is poor. .

[Industrial availability]

The plate for manufacturing a three-dimensional volumetric layer circuit of the present invention has excellent heat dissipation and can be suitably used for manufacturing a multilayer circuit with high reliability.

1‧‧‧Plates for manufacturing three-dimensional volume layer circuits

13‧‧‧Adhesive layer

14‧‧‧Peeling plate

Claims (15)

A three-dimensional build-up volume layer circuit manufacturing plate, which is interposed between a plurality of semiconductor wafers with through electrodes, in order to connect the aforementioned plurality of semiconductor wafers to each other to form a three-dimensional build-up volume layer circuit. A sheet for manufacturing a bulk layer circuit, characterized in that the sheet for manufacturing a three-dimensional volume layer circuit has at least a curable adhesive layer, the adhesive layer contains a thermally conductive filler, and the thickness of the adhesive layer The standard deviation of (T2) is 2.0 μm or less, and the material constituting the aforementioned adhesive layer contains high molecular weight components with a glass transition temperature of 50°C or higher. The sheet for manufacturing a three-dimensional volumetric layer circuit as described in the first item of the patent application, wherein the aforementioned thermally conductive filler is made of a material selected from the group consisting of metal oxide, silicon carbide, carbide, nitride, and metal hydroxide Constituted. The three-dimensional volume-layer circuit manufacturing sheet described in the first item of the scope of patent application, wherein the content of the thermally conductive filler in the adhesive layer is 35% by mass or more and 95% by mass or less. As described in item 1 of the scope of patent application, the three-dimensional volume layer circuit manufacturing plate, wherein the thermal conductivity of the aforementioned thermally conductive filler at 25°C is 10W/m. Above K. The sheet for manufacturing a three-dimensional volume-layer circuit as described in the first item of the scope of patent application, wherein the average particle size of the thermally conductive filler is 0.01 μm or more and 20 μm or less. As mentioned in item 1 of the scope of patent application, it is used for the manufacture of three-dimensional multi-layered circuit Plate, wherein the thermal conductivity of the aforementioned adhesive layer after hardening is 0.5W/m. Above K, 8.0W/m. Below K. The three-dimensional volume-layer circuit manufacturing sheet described in the first item of the scope of patent application, wherein the material constituting the aforementioned adhesive layer contains a thermosetting component and a curing catalyst. The three-dimensional volume-layer circuit manufacturing board described in the first item of the scope of the patent application, wherein the material constituting the aforementioned adhesive layer contains a flux component. As described in the first item of the scope of patent application, the thickness of the aforementioned adhesive layer is 2 μm or more and 500 μm or less. The three-dimensional volume-layer circuit manufacturing plate described in the first item of the scope of patent application, wherein the plate for manufacturing the three-dimensional volume layer circuit further includes: an adhesive layer which is laminated on the adhesive layer One surface side; and a substrate, which is laminated on the opposite surface side of the adhesive layer and the adhesive layer. The three-dimensional volume-layer circuit manufacturing sheet as described in the tenth item of the scope of patent application, wherein the thickness of the aforementioned substrate is 10 μm or more and 500 μm or less. The three-dimensional volume-layer circuit manufacturing board as described in item 10 of the scope of patent application, wherein the ratio (T2/T1) of the thickness of the adhesive layer (T2) to the thickness of the substrate (T1) (T2/T1) is 0.01 or more , Below 5.0. As described in item 10 of the scope of patent application, the three-dimensional volume layer circuit manufacturing board, wherein the storage elastic modulus of the aforementioned adhesive layer at 23°C is 1×10 ³ Pa or more and 1×10 ⁹ Pa or less. As described in item 10 of the scope of patent application, the three-dimensional volume-layer circuit manufacturing board, wherein the tensile elastic modulus of the aforementioned substrate at 23°C is 100 MPa or more Above, below 5000MPa. A method for manufacturing a three-dimensional volumetric layer circuit, which is characterized by comprising the following steps: Assemble one side of the aforementioned adhesive layer of the plate for manufacturing the three-dimensional volumetric layer circuit as described in item 1 of the scope of the patent application or apply for a patent The step of bonding the adhesive layer on the opposite side of the adhesive layer to at least one side of the semiconductor wafer provided with through-electrodes on the three-dimensional volume-layer circuit manufacturing plate described in item 10 of the scope; The step of simultaneously cutting the aforementioned semiconductor wafer and the aforementioned adhesive layer of the aforementioned three-dimensional build-up volume layer circuit manufacturing plate, and then slicing them into a semiconductor wafer of the adhesive layer; attaching a plurality of pieces of the aforementioned adhesive layer The semiconductor wafer of the agent layer is laminated in a plurality of layers such that the through electrodes are electrically connected to each other and the adhesive layer and the semiconductor wafer are alternately arranged to obtain a semiconductor wafer laminate; and the step of forming the semiconductor wafer on the semiconductor wafer The step of curing the adhesive layer of the laminated body and bonding the semiconductor wafers constituting the semiconductor wafer laminated body to each other.

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