CN108459179A - Apparatus for testing chip - Google Patents

Apparatus for testing chip Download PDF

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Publication number
CN108459179A
CN108459179A CN201810251089.7A CN201810251089A CN108459179A CN 108459179 A CN108459179 A CN 108459179A CN 201810251089 A CN201810251089 A CN 201810251089A CN 108459179 A CN108459179 A CN 108459179A
Authority
CN
China
Prior art keywords
chip
cover board
testing chip
detection device
testing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201810251089.7A
Other languages
Chinese (zh)
Inventor
李康
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yangtze Memory Technologies Co Ltd
Original Assignee
Yangtze Memory Technologies Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yangtze Memory Technologies Co Ltd filed Critical Yangtze Memory Technologies Co Ltd
Priority to CN201810251089.7A priority Critical patent/CN108459179A/en
Publication of CN108459179A publication Critical patent/CN108459179A/en
Pending legal-status Critical Current

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Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/04Housings; Supporting members; Arrangements of terminals
    • G01R1/0408Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/04Housings; Supporting members; Arrangements of terminals
    • G01R1/0408Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
    • G01R1/0416Connectors, terminals
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/04Housings; Supporting members; Arrangements of terminals
    • G01R1/0408Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
    • G01R1/0425Test clips, e.g. for IC's

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)

Abstract

The invention discloses a kind of apparatus for testing chip, including:Pedestal, for the fixed test circuit plate with multiple pins;Cover board, with the different multiple notches of area and/or depth, the chip different for fixed dimension.According to the apparatus for testing chip of the present invention, various sizes of chip package is fixed using various sizes of notch on cover board, and the geometric parameter of chip package is measured to feed back the active force and/or pin height of modification substrate latch fastener, cost is thus reduced, improves efficiency, and reduce stress.

Description

Apparatus for testing chip
Technical field
The present invention relates to a kind of apparatus for testing chip, being suitable for test different model BGA package core more particularly to one kind The device for including socket and cover board of piece.
Background technology
With the sustainable development of VLSI circuits, more and more semiconductor devices are integrated on chip.These devices are not only It may include processor, can also include memory, input/output circuitry, various conversion circuits etc..With device collection on chip The raising of Cheng Du, chip output pin number increases and pin definitions, distribution difference according to chip purposes difference, to improve Testing efficiency brings challenges.
Such as existing nand flash memory, common process of verifying needs to carry out HTOL/Cycling tests, while The packaging and testing stage is also required to do FT/QA (function/quality) tests.These tests need to use various test boards.Such as Fig. 1 institutes Show, it is shown that three kinds of BGA packages of nand flash memory test at this stage namely the corresponding tests of BGA-152/BGA-136/BGA-132 The pin vertical view of plate, wherein bosom portion be divided into three types encapsulation common to identical pin definitions area, outermost namely Entire vertical view corresponds to BGA-152 encapsulation, and BGA-132 width is identical as BGA-152 but has highly lacked three row pins, and BGA- 136 height are identical as BGA-152 but width has lacked two tubulation feet.It is encapsulated in the prior art in order to test these three differences Nand flash memory needs to purchase three kinds of different test boards.
For the semiconductor devices of such as nand flash memory, the reliability test of product needs at least 4 pieces of aging to survey Test plate (panel) and 2 pieces of FT/QA test boards, as each different vendor or producer are for flash package type especially pin definitions The test hardware cost that diversification, integrator or assembler face increased dramatically.
Invention content
Therefore, the purpose of the present invention is to provide a kind of easy, efficient apparatus for testing chip.
For this purpose, the present invention provides a kind of apparatus for testing chip, including:Pedestal, for the fixed survey with multiple pins Try circuit board;Cover board, with the different multiple notches of area and/or depth, the chip different for fixed dimension.
Wherein, chip includes the different encapsulation models of BGA-152, BGA-136, BGA-132.
Wherein, there is at least one detection device on the side wall of pedestal, levelness and/or cover board for measuring cover board with The spacing of base side wall.
Wherein, according to the output signal of detection device, the height of multiple pins is adjusted.
Wherein, there is at least one clamping device to be used to that cover board to be clamped, and according to the defeated of detection device on base side wall Go out signal, adjusts the chucking power of clamping device.
Wherein, chucking power is adjusted using the spring or cylinder that are controlled by output signal in real time.
Wherein, the side wall of cover board has reflexive multiple alignment marks.
Wherein, at least one detection device forms detection annulus around the horizontal plane of cover board.
Wherein, detection device is laser leveler and/or rangefinder.
Wherein, according to the output signal of detection device and pin height, the size of notch is finely tuned.
According to the apparatus for testing chip of the present invention, fixes various sizes of chip using various sizes of notch on cover board and seal Dress, and the geometric parameter of chip package is measured to feed back the active force and/or pin height of modification substrate latch fastener, thus reduce Cost improves efficiency, and reduces stress.
Purpose of the present invention, and other purposes unlisted herein, in the range of the application independent claims It is satisfied.The embodiment of the present invention limits in the independent claim, and specific features limit in dependent claims thereto.
Description of the drawings
Carry out the technical solution that the present invention will be described in detail referring to the drawings, wherein:
Fig. 1 is shown according to the corresponding test board vertical view of three kinds of chip bgas of the prior art;
Fig. 2 a show the vertical view of pedestal in test device according to the ... of the embodiment of the present invention;
Fig. 2 b show the perspective view of pedestal in test device according to the ... of the embodiment of the present invention;
Fig. 3 shows the vertical view of test device cover plate according to the ... of the embodiment of the present invention;And
Fig. 4 shows the partial schematic sectional view of test device according to the ... of the embodiment of the present invention.
Specific implementation mode
Come the feature and its skill of the present invention will be described in detail technical solution referring to the drawings and in conjunction with schematical embodiment Art effect, disclose can low cost, high efficiency test it is different encapsulation model chips test devices.It should be pointed out that similar Reference numeral indicate that similar structure, term use herein " first ", " second ", "upper", "lower" etc. can be used for Modify various device architectures.These modifications do not imply that space, order or the level of modified device architecture unless stated otherwise Relationship.
As shown in Fig. 2 a, Fig. 2 b and Fig. 4, test device of the invention includes first pedestal 1, and shape is, for example, rectangle or side Shape.There are four side walls for the tool of pedestal 1, prominent from wherein at least two side wall to have at least two clamping device 1a.It is solid on pedestal 1 The test board 2 of test chip is determined, thereon multiple pin 2s with matrix arrangement.
As shown in Figure 3 and Figure 4, test device further comprises cover board 4, and material is resin or metal, with it is multiple (extremely It is one few, it is preferably several, such as 3 or more) notch, the area and/or depth of notch are different, for accommodating, fixing tool There is the chip 3 of various sizes of different model encapsulation, therefore may not need for the independent developing and testing board 2 of each chip, and only It needs to make inexpensive cover board 4 using ripe moulding technology.Chip 3 has the multiple soldered balls or conduction of matrix arrangement Convex block 3b, for example, welded ball array of BGA package.Three kinds of nand flash memory chips as described above, although encapsulation chip size is not Equally, but back side ball size is as interval, as especially the pin definitions of signal area with size are, therefore can Shape size 4 notch of cover board is arranged makes that it is suitable for different chips.Chip 3 is inverted, by soldered ball 3b and test board 2 Pin 2s machinery, electrical connection, by pin input test signal and export feedback signal, thus tested.
Clamping device 1a on the side wall of pedestal 1 can be various mechanical structures, such as buckle, bolt, Tenon, screw/ Bolt, magnetic force adsorption apparatus etc. prevent chip 3 during the test and the disengaging of test board 2 for gripping cover board 4.
In a preferred embodiment of the invention, clamping device 1a includes adjustable driving mechanism, such as by e-mail Number control spring or cylinder, the power that clamping device 1a is applied on cover board 4 can be adjusted in real time, it is ensured that 4 stress equalization of cover board, Soldered ball 3b is prevented to be detached from or deform with pin 2s.
There is at least one levelness or horizontal distance to examine in the improvement of the present invention, on the side wall of pedestal 1 Device 1d is surveyed, the detection that cover board 4 nearby, for example forms multiple detection device 1d around 4 horizontal plane of cover board is preferably distributed in Annulus, the spacing of levelness and/or cover board 4 and base side wall for detecting cover board 4.Detection device 1d such as laser levelers And/or rangefinder.Preferably there is reflexive multiple alignment marks, such as the metal reflective of coating, plating on the side wall of cover board 4 Film pattern, or the specular local surface that the cover board 4 of metal material is formed is mechanically polished, for being used cooperatively with laser range finder.Inspection It surveys device 1d and outputs signal to the controller (not shown) in pedestal 1, to control the chucking power of clamping device 1a outputs, control The balance of cover board 4.
It is further preferred that the height of the pin 2s of test board 2 is adjustable in test device, such as receiving detection device 1d Output signal applies control by analyzing processing to the height adjuster 2a (such as PZT (piezoelectric transducer)) being connected with each pin 2s Signal processed further fine-tunes the stress balance of chip 3 to adjust the height of pin 2s.
In another preferred embodiment of the present invention, the notch in cover board 4 can also be according to the output signal of detection device 1d (preferably referring also to the height parameter of the output of height adjuster 2a on test board 2) and be finely adjusted.Such as by detection device The output signal of 1d wiredly or passes through other coupled modes (such as bluetooth or near-field communication by other lead (not shown) Mechanism is not shown) it is wirelessly transmitted to the PZT (piezoelectric transducer) built in cover board 4 or micro-driving motor, push each notch The geometry and size of notch is adjusted in pushing block structure at least one side so that chip 3 further by Power is balanced, and open circuit in test process, reduction soldered ball deformation band is avoided to carry out signal burr caused by input impedance variation.
The application can not only improve the test effect for each different encapsulation model chips by above structure as a result, Rate reduces cost, additionally it is possible to effectively reduce the stress between chip 3 and test board 2, improve testing reliability.
According to the apparatus for testing chip of the present invention, fixes various sizes of chip using various sizes of notch on cover board and seal Dress, and the geometric parameter of chip package is measured to feed back the active force and/or pin height of modification substrate latch fastener, thus reduce Cost improves efficiency, and reduces stress.
Although illustrating the present invention with reference to one or more exemplary embodiments, those skilled in the art, which could be aware that, to be not necessarily to It is detached from the scope of the invention and various suitable changes and equivalents is made to device architecture.In addition, can by disclosed introduction The modification of particular condition or material can be can be adapted to without departing from the scope of the invention by making many.Therefore, the purpose of the present invention does not exist In being limited to as the preferred forms for realizing the present invention and disclosed specific embodiment, and disclosed device architecture And its manufacturing method is by all embodiments including falling within the scope of the present invention.

Claims (10)

1. a kind of apparatus for testing chip, including:
Pedestal, for the fixed test circuit plate with multiple pins;
Cover board, with the different multiple notches of area and/or depth, the chip different for fixed dimension.
2. apparatus for testing chip as described in claim 1, wherein chip include BGA-152, BGA-136, BGA-132 not With encapsulation model.
3. apparatus for testing chip as described in claim 1, wherein there is at least one detection device on the side wall of pedestal, use In the spacing for the levelness and/or cover board and base side wall for measuring cover board.
4. apparatus for testing chip as claimed in claim 3, wherein according to the output signal of detection device, adjust multiple pins Height.
5. apparatus for testing chip as claimed in claim 3, wherein have at least one clamping device for pressing from both sides on base side wall Cover board is held, and according to the output signal of detection device, adjusts the chucking power of clamping device.
6. apparatus for testing chip as claimed in claim 5, wherein use and adjusted in real time by the spring or cylinder that output signal controls Save chucking power.
7. apparatus for testing chip as claimed in claim 3, wherein the side wall of cover board has reflexive multiple alignment marks.
8. apparatus for testing chip as claimed in claim 3, wherein at least one detection device is formed around the horizontal plane of cover board Detect annulus.
9. apparatus for testing chip as claimed in claim 3, wherein detection device is laser leveler and/or rangefinder.
10. apparatus for testing chip as claimed in claim 3, wherein according to the output signal of detection device and pin height, Finely tune the size of notch.
CN201810251089.7A 2018-03-26 2018-03-26 Apparatus for testing chip Pending CN108459179A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201810251089.7A CN108459179A (en) 2018-03-26 2018-03-26 Apparatus for testing chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201810251089.7A CN108459179A (en) 2018-03-26 2018-03-26 Apparatus for testing chip

Publications (1)

Publication Number Publication Date
CN108459179A true CN108459179A (en) 2018-08-28

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CN201810251089.7A Pending CN108459179A (en) 2018-03-26 2018-03-26 Apparatus for testing chip

Country Status (1)

Country Link
CN (1) CN108459179A (en)

Citations (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4843313A (en) * 1984-12-26 1989-06-27 Hughes Aircraft Company Integrated circuit package carrier and test device
US6373273B2 (en) * 1999-02-16 2002-04-16 Micron Technology, Inc. Test insert containing vias for interfacing a device containing contact bumps with a test substrate
US20020047720A1 (en) * 1999-01-21 2002-04-25 Farnworth Warren M. CSP BGA test socket with insert and method
CN1690723A (en) * 2004-04-28 2005-11-02 安捷伦科技有限公司 Method and apparatus for non-contact testing and diagnosing electrical paths
CN201015833Y (en) * 2006-12-15 2008-02-06 中芯国际集成电路制造(上海)有限公司 Chip testing and fastening platform
CN201084430Y (en) * 2007-08-28 2008-07-09 灿胜科技股份有限公司 Chip testing device
CN201434875Y (en) * 2009-03-31 2010-03-31 深圳市微高半导体科技有限公司 Chip testing jig
CN201548571U (en) * 2009-09-09 2010-08-11 苏州瀚瑞微电子有限公司 Chip testing fixture
CN201616521U (en) * 2010-01-22 2010-10-27 沁业科技有限公司 Positioning structure for chip test socket
CN102520215A (en) * 2012-01-11 2012-06-27 东莞市钜大电子有限公司 Adjustable clamp for testing battery and mounting method thereof
CN202471762U (en) * 2011-12-02 2012-10-03 金英杰 Manual test base of chip
CN202975051U (en) * 2012-08-16 2013-06-05 国网电力科学研究院 Electric test clamp and system
CN203864146U (en) * 2014-06-05 2014-10-08 京东方光科技有限公司 Backlight module lamination equipment
CN204101684U (en) * 2014-08-29 2015-01-14 深圳市嘉合劲威电子科技有限公司 Apparatus for testing chip
CN106124337A (en) * 2016-08-08 2016-11-16 浙江工业大学 A kind of for the test of rubber elastomer high-temerature creep and the device of stress relaxation test
CN206235710U (en) * 2016-10-10 2017-06-09 北京信诺达泰思特科技股份有限公司 A kind of intelligent arrangement for testing integrated circuit
CN106827766A (en) * 2017-02-14 2017-06-13 武汉华星光电技术有限公司 A kind of make-up machine
CN107505191A (en) * 2017-10-13 2017-12-22 佛山智北汇科技有限公司 A kind of packaging for foodstuff compression test device based on mechanics feedback

Patent Citations (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4843313A (en) * 1984-12-26 1989-06-27 Hughes Aircraft Company Integrated circuit package carrier and test device
US20020047720A1 (en) * 1999-01-21 2002-04-25 Farnworth Warren M. CSP BGA test socket with insert and method
US6373273B2 (en) * 1999-02-16 2002-04-16 Micron Technology, Inc. Test insert containing vias for interfacing a device containing contact bumps with a test substrate
CN1690723A (en) * 2004-04-28 2005-11-02 安捷伦科技有限公司 Method and apparatus for non-contact testing and diagnosing electrical paths
CN201015833Y (en) * 2006-12-15 2008-02-06 中芯国际集成电路制造(上海)有限公司 Chip testing and fastening platform
CN201084430Y (en) * 2007-08-28 2008-07-09 灿胜科技股份有限公司 Chip testing device
CN201434875Y (en) * 2009-03-31 2010-03-31 深圳市微高半导体科技有限公司 Chip testing jig
CN201548571U (en) * 2009-09-09 2010-08-11 苏州瀚瑞微电子有限公司 Chip testing fixture
CN201616521U (en) * 2010-01-22 2010-10-27 沁业科技有限公司 Positioning structure for chip test socket
CN202471762U (en) * 2011-12-02 2012-10-03 金英杰 Manual test base of chip
CN102520215A (en) * 2012-01-11 2012-06-27 东莞市钜大电子有限公司 Adjustable clamp for testing battery and mounting method thereof
CN202975051U (en) * 2012-08-16 2013-06-05 国网电力科学研究院 Electric test clamp and system
CN203864146U (en) * 2014-06-05 2014-10-08 京东方光科技有限公司 Backlight module lamination equipment
CN204101684U (en) * 2014-08-29 2015-01-14 深圳市嘉合劲威电子科技有限公司 Apparatus for testing chip
CN106124337A (en) * 2016-08-08 2016-11-16 浙江工业大学 A kind of for the test of rubber elastomer high-temerature creep and the device of stress relaxation test
CN206235710U (en) * 2016-10-10 2017-06-09 北京信诺达泰思特科技股份有限公司 A kind of intelligent arrangement for testing integrated circuit
CN106827766A (en) * 2017-02-14 2017-06-13 武汉华星光电技术有限公司 A kind of make-up machine
CN107505191A (en) * 2017-10-13 2017-12-22 佛山智北汇科技有限公司 A kind of packaging for foodstuff compression test device based on mechanics feedback

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Application publication date: 20180828